Film forming method and sputtering device

Abstract

According to the present invention, a method for producing a thin film includes: forming, on a substrate, a first layer that contains a group 13 metal element by performing a first sputtering on a sputtering target that contains the group 13 metal element in the presence of a sputtering gas; and forming, on the first layer, a second layer that contains the group 13 metal element by performing a second sputtering on the sputtering target in the presence of the sputtering gas. The energy of the chemical species generated in the first sputtering and reaching the substrate is higher than that in the second sputtering.

Description

Film formation method and sputtering apparatus

[0001] One embodiment of the present invention relates to a method for producing a thin film by sputtering, and a sputtering apparatus for implementing this method.

[0002] In recent years, semiconductors containing nitrides of Group 13 metals, such as gallium nitride (GaN) and indium nitride (InN), have been applied to various semiconductor devices, including light-emitting diodes. Thin films containing nitrides of Group 13 metals are typically fabricated on single-crystal substrates, such as silicon, sapphire, or silicon carbide, by metalorganic chemical vapor deposition (MOCVD). Recently, it has been discovered that thin films of Group 13 metal nitrides with relatively high crystallinity can be fabricated by sputtering (see, for example, Patent Document 1).

[0003] International Publication No. 2022 / 259918

[0004] An object of one embodiment of the present invention is to provide a new method for forming a thin film by using a sputtering method. Alternatively, an object of one embodiment of the present invention is to provide a method for forming a thin film containing a Group 13 metal element and having high crystallinity by a sputtering method. Alternatively, an object of one embodiment of the present invention is to provide a sputtering apparatus for realizing the method.

[0005] One embodiment of the present invention is a method for producing a thin film containing a Group 13 metal element. The method includes first sputtering a sputter target containing a Group 13 metal element in the presence of a sputtering gas to form a first layer containing the Group 13 metal element on a substrate, and second sputtering the sputter target in the presence of a sputtering gas to form a second layer containing the Group 13 metal element on the first layer. The energy of the chemical species generated in the first sputtering and reaching the substrate is higher than that in the second sputtering.

[0006] One embodiment of the present invention is a sputtering apparatus including a target holder configured to hold a sputtering target, and a substrate stage configured to overlap the target holder and support a substrate, the substrate stage being further configured to rotate about a rotation axis that does not overlap the center of the sputtering target when the sputtering target is held by the target holder.

[0007] One embodiment of the present invention is a sputtering apparatus. The sputtering apparatus includes a target holder, a substrate stage, and a first power supply and a second power supply. The target holder is configured to hold a sputtering target. The substrate stage is configured to overlap the target holder and support a substrate. The first power supply and the second power supply are configured to apply an AC voltage between the sputtering target and the substrate stage when the sputtering target is held by the target holder. The frequency of the AC voltage applied by the first power supply is lower than that applied by the second power supply.

[0008] One embodiment of the present invention is a sputtering apparatus. The sputtering apparatus includes a target holder configured to hold a sputtering target, a substrate stage overlapping the target holder, and a bias electrode on the substrate stage. The substrate stage and the bias electrode are configured to support a substrate. The bias electrode is electrically insulated from the substrate stage and configured to be supplied with a potential different from a potential applied to the substrate stage.

[0009] 1 is a schematic end view of a sputtering apparatus according to one embodiment of the present invention; 2 is a schematic top view of a portion of a sputtering apparatus according to one embodiment of the present invention; 3 is a schematic end view illustrating a method for manufacturing a thin film according to one embodiment of the present invention; 4 is a schematic top view of a portion of a sputtering apparatus according to one embodiment of the present invention; 5 is a schematic view illustrating a method for manufacturing a thin film according to one embodiment of the present invention; 6 is a schematic view illustrating a method for manufacturing a thin film according to one embodiment of the present invention; 7 is a schematic end view of a portion of a sputtering apparatus according to one embodiment of the present invention; 8 is a schematic view illustrating a method for manufacturing a thin film according to one embodiment of the present invention; 9 is a schematic end view of a sputtering apparatus according to one embodiment of the present invention; 10 is a schematic view illustrating a method for manufacturing a thin film according to one embodiment of the present invention; 11 is a schematic end view of a light-emitting diode manufactured using the method for manufacturing a thin film according to one embodiment of the present invention; 12 is a schematic end view of a light-emitting diode manufactured using the method for manufacturing a thin film according to one embodiment of the present invention; 13 is a schematic end view of a transistor manufactured using the method for manufacturing a thin film according to one embodiment of the present invention; 14 is a schematic end view of a transistor manufactured using the method for manufacturing a thin film according to one embodiment of the present invention.

[0010] Hereinafter, various embodiments of the present invention will be described with reference to the drawings, etc. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and should not be construed as being limited to the description of the embodiments exemplified below.

[0011] In order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In this specification and each drawing, elements having the same function as those described in the previous drawings may be given the same reference numerals, and duplicated explanations may be omitted. This reference numeral is used to collectively represent multiple identical or similar structures, and when these are individually represented, a hyphen and a natural number are added after the reference numeral.

[0012] In this specification and claims, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.

[0013] In this specification and claims, the expression "a structure exposed from another structure" means a state in which a part of a structure is not covered by another structure, and includes a state in which the part not covered by another structure is covered by yet another structure. The state expressed by this expression also includes a state in which a structure is not in contact with another structure.

[0014] First Embodiment In this embodiment, a sputtering apparatus according to one embodiment of the present invention and a method for forming a thin film using this sputtering apparatus will be described. In the following description, a method for forming a thin film containing a Group 13 metal element on a substrate will be mainly described. However, the sputtering apparatus according to one embodiment of the present invention is not limited to forming thin films containing Group 13 metal elements, and can be used for forming insulating films, conductive films, and semiconductor films containing various elements.

[0015] 1. Sputtering Apparatus FIG. 1 shows a schematic end view of a sputtering apparatus 100 according to this embodiment. The sputtering apparatus 100 includes a chamber 102, which provides a field for collision of ions of elements contained in a sputtering gas, such as argon, nitrogen, hydrogen, ammonia, or oxygen, introduced into the chamber 102 with a sputtering target 150, resulting in deposition of material displaced from the sputtering target 150. The chamber 102 is provided with one or more load lock doors (not shown), through which a substrate 140 is introduced into and removed from the chamber 102. Sputtering gas is introduced into the chamber 102 through one or more gas supply pipes 108 equipped with a valve 106. An exhaust system 104 for reducing the pressure inside the chamber 102 is further connected to the chamber 102.

[0016] A target holder 110 is provided at the top of chamber 102 for holding a sputtering target 150 and a backing plate 152 attached to sputtering target 150. Although one target holder 110 is shown in chamber 102 in FIG. 1 , there is no restriction on the number of target holders 110, and the number may be, for example, 2 or more and 10 or less.

[0017] A substrate stage 112 is provided below the chamber 102 for placing a substrate 140 on which a thin film is to be formed. The substrate stage 112 is configured to rotate around an axis (rotation axis) parallel to the normal to its main surface. The rotation axis of the substrate stage 112 does not overlap with the center (or center of gravity, hereinafter the same) of the sputtering target 150 attached to the target holder 110 in the normal direction. The rotation axis of the substrate stage 112 may or may not overlap with the sputtering target 150 in this direction. The substrate 140 is positioned so that the rotation axis of the substrate stage 112 does not overlap with the center of the substrate 140. Therefore, when the substrate stage 112 rotates with the substrate 140 supported on it, the substrate 140 revolves around the rotation axis of the substrate stage 112. Although not shown, an electrostatic chuck for fixing the substrate 140 may also be provided on the substrate stage 112.

[0018] A shutter 116 can be further provided between the substrate stage 112 and the target holder 110. The shutter 116 is configured to rotate or move in a plane substantially parallel to the main surface of the substrate stage 112. The shutter 116 is configured to cover a portion of the substrate stage 112 without overlapping the entire substrate stage 112 even when closed. Therefore, the shutter 116 is configured to cover an area shifted from the center of the substrate stage 112 when closed, and is configured to block a portion of the material ejected from the sputter target 150 and allow another portion to reach the substrate stage 112 when closed. On the other hand, the shutter 116 is configured to allow most of the ejected material to reach the substrate stage 112 when open.

[0019] The sputtering apparatus 100 further includes a power supply 130 for generating plasma, which is connected to the substrate stage 112 and the backing plate 152. The power supply 130 may be electrically connected to the substrate stage 112 via the chamber 102. The power supply 130 may be an AC power supply or a DC power supply. In the case of an AC power supply, it may be a pulsed power supply. The frequency of the AC power supply may also be selected arbitrarily. For example, the power supply 130 may be an HF power supply of 3 MHz to 30 MHz, typically 13.56 MHz, or a VHF power supply of 30 MHz to 300 MHz. By providing the power supply 130, a potential difference generated between the substrate stage 112 and the sputtering target 150 generates plasma, which ionizes the sputtering gas.

[0020] The sputtering apparatus 100 may further include an electrostatic chuck power supply 120, a heater power supply 122 for heating the substrate stage 112, a controller 124 for controlling the temperature of a cooling medium circulated within the substrate stage 112, a control device 126 for controlling the rotation of the substrate stage, and a bias power supply 128 for supplying a potential to a bias electrode, which will be described later. These components are connected to the substrate stage 112 via, for example, a shaft 114 that supports the substrate stage 112.

[0021] 1, the target holder 110 is disposed on the substrate stage 112, but the configuration of the sputtering apparatus 100 is not limited to this. For example, the substrate stage 112 may be disposed on the target holder 110, or the substrate stage 112 may be provided so that the normal of the substrate 140 supported by the substrate stage 112 is horizontal, and the target holder 110 may be disposed so as to face the substrate stage 112.

[0022] 2. Thin Film Forming Method Hereinafter, a method for forming a thin film using the above-described sputtering apparatus 100 will be described. Here, as an example, a method for forming a thin film containing a nitride of a Group 13 metal will be described.

[0023] First, the sputtering target 150 formed on the backing plate 152 is set in the target holder 110. Examples of materials contained in the sputtering target 150 include gallium nitride-based compound semiconductors containing a Group 13 metal and nitrogen, such as gallium nitride, aluminum gallium nitride, and indium gallium nitride. The sputtering target 150 may also contain dopants such as silicon, germanium, magnesium, zinc, cadmium, and beryllium. Alternatively, the sputtering target 150 may contain gallium metal or indium metal (i.e., zero-valent gallium or indium). When forming a thin film containing a material other than a nitride of a Group 13 metal, the sputtering target 150 may be made of a gallium phosphide-based compound semiconductor such as gallium phosphide, aluminum indium gallium phosphide, or indium gallium arsenide phosphide; an indium-based compound semiconductor such as indium phosphide; or a conductive oxide that transmits visible light, such as indium-tin mixed oxide (ITO) or indium-zinc mixed oxide (IZO). When the thin film to be formed does not contain a Group 13 metal element, a sputtering target 150 containing an element constituting the material contained in the thin film may be used as appropriate. Examples of the element include metals (zero-valent metals) such as aluminum, cobalt, chromium, molybdenum, niobium, titanium, tungsten, zinc, silver, gold, iron, and iridium, or alloys thereof, oxides such as aluminum oxide, copper oxide, chromium oxide, cesium oxide, magnesium oxide, titanium oxide, tungsten oxide, and strontium titanate, carbides such as silicon carbide, nitrides such as aluminum nitride, chromium nitride, and silicon nitride, and non-metallic elements such as silicon, boron, carbon, and germanium.

[0024] The substrate 140 is placed on the substrate stage 112. There are no restrictions on the substrate 140 that can be used in the sputtering apparatus 100, and the substrate 140 may be a single-crystal substrate, a polycrystalline substrate, or an amorphous substrate. For example, a single-crystal silicon substrate, a polycrystalline silicon substrate, a sapphire substrate, a quartz substrate, a silicon carbide substrate, a glass substrate, or a plastic substrate can be used as the substrate 140. For example, a large rectangular amorphous glass substrate, also known as mother glass, can be used as the substrate 140. Specifically, a glass substrate called eighth-generation mother glass measuring 2160 mm x 2460 mm, a glass substrate called ninth-generation mother glass measuring 2400 mm x 2800 mm, a glass substrate called tenth-generation mother glass measuring 2880 mm x 3130 mm, or even larger glass substrates may be used. Examples of materials that can be used for plastic substrates include polymers such as polyimide, polyamide, and polycarbonate. The substrate 140 may be flexible.

[0025] As shown in FIG. 2 , the substrate 140 is positioned so that its center does not overlap with the rotation axis of the substrate stage 112. The substrate 140 may also be positioned so that the entire substrate 140 does not overlap with the rotation axis of the substrate stage 112. With this positioning, the substrate 140 revolves with the rotation of the substrate stage 112. Also, as described above, the rotation axis of the substrate stage 112 does not overlap with the center of the sputter target 150 held by the target holder 110 in the normal direction of its main surface. Therefore, as shown in FIG. 2 , when the substrate stage 112 rotates, the substrate 140 can be in a state where it overlaps with the sputter target 150 in the normal direction of the substrate stage 112, or where it does not overlap partially or entirely. Therefore, as can be seen from FIGS. 1 and 2 , the distance between the substrate 140 and the sputter target 150 changes as the substrate stage 112 rotates.

[0026] The chamber 102 is then depressurized using the exhaust device 104, and a sputtering gas is introduced into the chamber 102 via the gas supply pipe 108. When forming a thin film containing a nitride of a Group 13 metal, nitrogen gas, for example, is selected as the sputtering gas. An inert gas, such as argon, may also be supplied at this time. A potential difference is then created between the sputtering target 150 and the substrate stage 112 using the power supply 130. This generates a plasma between the sputtering target 150 and the substrate stage 112, ionizing the elements contained in the sputtering gas. The ions of the elements contained in the sputtering gas are accelerated by the potential difference between the sputtering target 150 and the plasma and collide with the sputtering target 150. The kinetic energy of the ions ejects atoms or compounds from the sputtering target 150, and these atoms or compounds, and / or compounds resulting from reactions between these atoms and elements in the sputtering gas, are deposited on the substrate 140.

[0027] Here, sputtering is performed in two stages. In the first stage, a first layer 142a including seed crystals of a Group 13 metal nitride is formed on the substrate 140 ( FIG. 3 ). The seed crystals may be formed in an island shape on the substrate 140. To form the seed crystals, it is preferable that the energy (kinetic energy) of the chemical species generated during sputtering and reaching the substrate 140 is high. Preferably, the energy of the chemical species is 100 eV or more. Here, the chemical species include atoms of a Group 13 metal ejected from the sputtering target 150, elements contained in the sputtering gas, and compounds of the Group 13 metal and elements contained in the sputtering gas. The atoms of the Group 13 metal may be ions. The elements contained in the sputtering gas and compounds of the Group 13 metal and elements contained in the sputtering gas may be radicals or ions. The kinetic energy of these chemical species is lost through collisions between the chemical species and other substances (e.g., the sputtering gas, its ions, radicals, electrons, etc.). Therefore, the first stage is performed under conditions where the distance between the substrate 140 and the sputtering target 150 is small to reduce the probability that the chemical species generated during sputtering will collide with other substances. Specifically, as shown in FIG. 4 , in the first stage, the substrate stage 112 is rotated appropriately to position the substrate 140 and the sputtering target 150 so that they overlap in the normal direction of the main surface of the substrate stage 112, and sputtering is performed in this state. If a shutter 116 is provided, the shutter 116 is opened. This shortens the flight distance of the chemical species to reach the substrate 140, allowing the chemical species to reach the substrate 140 while maintaining high energy. As a result, migration of the chemical species is promoted on the surface of the substrate 140, and crystal grains of the Group 13 metal nitride grow effectively, resulting in the formation of a first layer 142a including columnar seed crystals with high crystallinity.

[0028] In the second sputtering, which is the second stage following the first stage, sputtering is performed under conditions in which crystal growth of the Group 13 metal nitride first occurs three-dimensionally from the surface of the seed crystal, and then crystal growth occurs two-dimensionally. That is, in the early stage of the second stage, crystal growth of the Group 13 metal nitride begins from the surface of the seed crystal and occurs in both the normal direction of the substrate 140 and a direction perpendicular to the normal direction, but the second sputtering is performed under conditions in which growth in the normal direction occurs more rapidly. On the other hand, in the later stage of the second stage, the second sputtering is performed under conditions in which crystal growth of the Group 13 metal nitride occurs more rapidly in a direction perpendicular to the normal direction. Specifically, the second sputtering is performed under conditions in which the energy of the chemical species is lower than that in the first stage. Preferably, the second sputtering is performed so that the energy of the chemical species is lower than 100 eV. This is because if high-energy chemical species are incident on the substrate after the seed crystal is formed, the formed seed crystal will be damaged. 4, the substrate stage 112 is rotated to move the substrate 140 away from the sputtering target 150. Preferably, the substrate 140 is moved to a position where it does not overlap with the sputtering target 150, and the second sputtering is performed. This increases the flight distance of the chemical species, and as a result, the chemical species with reduced energy reach the substrate 140.

[0029] By growing a Group 13 metal nitride crystal on the first layer 142a under the above conditions, a second layer 142b is formed three-dimensionally on the first layer 142a at the beginning of the second stage. The crystals three-dimensionally grown from the seed crystal interlock with each other to form a large crystal. During this process, dislocations caused by a lattice mismatch between the seed crystal and the substrate 140 are bent laterally rather than extending in the growth film thickness direction (upward in the plane of the paper), preventing the dislocations from reaching the device surface, resulting in the growth of a high-quality crystal. Subsequently, crystal growth proceeds two-dimensionally, and a third layer 142c is formed covering the second layer 142b. Because crystal growth in the second stage begins from the surface of the first layer 142a, including the seed crystal, the high crystallinity of the first layer 142a is reflected. Therefore, a Group 13 metal nitride thin film with high crystallinity throughout can be formed on the substrate 140.

[0030] Furthermore, because the third layer 142c grows preferentially in two dimensions, a highly flat surface can be obtained. This also improves the flatness of various films formed on the third layer 142c. This contributes to improving the characteristics of semiconductor devices fabricated using the film 142 composed of the first layer 142a to the third layer 142c. For example, when forming a light-emitting diode including the film 142, a quantum well structure having an alternating stack of films with a thickness of about several nanometers may be formed to form the light-emitting layer. However, because the third layer 142c constituting the top layer of the film 142 has high flatness, the quantum well structure can be formed on a flat surface with minimal surface irregularities. This makes it possible to manufacture light-emitting diodes having quantum well structures with highly controlled structures, thereby providing light-emitting diodes with precisely controlled characteristics.

[0031] Sputtering may be performed while the substrate stage 112 is continuously rotated. In this case, in the first stage, the first sputtering is performed with the shutter 116 open, as schematically shown in FIG. 5 , so that high-energy chemical species can reach the substrate 140. On the other hand, in the second stage, the shutter 116 is closed so that the high-energy chemical species do not reach the substrate 140. Alternatively, as shown in FIG. 6 , the shutter 116 may be intermittently opened and closed in the second stage. That is, in the second stage, the shutter 116 may be closed when the substrate 140 overlaps the sputter target 150 in the normal direction of the substrate 140, and may be opened when they do not overlap. In this case, the shutter 116 may be closed simultaneously when the substrate 140 overlaps the sputter target 150, or may be closed before the substrate 140 overlaps the sputter target 150. Similarly, the shutter 116 may be opened at the same time that the substrate 140 no longer overlaps the sputtering target 150, or may be opened after the substrate 140 no longer overlaps the sputtering target 150. By performing sputtering while rotating the substrate stage 112, it is possible to suppress in-plane variations in the substrate 140 (for example, in-plane variations in the crystallinity and thickness of the second layer 142b and the third layer 142c).

[0032] Both the first sputtering and the second sputtering can be performed at a relatively low temperature of 500° C. or higher and 600° C. or lower. Therefore, in addition to a sapphire substrate, silicon substrate, quartz substrate, or silicon carbide substrate, which have a high melting point, a glass substrate, etc., which have a relatively low melting point can be used as the substrate 140. This makes it possible to form thin films containing various materials, in addition to Group 13 metal nitrides, on a large-area substrate 140, thereby reducing the cost of manufacturing the thin film.

[0033] Second Embodiment In this embodiment, a modified example of the sputtering apparatus 100 described in the first embodiment and a method for producing a thin film using the same will be described. Descriptions of configurations that are the same as or similar to the configuration described in the first embodiment may be omitted.

[0034] 7, a bias electrode 118 is provided on the substrate stage 112 or on an electrostatic chuck (not shown) provided on the substrate stage 112. If an electrostatic chuck is not provided, the bias electrode 118 may be electrically insulated from the substrate stage 112 by an insulating film 144 or the like. The bias electrode 118 is connected to a bias power supply 128 (see FIG. 1) and is configured to be supplied with a variable potential from the bias power supply 128. The substrate 140 is placed on the bias power supply 128.

[0035] When forming a thin film using the sputtering apparatus 100, the sputtering target 150 and the substrate stage 112 function as a cathode and an anode, respectively. Therefore, the power supply 130 is controlled so that the potential applied to the sputtering target 150 is lower than the potential applied to the substrate stage 112. Meanwhile, a potential different from the potential applied to the sputtering target 150 and the same as or different from the potential applied to the substrate stage 112 is applied to the bias electrode 118. Specifically, a potential equal to the potential applied to the substrate stage 112 or a potential between the potentials applied to the sputtering target 150 and the substrate stage 112 is applied to the bias electrode 118. Therefore, by supplying a potential to the bias electrode 118, the potential difference between the sputtering target 150 and the bias electrode 118 can be made smaller than the potential difference between the sputtering target 150 and the substrate stage 112. As a result, the acceleration voltage of chemical species generated during sputtering and reaching the substrate 140 can be reduced.

[0036] When a thin film is formed using the sputtering apparatus 100 according to this modification, as shown in FIG. 8, the potential V applied to the bias electrode 118 in the first stage is １ In the second stage, V ２ The first sputtering and the second sputtering are performed so that the potential V １ may be the same as the potential applied to the substrate stage 112. As a result, the potential difference between the sputtering target 150 and the bias electrode 118 is larger in the first sputtering than in the second sputtering. As a result, the acceleration voltage of the chemical species generated in the sputtering and reaching the substrate 140 is larger in the first sputtering, and the energy of the chemical species is higher in the first sputtering than in the second sputtering. Therefore, as described in the first embodiment, the seed crystal is efficiently formed in the first sputtering. Furthermore, since damage from chemical species with high energy can be reduced in the second sputtering, in which the energy of the chemical species is low, the second layer 142b and the third layer 142c grown from the seed crystal surface also have high crystallinity and can grow in three-dimensional and two-dimensional directions, respectively.

[0037] Third Embodiment In this embodiment, a modified example of the sputtering apparatus 100 described in the first and second embodiments and a method for producing a thin film using the same will be described. Descriptions of configurations that are the same as or similar to those described in the first or second embodiments may be omitted.

[0038] In the sputtering apparatus 100 according to this modification, a plurality of power supplies 130 with different characteristics are provided, and a potential difference is generated between the sputtering target 150 and the substrate stage 112 by the plurality of power supplies 130. Specifically, as shown in FIG. 9 , a plurality of AC power supplies with different frequencies (e.g., a first power supply 130-1 and a second power supply 132-2) are provided, and these are switched between by a switch 132. The frequency of the first power supply 130-1 is, for example, 3 MHz or more and 30 MHz or less, typically 13.56 MHz. In contrast, the frequency of the second power supply 130-2 may be higher than that of the first power supply 130-1, for example, 30 MHz or more and 300 MHz or less.

[0039] In this modification, the target holder 110 and the substrate stage 112 may be arranged so that the center of the sputtering target 150 and the center of the substrate 140 overlap on the normal to the substrate stage 112. The shutter 116 may also be configured to allow chemical species to reach the substrate stage 112 when it is open, and to overlap the entire substrate 140 on the normal to the substrate stage 112 when it is closed, thereby preventing chemical species from reaching the substrate stage 112.

[0040] The lower the frequency of the AC voltage applied between the sputtering target 150 and the substrate stage 112, the greater the energy of the ions of the sputtering gas ionized by the plasma, and therefore the greater the energy of the chemical species generated during sputtering and reaching the substrate 140. Therefore, as shown in FIG. 10 , by using a first power supply 130-1 in the first sputtering step (the first stage) and a second power supply 130-2 in the second sputtering step (the second stage), the energy of the chemical species during the first sputtering step can be made greater than that during the second sputtering step. As a result, similar to the first and second embodiments, seed crystals are efficiently formed during the first sputtering step. Furthermore, since damage from high-energy chemical species in the plasma is reduced during the second sputtering step (the second stage), the second layer 142b and the third layer 142c grown from the seed crystal surface also have high crystallinity and can grow in three-dimensional and two-dimensional directions, respectively.

[0041] Fourth Embodiment

[0042] In this embodiment, a modified example of the method for producing a thin film using the sputtering apparatus 100 described in the first to third embodiments will be described. Descriptions of configurations that are the same as or similar to the configurations described in the first to third embodiments may be omitted.

[0043] As described above, in the method for forming a thin film according to the embodiment of the present invention, the sputtering conditions are adjusted so that the energy of the chemical species generated in the sputtering and reaching the substrate 140 is higher in the first sputtering than in the second sputtering. Furthermore, the energy of the chemical species is lost through collisions with other substances. Therefore, the film 142 can be formed so that the probability of collisions between the chemical species and other substances is lower in the first sputtering than in the second sputtering. In other words, the film 142 can be formed under conditions such that the mean free path of the chemical species is longer in the first sputtering than in the second sputtering.

[0044] Specifically, the first and second sputtering processes are performed so that the sputtering gas pressure in the first sputtering process is lower than that in the second sputtering process. For example, the sputtering gas pressure in the first sputtering process may be set to 0.1 Pa or more and 1.0 Pa or less, based on the sputtering gas pressure in the second sputtering process. By forming the film 142 under these conditions, the energy of the chemical species in the first sputtering process can be made higher than that in the second sputtering process. As a result, similar to the first to third embodiments, the seed crystals are efficiently formed in the first sputtering process. Furthermore, the second layer 142b and the third layer 142c, which grow from the seed crystal surface in the second sputtering process, in which the energy of the chemical species is low, also have high crystallinity and can grow in three-dimensional and two-dimensional directions, respectively.

[0045] Fifth Embodiment The sputtering apparatus 100 and the thin film fabrication method using the same described above can be applied to the manufacture of various semiconductor devices. In this embodiment, a light-emitting diode and a transistor will be described as examples of semiconductor devices manufactured using the thin film fabrication methods described in the first to fourth embodiments. Descriptions of configurations that are the same as or similar to the configurations described in the first to fourth embodiments may be omitted.

[0046] (1) Light-Emitting Diode FIG. 11 shows a schematic end view of an example of a light-emitting diode 200 manufactured using the sputtering apparatus 100. The light-emitting diode 200 includes a substrate 202 and an undoped gallium nitride layer (hereinafter, referred to as a uGaN layer) 220 on the substrate 202. The light-emitting diode 200 further includes a stacked layer on the uGaN layer 220, including an n-type cladding layer 222, a p-type cladding layer 226, and a light-emitting layer 224 sandwiched between the n-type cladding layer 222 and the p-type cladding layer 226. The light-emitting diode 200 further includes an anode 228 and a cathode 230 provided on the p-type cladding layer 226 and the n-type cladding layer 222, respectively. The light-emitting diode 200 may further include an optional protective film 240 on the anode 228 and the cathode 230. By forming the uGaN layer 220 provided on the substrate 202 by applying the method for fabricating the film 142 described in the first to fourth embodiments, it is possible to form a uGaN layer 220 with high crystallinity and flatness.

[0047] The n-type cladding layer 222, the light-emitting layer 224, and the p-type cladding layer 226 are configured to emit visible light by recombination of holes and electrons injected from the anode 228 and the cathode 230, respectively. For example, the n-type cladding layer 222 can be configured to contain gallium nitride and a dopant that imparts n-type conductivity, such as silicon or germanium. On the other hand, the p-type cladding layer 226 can be configured to contain gallium nitride and a dopant that imparts p-type conductivity, such as magnesium, zinc, cadmium, or beryllium. The n-type cladding layer 222 and the p-type cladding layer 226 may each have a single-layer structure or a multilayer structure composed of multiple layers with different compositions.

[0048] The light-emitting layer 224 may have, for example, a single layer structure of indium gallium nitride, or may have a quantum well structure as shown in Fig. 11. A quantum well structure is a structure in which a plurality of thin films having different bandgaps and extremely small thicknesses of about 1 to 5 nm are alternately stacked, and examples thereof include an alternating stack of indium gallium nitride and gallium nitride, an alternating stack of indium gallium arsenide phosphide (GaInAsP) and indium phosphide (InP), and an alternating stack of aluminum indium arsenide (AlInAs) and indium gallium arsenide (InGaAs).

[0049] The anode 228 and the cathode 230 inject holes and electrons into the p-type cladding layer 226 and the n-type cladding layer 222, respectively. The anode 228 can be made of, for example, a metal such as palladium, nickel, or gold, a laminated film of these metals, or a thin film of gold or a conductive oxide that transmits visible light, such as indium-tin mixed oxide (ITO) or indium-zinc mixed oxide (IZO). The cathode 230 can be made of, for example, a metal such as aluminum, titanium, gold, silver, or indium, a laminated film of these metals, or an alloy thereof. Both the anode 228 and the cathode 230 can have a single-layer structure or can be a laminated structure of multiple films having different compositions.

[0050] The substrate 202 corresponds to the substrate 140 in the first to third embodiments and is selected from high-melting-point substrates such as a quartz substrate, a single-crystal silicon substrate, a single-crystal sapphire substrate, and a silicon carbide substrate. However, the substrate 202 may also be an amorphous glass substrate, including alkali-free glass. In this case, as shown in FIG. 12 , a buffer layer 210 is provided on the substrate 202, and a uGaN layer 220 is formed thereon. It is also preferable to provide an overcoat 204 and an undercoat 206 between the substrate 202 and the buffer layer 210 and / or below the substrate 202, respectively.

[0051] The buffer layer 210 improves the adhesion between the substrate 202 and the uGaN layer 220, thereby preventing deformation (warping) of the substrate 202 under high-temperature conditions during the manufacture of the light-emitting diode 200. Furthermore, the buffer layer 210 contributes to promoting crystallization in the c-axis direction of the uGaN layer 220 formed thereon. As described above, the uGaN layer 220 is formed using the same method for fabricating the film 142 as described in the first to fourth embodiments. Therefore, even when an amorphous glass substrate is used as the substrate 202, the buffer layer 210 promotes the growth of the seed crystal in the c-axis direction, allowing the formation of the first layer 142a with a uniform crystal growth direction. This improves the crystallinity of the entire uGaN layer 220, including the first layer 142a, as well as of each layer formed thereon. This makes it possible to provide a light-emitting diode 200 with excellent characteristics. The buffer layer 210 may be configured to include aluminum nitride, indium aluminum nitride, aluminum gallium nitride, aluminum oxide, aluminum oxynitride, titanium nitride, titanium, aluminum, silver, nickel, copper, etc. The buffer layer 210 may also have a single layer structure or a stacked layer structure.

[0052] The overcoat 204 is provided on the substrate 202 so as to contact the substrate 202. The overcoat 204 prevents the diffusion of impurities, such as alkali metal ions, contained in the substrate 202. The overcoat 204 may be a single film or a laminate of multiple films containing a silicon-containing inorganic compound, such as silicon oxide or silicon nitride. The undercoat 206 suppresses the desorption of water and other impurities from the substrate 202 under high-temperature conditions during the manufacture of the light-emitting diode 200, prevents the incorporation of oxygen-containing impurities into the uGaN layer 220, n-type cladding layer 222, light-emitting layer 224, p-type cladding layer 226, and the like, and prevents warping of the substrate 202 due to differences in the thermal expansion coefficients between the substrate 202 and the uGaN layer 220. A film containing aluminum nitride, a film containing aluminum oxide, or a laminate of these films can be used as the undercoat 206.

[0053] Protective film 240 is configured to prevent impurities such as oxygen and water from entering light-emitting diode 200, and is composed of one or more films containing a silicon-containing inorganic compound such as silicon oxide or silicon nitride. Openings are provided in protective film 240 to expose anode 228 and cathode 230, and wiring (not shown) is electrically connected to anode 228 and cathode 230 using these openings.

[0054] Each layer constituting the light-emitting diode 200 described above is formed by a sputtering method using the sputtering apparatus 100 and film formation method according to one embodiment of the present invention. Therefore, high temperature film formation required for epitaxial growth using a MOCVD method or the like is not required, and even if a substrate 202 containing amorphous glass is used, the light-emitting diode 200 can be formed without deformation or damage to the substrate 202.

[0055] (2) Transistor FIG. 13 shows a schematic end view of an example of a transistor 250 fabricated using the sputtering apparatus 100. The transistor 250 shown in FIG. 13 is a high-electron-mobility field-effect transistor and includes a substrate 252 corresponding to the substrate 140, a buffer layer 260 on the substrate 252, and an active layer (also referred to as an electron transit layer) 262. The transistor 250 further includes an electron supply layer 264 on the active layer 262, a gate electrode 270 located on the active layer 262 and electrically connected to the active layer 262 and the electron supply layer 264, and a pair of terminals (a first terminal 266 and a second terminal 268). The first terminal 266 and the second terminal 268 may contact the active layer 262, or, as shown in FIG. 13, may contact the active layer 262 via the electron supply layer 264. The transistor 250 further includes an overcoat 254 and an undercoat 256. These configurations will be described below, but the configurations of the substrate 252, overcoat 254, undercoat 256, and buffer layer 260 will not be described because they are the same as the corresponding configurations of the above-described light-emitting diode 200. Furthermore, when a high-melting-point single crystal substrate is used as the substrate 202, the overcoat 254, undercoat 256, buffer layer 260, etc. may not be provided.

[0056] The stack of the active layer 262 and the electron supply layer 264 forms a source / drain current path when the transistor 250 is driven. The active layer 262 and the electron supply layer 264 contain a Group 13 metal element and a Group 15 element. For example, the active layer 262 and the electron supply layer 264 may each contain a gallium nitride or gallium arsenide-based compound semiconductor. As an example, the active layer 262 may be configured to contain undoped gallium nitride, and the electron supply layer 264 may be configured to include a first electron supply layer 264-1 containing undoped aluminum gallium nitride, a second electron supply layer 264-2 containing undoped gallium nitride, and a third electron supply layer 264-3 containing p-type indium gallium nitride. The active layer 262 may be formed using the method for forming the film 142 described in the first to fourth embodiments.

[0057] The first terminal 266, the second terminal 268, and the gate electrode 270 contain a metal such as aluminum, gold, silver, tantalum, molybdenum, titanium, or copper, or an alloy containing one or more of the above metals. Although not shown, a gate insulating film may be provided as an optional configuration between the electron supply layer 264 and the gate electrode 270. The gate insulating film may contain, for example, a silicon-containing inorganic compound such as silicon oxide or silicon nitride, or a so-called high-k material such as hafnium silicate, zirconium silicate, hafnium oxide, or zirconium oxide. These configurations may also be formed by vacuum evaporation, electron beam evaporation, or CVD, but can also be formed by sputtering using the sputtering apparatus 100.

[0058] In addition to the active layer 262, the electron supply layer 264 can also be formed by sputtering in the sputtering apparatus 100 described above. Therefore, the high temperature required for epitaxial growth using the MOCVD method is not required, and even when a substrate 252 containing amorphous glass is used, these layers can be formed without deformation or damage to the substrate 252. Furthermore, even when an amorphous substrate is used as the substrate 252, the buffer layer 210 promotes the growth of the seed crystal in the c-axis direction, allowing the active layer 262 to be formed with a uniform crystal growth direction. Therefore, the crystallinity of the entire active layer 262, including the first layer 142a, and the electron supply layer 264 formed thereon can be improved. This allows the provision of a transistor 250 with excellent characteristics.

[0059] The transistor manufactured using the sputtering apparatus 100 is not limited to the transistor 250 having the structure shown in FIG. 13 . For example, the active layer 262 may have a two-layer structure, as in the transistor 280 shown in FIG. 14 . In this case, the active layer 262 may be composed of, for example, a first active layer 262-1 containing undoped gallium nitride and a second active layer 262-2 containing undoped aluminum gallium nitride. The first active layer 262-1 is formed by the method for fabricating the film 142 described in the first to fourth embodiments. There are no restrictions on the configuration of the electron supply layer 264. For example, the electron supply layer 264 may be composed of a stack of a first electron supply layer 264-1 containing undoped gallium nitride, a second electron supply layer 264-2 containing n-type gallium nitride, and a third electron supply layer 264-3 containing undoped gallium nitride. A gate insulating film 272 is provided between the active layer 262 and the gate electrode 270. The gate insulating film 272 may be configured to contain the silicon-containing inorganic compound and high-k material described above in addition to aluminum oxide.

[0060] In the transistor 280, not only the buffer layer 260, the gate insulating film 272, the gate electrode 270, the first terminal 266, and the second terminal 268, but also the extremely thin active layer 262, which determines the characteristics of the transistor 280, can be formed by sputtering using the sputtering apparatus 100. As described above, the first active layer 262-1 provided on the substrate 252 is formed using a film formation method according to one embodiment of the present invention, and therefore has a highly flat upper surface. This improves the flatness of each layer formed on the first active layer 262-1, and as a result, the structure of each layer can be precisely controlled. This contributes to the mass production of transistors 280 with highly controlled characteristics.

[0061] Although not explained here, the sputtering apparatus 100 and the film formation method using the same can be used not only to manufacture the semiconductor device, but also to form various structures such as wiring, terminals, capacitance elements, and electrodes necessary for driving the semiconductor device.

[0062] The above-described embodiments of the present invention can be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design of a display device of each embodiment, or adds or omits processes or modifies conditions, such a display device is included in the scope of the present invention as long as it includes the gist of the present invention.

[0063] Even if there are other effects and advantages different from those brought about by the aspects of each of the above-mentioned embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention.

[0064] 100: sputtering apparatus, 102: chamber, 104: exhaust device, 106: valve, 108: gas supply pipe, 110: target holder, 112: substrate stage, 114: shaft, 116: shutter, 118: bias electrode, 120: electrostatic chuck power supply, 122: heater power supply, 124: controller, 126: control device, 128: bias power supply, 130: power supply, 130-1: first power supply, 130-2: second power supply, 132: switch, 132-2: second power supply, 140: substrate, 142: film, 142a: first layer, 142b: second layer, 142c: third layer, 144: insulating film, 150: sputtering target, 152: backing plate, 200: light-emitting diode , 202: substrate, 204: overcoat, 206: undercoat, 210: buffer layer, 220: uGaN layer, 222: n-type cladding layer, 224: light-emitting layer, 226: p-type cladding layer, 228: anode, 230: cathode, 240: protective film, 250: transistor, 252: substrate, 254: overcoat, 256: undercoat, 260: buffer layer, 262: active layer, 262-1: first active layer, 262-2: second active layer, 264: electron supply layer, 264-1: first electron supply layer, 264-2: second electron supply layer, 264-3: third electron supply layer, 266: first terminal, 268: second terminal, 270: gate electrode, 272: gate insulating film, 280: transistor

Claims

1. A method for producing a thin film containing a Group 13 metal element, comprising: performing a first sputtering process on a sputtering target containing a Group 13 metal element in the presence of a sputtering gas to form a first layer containing said Group 13 metal element on a substrate; and performing a second sputtering process on said sputtering target in the presence of said sputtering gas to form a second layer containing said Group 13 metal element on said first layer, wherein the energy of chemical species generated in said first sputtering process and reaching said substrate is higher than that in said second sputtering process.

2. The method according to claim 1, wherein the chemical species is at least one of an atom of the Group 13 metal element, an element contained in the sputtering gas, and a compound containing the Group 13 metal element and the element.

3. The manufacturing method according to claim 1, wherein the sputtering gas contains nitrogen, and the first layer and the second layer further contain nitrogen.

4. The method of claim 3, wherein the sputtering gas further comprises argon.

5. The method of claim 1, wherein the sputter target further comprises nitrogen.

6. The method of claim 1, wherein the Group 13 metal element is selected from gallium and indium.

7. The method of claim 1, wherein the energy of the chemical species in the first sputtering is 100 eV or more.

8. The manufacturing method according to claim 1, wherein the pressure of the sputtering gas in the first sputtering is lower than that in the second sputtering.

9. The method of claim 1, wherein the distance between the sputtering target and the substrate in the first sputtering is shorter than that in the second sputtering.

10. The method of claim 1, wherein the first sputtering is performed in a state where the sputtering target overlaps the substrate, and the second sputtering is performed in a state where the sputtering target does not overlap the substrate.

11. The method of claim 1, wherein the substrate is positioned so as to overlap the sputter target and is placed on a substrate stage configured to rotate about a rotation axis that does not overlap the center of the sputter target.

12. The manufacturing method described in claim 11, wherein the first sputtering and the second sputtering are performed while rotating the substrate stage, the first sputtering is performed with a shutter disposed between the substrate stage and the sputtering target open, and the second sputtering is performed with the shutter closed, and the shutter is configured so that it does not overlap with the sputtering target when open and overlaps with the sputtering target when closed.

13. The method of claim 1, wherein the first sputtering and the second sputtering are performed while applying an AC voltage between the substrate and the sputtering target, and the frequency of the AC voltage in the first sputtering is lower than that in the second sputtering.

14. The method of claim 1, wherein the substrate is placed on a bias electrode on a substrate stage, and the first sputtering and the second sputtering are performed so that the potential difference between the sputtering target and the bias electrode in the first sputtering is larger than that in the second sputtering.

15. The method of claim 1, wherein the substrate is selected from a glass substrate, a single crystal silicon substrate, a sapphire substrate, and a silicon carbide substrate.

16. A sputtering apparatus comprising: a target holder configured to hold a sputtering target; and a substrate stage configured to overlap the target holder and support a substrate, wherein the substrate stage is further configured to rotate about a rotation axis that does not overlap with the center of the sputtering target when the sputtering target is held by the target holder.

17. A sputtering apparatus comprising: a target holder configured to hold a sputtering target; a substrate stage configured to overlap the target holder and support a substrate; and first and second power supplies configured to apply an AC voltage between the sputtering target and the substrate stage when the sputtering target is held by the target holder, wherein the frequency of the AC voltage applied by the first power supply is lower than that applied by the second power supply.

18. A sputtering apparatus comprising: a target holder configured to hold a sputtering target; a substrate stage overlapping the target holder; and a bias electrode on the substrate stage, wherein the substrate stage and the bias electrode are configured to support a substrate, and the bias electrode is electrically insulated from the substrate stage and configured to be supplied with a potential different from a potential applied to the substrate stage.

19. A sputtering apparatus according to any one of claims 16 to 18, further comprising a shutter between the target holder and the substrate stage, the shutter being configured so that when the substrate stage rotates with the shutter closed, the substrate placed on the substrate stage is exposed from the shutter and covered by the shutter.

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