Semiconductor device
The semiconductor device with a through-hole in the clip addresses void formation and flux escape, improving solder bonding quality and inspection accuracy.
Patent Information
- Application Number
- PCT/JP2025/000405
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-01
- Filing Date
- 2025-01-08
- Publication Date
- 2025-08-07
AI Technical Summary
Existing semiconductor devices face issues with void formation due to volatilizing flux during the reflow process, which affects solder bonding quality, and lack visual inspection methods to assess bonding integrity.
A semiconductor device design featuring a clip with a through hole on the joining surface allows flux to escape, preventing voids in the solder and enables visual inspection of the bonding condition post-reflow.
The through-hole design effectively suppresses void formation in solder joints and enhances the accuracy of bonding defect detection, ensuring reliable electrical connections.
Smart Images

Figure JP2025000405_07082025_PF_FP_ABST
Abstract
Description
Semiconductor Devices
[0001] The present invention relates to a semiconductor device in which a semiconductor element and a lead frame, or semiconductor elements are electrically bonded to each other, using a clip with a through hole in the bonding surface.
[0002] 2. Description of the Related Art A semiconductor device disclosed in Patent Document 1 is known as a semiconductor device in which a semiconductor element and a lead frame, or semiconductor elements, are electrically joined using a clip with a through hole in the joining surface.
[0003] For example, the abstract of the document states that the problem is to provide a semiconductor device in which small electrode pads are terminal-bonded with low resistance to nitride semiconductors or the like using copper clips (metal frames), and a method for manufacturing the same, and as a solution, states that "the semiconductor device comprises an electrode (102) formed on the top of a semiconductor element (101), and a metal frame (103) whose connection portion is connected to the electrode (102) by solder or adhesive. The metal frame (103) has a through-hole (105) formed in the connection portion and penetrating the metal frame (103). The planar shape of the through-hole (105) on a first surface that contacts the electrode (102) of the metal frame (103) is different from the planar shape on a second surface opposite the first surface."
[0004] Furthermore, paragraph 0009 of the same document states, "Furthermore, during the reflow process of copper clip bonding, the chip die bond material remelts, causing misalignment. During the reflow process, the semiconductor chip and copper clip move due to the melting and solidification of the solder, and if the electrode pads are small, there is a problem that the solder and copper clip themselves are placed outside the electrode pad area." Paragraph 0026 states, "Each electrode pad (102) and copper clip (103) of the semiconductor chip (101), and each terminal lead frame (106) and copper clip (103) are semiconductor The semiconductor chip (101) is bonded to the copper clip (103) with solder material (104). A plurality of through holes (105) are formed in the copper clip (103) above the electrode pads (102) of the semiconductor chip (101), and solder material (104) is poured into the plurality of through holes (105). In this structure, since the through holes (105) are formed in the copper clip (103), excess solder (104) protrudes from the through holes (105) onto the top of the copper clip (103), and therefore, the solder between the copper clip (103) and the electrode pads (102) can be prevented from protruding outside the area of the electrode pads (102).
[0005] In this way, during the reflow process of the semiconductor device of Patent Document 1, excess solder is allowed to escape upward through the through-holes provided in the clip, thereby preventing the solder from spilling out of the electrical pad area.
[0006] JP 2011-204886 A
[0007] However, since the through-holes in Patent Document 1 are filled with excess solder (see Figures 2 and 4 in the same document, etc.), it is not possible to prevent the flux that volatilizes during the reflow process from escaping through the through-holes to prevent the generation of voids in the solder (i.e., poor bonding between the clip and the electrode pad), nor is it possible to visually check the bonding state between the clip and the electrode pad through the through-holes.
[0008] Therefore, the present invention aims to provide a semiconductor device that can suppress the occurrence of voids in the solder by allowing flux that volatilizes during the reflow process to escape through a through hole provided on the joining surface of the clip, and that can visually determine the joining condition of the solder after the reflow process.
[0009] In order to solve the above problems, the semiconductor device of the present invention comprises a semiconductor element, a lead frame, and a clip that connects the semiconductor elements and / or the semiconductor element and the lead frame, the clip having a through hole, and only the outer periphery surrounding the through hole is bonded to the semiconductor element or the lead frame by a bonding material.
[0010] According to the semiconductor device of the present invention, the flux that volatilizes during the reflow process can be allowed to escape through the through holes provided on the joining surface of the clip, thereby suppressing the occurrence of voids in the solder, and the joining condition of the solder after the reflow process can be visually determined.
[0011] 3 is a perspective view of a semiconductor device according to an embodiment of the present invention, a perspective view showing an example of bonding between a semiconductor element, a lead frame, and a clip, a cross-sectional view of FIG. 2, and an enlarged view of the dashed frame of FIG.
[0012] 1 is a perspective view of a semiconductor device 100 according to one embodiment of the present invention. The semiconductor device 100 illustrated here includes four semiconductor elements 1 (1A to 1D), four lead frames 2 (2A to 2D), and two clips 3 (3A, 3B), in which the bottom surfaces of semiconductor elements 1A and 1B are joined together by lead frame 2A, the bottom surfaces of semiconductor elements 1C and 1D are joined together by lead frame 2D, the top surfaces of semiconductor elements 1A, lead frame 2B, and 1C are joined together by clip 3A, and the top surfaces of semiconductor elements 1B, lead frame 2C, and 1D are joined together by clip 3B, and the lead frames 2 are sealed with sealing resin (not shown) except for the terminal portions.
[0013] Here, the semiconductor element 1 is a semiconductor package corresponding to the function of the semiconductor device 100, and is, for example, a chip with a built-in diode or a chip with a built-in IGBT. The lead frame 2 is a rigid body made of copper or the like for allowing current to flow, and is electrically connected to the bottom surface of the semiconductor element 1 via a bonding material 4 such as Sn-Cu solder. The clip 3 is a rigid body made of copper or the like for allowing current to flow, and is electrically connected to the top surfaces of the semiconductor element 1 and the lead frame 2 via a bonding material 4 such as Sn-Cu solder. The clip 3 is also sometimes called a connector, a bonding terminal, or a bridge.
[0014] 2 is an enlarged perspective view of the joint between the semiconductor element 1A, lead frame 2B, and clip 3A in the semiconductor device 100 of FIG. 1. As shown in FIG. 2, the clip 3 of this embodiment has a through hole 31 on the joint surface facing the top surface of the semiconductor element 1, and an outer periphery 32 is formed to surround this through hole 31. Therefore, the top surface of the semiconductor element 1 is formed with an exposed region facing the through hole 31 of the clip 3 and a covered region covered by the outer periphery 32 of the clip 3.
[0015] 2, the through hole 31 is rectangular and the outer periphery 32 is generally square, but the through hole 31 and the outer periphery 32 may be changed to other shapes as long as they perform the functions described below. Also, in the clip 3 of FIG. 2, the through hole 31 is provided in a portion facing the semiconductor element 1, but the through hole 31 may be provided in a portion facing the lead frame 2.
[0016] Fig. 3 is a cross-sectional view of Fig. 2, and Fig. 4 is an enlarged view of the dashed-line frame in Fig. 3. As shown in Fig. 4, a bonding material 4 (solder or the like) is disposed below the outer peripheral portion 32 of the clip 3A to electrically connect the lower surface of the outer peripheral portion 32 to the upper surface of the semiconductor element 1A. When the outer peripheral portion 32 and the semiconductor element 1A are properly bonded through the reflow process, an appropriate amount of the bonding material 4 protrudes (hereinafter referred to as a fillet 41) on both the inside and outside of the outer peripheral portion 32, as illustrated in Fig. 4.
[0017] Therefore, it is possible to determine whether the solder joint between the clip 3A and the semiconductor element 1A is normal or not based on the shape of the fillet 41 formed along the contour of the outer periphery 32. Note that even when a clip without a through hole 31 is used, the quality of the solder joint can be determined based on the shape of the fillet 41, but by using a clip 3 with a through hole 31, the contour of the joint surface can be made longer, further expanding the area in which the quality of the solder joint can be determined, thereby improving the accuracy of detecting joint defects.
[0018] For example, if a portion of the outline of the outer periphery 32 is missing from the fillet 41, it can be determined that a void has occurred near the missing fillet portion, possibly resulting in a poor connection between the clip 3 and the semiconductor element 1. Therefore, the semiconductor device 100 can be classified as a defective product. Note that this defect determination may be performed visually by an operator after the reflow process, or may be performed automatically by an inspection system by analyzing images of the semiconductor device 100 after the reflow process.
[0019] Furthermore, by providing the through-hole 31 in the clip 3, the following effect can be obtained during the reflow process: Namely, by allowing the flux that volatilizes during the reflow process to escape through the through-hole 31, the generation of voids in the bonding material 4 (solder) can be suppressed, and therefore the bonding condition of the bonding material 4 (solder) can be improved compared to when a clip without the through-hole 31 is used.
[0020] As described above, according to the semiconductor device of this embodiment, the flux that volatilizes during the reflow process can be released through the through-holes provided on the joining surface of the clip, thereby suppressing the generation of voids in the joining material (solder), and the joining condition of the joining material (solder) after the reflow process can be visually determined.
[0021] REFERENCE SIGNS LIST 100 Semiconductor device 1 Semiconductor element 2 Lead frame 3 Clip 31 Through hole 32 Periphery 4 Bonding material 41 Fillet
Claims
1. A semiconductor device comprising: a semiconductor element; a lead frame; and a clip that connects the semiconductor elements and / or the semiconductor element and the lead frame, wherein the clip has a through hole, and only the outer periphery surrounding the through hole is bonded to the semiconductor element or the lead frame by a bonding material.
2. A semiconductor device in which a semiconductor element and a clip, or a lead frame and the semiconductor element 101 clip, are connected via a bonding material, wherein a through hole and an outer periphery surrounding the through hole are formed on the bonding surface of the clip, an exposed area in which the semiconductor element or the lead frame is exposed is formed in the area opposite the through hole, and a fillet made of the bonding material is formed along the outline of the outer periphery.
3. A semiconductor device according to claim 1 or 2, wherein the through-hole is rectangular and the outer periphery is approximately square-shaped.
4. A semiconductor device according to claim 1 or 2, wherein the bonding material is solder.
Citation Information
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