Large-scale cluster state generation via cluster emitters frequency tuning

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Patent Information

Application Number
PCT/US2024/028702
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-11
Filing Date
2024-05-10
Publication Date
2025-09-18

AI Technical Summary

Technical Problem

Existing quantum computing architectures face challenges in scalability and spectral broadening of diamond color centers, which hinder the development of large-scale, fully connected qubit graphs for quantum information processing.

Method used

A Quantum System-on-Chip (QSoC) architecture is introduced, utilizing a modular design with diamond color centers and CMOS integration, enabling spectral tuning and inhomogeneous compensation through gas deposition, gas desorption, and mechanical strain to achieve full connectivity among qubits.

Benefits of technology

The QSoC architecture facilitates the creation of a large-scale, fully connected qubit graph with efficient spin-state preparation and measurement, achieving unprecedented computational power and robustness against fabrication variations.

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Abstract

Local quantum communication networks for general-purpose quantum computing may use millions of physical qubits to encode thousands of logical qubits, presenting a substantial hardware architecture challenge. Our modular Quantum System-on-Chip (QSoC) architecture uses a quantum microchiplet (QMC) that features compact two-dimensional arrays of diamond color centers with a resonant dielectric antenna integrated on a foundry-processed chip. Our QSoC architecture enables full connectivity for quantum memory arrays in a set of different resonant frequencies and offers the possibility of further scaling the solid-state physical qubit number via larger and denser QMC arrays and optical frequency multiplexing networking. Our QSoC architecture can efficiently generate a large scale fully connected qubit state by tuning the emitters' emission frequency. Larger qubit resources can achieve a connected qubit cluster state with less tunabiliy. Our QSoC architecture can be readily extended to other solid-state quantum memory platforms.
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Description

Attorney Docket No. MIT-25213WO01 Large-Scale Cluster State Generation via Cluster Emitters Frequency Tuning CROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application claims the priority benefit, under 35 U.S.C.119(e), of U.S. Application No. 63 / 513,100, filed July 11, 2023, which is incorporated herein by reference in its entirety for all purposes. GOVERNMENT SUPPORT

[0002] This invention was made with government support under CHE1839155 and EEC1941583 awarded by the National Science Foundation, and W911NF-21-1-0325 awarded by the U.S. Army Research Office. The government has certain rights in the invention. BACKGROUND

[0003] Modularity plays a critical role in computing architectures, allowing the segregation and combination of diverse system components. Modularity has been applied to quantum information processing, resulting in quantum networks including multiple processing units interconnected through coherent channels. Such networks have been proposed for trapped ion, neutral atom, and spin-based systems, with the aim of achieving scalable distributed quantum processing. Scalability of the qubit layer should be used for building a large-scale quantum system. SUMMARY

[0004] Here, we introduce a quantum system-on-chip (QSoC) modular hardware architecture that leverages the fabrication of the qubit layer with modern mass microfabrication processes for scalability. Each module in our QSoC architecture can link to other modules through free- space optical channels, facilitating coherent, high-bandwidth quantum information connections.

[0005] The central qubit platform in our QSoC architecture utilizes electron-nuclear spin systems of diamond color centers, which can be generated with a foundry ion implantation process for large-scale fabrication. Diamond color centers have emerged as promising solid-Attorney Docket No. MIT-25213WO01 state qubits, demonstrating deterministic remote entanglement, minute-long coherence times with more than ten auxiliary qubits, and large-scale heterogeneous integration into photonic integrated circuits using diamond quantum microchiplets (QMCs).

[0006] Implanted diamond color centers provide scalability benefits but can suffer from naturally inhomogeneous spectral broadening. To address spectral broadening, we integrate the implanted diamond qubit layer on a commercially processed complementary metal-oxide- semiconductor (CMOS) backplane, allowing for local spectral tuning. The system’s co-design with CMOS electronics allows a compact two-dimensional array of qubit arrangements and substantially reduces the size of the system’s control elements. CMOS electronics have been used in gate-defined quantum dot control, low-power cryogenic microwave control, and integration with nitrogen vacancy (NV) centers for sensing applications.

[0007] An example QSoC, also called a QSoC module, can contain 64 QMCs with a co- designed CMOS application-specific integrated circuit (ASIC). QSoCs facilitate qubit scaling and enable qubit inhomogeneous compensation for full connectivity. This benefits the cluster state computational power, which is related to the size of the largest connected qubit graph size. The connected qubit graph can be mapped to a regular qubit square lattice layout in the quantum circuit representation for error correction.

[0008] An example QSoC module can be made by forming a CMOS chip with an array of sockets and forming an array of QMCs in a bulk diamond. Each QMC in the array of QMCs is tethered to the bulk diamond and contains one or more spin qubits, which are configured to emit light in different frequency channels into free space. The bulk diamond is aligned with respect to the CMOS chip such that the array of QMCs is aligned with respect to the array of sockets, then the QMCs in the array of QMCs are locked into respective sockets, which have larger lateral dimensions than the QMCs. The QMCs are released from the bulk diamond to form the QSoC module, then the bulk diamond is retracted from the QSoC module.

[0009] Forming the CMOS chip may include forming conductive traces in at least one metal layer of the CMOS chip under the array of sockets to apply a magnetic field to the array of QMCs. For example, the conductive traces can form a crossbar circuit, optionally with columns shorted together.

[0010] The spin qubits can be color centers (e.g., tin vacancies), in which case forming the array of QMCs comprises forming the color centers in the bulk diamond and patterning the bulk diamond to form the QMCs. Releasing the QMCs from the bulk diamond may includeAttorney Docket No. MIT-25213WO01 moving the bulk diamond laterally with respect to the CMOS chip so as to break tethers connecting the QMCs to the bulk diamond. Moving the bulk diamond laterally with respect to the CMOS chip can also engage the QMCs with the respective sockets in the CMOS chip. After the QMCs have been released from the bulk diamond, the position of at least one of the QMCs can be adjusted with respect to the corresponding socket. Similarly, after releasing the QMCs from the bulk diamond gas can be deposited on or desorbed from a resonant dielectric antenna formed in at least one of the QMCs so as to red-shift or blue-shift, respectively, a resonance frequency of the resonant dielectric antenna.

[0011] All combinations of the foregoing concepts and additional concepts discussed in greater detail below (provided such concepts are not mutually inconsistent) are contemplated as being part of the inventive subject matter disclosed herein. In particular, all combinations of claimed subject matter appearing at the end of this disclosure are contemplated as being part of the inventive subject matter disclosed herein. Terminology explicitly employed herein that also may appear in any disclosure incorporated by reference should be accorded a meaning most consistent with the particular concepts disclosed herein. BRIEF DESCRIPTIONS OF THE DRAWINGS

[0012] The skilled artisan will understand that the drawings primarily are for illustrative purposes and are not intended to limit the scope of the inventive subject matter described herein. The drawings are not necessarily to scale; in some instances, various aspects of the inventive subject matter disclosed herein may be shown exaggerated or enlarged in the drawings to facilitate an understanding of different features. In the drawings, like reference characters generally refer to like features (e.g., functionally similar and / or structurally similar elements).

[0013] FIG. 1A shows an exploded perspective view of a Quantum System-on-Chip (QSoC) module.

[0014] FIG. 1B illustrates an architecture for building a connected qubit graph with qubits resonant with set of frequencies using QSoC modules.

[0015] FIG.1C shows an optical interface between a QSoC module and free-space routing and detection components in an architecture for building a connected qubit graph with qubits resonant with set of frequencies.Attorney Docket No. MIT-25213WO01

[0016] FIG.1D shows a cross-section of three quantum emitters (i1, i2, and i3) in a waveguide. The optical transition from ground to excited state has a transition frequency f, which is tunable with the system tuning voltage bias Vb. The transition frequency F versus tuning voltage bias Vbof different emitters is shown here indicating the different behaviors for voltage tuning response of f as a function of Vb that can be applied to the emitters. Here the emitters are aligned in frequency to set of frequencies f(kfch).

[0017] FIG.1E is an enlarged view of quantum channels numbered from 1 to 16 in a quantum microchiplet (QMC) (scale bar: 10 µm). An emitter can interact with all other emitters of the same resonant frequency through free space optical routing and detection.

[0018] FIG. 1F shows a crossbar circuit implemented in the CMOS backplane of a QSoC module.

[0019] FIG. 2A illustrates a lock-and-release heterogeneous integration process employed to transfer a QMC array, which is heterogeneously integrated on the post-processed CMOS chip, to a diamond parent chip. This process involves alignment, locking, releasing, and retracting.

[0020] FIG.2B is a scanning electron microscope (SEM) image of a quantum channel within the QMC, utilizing a dielectric antenna optimized for free-space photon collection (scale bar: 1 µm).

[0021] FIG. 2C is an SEM image of the central region of a single QMC (scale bar: 10 µm) showing the visible CMOS individual backplane electrodes (BE.i).

[0022] FIG.2D is an optical microscope image of 1024 diamond resonant dielectric antennas integrated onto the CMOS control chip, providing a broader view of the QMC array with Rows 1–8 and columns 1–8 (scale bar: 200 µm).

[0023] FIG.3A shows an overlay of the optical microscope image (scale bar: 100 µm), SEM image (scale bar: 5 µm), and superposition electron-multiplying charge-coupled device (EMCCD) image of the emitters’ bright frames (scale bar: 3 µm). These images displays optically bright tin vacancies (SnV–) under resonant laser excitation frequency ranging from 484.123 THz to 484.153 THz, with corresponding index mappings indicated. The location of this example on the CMOS chip is also marked.

[0024] FIG.3B is a plot of the zero phonon line (ZPL) frequency fci of the emitter with index i in FIG.3A. The indices are sorted according to peak ZPL frequency from low to high, whereAttorney Docket No. MIT-25213WO01 fciconsistently represents the lower frequency value of the double peaks in the photoluminescence excitation (PLE) spectrum.

[0025] FIG. 3C is a plot of the PLE spectra of the marked emitters in FIG. 3A with ZPL frequency shifted by fci.

[0026] FIG.3D is a plot of an example PLE spectrum of a SnV–for emitter i = 16 in FIG.3C. Two spin-state transitions correspond to two peaks in the PLE with splitting ΔE. The inset illustrates the energy diagram of the SnV–with and without the magnetic field.

[0027] FIG.3E is a plot of autocorrelation measurements of the single SnV–in FIG.3D.

[0028] FIG.4A shows wide field images of the QMC region at kfch = 1. Each emitter is labelled by a circle whose shading indicates the voltage tuning Vbat which it is brightest.

[0029] FIG. 4B shows an example of voltage-induced tuning for an emitter crossing various frequency channels. The statistics of the emitter bright spots number are shown underneath for 11 frequency channels connected by the lines, representing both light gray (in one field of view) and dark gray (among all the targeted 1024 quantum channels).

[0030] FIG. 4C illustrates the spin state preparation and measurement pulse sequence, involving four programmable channels: green repump laser (G), resonant laser 1 (R↓)resonating with the lower frequency transition (|↓^to |↓^′), resonant laser 2 (R↑) resonating with the other higher frequency transition (|↑^to |↑^′), and the avalanche photodiode (APD). There are three collection time bins (each of duration time TM). APD time-bin 1 serves as the spin state preparation signal for post-selection. The histogram measurement counts are post-selected with a state preparation threshold count Cth = 18 (APD time-bin 1 readout) with TM = 50 µs. Following post-selection, APD time-bin 2 measures the dark state count, while APD time-bin 3 measures the bright state counts.

[0031] FIG.4D is a plot showing the relationship between state preparation and measurement error ^^spam(black line with left axis) and the successful post-selection probabilities, p, (gray line with right axis) with Cth.

[0032] FIG.5A shows wide field images of the emitter spot region in a QSoC module across 11 frequency channels (kfch from 1 to 11) as well as the illustration of connected cluster using the wide field data from a single field of view.

[0033] FIG.5B shows quantum circuit representations of the connected qubit graph.Attorney Docket No. MIT-25213WO01

[0034] FIG. 5C is a plot of the ratio of the fully connected qubit graph pc versus̅ Δ̅ ̅̅^ ̅^̅^^⁄ ^^inh fordifferent numbers of qubits Nqubit.

[0035] FIG.5D is a plot of the number of links Nlinkversus the number of qubits Nqubitfor the modular quantum architecture. The shading indicates the potential scaling of the corresponding system with the all-to-all connectivity line.

[0036] FIG.6A shows an optical microscope image of a bare die CMOS chip from the foundry (scale bar: 500 µm).

[0037] FIG. 6B is an optical microscope image of the CMOS chip after the first photolithography step (scale bar: 500 µm).

[0038] FIG. 6C is an optical microscope image of the CMOS chip after the first dry etching (scale bar: 100 µm).

[0039] FIG.6D is an optical microscope image of the CMOS chip after wet etching (scale bar: 100 µm).

[0040] FIG. 6E is an optical microscope image of the CMOS chip after the second photolithography and dry etching step(s) (scale bar: 500 µm).

[0041] FIG. 6F is an optical microscope image of the CMOS chip after the third photolithography step (scale bar: 500 µm).

[0042] FIG.6G shows a cross-section of the post-processed CMOS chip.

[0043] FIG.7A is an optical microscope image of a single post-processed CMOS socket unit (scale bar: 10 µm).

[0044] FIG. 7B is an optical microscope image of an 8 × 8 array of post-processed CMOS sockets (scale bar: 100 µm).

[0045] FIG. 7C is an optical microscope image of the central region of the post-processed CMOS chip (scale bar: 100 µm).

[0046] FIG.7D is an SEM image of the post-processed CMOS socket unit (scale bar: 100 µm).

[0047] FIG.7E shows a CMOS chip before post-processing.

[0048] FIG. 7F shows the magnetic field distribution in the central region of the CMOS chip of FIG.7E.

[0049] FIG.7G shows the magnetic field distribution in the central region of FIG.7F.Attorney Docket No. MIT-25213WO01

[0050] FIG. 8A illustrates a setup for a scalable heterogeneous integration (lock-and-release transfer) process between a fabricated parent diamond substrate and a target CMOS chip for QSoC fabrication.

[0051] FIG. 8B shows a cross-section of a unit QMC and its corresponding CMOS locking structure during the lock-and-release transfer operation for QSoC fabrication.

[0052] FIG.9A is a dark-field optical microscope image of a QMC array on a parent diamond (scale bar: 100 µm).

[0053] FIG.9B is an optical microscope image of a single QMC (scale bar: 10 µm).

[0054] FIG.10A illustrates a red-shift of the cavity resonance of the resonant dielectric antenna due to gas deposition on the cavity.

[0055] FIG. 10B illustrates a blue-shift of the cavity resonance resulting from gas desorption using a pulsed high-power laser.

[0056] FIG. 11A is a plot of the simulated Purcell factor versus wavelength and far-field distribution (inset) of the quantum emitter at the center of an optimized resonant dielectric antenna.

[0057] FIG. 11B is a plot of the spectrum of a resonant dielectric antenna spectrum (interference between laser reflection and resonant dielectric antenna reflection) displaying off- resonant (left) and on-resonant (right) peaks with the SnV–ZPL wavelength. The inset shows the simulated electric field distribution (depicting the real part of the electric field, with shading indicating alternating positive and negative regions) overlaid with the edge of the resonant dielectric antenna design, assuming the dipole is at the center of the resonant dielectric antenna with an in-plane orientation perpendicular to the nanobeam.

[0058] FIG.11C is a plot of counts versus delay (representative lifetime measurements) when the resonant dielectric antenna is on-resonance (lower trace) / off-resonance (upper trace) with the SnV–ZPL after / before gas tuning. The middle trace shows the lifetime of another SnV–in the bulk diamond.

[0059] FIG.12A is a plot of the simulated device strain tensor XX component eXXdistribution across the cross-section of the x-z plane at y = 0 µm at a bias voltage of 50 V from the electrode to ground.Attorney Docket No. MIT-25213WO01

[0060] FIG. 12B shows a close-up of the strain distribution in the x-z plane, with the cavity region on the x-axis ranging from –3 µm to 3 µm in FIG.12A. The white rectangles represent the profile of the holes in the cavity.

[0061] FIG. 12C is a plot of the simulated strain distribution in the x-y plane with the cavity region at z = 37.5 nm, illustrated by the dashed lines in FIGS.12A and 12B.

[0062] FIG.12D is a plot of the strain relation versus bias voltage for the location marked with a gray triangle in FIGS.12A–12C.

[0063] FIG.12E is a histogram of the spectral tuning range of the quantum emitters from 0 V to 40 V.

[0064] FIG.13A shows the pulse control sequence for a spin state measurement result without post-selection.

[0065] FIGS.13B–13D are histograms of the spin readout results for the three APD time bins in FIG.4B, presented without post-selection.

[0066] FIG.13E is a readout histogram without post-selection, with a zoomed-in histogram in the inset.

[0067] FIG.13F illustrates the correlation between the second and third APD time bins, with the correlation plot divided into four quarters, each shown with different shading: lower left (APD 2 < Nm, APD 3 < Nm), lower right (APD 2 < Nm, APD 3 > Nm), upper left (APD 2 > Nm, APD 3 < Nm), and upper right (APD 2 > Nm, APD 3 > Nm). Nm is fitted from FIG.13B here, contrasting with the Nmin the specification, which is derived from the post-selected data.

[0068] FIG. 13G is a histogram of the ^^spamstatistics without post-selection. The rectangle represents the change of the ^^spamafter post-selection corresponds to the data in FIG.4B.

[0069] FIG.14 illustrates an optical measurement setup for demonstrating the inventive freely scalable hardware architecture.

[0070] FIG. 15 illustrates all-to-all routing of photons from quantum emitters. The D-shaped mirror divides the field of view (FOV) into two sub-FOVs, each monitored with a scientific CMOS camera. The galvo positions are calibrated with potential color center candidates. Photons from each sub-FOV can be collected into single-mode fibers using corresponding galvos. The collected photons then pass through a fiber beam splitter, followed by a ZPL filter and APD for interference measurement.Attorney Docket No. MIT-25213WO01 DETAILED DESCRIPTION

[0071] Here, we disclose a modular Quantum System-on-Chip (QSoC) architecture, QSoC fabrication, characterization for spin qubit spectral inhomogenous registration, and spin qubit tuning for inhomogeneous compensation that demonstrates the QSoC’s capability to achieve the functions for implementing the architecture. The QSoC architecture provides unprecedented scale, with over 10,000 individual resolved diamond spin-photon interfaces for the fully connected qubit graphs with QSoC tunability. The spins and optical properties of the quantum emitters in each QSoC can be maintained with efficient spin-state preparation and measurement.

[0072] FIG.1A illustrates a QSoC module 120 suitable for use in a modular QSoC architecture. The QSoC module 120 includes an array of quantum microchiplets (QMCs) 122 on a complementary metal-oxide-semiconductor (CMOS) backplane chip 130, also called a CMOS ASIC or CMOS chip. In this example, there are 64 QMCs arranged in an 8×8 QMC array 123 and integrated with the CMOS backplane chip 130. Other QSoC modules may have QMC arrays with different numbers and / or arrangements of QMCs.

[0073] Each QMC 122 is made of a thin sheet of solid-state material, such as a diamond, that is patterned into one or more photonics interfaces 124. In the QMCs 122 shown in FIG.1A, the photonics interfaces 124 take the form of a set of sixteen parallel nanobeams, which are suspended above the CMOS backplane chip 130. (Other QMCs may have more or fewer photonics interfaces as well as different types of photonics interfaces.) Each nanobeam is patterned or etched to form or contain both a nanocavity that contains one or more spin qubits 126 such as SnV–or other color centers, and a dielectric resonant antenna 125 that couples light into and out of the nanocavity, which resonantly couples to the corresponding spin qubit(s) 126. These spin qubits 126, emit photons into free space and absorb photons from free space via the dielectric resonant antennas 125. Metal layer(s) in the CMOS backplane chip 130 reflect light emitted by the dielectric resonant antennas 125 away from the CMOS backplane chip 130 and into free space.

[0074] The nanocavities 124 and dielectric resonant antenna 125 have resonant frequencies that can be tuned, either statically or dynamically. Static (bias) tuning can be accomplished by gas deposition or gas desorption during manufacturing as described below. Dynamic tuning can be accomplished by straining the nanobeams, e.g., with a mechanical actuator, a heater, or a magnetic field generator integrated into the CMOS backplane chip 130.Attorney Docket No. MIT-25213WO01

[0075] Architecture for building a fully connected qubit graph – The largest connected qubit graph determines the quantum computational power of the cluster state so a fully connected qubit graph should utilize as many of qubit resources in the system as possible. FIG. 1B illustrates an interconnected qubit graph, with each gray dot representing a qubit. Each qubit resonates within a specific set of frequency channels, with the frequency channel number ^^fchlabeled from 1 to ^^maxfor heralded entanglement. This is due to the wide spectral range of the zero phonon line (ZPL) in the implanted diamond color centers. FIG.1B shows an example of using the uniform frequency channel distribution with spacingPre-characterization yields a lookup table for each frequency. This lookup table indexes various quantum emitters, detailing their positions and the corresponding voltages to resonate each quantum emitter within a particular frequency channel.

[0076] FIG.1B shows a few indexed quantum emitters in each frequency channel (in practice, there may be many more quantum emitters per frequency channel). The vertical lines in FIG. 1A indicate respective resonant frequency channels. The quantum emitter ZPLs can be tuned to match these frequency channels with the CMOS backplane. The horizontal black line extending from each gray dot represents the potential tuning range of the corresponding qubit. A qubit that can be tuned to match a specific frequency channel ^^(^^fch)is indexed in the lookup table for that frequency channel. Two quantum emitters can be interfered when their ZPLs align with the same frequency channel, and their emitted ZPL photons, sharing identical polarization after filtering, fall within twice the transform-limited linewidth. This is represented visually in FIG.1A by the pale gray diagonal lines connecting the gray dots (qubits).

[0077] Consequently, the gray dots (qubits) form a large, interconnected graph, allowing for communication between every qubit. This graph is dynamically reconfigurable to perform various tasks, including potential cluster connections. For example, the qubit graph can be reprogrammed into a surface code grid structure to support error correction. Moreover, by selectively using high-quality quantum emitters with narrow linewidths and bright spin-photon interfaces, this architecture is made robust against fabrication variations in the hardware.

[0078] Comprehensive system architecture – FIG. 1C shows a hardware architecture 100 with an optical interface 110 and a QSoC module 120 for implementing an interconnected qubit graph like the one shown in FIG.1B. The optical interface 110 encompasses optical excitation, routing, and photodetectors 112 for detection. The QSoC module 120 can be cooled to 4 K in a cryostat (not shown). The spin qubits 126 for the QMCs 122 in the QSoC module 120 can be color centers like SnV−, which offer high quantum efficiency and spin performance that isAttorney Docket No. MIT-25213WO01 compatible with cryogenic temperatures above 1 K. These spin qubits 126 provide a spin- photon interface that enables the remote entanglement between spin qubits 126 in different QSoC modules 120, different QMCs 122, and / or different nanocavities 124. If desired, the electron spins of the spin qubits 126 can be coupled to nuclear spins 128 in the QMC 122. These nuclear spins 128 have longer coherence times and act as the QSoC module’s quantum memory.

[0079] QSoC module detail – FIG. 1D illustrates functions of the QSoC module 120. The ASIC provides a voltage bias ^^bto tune the ZPL transition frequency ^^ of the quantum emitters 126. These can be tuned to a predefined set of frequency channels labeled as ^^(^^fch). An example cross section in the QSoC 120 showcases the tuning response behavior of different quantum emitters (^^1, ^^2, and ^^3) with varying ^^ as a function of ^^b. Some quantum emitters, such as ^^2, can couple to a resonant dielectric antenna to enhance free-space coupling as described below.

[0080] FIG. 1E shows a perspective view of the CMOS circuit layout co-integrated with diamond QMCs 122, each featuring ^^ch= 16 channels. Each quantum channel is integrated with a diamond-resonant dielectric antenna that provides an efficient optical interface based on a 1D photonic crystal cavity design. The antenna incorporates a cointegrated vertically radiating grating coupler, resulting in a simulated 96% free-space collection efficiency within a numerical aperture (NA) of 0.9. A metal layer on the CMOS backplane chip 130 facilitates electronic signal routing from the external electronic source to each QMC 122. If desired, the CMOS backplane chip 130 can incorporate built-in digital logic and analog pulse sequence for routing of quantum control signals with external sources.

[0081] FIG.1F shows an example of the electronic signal routing in the CMOS backplane chip 130. The inset at right shows a cross-section of a portion of the crossbar circuit 134 and the associated QMCs 122. In this case, the metal layer(s) in the CMOS backplane chip 130 are patterned to form the crossbar structure 134, which conducts current from a current source 138 to the QMCs 122. This current may induce a magnetic field that can be used to manipulate the color centers in the QMCs 122. The columns of the crossbar circuit 134 are shorted together to provide global bias control.

[0082] Fabrication with lock-and-release integration – SnV−or other color centers are introduced into bulk diamond through ion implantation and high temperature annealing. TheAttorney Docket No. MIT-25213WO01 surface of the bulk diamond is then patterned and etched to form QMCs, each of which includes several (e.g., 64) SnV−. The QMC fabrication process is described in more detail below.

[0083] FIG.2A illustrates a lock-and-release transfer or heterogeneous integration process 200 for fabricating a QSoC module 120. (FIG.8B, described below, shows additional details of the process 200.) This process 200 enables the parallel transfer of a quantum memory matrix with multiple columns (e.g., C1–C8) and multiple rows (e.g., R1–R8) to a central region (e.g.,500 μm × 500 μm) of a CMOS chip 130, which in this example includes ^^sys = 1024 ofquantum channels in total. In other words, the process 200 can be used to transfer many QMCs 122 to respective sockets 132 in the CMOS backplane chip 130 at the same time.

[0084] In this process 200, a parent diamond chip or bulk diamond 121 patterned with one or more QMCs 122 is flipped and aligned (202) with a locking structure 132 that has been post- fabricated on the CMOS backplane chip 130 (e.g., a 180 nm CMOS chip). After alignment, the parent bulk diamond 121 is moved vertically to lock the QMCs 122 (204) and then horizontally, as depicted in FIG.2A, to break the bridges connecting the QMCs 122 to the bulk diamond 121, releasing the QMCs 122 from the bulk diamond 121 (206) and allowing the bulk diamond 121 to be retracted (208) from the CMOS chip 130. If desired, each of the QMCs 122 can be moved or adjusted with respect to the CMS backplane chip 130 using one or more probes after release from the parent diamond chip 121.

[0085] FIG. 2B shows an SEM image of a single central quantum channel. FIG.2C presents an SEM image of a single QMC region of the chip, with the orange region indicating the individual CMOS backplane electrode region beneath the QMCs. FIG.2D displays an optical microscope image of the 1024 quantum channels integrated into the CMOS control chip. For each quantum channel, there should be about three resonant quantum emitters on average at a certain optical frequency (see the discussion below). The number of quantum channels in this design can be readily scaled by using a larger CMOS chip corresponding to the diamond parent chip size.

[0086] System parameters – Parameters of architectures using QSoC modules include: (1) System size ^^sys, determined by the target number of quantum channels achievable through lock-and-release heterogeneous integration; (2) Emitter number per quantum channel ^^emitter, representing the maximum proportion of the quantum emitter in each quantum channel that can be tuned to the same ZPL frequency (see Methods); (3) Spin qubit state preparation and measurement error ^^spam; (4) The spin-photon interface efficiency, characterized by the ZPLAttorney Docket No. MIT-25213WO01 photon detection probability ^^detafter spin state initialization; and (5) the (potential) nanocavity enhancement (Purcell factor ^^p) of a resonant dielectric antenna, which can boost the ^^det.

[0087] Large-scale SnV−characterization – FIGS. 3A–3E show measurements of SnV−qubits in a QMC using optical excitation with wide-field illumination and readout from an electron-multiplying charge-coupled device (EMCCD). (These measurements are described in greater detail below.) FIG.3A shows the spatial locations of SnV−in the central region of a QMC. FIG.3B shows the ZPL frequency of the color centers (SnV−) ^^ci, and their normalized photoluminescence excitation (PLE) spectra are shown in FIG. 3C. The measurements anddiscussions regarding the transition between the ground state and excited state of SnV −throughout this specification refer to the ZPL C line.

[0088] FIG.3D shows an example PLE of a SnV−with an external magnetic field B = 0.13 T along the

[0001] diamond axis, revealing the two spin-conserving transitions utilized for spin initialization and readout. The spin state can be controlled by an external microwave signal or a modulated laser. The ZPL frequency of SnV−can be tuned to overcome the inhomogeneous distribution via strain. A second-order autocorrelation (g(2)) measurement performed using resonant laser excitation and phonon sideband (PSB) collection confirms the presence of a single quantum emitter. The collected light is split into two avalanche photodiode (APD) collection paths. The g(2)measurement of SnV−in FIG. 3D is illustrated in FIG. 3E. Here, g(2)(0) is 0.07 without background correction, indicating the presence of a single emitter as g(2)(0)<0.5.

[0089] (SnV–spin qubit spectral tuning – An individual SnV–spin qubit can typically be spectrally resolved due to the inherent inhomogeneous distribution of its optical transitions. The SnV–optical frequency can be tuned by means of a capacitive actuator controlled by voltage (detailed in FIGS. 12A–12D, described below). Based on the statistical result, the average tuning range is around 2 GHz within the applicable voltage range. Here, we chose a set of uniform 11 frequency channels with spacing ^^^^ = 2 GHz to utilize inhomogeneously distributed quantum emitters within the mode-hop laser tuning range (described below). The QSoC can tune a quantum emitter’s ZPL within the laser tuning range into one of the resonant frequency channels set on average.

[0090] FIG.4A is a wide-field image of a QMC with the 8 quantum channels, focused on the ^^fch=1 frequency channels. This is superimposed with the anticipated edges of the diamondAttorney Docket No. MIT-25213WO01 nanobeam. Each bright emitter in FIG.4A is surrounded by a circle whose shading corresponds to the optimal tuning voltage to align the bright emitter’s ZPL with the resonant wavelength. As detailed in the inset, the alignment process involves sweeping the tuning voltage from 0 V to 40 V on the CMOS backplane to identify the voltage level that maximizes the emitter’s intensity. Within the field of view (FOV), the emitter data is represented as a point cloud shown in the inset at upper left. Each black dot in the inset marks the location of a quantum emitter, while the connecting gray lines indicate that these emitters can be tuned to resonate with the same frequency channel.

[0091] FIG.4B illustrates the tuning of an emitter from frequency channel ^^fch= 7 to ^^fch= 8 at varying voltages. The spectral tuning range from the min tuning voltage to the max tuning voltage, defined as Δ^^m, is shown in the figure. FIGS. 12A–12D depict a simulation of the spectral tuning effect from voltage-induced strain. The histograms underneath represent the number of emitters found in each frequency channel with light gray for a single FOV and dark gray for all 1024 quantum channels measured in the entire CMOS chip. The number of bright spots in a single FOV at a specific frequency corresponds to the potential direct connections per qubit enabled by the all-to-all optical connection. In this example, there are approximately 2400 resonant emitters in the whole central region of the CMOS chip socket, with this number used to calculate ^^emitterat a specific laser frequency with a maximum of 40 V CMOS backplane tuning.

[0092] Spin state preparation and measurement – FIG. 4C demonstrates spin statepreparation and measurement of the SnV − presented in FIG. 3D. A confocal avalanchephotodiode (APD) collects the phonon sideband (PSB) emissions. The inset reveals the pulse time sequence used for state preparation and measurement (described below). Initially, a green laser resets the SnV−to the negative charge state. Then, a laser pulse resonant with the R↓transition heralds the correct spin state of SnV−. The SnV−spin state is successfully prepared when the APD time-bin 1 counts exceed a signal threshold count ^^th. The inset of FIG. 4C shows the count histogram of ^^2and ^^3with post-selection on successful state preparation events. The histogram result can be used to calculate the spin state preparation and measurement error, ^^spam. In FIG. 4D, the black line plotted against the left (linear) axis represents the relationship between ^^spamand ^^thand the gray line plotted against the right (logarithmic) axis represents the probabilities of successful events for different ^^thvalues. Selecting ^^th= 18 as an example reduces ^^spamto 3% after post-selection. Although the probability of successful initialization is about 3% in this case, initialization can be attemptedAttorney Docket No. MIT-25213WO01 multiple times until it is successful. The spin state preparation should have a successful event on average within 2 ms. FIGS.13A–13G depict the statistical result without post-selection.

[0093] Efficient spin-photon interface - A dielectric antenna structure optimizes the photon emission of the quantum emitter for efficient free space collection. The average PSB photon readout counts from the bright state of the SnV−in FIG. 4B suggest that the lower bound of^^det is above 2.4 × 10−3, surpassing the previously reported ^^detof 4×10−4. This indicates that our potential entanglement generation rate for an emitter pair can be several times higher than for other techniques. The incorporation of a nanocavity Purcell effect by the resonantdielectric antenna can further enhance the ZPL photon emission rate. With an extract ^^p = 2.9for a typical SnV−, the potential improvement in the ZPL photon collection rate is significant through such an efficient spin-photon interface. Enhanced fabrication and alignment of the location and orientation of the emitter can further improve the ^^p, e.g., with a quality factor ten times higher than other devices.

[0094] QSoC enables large-scale fully connected qubit graph – FIG. 5A illustrates how a connected qubit graph can be built using experimental single FOV data at 11 frequency channels (^^fchfrom 1 to 11). FIG.5A shows an expanded version of FIG.4A, encompassing all 11 frequency channels. As in FIG. 4A, the bright emitters in FIG. 5A are encircled, with each circle’s shading denoting the tuning voltage best suited for aligning the encircled emitter with its resonant wavelength. The positions of quantum emitters can be determined by assessing whether their centers, within their respective frequency channels, are within one pixel of each other in the wide-field characterization. Additionally, if the emitters’ brightness surpasses a certain threshold and the difference in brightness is less than 50%, they can be grouped as the same quantum emitters at varying backplane voltages. Emitters meeting these criteria are tunable across multiple frequency channels, and their connections are marked in the graph. Within a given FOV, the emitters have all-to-all connectivity within frequency channels with optical routing, and some of the emitters can be tuned to connect the neighbor frequency channels.

[0095] FIG. 5B shows the quantum circuit of equivalence with the cluster in FIG.5A, assuming there arequantum emitters in each frequency channel ^^fch. A desired quantum process can be compiled for the connectivity of the system. FIG.5C is a plot of the ratio of the fully connected qubit graph to the total number of qubit nodes (^^c) as a function of the average frequency tunability ratio (^^^^m / ^^inh) across the entire inhomogeneous range (^^inh) underAttorney Docket No. MIT-25213WO01 different sizes of the qubit system (^^qubit). This plot shows that the tunability requirement for achieving a fully connected qubit graph is lower for larger systems, allowing larger systems to operate with lower tuning voltages for higher energy efficiency. A fully connected qubit graph allows for the implementation of any error correction code with finite degree and weight. The optical reconfigurability allows for non-planar operation, opening the possibility of using recently developed codes like hyperproduct code or other quantum low-density parity- checking codes with a favorable encoding rate. For practical applications, suitable error codes include surface codes (shown in FIG. 1A) for their high error threshold and optimized performances in decoding and magic state distillation, as well as hashing-bound saturation in handling biased errors.

[0096] Further scaling – An inventive QSoC module offers scalability advantages in terms of qubit numbers and connectivity. Connectivity refers to the number of distinct qubits that a single qubit can interact with in an entanglement trial. FIG.5D illustrates the scaling potential of the QSoC platform, considering the number of qubits (^^qubit) and the number of direct connections per qubit (^^link). The diagonal black line, ^^link= ^^qubit, corresponds to all-to-all connectivity, and the shaded region below represents the physically accessible region on the hardware. The light gray box (left), including the smaller scattered points, represents the data from a single FOV, while the dark gray box (right), including the larger scattered points, represents the data from the entire sample area. Each box includes the results of a single frequency channel (^^max= 1) and 11 frequency channels (^^max= 11).

[0097] To achieve further scaling, a larger field-of-view objective can be used (e.g. a commercial 10× Olympus plan objective with 0.3 NA and a 2.65 mm diameter FOV). Coupled with a denser QMC design (e.g., 2.52 μm spacing for diffraction-limited spots at SnV−ZPLwith the given objective NA), this imaging system can resolve up to 8.7 × 105 spots usingcommercial-off-the-shelf (COTS) lenses, as shown in FIG.5D. When a custom-designed lens is employed, the number of diffraction-limited spot sites can be expanded to over ten million, with each spot capable of hosting hundreds of quantum emitters. This level of qubit density of the QSoC is close to the transistor density of the most advanced semiconductor processes. (3×108transistors / mm2in the Taiwan Semiconductor Manufacturing Company N3 process). With a broader inhomogeneous distribution range, the qubit density should not be limited by the transistor density, although the transistor density may determine the number of individual voltages the system can apply simultaneously.Attorney Docket No. MIT-25213WO01 TABLE 1: QSoC Parameters Parameter Other Systems Example QSoC Module ^^sys128 1024 1 2.325% 3% ^^det(^^p) 4×10−4(1) 2.4×10−3(2.9)

[0098] TABLE 1 summarizes parameters of the characterized QSoC module. A core QSoC module can be fabricated through a lock-and-release transfer method for high-yield, large-scale integration of artificial atom arrays with CMOS chips, along with a high-throughput characterization approach. An inventive QSoC module exhibits significant advantages in terms of the parameters ^^sysand ^^emitterparameters. Other parameters, such as ^^spam, ^^det, and ^^pcan be further improved through refined material processes and control sequences. The QSoC architecture can be expanded by incorporating a superconducting nanowire for efficient single- photon detection, large-scale CMOS chip control for low-latency solid-state spin control, reconfigurable qubit connectivity, and heralded spin entanglement. The QSoC architecture can be readily extended to other solid-state quantum memory platforms, including: thin-film Si waveguides with cavities containing isolated color centers; focused-ion-beam-fabricated yttrium orthovanadate crystals comprising rare-earth ions; thin-film SiC membranes with 4H- C color centers; and semiconductor quantum dots in a film. QSoC Fabrication

[0099] Diamond color center creation and fabrication – We etched the first 10 μm of the diamond (surface orientation

[0001] ) using plasma etching in Ar / Cl2followed by the O2etching to relieve the strained surface. Then we performed a plane ion implantation of120Sn inInnovion at an effective areal dose of 5× 1011 ions per cm2 at 350 keV. The implantation targetdepth is 86 nm, with a longitudinal straggle of 11.7 nm and a lateral straggle of 10.6 nm, estimated from the simulations of stopping and range of ions in matter (SRIM) simulations. After implantation, the diamond was annealed at 1200∘C in an ultrahigh vacuum furnace 10−7mbar, followed by a boiling mixture of 1:1:1 sulfuric acid, nitric acid, and perchloric acid cleaning process. The implantation was at a high dose to guarantee more than one quantum emitter in each quantum channel on average. We estimated a SnV−creation efficiency of approximately 12±5% in this process, based on the spectrum characterization of the diamond pillar array following diamond fabrication. This implantation dose density yields an average ofAttorney Docket No. MIT-25213WO01 3 SnV−per resonant dielectric antenna within the mode volume. After the generation of SnV−in the diamond, we deposited 180 nm of silicon nitride (Si3N4) followed by electron beam lithography and reactive ion etching (RIE) to create a hard mask for the QMC design. We etched Si3N4mask into the diamond layer by O2RIE, followed by an 18 nm of conformal alumina atomic layer deposition. After a breakthrough of alumina with CF4RIE etching, we used oxygen plasma to isotropically undercut the diamond QMC. The Si3N4and alumina were removed in hydrofluoric acid.

[0100] QMC spin-photon interface design. A perturbative cavity design can be implemented in each quantum channel as a dielectric antenna optimized for free space collection. These diamond cavities are connected in groups (e.g., of 16 cavities per group) via mechanical trusses to parallelize the subsequent integration process. The perturbative cavity’s collection efficiency ^^ can be simulated and optimized with a finite-difference time-domain (FDTD) simulation. An example cavity design features a diamond waveguide with a width of 280 nm and thickness of 200 nm, periodically patterned with holes of 64 nm radius and a 202 nm spacing (^^). The defect supporting the cavity mode is introduced by the Gaussianmodulation ^^(^^) = ^^0 + ^^ ×[1 – exp(− ^^2⁄ 2^^2 )], where ^^(^^) denotes the distance of the^^^^ℎhole on one side from the center of the cavity. ^^0is the distance from the center of thefirst hole to the center of the cavity, and ^^ is a dimensionless number that controls thedistribution of the location of the holes. The optimized parameters are ^^0 = 113 nm and^^ = 4.6. Half-round perturbation bumps are introduced along the cavity region as a grating toimprove the free-space collection. The design of the dielectric resonant antenna achieved botha quality factor of 2000 and a collection efficiency of ^^ = 96% with an NA of 0.9, assuming aperfect metal reflector with a distance of ^^^^ = 250 nm below the diamond cavity.

[0101] CMOS Post-processing – FIGS. 6A–6G illustrate photolithography steps for post-processing a CMOS backplane chip. FIG.6A shows the bare die of a CMOS backplane chip. The first photolithography step defines the chiplet locking structure, shown in FIG.6B. The fluorescent surface layer is removed by CF4RIE (FIG.6C), followed by photolithography and RIE etching of the spacer material to form the QMC locking structure. FIG. 6D shows a QMC locking structure made of oxide formed by wet etching of the top metal routing layer, barrier layer, and via with wet etching using iron chloride, ammonium hydroxide, and hydrogen peroxide, respectively. The QMC’s socket 132 is slightly larger than the QMC’s edge, and it restricts the QMC movement during the lock and release as shown in FIG.6G. FIG.6E shows the QMC platform region formed with a second photolithography step and RIE etching. A thirdAttorney Docket No. MIT-25213WO01 lithography step for the subsequent etching exposes the wire-bonding region (FIG. 6F). The QMC is transferred to the CMOS backplane chip before additional photolithography followed by e-beam evaporation of a 50 nm Au / 5 nm Ti metal layer. This metal layer provides a better bonding interface on the CMOS copper and enables the capacitive strain tuning of the quantum emitters.

[0102] In more detail, FIG.6A shows an optical image of a 3 mm × 3 mm bare die of the CMOS chip. Alignment markers on the chip were used for the first photolithography creating the initial photoresist layer defining the chiplet locking structure, as seen in FIG.6B. The passivation layer on the CMOS chip was removed using CF4 reactive-ion etching (RIE) and followed by photolithography and RIE etching of the spacer oxide to form the QMC locking structure, illustrated in FIG. 6C. Wet etching was performed with a solution of iron chloride, ammonium hydroxide, and hydrogen peroxide to remove the top routing metal layer, barrier layer, and via respectively, resulting in the oxide QMC locking structure displayed in FIG.6D. The second photolithography and RIE etching formed the QMC platform region for QMC placement, as shown in FIG.6E and its inset. The third lithography, depicted in FIG.6F, prepared the chip for subsequent etching to expose the internal routing metal layer for the wire bonding region. FIG.6Gshows the cross-section of the post-processed CMOS chip, with M3- M5 corresponding to metal layers 3 to 5 in the foundry metal definition; this CMOS process has a total of 6 metal layers.

[0103] FIGS.7A–7D show the surface of the post-processed CMOS chip, featuring the QMC locking structure on top of the chip, which facilitates the scalable transfer process. FIG. 7A illustrates a single CMOS socket unit, while FIG.7B shows an 8 × 8 array of CMOS sockets within the central 500 µm × 500 µm area of the chip. FIG.7C shows a larger view of the chip, and FIG.8D shows an SEM image of the post-processed CMOS chip's surface.

[0104] FIGS.7E–7G show the magnetic field distribution on the CMOS backplane chip under global microwave control, where the peak magnetic field appears right on top of the CMOS backplane lines. FIG. 7E shows the CMOS backplane chip before post-processing. FIGS.7F and 7G show the magnetic field distribution in the central region of the QSoC / CMOS backplane chip for a magnetic field generated by running a current through conductive traces in the CMOS backplane chip. The peak magnetic field, as seen in the detailed view in FIG.7G, aligns with the CMOS backplane lines. This ensures uniform exposure of the diamond nanobeam regions (aligned with the backplane lines) to a strong microwave magnetic field.Attorney Docket No. MIT-25213WO01 Individual qubit control is achieved by directing microwave-modulated laser light (via an electro-optic modulator) onto specific emitters, enabling selective Raman control.

[0105] Heterogeneous integration setup and process – FIGS. 8A and 8B show a large-scale heterogeneous integration setup and the large-scale heterogeneous integration process 200, respectively. FIG.8B also shows the setup and the changes in the cross-section of a QSoC module during the scalable heterogeneous integration process 200. As depicted in FIG.8A, a fine motor stage 800 and a chip stage 802 align the parent diamond 121 with respect to the CMOS chip 130 using motorized control (FIG.8B, 202). Once aligned, the fine motor stage 800 moves the parent diamond 121 down, allowing each QMC 122 in the QMC array to lock into the post-processed CMOS surface microstructure (socket) 132 (FIG. 8B, 204). The fine motor stage 800 and / or chip stage 802 moves the parent diamond 121 horizontally with respect to the CMOS chip 130 to release the QMC 122 from the parent diamond 121 (FIG.8B, 206). The fabricated QMC locking structure restricts relative movement between the QMC 122 and the parent diamond 121, breaking one or more weak bridges (each about 150 nm in width) that connect the QMC 122 and the parent diamond 121. If the parent diamond 121 supports many QMCs 121, then these QMCs 121 can be inserted simultaneously into multiple sockets 132, either on the same CMOS chip 130 or different CMOS chips 130, accelerating the heterogeneous integration process. Put differently, some or all of the entire QMCs 122 in the QMC array can be transferred to the same CMOS chip 130 at the same time using the lock- and-release transfer process 200 shown in FIG.8B.

[0106] The QMC 122 transfer yield can reach 100% using probes to fine-tune the alignment of the parent diamond 121 with the bottom metal of the CMOS chip 130. Before fine-tuning, the yield for successfully separating the bridges between the QMCs and the bulk diamond may be about 70% per release attempt. Release can be attempted multiple times until all QMCs 122 in the QMC array have been effectively separated from the parent diamond 121. Once the QMCs 122 have been separated from the parent diamond 121, the parent diamond 121 can be retracted or moved away from the fabricated QSoC module (FIG.8B, 208).

[0107] If desired, each QMC 122 can be better aligned to the corresponding socket 132 after the transfer alignment using probes for such a socket design, a process that is significantly faster than the individual transfer steps. For example, the etched locking socket 132 can be 3 µm larger than the diamond QMC 122 in both length and width. A larger QMC design or a finer socket fabrication resolution reduces the amount of fine-tuning to achieve the desired alignment.Attorney Docket No. MIT-25213WO01

[0108] FIG. 9A shows a dark-field optical microscope image of a QMC array on the parent diamond, and FIG. 9B shows an optical microscope image of a QMC array with 16 quantum channels. Due to the fabrication variations, the cavity resonant frequency does not exactly match the SnV–ZPL. The inhomogeneous cavity fabrication variation can be overcome using gas-tuning.

[0109] Gas tuning and Purcell enhancement – The inhomogeneous cavity fabrication variation was overcome by using gas tuning. A supercontinuum laser monitored the QMC cavity spectrum during the gas-tuning process. Gas deposition was a global red-shift process for cavity resonant, while pulsed high-power laser-assisted desorption was an individual opposite control process for blue-shift. The gas-tuned cavity remained stable in a cryogenic environment without significant temperature fluctuations.

[0110] A supercontinuum laser monitors the cavity spectrum during gas tuning. The gas deposition on the cavity results in a red-shift of the cavity resonant frequency, while a pulsed high-power laser can achieve the opposite process of gas desorption, causing a blue- shift in the cavity resonance. Gas deposition can be applied globally to all the cavities, and the laser-assisted desorption process can be performed individually for each cavity. The gas-tuned cavity remains stable in a cryogenic environment without significant temperature fluctuations.

[0111] FIGS. 10A and 10B illustrate adjustments to the resonant wavelengths of perturbative cavities during gas tuning process with the supercontinuum laser monitoring the cavity reflection spectrum. FIG.10A shows a red-shift in the cavity resonant frequency caused by gas deposition within the cavity. A larger PL number indicates a later measurement time during the gas deposition process. FIG. 10B depicts a blue-shift of the cavity resonance resulting from gas desorption process from the cavity using a pulsed high-power laser.

[0112] FIG. 11A shows the simulated Purcell factor and the simulated far-field distribution of the electromagnetic field (inset) for an emitter optically coupled to the resonant dielectric antenna mode. The collection efficiency was 96% for a numerical aperture of (NA) of 0.9 and 78% for NA = 0.5. The experimental quality factor of Q = 220 remained unchanged before and after gas deposition.

[0113] FIG. 11B shows a gas tuning range ^^gasgreater than 10 nm. This gas tuning method can accommodate a gas tuning range of up to 36 nm without reducing the quality factor. Comparing the impact of spectrally tuning the nanophotonic resonance on the lifetime of theemitter yields the Purcell factor F^^ = / ^^ZPL = 2.9. The ^^ZPL was about 0.36,Attorney Docket No. MIT-25213WO01 representing the fraction of the total emission in the strongest of the two ZPL transitions visible at the temperature of 4 K for SnV−.

[0114] FIG.11C illustrates the impact of spectrally tuning the nanophotonics resonance on the emitter's lifetime. It shows the cases of an emitter in the bulk material τbulk = 4.12 ns, an emitter in the off-resonance dielectric antenna τoff= 5.56 ns, and τon= 2.32 ns after tuning the dielectric antenna on-resonance with its ZPL. QSoC Operation

[0115] Strain tuning – FIGS.12A–12E show the result of the simulation of stationary electromechanics conducted using COMSOL Multiphysics. The simulation structure comprised a single diamond waveguide with holes and bumps, an electrode on the top right providing voltage, and the oxide platform region on the CMOS chip to avoid severe deformation and grounding at the base of the substrates. There were several constraints and boundary conditions to the stationary solver. In the solid mechanics’ portion, the diamond body was in the free deformation state, while the surfaces on both ends, which connected to the CMOS chip in reality, are fixed, as is the intersecting surface between the oxide and the ground. The electrostatics constraints include charge conservation to the entire object and terminal and ground boundary conditions for the electrode and the ground, respectively. The simulation results suggest the feasibility of strain tuning through the varying voltage applied to the diamond.

[0116] FIG. 12A shows the overall strain tensor XX component (eXX) distribution. There are two sign-changing nodes along the x axis, and the strain tensor approaches 0 when z is near 0. FIG.12B shows a more detailed view of the cavity center with holes. The profile’s edge is slightly curved due to the electric field, and the strain tensor vanishes in the middle along the z direction. FIG. 12C show the strain distribution at a biased plane at z = 37.5 nm (marked with the dashed line in FIG. 12C). The area between every two holes exhibits a different strain direction (positive) than other regions (negative), consistent with the results in FIG.12B. FIGS.12D and 12E show plots of strain versus voltage and time, respectively. The emitter’s position is denoted by a gray marker in FIGS. 12A–12C. The simulation results suggest the feasibility of strain tuning through the varying voltage applied to the diamond.

[0117] State preparation and measurement error – The preparation and measurement error ^^spamwas calculated based on the histogram result ^^dark(^^)and ^^bright(^^), where tge measurement threshold ^^^^was chosen to minimize ^^spam=Attorney Docket No. MIT-25213WO01min(0.5 (^^ max(^^)^^=^^^^ ^^dark(^^) + ^^ ^^^^−1^^=0 ^^bright(^^)) . The ^^spam accounted for errors due to thebright state reading as dark or the dark state reading as bright during preparation and measurement. The average value of ^^dark(^^)was 1.6 while the average value ofwas 18. FIG.4B shows the histogram fitted with the Poisson distribution.

[0118] FIG. 13A shows the pulse control sequence, while FIGS. 13B–13D show histograms of the three APD time bin readout results in FIG.4A, along with a maximumlikelihood estimation of mixture Poisson distribution fitting (black curve), ^^(^^) =(1 − ^^0)^^^1^exp(−^^1)^^!+ ^^^^^2^exp(−^^2)0 ^^! . Here, ^^0is the fitted probability between two distributions, while and ^^2represent the average count numbers of the bright- and dark-state respectively. The fitted individual Poisson distributions for the bright and dark states were plotted separately in FIGS.13B, 13C, and 13D. We estimated the read-out threshold count ^^mto minimize the read-out error by satisfyingBin and bin 3 are fitted to the mixture Poisson distribution, while bin 2 is fitted to a single Poisson distribution. The fitted ^^mis 3.5 here.

[0119] Based on the relationship between the APD count and ^^m, the correlation was divided into four quadrants. In the lower left quadrant, the spin is not initialized to the correct charge state since APD bins 2 and 3 are both considered dark in the readout result. The lower right quadrant represents successful spin preparation and measurement. In the upper quadrants, the readouts are considered as errors for state preparation and measurement. Repeating the sequence in FIG.13A 10000 times yields 143 correlated events in the upper left quadrant, 1508 correlated events in the lower right quadrant, and 29 correlated events in the upper left quadrant, indicating a preparation and measurement error of 10.24% without post-selection of the first APD bin count. The post-selection selects the correct spin state for reading out and chooses the bright spin state when the laser is better aligned with the emitter's resonant frequency. The readout count is darker if spectral diffusion occurs, causing the emitter's resonant frequency to be misaligned with the laser. This post-selection also raises the readout threshold of ^^mto better distinguish the dark state from the bright state.

[0120] Coherent photon detection efficiency ^^detcalculation – To estimate thedetection efficiency, we considered the SnV − in bulk. The quantum efficiency of SnV −emission is 80%, and four ZPL lines represent 57% of the energy of the emitted photon. The spin-conserved C line is the bright line representing 80% of the emission energy among allAttorney Docket No. MIT-25213WO01 ZPL lines. The PSB of the emission is 43%, and the PSB after applying a 637 nm LP filter is 35%. Consequently, the intensity ratio between the ZPL C line emission and PSB after the 637 nm LP filter is approximately 1.3. FIG. 4C shows an average of 18 counts in PSB after 633 nm LP filter within 50 μs readout time. The SnV−’s lifetime is about 5 ns so its maximum emitted ^^ℎtotal= 10,000 photons in our readout time. We detected ZPL C line photons ^^ℎZPL=24 with our 65% quantum efficiency APD. Therefore, we estimated our ^^det= ^^ℎZPL / ^^ℎtotal> 2.4×10−3. With a higher efficiency detector, such as SNSPD, we can get a ^^det> 3.5×10−3.

[0121] Emitter number per quantum channel calculation – The ^^emitteris the average number of resonant quantum emitters per frequency channel within a quantum channel. We summed up all spatially resolvable spots resonating with each channel while tuning the emitter frequency to estimate the total number of quantum emitters across the 11 frequency channels, where we identified ^^spot= 52322 spots. Taking into account that each SnV−is counted twice due to its two spin transition tuning across neighbor frequency channels on average, the total number of distinct spots ^^′spot ≈ ^^spot / 2 = 26161. Dividing this by the 11frequency channels (^^max) yields an average of ^^s′pot / ^^max= 2378 qubits per frequency channel. Furthermore, dividing this by ^^sysgave an average of ^^emitter= ^^s′pot / (^^max^^sys) = 2.3 resonant quantum emitters per quantum channel per nanobeam. To estimate the size of the connectedqubit graph, we employed the formula: ^^qubit = ^^emitter^^sys^^^^^^max . Here, ^^^^ represents theproportion of the fully connected graph relative to the total number of nodes, a relationship graphically illustrated in FIG.5C.

[0122] Fully-connected qubit number ratio versus system tunability – To estimate the fully connected qubit number ratio ^^cin FIGS.5A–5D, we performed a Monte Carlo simulation with a uniform distributed ^^qubitrandom emitter zero bias frequency in the inhomogeneous range ^^inhfrom 0% to 100%. We assumed a zero-mean Gaussian distribution of maximum tunability for each individual emitter and fitted the standard deviation to match the experimental sampled statistics. And with a dynamic programming calculation counting the number of the quantum emitter that can be connected within all the possible emitters’ tuning ranges, we can estimate the number of connected node ^^conamong ^^qubitsamples we have. This value is an average of ten times in the Monte Carlo simulation. The tunability ratio wasswept to produce the plot of ^^c versus ^^^^m / ^^inh under various ^^qubit shown in FIG. 5D.Although we used eleven frequency channels to cover a 20 GHz emitter spectral range, ^^inhAttorney Docket No. MIT-25213WO01 can reach a 150 GHz for SnV−, which makes ^^^^m / ^^inhto 1.3%. Expanding the spectral range of the emitter should yield a greater ^^qubitin the same FOV. Various methods can be applied for exciting and routing photons to enable optical interactions between different quantum emitters.

[0123] Programmable spin-photon interface – In addition to the Purcell factor and far-field collection efficiency, another parameter is the fraction of emitted power propagatingin the +z direction, defined as the ^^^^ = ^^^^⁄ (2^^^^ + 2^^^^ + 2^^^^) . ^^^^ and ^^^^ represent thetransmitted power in the x and y directions, respectively, while ^^^^denotes the z transmitted power, assuming a perfect metal reflector at a distance of Δz beneath the diamond cavity in the FDTD simulation. A dipole source oriented in the y direction (perpendicular to the nanobeam) at the center of the cavity region excited the cavity mode. An example cavity design features a diamond waveguide with a width (W) of 280 nm and thickness (H) of 200 nm, periodically patterned with holes of 64 nm radius and a 202 nm spacing (a). The defect supporting the cavitymode is introduced by the Gaussian modulation ^^(^^) = ^^0 + ^^ × [1 − exp (− ^^2⁄ 2^^2 )],where ^^(^^) denotes the distance of the mth hole on one side from the center of the cavity. ^^0is the distance from the center of the first hole to the center of the cavity, and ^^ is adimensionless number controlling the holes’ location distribution. The optimized distance and location distribution are ^^0= 113 nm and ^^ = 4.6, respectively.

[0124] To improve collection efficiency in free space, half-round perturbation bumps are introduced along the cavity region, functioning as a grating. Four half-round bump pairs are placed on each side of the cavity. After optimization, the centers of the four bumps are 200 nm, 600 nm, 1070 nm, and 1470 nm from the cavity center, and their radii are 50 nm, 50 nm, 50 nm, and 80 nm, respectively. With these parameters, the resonant dielectric antenna has a quality factor of 2000, a ^^^^of 99.2%, a η(0.5) of 78%, and a η(0.9) of 96%, assuming a perfect back metal reflector at a controlled distance of Δz = 250 nm. This efficient spin-photon interface provides high-speed entanglement generation and the practicality of distillation protocols. Measurement Setup and All-to-All Routing

[0125] Experiment setup – FIG. 14 shows the experimental setup 1400 used to characterize a QSoC module 120, including a cryogenic system, laser source 1440, 4f confocal system, SLM excitation, collection box including the dual-camera image system 1430 (EMCCD and scientific CMOS camera), and collection APD detectors 1420.Attorney Docket No. MIT-25213WO01

[0126] The QSoC module 120 is in a closed-cycle helium cryostat 1402 with a base temperature of 4 K, along with a custom cryogenic microscope objective 1404 (100×, a NA of 0.9). Three-axis nano position steppers 1406 in the cryostat 1402 move the QSoC module 120, which is glued to a custom cryogenic printed circuit board (PCB). A programmable voltage source (not shown) applied a voltage to the QSoC module 120 via the PCB, causing the color centers in the QSoC module 120 emit light into free space. The objective lens 1404 and other free-space optics collected the emitted light and coupled it to fibers 1410, free-space single- photon counting modules 1420, or a duo camera system 1430, composed of a polarized beam splitter (PBS) connected to both a scientific CMOS camera 1432 and an EMCCD 1434 with a long-pass (LP) filter.

[0127] The experimental setup 1400 includes a light source 1440 for resonantly exciting the color centers in the QSoC module 120. The light source 1440 includes a tunable resonant laser 1442 modulated with an acousto-optic modulator (AOM) for pulsing and an electro-optic modulator (EOM) for frequency sideband tuning. A dichroic mirror mixes the modulated resonant laser beam with the output of a 515 nm cobalt laser 1444 off-resonantly repumps the color centers (SnV–) in the QSoC module 120. For PLE, the resonant laser is pulsed by an AOM to excite the color centers, with an optional 515 nm charge repump pulse.

[0128] A radio-frequency (RF) source 1446 with two different RF signal generators coupled to a fast RF switch controls the modulation signal fed to the EOM. The signal from the RF source 1446 was amplified using a high-power amplifier (not shown) operating in the frequency range 1.8 GHz to 4 GHz, which was within the EOM PLE range shown in FIG.4B. Controlling the RF switch in the RF source 1446 makes it possible to switch between the R↓and R ↑ channels, with individual RF amplitudes controlled by the two different signalgenerators. The AOM turns off the R↓and R↑channels simultaneously.

[0129] If desired, the output of the laser source 1440 can be spatially modulated with a spatial light modulator (SLM) 1450. For SLM excitation, the laser’s polarization is transformed with a half waveplate (HWP; λ / 2) and quarter waveplate (QWP; λ / 4; not shown) before reaching the polarized beam splitter (PBS). A Faraday rotator alters the laser polarization, allowing the SLM-modulated laser signal to be reflected into the cryostat 1402 by the PBS. A beam expander (BE) enlarges the beam to cover most of the SLM pixels. The excitation laser beams enter the cryostat 1402 through a 4f system (lenses L1 and L2) after passing through a galvo, which maps the objective back aperture and galvo plane. Another HWP and QWP are positioned just before the cryostat window to adjust the setup for cross-polarization or co-Attorney Docket No. MIT-25213WO01 polarization collection. The SLM enables the optical manipulation of multiple emitters simultaneously, generating multiple beams on the device for initializing and reading out spins within the FOV.

[0130] There are three APD read-out time-bins for each sample measurement. APD bin 1 is positioned when the tunable resonant laser 1442 is in the R↓channel while during APD bin 2 the tunable resonant laser 1442 is also the same. The delay between APD bins 1 and 2 is 50 μs. APD bin 3 has another delay time 50 μs with respect APD bin 2, during which thetunable resonant laser 1442 is also in the R ↑ channel. The lifetime measurements wereperformed using a pulse pattern generator, where the APD signal and the trigger signal of the pulse pattern generator were connected to an APD event timer (not shown) for data analysis.

[0131] In the lifetime measurements, the laser was modulated by an EOM with a digital Mach-Zehnder modulator (MZM) bias controller. The MZM was biased to allow a minimum light output and connected the RF control port of the amplitude modulator to the pulse pattern generator. The pulse pattern generator generated a 2V pulse that turned on the laser within 500 ps providing pulse laser excitation. The pulse trigger signal was analyzed in conjunction with the APD signal received in the APD event timer for signal processing.

[0132] Confocal collection fluorescence in free space was filtered using an LP filter.

[0133] The optical setup confocally collects photons from the quantum emitter(s) in the QSoC module 120, with the signal passing through the PBS. A movable D-shaped mirror 1408 situated between two lenses (L3 and L4) in the image plane reflects a portion of light in the image plane (depending on the mirror’s location) to another optical path, which includes the camera, galvo, and single-mode fiber collection. A scientific CMOS camera 1412 monitors the reflected sub-FOV.

[0134] In the primary FOV path, the collected signal can be directed to the duo-camera system 1430, comprised of a PBS connected to both the CMOS camera 1432 and the EMCCD 1434 with an LP filter. Replacing the EMCCD 1434 with a single-photon avalanche diode (SPAD) camera (not shown) that maps the emitter to the pixel enables parallel readout of the spin state in the pulse sequence. By adjusting the HWP, the collection signal can be directed to either the camera path or the confocal collection path, which can enter either the free-space APD or fiber-coupled APD for collection via a programmable flippable mirror 1414. The fiber- coupled signal can be further processed using photonic routers like optical switches based on microelectromechanical (MEMS) systems and Mach-Zehnder modulators, which canAttorney Docket No. MIT-25213WO01 reconfigure the photon interaction among various fiber array channels. This setup enables simultaneous single-mode collection in different sub-FOVs for interference measurement.

[0135] Various methods can be employed for exciting and routing photons to enable optical interactions between different quantum emitters. For excitation, the SLM 1450 can generate a programmable laser spot array hologram on the QSoC module 120. The D-shaped mirror 1408 divides the entire free space FOV into multiple sub-FOVs. In each sub-FOV, a galvo or MEMS mirror maps a single-mode fiber to any position within the sub-FOV. Once the spin-entangled photons are collected into a fiber, fiber optics can perform arbitrary operations for interference and routing.

[0136] FIG.15 shows an example of collecting two spin-entangled photons in two sub- FOVs. The target collection spot in the FOV is mapped to the corresponding single mode fiber for further interference by galvo mirror. After coupling the spin-entangled photon in the single mode fibers, we can perform bell measurement for herald entanglement between two remote spin qubits. The movable D-shaped mirror 1408 divides a large FOV into two sub-FOVs, enabling interference between any two quantum emitters in different FOVs through time- multiplexing operations. The number of sub-FOVs can be increased with additional D-shaped mirrors, while the number of collection spots within each sub-FOV can be further improved using a single-mode fiber array or a multi-core single-mode fiber array. Conclusion

[0137] While various inventive embodiments have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means and / or structures for performing the function and / or obtaining the results and / or one or more of the advantages described herein, and each of such variations and / or modifications is deemed to be within the scope of the inventive embodiments described herein. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and / or configurations will depend upon the specific application or applications for which the inventive teachings is / are used. Those skilled in the art will recognize or be able to ascertain, using no more than routine experimentation, many equivalents to the specific inventive embodiments described herein. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than asAttorney Docket No. MIT-25213WO01 specifically described and claimed. Inventive embodiments of the present disclosure are directed to each individual feature, system, article, material, kit, and / or method described herein. In addition, any combination of two or more such features, systems, articles, materials, kits, and / or methods, if such features, systems, articles, materials, kits, and / or methods are not mutually inconsistent, is included within the inventive scope of the present disclosure.

[0138] Also, various inventive concepts may be embodied as one or more methods, of which an example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.

[0139] All definitions, as defined and used herein, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and / or ordinary meanings of the defined terms.

[0140] The indefinite articles “a” and “an,” as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean “at least one.”

[0141] The phrase “and / or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases. Multiple elements listed with “and / or” should be construed in the same fashion, i.e., “one or more” of the elements so conjoined. Other elements may optionally be present other than the elements specifically identified by the “and / or” clause, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, a reference to “A and / or B”, when used in conjunction with open-ended language such as “comprising” can refer, in one embodiment, to A only (optionally including elements other than B); in another embodiment, to B only (optionally including elements other than A); in yet another embodiment, to both A and B (optionally including other elements); etc.

[0142] As used herein in the specification and in the claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating items in a list, “or” or “and / or” shall be interpreted as being inclusive, i.e., the inclusion of at least one, but also including more than one, of a number or list of elements, and, optionally, additional unlisted items. Only terms clearly indicated to the contrary, such as “only one of” or “exactly one of,” or, when used in the claims, “consisting of,” will refer to the inclusion ofAttorney Docket No. MIT-25213WO01 exactly one element of a number or list of elements. In general, the term “or” as used herein shall only be interpreted as indicating exclusive alternatives (i.e., “one or the other but not both”) when preceded by terms of exclusivity, such as “either,” “one of,” “only one of,” or “exactly one of.” “Consisting essentially of,” when used in the claims, shall have its ordinary meaning as used in the field of patent law.

[0143] As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase “at least one” refers, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, “at least one of A and B” (or, equivalently, “at least one of A or B,” or, equivalently “at least one of A and / or B”) can refer, in one embodiment, to at least one, optionally including more than one, A, with no B present (and optionally including elements other than B); in another embodiment, to at least one, optionally including more than one, B, with no A present (and optionally including elements other than A); in yet another embodiment, to at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc.

[0144] In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “composed of,” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases “consisting of” and “consisting essentially of” shall be closed or semi-closed transitional phrases, respectively, as set forth in the United States Patent Office Manual of Patent Examining Procedures, Section 2111.03.

Claims

Attorney Docket No. MIT-25213WO01 CLAIMS 1. A method of making a quantum system-on-chip (QSoC) module, the method comprising: forming a complementary metal-oxide-semiconductor (CMOS) chip with an array of sockets; forming an array of quantum microchiplets (QMCs) in a bulk diamond, each QMC in the array of QMCs tethered to the bulk diamond and containing spin qubits; aligning the bulk diamond with respect to the CMOS chip such that the array of QMCs is aligned with respect to the array of sockets; locking the QMCs in the array of QMCs into respective sockets in the array of sockets; releasing the QMCs from the bulk diamond to form the QSoC module; and retracting the bulk diamond from the QSoC module.

2. The method of claim 1, wherein forming the CMOS chip comprises forming conductive traces in at least one metal layer of the CMOS chip under the array of sockets to apply a magnetic field to the array of QMCs.

3. The method of claim 2, wherein forming the conductive traces comprises forming a crossbar circuit.

4. The method of claim 3, wherein forming the crossbar circuit comprises shorting together columns of the crossbar circuit.

5. The method of claim 1, wherein the spin qubits comprise color centers and wherein forming the array of QMCs comprises: forming the color centers in the bulk diamond; and patterning the bulk diamond to form the QMCs.

6. The method of claim 1, wherein releasing the QMCs from the bulk diamond comprises moving the bulk diamond laterally with respect to the CMOS chip so as to break tethers connecting the QMCs to the bulk diamond.

7. The method of claim 6, wherein moving the bulk diamond laterally with respect to the CMOS chip engages the QMCs with the respective sockets.Attorney Docket No. MIT-25213WO01 8. The method of claim 1, further comprising, after releasing the QMCs from the bulk diamond: adjusting a position of one of the QMCs with respect to the corresponding socket.

9. The method of claim 1, further comprising, after releasing the QMCs from the bulk diamond: depositing gas on a resonant dielectric antenna formed in at least one of the QMCs so as to red-shift a resonance frequency of the resonant dielectric antenna.

10. The method of claim 1, further comprising, after releasing the QMCs from the bulk diamond: desorbing gas from a resonant dielectric antenna formed in at least one of the QMCs so as to blue-shift a resonance frequency of the resonant dielectric antenna.

11. A quantum system-on-chip (QSoC) module comprising: a complementary metal-oxide-semiconductor (CMOS) chip with an array of sockets; and an array of quantum microchiplets (QMCs), each QMC in the array of QMCs disposed in a corresponding socket in the array of sockets and containing spin qubits emitters configured to emit light in different frequency channels into free space.

12. The QSoC module of claim 10, wherein the CMOS chip comprises conductive traces, in electromagnetic communication with the array of sockets, to apply a magnetic field to the spin qubits.

13. The QSoC module of claim 12, wherein the conductive traces form a crossbar circuit.

14. The QSoC module of claim 13, wherein columns of the crossbar circuit are shorted together.

15. The QSoC module of claim 10, wherein each of the sockets in the array of sockets has a larger lateral dimension than a corresponding QMC in the array of QMCs.

16. The QSoC module of claim 10, wherein the QMCs in the array of QMCs are formed of diamond and the spin qubits comprise color centers in the diamond.

17. The QSoC module of claim 16, wherein the color centers comprise tin vacancies.Attorney Docket No. MIT-25213WO01 18. The QSoC module of claim 10, wherein each QMC comprises at least one resonant dielectric antenna to emit light from at least one of the spin qubits into free space.

19. The QSoC module of claim 18, wherein the at least one resonant dielectric antenna has a resonant cavity red-shifted by gas deposition.

20. The QSoC module of claim 18, wherein the at least one resonant dielectric antenna has a resonant cavity blue-shifted by gas desorption.

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