Inverter

Abstract

An inverter, comprising: an isolation circuit, a direct-current bus, a balancing circuit, and an inversion circuit, wherein the isolation circuit comprises a primary-side circuit and a secondary-side circuit, the primary-side circuit comprising control switches and a primary-side winding, the secondary-side circuit comprising a secondary-side winding, when the control switches are turned on, a direct-current source charging the primary-side winding, and when all the control switches are turned off, the secondary-side winding charging the direct-current bus; the balancing circuit is used for balancing the voltage of the direct-current bus; and the inversion circuit is configured to output voltages of different phases.

Description

Inverter

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This disclosure is based on the Chinese patent application with application number: 202420287434.3 and application date of February 6, 2024, and claims the priority of the Chinese patent application. The entire content of the Chinese patent application is hereby introduced into the present disclosure as a reference. Technical Field

[0003] The embodiments of the present disclosure relate to an inverter and a photovoltaic power generation system. Background Art

[0004] In Japan and North America, the power grid is split-phase, allowing different loads to be charged using the output voltage of the corresponding phase. Therefore, when the grid system is off-grid, the inverter must output voltages of different phases to ensure normal load operation. Inverters with split-phase output can suffer from poor output when affected by high-frequency input.

[0005] Summary of the Invention

[0006] The present disclosure aims to solve at least one of the technical problems in the background art. To this end, the present disclosure proposes an inverter and photovoltaic power generation system that can achieve high-frequency isolation between the bus capacitor and the inverter circuit in the inverter, thereby improving the output quality of the inverter.

[0007] The present disclosure provides an inverter, comprising: an isolation circuit, a DC bus, a balancing circuit, and an inverter circuit;

[0008] The isolation circuit includes a primary circuit and a secondary circuit, the primary circuit includes a control switch and a primary winding, the secondary circuit includes a secondary winding, the secondary winding is connected to the DC bus, the control switch is connected to the DC source, when the control switch is turned on, the DC source charges the primary winding; when all control switches are turned off, the primary winding stops charging, and the secondary winding charges the DC bus;

[0009] The DC bus includes a positive bus capacitor and a negative bus capacitor, wherein the first electrode of the positive bus capacitor is connected to the positive output electrode of the secondary circuit, the second electrode of the positive bus capacitor is connected to the first electrode of the negative bus capacitor, and the second electrode of the negative bus capacitor is connected to the negative output electrode of the secondary circuit;

[0010] The balancing circuit is configured to balance the voltages of the positive bus capacitor and the negative bus capacitor;

[0011] The inverter circuit is connected to the DC bus, and the inverter circuit is configured to output voltages of different phases to perform phase splitting.

[0012] According to one embodiment of the present disclosure, there are multiple control switches, and the isolation circuit includes:

[0013] A plurality of energy storage capacitors, wherein the plurality of energy storage capacitors are connected in series with each other and in parallel with the DC source;

[0014] A diode, one end of which is connected to the plurality of energy storage capacitors, and the other end of which is connected to the control switch, wherein the diode and the energy storage capacitor jointly clamp the voltage of the DC source to obtain voltages of multiple potentials to reduce the voltage across the control switch.

[0015] According to one embodiment of the present disclosure, the control switch includes a first control switch and a second control switch, the energy storage capacitor includes a first energy storage capacitor and a second energy storage capacitor, the first electrode of the first energy storage capacitor is connected to the positive electrode of the DC source, the second electrode of the second energy storage capacitor is connected to the negative electrode of the DC source, and the second electrode of the first energy storage capacitor is connected to the first electrode of the second energy storage capacitor;

[0016] The first electrode of the first control switch is connected to the first electrode of the energy storage capacitor, the second electrode of the first control switch is connected to the first end of the primary winding, the first electrode of the second control switch is connected to the second end of the primary winding, and the second electrode of the first control switch is connected to the second electrode of the second energy storage capacitor;

[0017] The cathode of the diode is connected to the second electrode of the first control switch and the first end of the primary winding, and the anode of the diode is connected to the second electrode of the first energy storage capacitor and the first electrode of the second energy storage capacitor;

[0018] When both the first control switch and the second control switch are closed, the DC source is configured to charge the primary winding.

[0019] According to an embodiment of the present disclosure, when the first control switch is open and the second control switch is closed, the second energy storage capacitor is configured to charge the primary winding.

[0020] According to one embodiment of the present disclosure, when the first control switch and the second control switch are both disconnected, the secondary winding charges the DC bus.

[0021] According to one embodiment of the present disclosure, the number of the primary windings is multiple, the primary windings include a first primary winding and a second primary winding, the energy storage capacitor includes a first energy storage capacitor and a second energy storage capacitor, the control switches include a first group of control switches and a second group of control switches, the first group of control switches is configured to control the DC source and / or the first energy storage capacitor to charge the first primary winding, the second group of control switches is configured to control the DC source and / or the second energy storage capacitor to charge the second primary winding, and the first primary winding and the second primary winding are charged alternately.

[0022] According to one embodiment of the present disclosure, the balancing circuit includes a first switch, a second switch and an inductor; the first end of the first switch is connected to the first pole of the positive bus capacitor, the second end of the first switch is connected to the first end of the second switch, the second end of the second switch is connected to the second pole of the negative bus capacitor, the first end of the inductor is connected to the second end of the first switch and the first end of the second switch, and the second end of the inductor is connected to the second pole of the positive bus capacitor and the first pole of the negative bus capacitor.

[0023] According to one embodiment of the present disclosure, when the voltage of the positive bus capacitor is less than the voltage of the negative bus capacitor, the duty cycle of the first switch is less than the duty cycle of the second switch, so as to control the charging of the first bus capacitor so that the voltages of the first bus capacitor and the second bus capacitor are the same.

[0024] According to one embodiment of the present disclosure, the inverter includes multiple loops, different loops are configured to output voltages of different phases, and the loops include a first transistor, a second transistor and an output end, the first end of the first transistor is connected to the first pole of the positive bus capacitor, the second end of the second transistor is connected to the second pole of the negative bus capacitor, and the second end of the first transistor is connected to the first end of the second transistor; the first end of the output end is connected to the second end of the first transistor and the first end of the second transistor, and the second end of the output end is connected to the second pole of the positive bus capacitor and the first pole of the negative bus capacitor.

[0025] The present disclosure provides a photovoltaic power generation system, comprising a photovoltaic module and the inverter described above, wherein the inverter is configured to convert a direct current voltage obtained by the photovoltaic module into an alternating current voltage.

[0026] One or more of the above technical solutions in this disclosure have at least the following technical effects: the inverter, through the transformer and control switch of the isolation circuit, cooperates so that when the DC source inputs voltage, the transformer does not charge the bus capacitor; when the control switch is disconnected and the DC source does not input voltage to the transformer, the transformer charges the bus capacitor, thereby achieving high-frequency isolation between the bus capacitor and the inverter circuit and improving the output quality of the inverter. Additional aspects and advantages of this disclosure will be partially described in the following description and partially become apparent from the following description or learned through practice of this disclosure.

[0027] BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and / or additional aspects and advantages of the present disclosure will become apparent and readily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0029] FIG1 is a circuit diagram of an inverter according to an embodiment of the present disclosure;

[0030] FIG2 is a second circuit diagram of an inverter provided in an embodiment of the present disclosure;

[0031] FIG3 is a third circuit diagram of an inverter provided in an embodiment of the present disclosure;

[0032] FIG4 is a fourth circuit diagram of an inverter provided in an embodiment of the present disclosure;

[0033] FIG5 is a circuit diagram of a DC source, an isolation circuit, and a DC bus provided by an embodiment of the present disclosure;

[0034] FIG6 is a second circuit diagram of a DC source, an isolation circuit, and a DC bus provided by an embodiment of the present disclosure;

[0035] FIG7 is a third circuit diagram of a DC source, an isolation circuit, and a DC bus provided by an embodiment of the present disclosure;

[0036] FIG8 is a circuit diagram of a DC bus and a balancing circuit provided in an embodiment of the present disclosure;

[0037] FIG9 is a schematic diagram of a circuit of a DC bus and a loop according to an embodiment of the present disclosure;

[0038] FIG10 is a second circuit diagram of a DC bus and a loop provided in an embodiment of the present disclosure.

[0039] Figure 1: Inverter 100, isolation circuit 10, DC bus 30, balancing circuit 50, inverter circuit 70, primary circuit 11, secondary circuit 12, control switch 111, primary winding 113, secondary winding 131, DC source 300, positive bus capacitor 31, negative bus capacitor 33, energy storage capacitor 15, diode 17, first primary winding 1131, second primary winding 1133, first group of control switches 1111, second group of control switches 1113, first diode 171, second diode 173. DETAILED DESCRIPTION

[0040] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly describe the technical solutions in the embodiments of the present disclosure. Obviously, the embodiments described are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0041] The terms "first", "second", etc. in the specification and claims of the present disclosure are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present disclosure can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects related to each other are in an "or" relationship.

[0042] The inverter and photovoltaic power generation system provided by the embodiments of the present disclosure are described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0043] In Japan and North America, the power grid is split-phase, allowing different loads to be charged using the output voltage of the corresponding phase. Therefore, when the grid system is off-grid, the inverter must output voltages of different phases to ensure normal load operation. Inverters with split-phase output can suffer from poor output when affected by high-frequency input.

[0044] Referring to Figures 1 to 4 , an inverter 100 according to an embodiment of the present disclosure includes an isolation circuit 10, a DC bus 30, a balancing circuit 50, and an inverter circuit 70. The isolation circuit 10 includes a primary circuit 11 and a secondary circuit 13. The primary circuit 11 includes a control switch 111 and a primary winding 113. The secondary circuit 13 includes a secondary winding 131. The secondary winding 131 is connected to the DC bus 30, and the control switch 111 is connected to a DC source 300. When the control switch 111 is turned on, the DC source 300 charges the primary winding 113. When all control switches 111 are turned off, the primary winding 113 stops charging, and the secondary winding 131 charges the DC bus 30. The DC bus 30 includes a positive bus capacitor 31 and a negative bus capacitor 33. The first electrode of the positive bus capacitor 31 is connected to the positive output electrode of the secondary circuit 13, the second electrode of the positive bus capacitor 31 is connected to the first electrode of the negative bus capacitor 33, and the second electrode of the negative bus capacitor 33 is connected to the negative output electrode of the secondary circuit 13. The balancing circuit 50 is used to balance the voltages of the positive bus capacitor 31 and the negative bus capacitor 33. The inverter circuit 70 is connected to the DC bus 30 and is used to output voltages of different phases to achieve phase splitting.

[0045] In this embodiment, the DC source 300 can be a photovoltaic DC source. The inverter 100 receives the DC power generated by the photovoltaic DC source and converts the DC power into an AC power output. The isolation circuit 10 can be a single-tube flyback three-level circuit (Figure 1), an interleaved parallel flyback three-level circuit (Figure 2), a half-bridge flyback three-level circuit (Figure 3), a full-bridge flyback three-level circuit (Figure 4), etc. The primary winding 113 and the secondary winding 131 can form a transformer T1, and the control switch 111 can be a transistor. When the control switch 111 is closed, the DC source 300 charges the primary winding 113 of the transformer T1. When the control switch 111 is disconnected, the primary winding 113 stops charging, and the secondary winding 131 charges the positive bus capacitor 31 and the secondary negative bus capacitor 33 of the DC bus 30. Transformer T1 can convert the voltage of the DC source 300 into a higher voltage for output, that is, the voltage of the primary winding 113 can be lower than the voltage of the secondary winding 131 to achieve voltage raising, so that the inverter 100 is suitable for a DC source 300 with a smaller voltage. The primary winding 113 and the secondary winding 131 can isolate the DC source 300 and the DC bus 30 to perform high-frequency isolation on the DC bus 30. The inverter circuit 70 is used to convert the voltage of the DC bus 30 into alternating current of different phases for output. When carrying a half-wave load, the inverter 100 can continuously draw power from a bus capacitor of the DC bus 30, resulting in a voltage imbalance of the bus capacitor. After the voltage imbalance reaches a certain level, the protection mechanism of the inverter 100 can be triggered and the inverter 100 stops working. The balancing circuit 50 can balance the voltage of the DC bus 30 so that the voltages of the positive bus capacitor 31 and the secondary bus capacitor are the same, thereby preventing the voltage difference of the DC bus 30 from being too large and triggering fault protection.

[0046] In actual implementation, the inverter 100 works in conjunction with the transformer T1 and control switch 111 of the isolation circuit 10. When the DC source 300 inputs voltage, the transformer T1 does not charge the bus capacitor. When the control switch 111 is disconnected, the DC source 300 does not input voltage to the transformer T1, allowing the transformer T1 to charge the bus capacitor. This achieves high-frequency isolation between the bus capacitor and the inverter circuit 70, thereby improving the output quality of the inverter 100.

[0047] In some embodiments, there are multiple control switches 111, and the isolation circuit 10 includes multiple energy storage capacitors 15 and diodes 17. The multiple energy storage capacitors 15 are connected in series and in parallel with the DC source 300. One end of the diode 17 is connected to the multiple energy storage capacitors 15, and the other end of the diode 17 is connected to the control switch 111. The diode 17 and the energy storage capacitor 15 jointly clamp the voltage of the DC source 300 to obtain voltages of multiple potentials, thereby reducing the voltage across the control switch 111.

[0048] In this embodiment, multiple energy storage capacitors 15 are connected in series. The input terminal of the inverter 100 is connected to the input power supply, the energy storage capacitors 15 are connected in parallel with the input terminal, and one end of a diode 17 is connected between two adjacent energy storage capacitors 15. The other end of the diode 17 is connected to the control switch 111 to obtain voltages of multiple potentials. The control switch 111 and the bus capacitor are connected in parallel. The diode 17 and the energy storage capacitor 15 can form a corresponding clamping module, which can clamp the voltage across the control switch 111, thereby reducing the voltage stress of the control switch 111.

[0049] In actual implementation, the diode 17 and the energy storage capacitor 15 may form a corresponding clamping module, which may clamp the voltage across the control switch 111 , thereby reducing the voltage stress of the control switch 111 .

[0050] Referring to Figures 1 and 5, in some embodiments, the control switch 111 includes a first control switch and a second control switch. The energy storage capacitor 15 includes a first energy storage capacitor and a second energy storage capacitor. The first electrode of the first energy storage capacitor is connected to the positive electrode of the DC source 300, the second electrode of the second energy storage capacitor is connected to the negative electrode of the DC source 300, and the second electrode of the first energy storage capacitor is connected to the first electrode of the second energy storage capacitor. The first electrode of the first control switch is connected to the first electrode of the energy storage capacitor 15, the second electrode of the first control switch is connected to the first end of the primary winding 113, the first electrode of the second control switch is connected to the second end of the primary winding 113, the second electrode of the first control switch is connected to the second electrode of the second energy storage capacitor, the cathode of the diode 17 is connected to the second electrode of the first control switch and the first end of the primary winding 113, and the anode of the diode 17 is connected to the second electrode of the first energy storage capacitor and the first electrode of the second energy storage capacitor. When both the first control switch and the second control switch are closed, the DC source 300 is used to charge the primary winding 113.

[0051] In this embodiment, the first electrode of the first energy storage capacitor CS1 is connected to the positive electrode PV+ of the DC source 300. The second electrode of the second energy storage capacitor CS2 is connected to the negative electrode PV- of the DC source 300. The second electrode of the first energy storage capacitor CS1 is connected to the first electrode of the second energy storage capacitor CS2. In other words, the second electrode of the first energy storage capacitor CS1 and the second energy storage capacitor CS2 are connected in series and in parallel with the DC source 300PV. The first electrode of the first control switch Q1 is connected to the first electrode of the energy storage capacitor CS1, the second electrode of the first control switch Q1 is connected to the first end of the primary winding 113, the first electrode of the second control switch Q2 is connected to the second end of the primary winding 113, the second electrode of the first control switch Q1 is connected to the second electrode of the second energy storage capacitor CS2, the cathode of the diode 17 is connected to the second electrode of the first control switch Q1 and the first end of the primary winding 113, and the anode of the diode 17 is connected to the second electrode of the first energy storage capacitor CS1 and the first electrode of the second energy storage capacitor CS2. The primary circuit 11 includes a first operating mode, a second operating mode, and a third operating mode. When the primary circuit 11 is in the first operating mode, the first control switch Q1 and the second control switch Q2 are closed, allowing the photovoltaic DC source to charge the primary winding 113. In other words, current flows from the positive electrode PV+ of the DC source 300 to the drain of the first control switch Q1, and then from the source of the first control switch Q1 to the primary winding 113. Current flows from the primary winding 113 to the drain of the second control switch Q2, and then from the source of the second control switch Q2 to the negative electrode PV- of the DC source 300. At this point, the voltage stress across the primary winding 113 is Vin.

[0052] In actual implementation, the DC bus 30 can be isolated at high frequency by the isolation circuit 10. When all the control switches 111 are closed, the DC source 300 can charge the primary winding 113 to supply energy to the transformer T1.

[0053] Please refer to FIG. 6 . When the first control switch is opened and the second control switch is closed, the second energy storage capacitor is used to charge the primary winding 113 .

[0054] In this embodiment, when all control switches 111 are closed, the voltage stress of the primary winding 113 is Vin (the input voltage of the DC source 300). When the primary circuit 11 is in the second operating mode, the first control switch Q1 is open and the second control switch Q2 is closed. The second energy storage capacitor CS2 can charge the primary winding 113. At this time, the voltage stress of the second control switch Q2 is Vin / 2.

[0055] In actual implementation, the clamping module composed of the energy storage capacitor 15 and the diode 17 can obtain three potential levels to adapt to a three-level inverter. The clamping module composed of the energy storage capacitor 15 and the diode 17 can also reduce the voltage stress of the control switch 111.

[0056] Referring to FIG. 7 , in some embodiments, when the first control switch and the second control switch are both turned off, the secondary winding 131 charges the DC bus 30 .

[0057] In this embodiment, when the primary circuit 11 is in the third operating mode, the first control switch Q1 and the second control switch Q2 are closed, and neither the photovoltaic DC source nor the energy storage capacitor 15 can charge the primary winding 113. When the primary circuit 11 is in the third operating mode, the secondary winding 131 can charge the positive bus capacitor CS3 and the negative bus capacitor CS4 of the DC bus 30. The secondary winding 131 can also power circuits (such as R) outside the DC bus 30. When both the first control switch and the second control switch are disconnected, high-frequency isolation between the DC source 300 and the DC bus 30 is achieved.

[0058] In actual implementation, when both the first control switch and the second control switch are disconnected, the DC source 300 may not charge the primary winding 113, and the secondary winding 131 may charge the DC bus 30, thereby achieving high-frequency isolation between the DC source 300 and the DC bus 30.

[0059] Referring to FIG. 2 , in some embodiments, there are multiple primary windings 113 . The primary windings 113 include a first primary winding 1131 and a second primary winding 1133 . The energy storage capacitor 15 includes a first energy storage capacitor and a second energy storage capacitor. The control switches 111 include a first group of control switches 1111 and a second group of control switches 1113 . The first group of control switches 1111 is used to control the DC source 300 and / or the first energy storage capacitor to charge the first primary winding 1131 . The second group of control switches 1113 is used to control the DC source 300 and / or the second energy storage capacitor to charge the second primary winding 1133 . The first primary winding 1131 and the second primary winding 1133 are charged alternately.

[0060] In this embodiment, the first primary winding 1131 and the first group of control switches 1111 constitute the first primary circuit 11. The second primary winding 1133 and the second group of control switches 1113 constitute the second primary circuit 11. The first and second primary circuits 11 operate alternately to shorten the on-time of each control switch 111 and extend the service life of each control switch 111. The diode 17 includes a first diode 171 and a second diode 173. The first group of control switches 1111 includes a first control switch Q1 and a second control switch Q2. The second group of control switches 1113 includes a third control switch Q3 and a fourth control switch Q4. The anode of the first diode 171 is connected to the second electrode of the first energy storage capacitor CS1 and the first electrode of the second energy storage capacitor CS2. The cathode of the first diode 171 is connected to the source of the first control switch Q1 and the first primary winding 1131. The cathode of the second diode 173 is connected to the second electrode of the first energy storage capacitor CS1 and the first electrode of the second energy storage capacitor CS2, and the anode of the second diode 173 is connected to the drain of the fourth control switch Q4 and the second primary winding 1133. When the first primary circuit 11 is operating, the first primary circuit 11 completes operation in the order of the first operating mode, the second operating mode, and the third operating mode. After the first primary circuit 11 completes operation in the order of the first operating mode, the second operating mode, and the third operating mode, the first primary circuit 11 stops operating. After the first primary circuit 11 stops operating, the second primary circuit 11 again completes operation in the order of the first operating mode, the second operating mode, and the third operating mode. In other words, the first primary winding 1131 and the second primary winding 1133 can be charged alternately, and the two primary circuits 11 can operate alternately.

[0061] In actual implementation, the first group of control switches 1111 and the second group of control switches 1113 operate alternately to control the alternating charging of the first primary winding 1131 and the second primary winding 1133 , which can reduce the working time of each control switch 111 and extend the life of the control switch 111 .

[0062] Referring to FIG8 , in some embodiments, the balancing circuit 50 includes a first switch, a second switch, and an inductor. A first end of the first switch is connected to the first terminal of the positive bus capacitor 31 , a second end of the first switch is connected to the first terminal of the second switch, and a second end of the second switch is connected to the second terminal of the negative bus capacitor 33 . A first end of the inductor is connected to the second end of the first switch and the first end of the second switch, and a second end of the inductor is connected to the second terminal of the positive bus capacitor 31 and the first terminal of the negative bus capacitor 33 .

[0063] In this embodiment, the drain of the first switch Q3 is connected to one terminal of the positive bus capacitor CS3, and the source of the first switch Q3 is connected to the other terminal of the positive bus capacitor CS3 via an inductor. The other terminal of the positive bus capacitor CS3 is connected to one terminal of the negative bus capacitor CS4. The drain of the second switch Q4 is connected to the terminal of the negative bus capacitor CS4 connected to the positive bus capacitor CS3 via an inductor, and the source of the first switch Q3 is connected to the other terminal of the negative bus capacitor CS4. The inverter 100 includes a control module. The gates of the first switch Q3 and the second switch Q4 are respectively connected to the control module. The control module can control the duty cycle of the first switch Q3 and the second switch Q4.

[0064] In actual implementation, the first switch and the second switch can balance the voltages of the positive bus capacitor 31 and the negative bus capacitor 33 to equalize the voltage of the DC bus 30. Balancing the voltage of the DC bus 30 can prevent excessive voltage differences between the positive bus capacitor 31 and the negative bus capacitor 33, thereby preventing the inverter 100 from triggering fault protection.

[0065] In some embodiments, when the voltage of the positive bus capacitor 31 is less than the voltage of the negative bus capacitor 33, the duty cycle of the first switch is less than the duty cycle of the second switch to control the charging of the first bus capacitor so that the voltage of the first bus capacitor and the second bus capacitor are the same.

[0066] In this embodiment, the control module controls the duty cycles of the first switch Q3 and the second switch Q4 based on the voltages of the positive bus capacitor CS3 and the negative bus capacitor CS4. When the voltages of the positive bus capacitor CS3 and the negative bus capacitor CS4 are the same, the duty cycles of the first switch Q3 and the second switch Q4 are controlled to be the same. When the voltage of the positive bus capacitor CS3 is lower than the voltage of the negative bus capacitor CS4, the duty cycle of the first switch Q3 is controlled to be smaller than the duty cycle of the second switch Q4 to control the charging of the positive bus capacitor CS3. When the voltage of the negative bus capacitor CS4 is lower than the voltage of the positive bus capacitor CS3, the duty cycle of the second switch Q4 is controlled to be smaller than the duty cycle of the first switch Q3 to control the charging of the negative bus capacitor CS4.

[0067] In actual implementation, controlling the duty cycle of the first switch and the second switch can control the charging of the positive bus capacitor 31 and the negative bus capacitor 33 to balance the voltages of the positive bus capacitor 31 and the negative bus capacitor 33 .

[0068] Referring to Figures 9 and 10, in some embodiments, the inverter 100 includes multiple circuits, with different circuits being used to output voltages of different phases. The circuit includes a first transistor, a second transistor, and an output terminal. The first terminal of the first transistor is connected to the first terminal of the positive bus capacitor 31, the second terminal of the second transistor is connected to the second terminal of the negative bus capacitor 33, and the second terminal of the first transistor is connected to the first terminal of the second transistor. The first terminal of the output terminal is connected to the second terminal of the first transistor and the first terminal of the second transistor, and the second terminal of the output terminal is connected to the second terminal of the positive bus capacitor 31 and the first terminal of the negative bus capacitor 33.

[0069] In this embodiment, two transistors and two bus capacitors can form a half-bridge circuit, with the first transistor and the second transistor connected in series. The first end of the output terminal is connected to one end of the two transistors connected to each other, and the second end of the output terminal is connected to one end of the two bus capacitors connected to each other. In other words, the second end of the positive bus capacitor 31 and the first end of the negative bus capacitor 33 are connected to the output terminal for outputting the output voltage. The circuit may also include a filtering module for high-frequency filtering. The filtering module includes a filter inductor and a filter capacitor, which together form an LC filter circuit. The filter inductor is connected in series with the output terminal, and the filter capacitor is connected in parallel with the output terminal. When the first transistor Q5 is turned on, the second transistor Q6 is turned off, and the positive bus capacitor CS3 supplies power to the output terminal. At this time, the current flow at the output terminal L1N is from L1 to N. When the first transistor Q5 is turned on, the second transistor Q6 is turned off, and the negative bus capacitor CS4 supplies power to the output terminal. The current flow at the output terminal L1N is from N to L1, enabling the output of alternating current.

[0070] In actual implementation, controlling the turn-on time of transistors in different circuits can enable different circuits to output voltages of different phases, thereby achieving split-phase output of the inverter 100.

[0071] In some embodiments, the circuit includes a first transistor Q5 and a second transistor Q6. The drain of the first transistor Q5 is connected to the first electrode of the bus capacitor CS1, the source of the first transistor Q5 is connected to the drain of the second transistor Q6, the source of the first transistor Q5 and the drain of the second transistor Q6 are commonly connected to one output terminal L1, the source of the second transistor Q6 is connected to the second electrode of the bus capacitor CS2, the second electrode of the bus capacitor CS1 is connected to the first electrode of the bus capacitor CS2, and the second electrode of the bus capacitor CS1 and the first electrode of the bus capacitor CS2 are commonly connected to the other output terminal N. The gates of the first transistor Q5 and the second transistor Q6 are both connected to a control module, which can control the on-time and duty cycle of the first transistor Q5 and the second transistor Q6 to control the output voltage of the output terminal L1N.

[0072] In practice, the transistors in a circuit can control the output of AC power at the output of the same circuit. Controlling the on-time of the transistors in different circuits can make the output voltages of different circuits different in phase, thus achieving split-phase output.

[0073] The photovoltaic power generation system of the embodiment of the present disclosure includes a photovoltaic module and an inverter 100 according to any of the above embodiments. The inverter 100 is used to convert the DC voltage obtained by the photovoltaic module into an AC voltage.

[0074] In this embodiment, the photovoltaic assembly includes a DC source 300, and the photovoltaic assembly can generate DC power and input the DC power into the inverter 100. The inverter 100 is used to convert the DC voltage obtained by the photovoltaic assembly into an AC voltage.

[0075] In actual implementation, when DC source 300 inputs voltage, transformer T1 does not charge the bus capacitor. When control switch 111 is disconnected, DC source 300 does not input voltage to transformer T1, and transformer T1 can charge the bus capacitor, thereby achieving high-frequency isolation between the bus capacitor and inverter circuit 70, thereby improving the output quality of inverter 100.

[0076] As used herein, the terms "comprises," "comprising," or any other variant thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article, or device. In the absence of further restrictions, an element defined by the statement "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element. In addition, the scope of the methods and devices in the embodiments of the present disclosure is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.

[0077] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, or of course by hardware, but in many cases the former is a better embodiment. Based on this understanding, the technical solution of the present disclosure can essentially be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present disclosure.

[0078] The embodiments of the present disclosure are described above in conjunction with the accompanying drawings, but the present disclosure is not limited to the above-mentioned specific implementation methods. The above-mentioned implementation methods are merely illustrative and not restrictive. Under the guidance of the present disclosure, ordinary technicians in this field can also make many forms without departing from the scope of protection of the purpose of the present disclosure and the claims, all of which are protected by the present disclosure.

[0079] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0080] Although the embodiments of the present disclosure have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and alterations may be made to the embodiments without departing from the principles and spirit of the present disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. An inverter, wherein: The inverter includes: an isolation circuit, a DC bus, a balancing circuit and an inverter circuit; The isolation circuit includes a primary circuit and a secondary circuit, the primary circuit includes a control switch and a primary winding, the secondary circuit includes a secondary winding, the secondary winding is connected to the DC bus, the control switch is connected to the DC source, when the control switch is turned on, the DC source charges the primary winding; when all control switches are turned off, the primary winding stops charging, and the secondary winding charges the DC bus; The DC bus includes a positive bus capacitor and a negative bus capacitor, wherein the first electrode of the positive bus capacitor is connected to the positive output electrode of the secondary circuit, the second electrode of the positive bus capacitor is connected to the first electrode of the negative bus capacitor, and the second electrode of the negative bus capacitor is connected to the negative output electrode of the secondary circuit; The balancing circuit is configured to balance the voltages of the positive bus capacitor and the negative bus capacitor; The inverter circuit is connected to the DC bus, and the inverter circuit is configured to output voltages of different phases to perform phase splitting.

2. The inverter according to claim 1, wherein: There are multiple control switches, and the isolation circuit includes: A plurality of energy storage capacitors, wherein the plurality of energy storage capacitors are connected in series with each other and in parallel with the DC source; A diode, one end of which is connected to the plurality of energy storage capacitors, and the other end of which is connected to the control switch, wherein the diode and the energy storage capacitor jointly clamp the voltage of the DC source to obtain voltages of multiple potentials to reduce the voltage across the control switch.

3. The inverter according to claim 2, wherein: The control switch includes a first control switch and a second control switch, the energy storage capacitor includes a first energy storage capacitor and a second energy storage capacitor, the first electrode of the first energy storage capacitor is connected to the positive electrode of the DC source, the second electrode of the second energy storage capacitor is connected to the negative electrode of the DC source, and the second electrode of the first energy storage capacitor is connected to the first electrode of the second energy storage capacitor; The first electrode of the first control switch is connected to the first electrode of the energy storage capacitor, the second electrode of the first control switch is connected to the first end of the primary winding, the first electrode of the second control switch is connected to the second end of the primary winding, and the second electrode of the first control switch is connected to the second electrode of the second energy storage capacitor; The cathode of the diode is connected to the second electrode of the first control switch and the first end of the primary winding, and the anode of the diode is connected to the second electrode of the first energy storage capacitor and the first electrode of the second energy storage capacitor; When both the first control switch and the second control switch are closed, the DC source is configured to charge the primary winding.

4. The inverter according to claim 3, wherein: When the first control switch is open and the second control switch is closed, the second energy storage capacitor is configured to charge the primary winding.

5. The inverter according to claim 3 or 4, wherein: When the first control switch and the second control switch are both turned off, the secondary winding charges the DC bus.

6. The inverter according to any one of claims 2 to 5, wherein: There are multiple primary windings, the primary windings include a first primary winding and a second primary winding, the energy storage capacitors include a first energy storage capacitor and a second energy storage capacitor, the control switches include a first group of control switches and a second group of control switches, the first group of control switches is configured to control the DC source and / or the first energy storage capacitor to charge the first primary winding, the second group of control switches is configured to control the DC source and / or the second energy storage capacitor to charge the second primary winding, and the first primary winding and the second primary winding are charged alternately.

7. The inverter according to any one of claims 1 to 6, wherein: The balancing circuit includes a first switch, a second switch and an inductor; the first end of the first switch is connected to the first pole of the positive bus capacitor, the second end of the first switch is connected to the first end of the second switch, the second end of the second switch is connected to the second pole of the negative bus capacitor, the first end of the inductor is connected to the second end of the first switch and the first end of the second switch, and the second end of the inductor is connected to the second pole of the positive bus capacitor and the first pole of the negative bus capacitor.

8. The inverter according to claim 7, wherein: When the voltage of the positive bus capacitor is less than the voltage of the negative bus capacitor, the duty cycle of the first switch is less than the duty cycle of the second switch, so as to control the charging of the first bus capacitor so that the voltages of the first bus capacitor and the second bus capacitor are the same.

9. The inverter according to any one of claims 1 to 8, wherein: The inverter also includes multiple loops, different loops are configured to output voltages of different phases, and the loops include a first transistor, a second transistor and an output end, the first end of the first transistor is connected to the first pole of the positive bus capacitor, the second end of the second transistor is connected to the second pole of the negative bus capacitor, and the second end of the first transistor is connected to the first end of the second transistor; the first end of the output end is connected to the second end of the first transistor and the first end of the second transistor, and the second end of the output end is connected to the second pole of the positive bus capacitor and the first pole of the negative bus capacitor.

10. A photovoltaic power generation system, wherein: The photovoltaic power generation system includes a photovoltaic module and the inverter according to claims 1 to 9, wherein the inverter is configured to convert the DC voltage obtained by the photovoltaic module into an AC voltage.

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