Semiconductor device

A semiconductor device with a ceramic substrate and optimized resin properties addresses the limitations of epoxy resin substrates by enhancing reliability and performance through crack prevention and improved thermal management.

WO2025169289A1PCT designated stage Publication Date: 2025-08-14MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
PCT/JP2024/003867
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-02-06
Publication Date
2025-08-14

AI Technical Summary

Technical Problem

Epoxy resin-based insulating substrates in power modules face challenges with high temperature limitations due to glass transition temperature and poor thermal conductivity, limiting high voltage resistance and film thickness, while ceramic substrates are not adequately addressed in existing solutions.

Method used

A semiconductor device with a ceramic substrate and a resin that optimizes Young's modulus and linear expansion coefficient, adhering to the ranges y≦−5x+62.5 and 9.5≦x≦14, to prevent cracks and improve heat cycle life, heat dissipation, and voltage resistance.

Benefits of technology

The optimized resin properties enhance semiconductor device reliability by preventing cracks, improving heat dissipation and voltage resistance, and maintaining productivity.

✦ Generated by Eureka AI based on patent content.

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Abstract

A semiconductor device (100) comprises: a circuit board (10) that includes a ceramic substrate (11) and a circuit pattern (12) formed on the upper surface of the ceramic substrate (11); a semiconductor chip (1) that is mounted on the circuit board (10) and is joined to the circuit pattern (12); and a resin (9) that covers the circuit board (10) and the semiconductor chip (1). Where the resin (9) has a linear expansion coefficient of x [ppm / °C] and a Young's modulus of y [Gpa], the properties of the resin (9) satisfy y ≤ -5x + 62.5, 9.5 ≤ x, and 9 ≤ y ≤ 14.
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Description

Semiconductor Devices

[0001] The present disclosure relates to a semiconductor device, and more particularly to a semiconductor device having a structure in which a semiconductor chip is sealed with resin.

[0002] One example of a semiconductor device is a power module, which is a semiconductor device for power control. For example, Patent Document 1 listed below discloses a power module in which the Young's modulus and the linear expansion coefficient (thermal expansion coefficient) of a resin that seals a semiconductor chip are optimized.

[0003] Japanese Patent Application Laid-Open No. 2003-258163

[0004] In the power module of Patent Document 1, the insulating substrate on which the semiconductor chip is mounted is made of a thermosetting resin such as epoxy. Since epoxy resin has limitations on high temperatures due to its glass transition temperature (Tg) and poor thermal conductivity, it is difficult to form thick films of epoxy resin. Therefore, power modules using epoxy resin as an insulating substrate have a challenge in terms of achieving high voltage resistance. To solve these problems with epoxy resin, power modules using ceramic as an insulating substrate have been put into practical use. Patent Document 1 does not consider the case where ceramic is used as an insulating substrate.

[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to optimize the Young's modulus and linear expansion coefficient of the resin that seals the semiconductor chip in a semiconductor device having a structure in which the semiconductor chip is mounted on a ceramic substrate.

[0006] The semiconductor device according to the present disclosure comprises a circuit board including a ceramic substrate and a circuit pattern formed on an upper surface of the ceramic substrate, a semiconductor chip mounted on the circuit board and joined to the circuit pattern, and a resin covering the circuit board and the semiconductor chip, wherein the resin has properties satisfying y≦−5x+62.5, 9.5≦x, and 9≦y≦14, where x [ppm / °C] is a coefficient of linear expansion and y [GPa] is a Young's modulus.

[0007] According to the present disclosure, it is possible to optimize the Young's modulus and the linear expansion coefficient of the resin that seals the semiconductor chip.

[0008] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.

[0009] 1 is a diagram illustrating a configuration of a semiconductor device according to an embodiment of the present invention, and is a diagram illustrating a range of a linear expansion coefficient and a Young's modulus of a resin that is a sealing material of the semiconductor device according to an embodiment of the present invention.

[0010] 1 is a configuration diagram of a semiconductor device 100 according to an embodiment of the disclosed technique. In this embodiment, a power module is shown as an example of the semiconductor device 100.

[0011] As shown in FIG. 1 , the semiconductor device 100 includes a semiconductor chip 1 mounted on a circuit board 10. The semiconductor chip 1 may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), a Schottky barrier diode, or a PN junction diode. The material of the semiconductor chip 1 may be silicon (Si) or, for example, silicon carbide (SiC). Use of the semiconductor chip 1 made of a silicon carbide semiconductor can improve the characteristics of the semiconductor device 100, specifically, reduce loss and increase output.

[0012] The circuit board 10 comprises a ceramic substrate 11, which is an insulating substrate, a circuit pattern 12 formed on the upper surface of the ceramic substrate 11, and a metal pattern 13 formed on the lower surface of the ceramic substrate 11. The circuit pattern 12 and the metal pattern 13 are made of, for example, copper.

[0013] The semiconductor chip 1 is bonded to a circuit pattern 12 of a circuit board 10 by a bonding material 2. The semiconductor chip 1 is also connected to an electrode 4 via the circuit pattern 12 or a wire 3. The electrode 4 is made of, for example, copper. The bonding material 2 is, for example, solder, sintered silver, sintered copper, or the like. The wire 3 is, for example, an aluminum wire.

[0014] The metal pattern 13 of the circuit board 10 is bonded to the base plate 6 by a bonding material 5. The base plate 6 is formed of, for example, Cu, AlSiC, MgSiC, etc. The bonding material 5 is, like the bonding material 2, for example, solder, sintered silver, sintered copper, etc.

[0015] A case 8 is adhered to the periphery of the base plate 6 with an adhesive 7. Parts of the electrodes 4 protrude from the case 8 to serve as external connection terminals. The case 8 is filled with a resin 9 as a sealing material that covers the semiconductor chip 1 and the circuit board 10.

[0016] The characteristics of the resin 9 will now be described. Fig. 2 is a diagram showing the ranges of the linear expansion coefficient and Young's modulus of the resin 9. In Fig. 2, the horizontal axis represents the linear expansion coefficient [ppm / °C], and the vertical axis represents the Young's modulus [GPa].

[0017] The inventors of the technology disclosed herein subjected three types of semiconductor devices 100 having different linear expansion coefficients and Young's moduli of resin 9 to 100 cycles of "25°C → -50°C → 25°C → 150°C → 25°C" and then determined whether or not cracks occurred in ceramic substrate 11. In Fig. 2, the linear expansion coefficients and Young's moduli of resin 9 of semiconductor devices 100 that had no cracks are plotted with "◯" marks, and the linear expansion coefficients and Young's moduli of semiconductor devices 100 that had cracks are plotted with "X" marks.

[0018] The inventors also used the maximum values ​​of the linear expansion coefficient and Young's modulus of resin 9 within the range where no cracks were present to model the structure of semiconductor device 100 shown in FIG. 1 using a simulator and estimate the stress generated in ceramic substrate 11 through stress analysis. From the estimation results, they then determined the ranges of linear expansion coefficient and Young's modulus of resin 9 that would keep the stress generated in ceramic substrate 11 within a range where cracks would not occur. As a result, when the linear expansion coefficient of resin 9 is x [ppm / °C] and the Young's modulus is y [GPa], it was found that if y≦−5x+62.5 is satisfied, cracks can be prevented from occurring in ceramic substrate 11. The dotted line in FIG. 2 represents y=−5x+62.5.

[0019] Furthermore, the linear expansion coefficient of resin 9 depends on the amount of filler filled therein, and increasing the amount of filler can reduce the linear expansion coefficient. However, if the amount of filler is too large, the fluidity of resin 9 is impaired, and the productivity of semiconductor device 100 deteriorates. Therefore, in order to ensure the fluidity of resin 9, it is desirable that the linear expansion coefficient x satisfy the relationship 9.5≦x.

[0020] Regarding the Young's modulus, it is desirable that the Young's modulus y of the resin 9 satisfies 9≦y≦14, taking into consideration the Young's modulus of the epoxy resin that is the main material of the resin.

[0021] The shaded area in Figure 2 is the area where all of y≦-5x+62.5, 9.5≦x, and 9≦y≦14 are satisfied. By having the linear expansion coefficient and Young's modulus of resin 9 fall within this shaded area, it is possible to prevent cracks from occurring in ceramic substrate 11 while preventing a decrease in productivity of semiconductor device 100. This improves the heat cycle life of semiconductor device 100. As a result, it is possible to achieve high heat dissipation, high voltage resistance, and high reliability for semiconductor device 100.

[0022] Furthermore, in the circuit board 10, the ceramic substrate 11 is preferably larger than the circuit pattern 12 so as to protrude beyond the circuit pattern 12. The metal pattern 13 is also preferably larger than the circuit pattern 12 so as to protrude beyond the circuit pattern 12. The triple points (resin 9, circuit pattern 12, ceramic substrate 11 and resin 9, metal pattern 13, ceramic substrate 11) on the front and back sides of the circuit board 10 are offset from each other, which can contribute to suppressing stress generated in the ceramic substrate 11.

[0023] The coefficient of linear expansion in the lateral direction at the joint surface of the base plate 6 with the circuit board 10 is preferably 6 ppm / °C or more and 8 ppm / °C or less, and the coefficient of linear expansion of the ceramic substrate 11 is preferably 3 ppm / °C or more and 5 ppm / °C or less. Since the coefficients of linear expansion of the base plate 6 and the ceramic substrate 11 are close to each other, this can contribute to suppressing stress generated in the ceramic substrate 11.

[0024] Furthermore, the linear expansion coefficient in the thickness direction of the base plate 6 may be different from the linear expansion coefficient in the lateral direction at the joint surface of the base plate 6 with the circuit board 10. The anisotropic linear expansion coefficient of the base plate 6 reduces stress generated in the joint layer with the resin 9.

[0025] Furthermore, when the base plate 6 is made of an MMC (Metal Matrix Composite) material such as AlSiC or MgSiC, the surface of the base plate 6 is generally plated. However, a rougher surface of the base plate 6 can improve adhesion to the resin 9, so it is preferable that the surface of the base plate 6 that comes into contact with the resin 9 is not plated. Alternatively, to improve adhesion between the base plate 6 and the resin 9, the surface of the base plate 6 that comes into contact with the resin 9 may be subjected to a primer treatment.

[0026] The embodiments can be modified or omitted as appropriate.

[0027] The above description is illustrative in all respects, and it is understood that countless variations not illustrated can be envisioned.

[0028] 100 Semiconductor device, 1 Semiconductor chip, 2 Bonding material, 3 Wire, 4 Electrode, 5 Bonding material, 6 Base plate, 7 Adhesive, 8 Case, 9 Resin, 10 Circuit board, 12 Circuit pattern, 11 Ceramic substrate, 13 Metal pattern

Claims

1. A semiconductor device comprising: a circuit board including a ceramic substrate and a circuit pattern formed on an upper surface of the ceramic substrate; a semiconductor chip mounted on the circuit board and bonded to the circuit pattern; and a resin covering the circuit board and the semiconductor chip, wherein the resin has properties that satisfy the following, where x [ppm / °C] is the linear expansion coefficient and y [GPa] is the Young's modulus: y≦-5x+62.5 9.5≦x 9≦y≦14.

2. The semiconductor device according to claim 1, wherein the circuit board further includes a metal pattern formed on the underside of the ceramic substrate, the ceramic substrate being larger than the circuit pattern, and the metal pattern being larger than the circuit pattern.

3. The semiconductor device according to claim 1 or 2, wherein the circuit board is bonded to a base plate, the lateral linear expansion coefficient of the joint surface of the base plate with the circuit board is 6 to 8 ppm / °C, and the linear expansion coefficient of the ceramic substrate is 3 to 5 ppm / °C.

4. A semiconductor device according to any one of claims 1 to 3, wherein the circuit board is bonded to a base plate, and the coefficient of linear expansion of the base plate in the thickness direction is different from the coefficient of linear expansion in the lateral direction at the bonding surface of the base plate with the circuit board.

5. The semiconductor device according to any one of claims 1 to 4, wherein the circuit board is joined to a base plate, and a surface of the base plate that comes into contact with the resin is treated with a primer.

6. The semiconductor device according to any one of claims 1 to 4, wherein the circuit board is joined to a base plate, and the surface of the base plate that comes into contact with the resin is not plated.

7. The semiconductor device according to any one of claims 1 to 6, wherein the semiconductor chip is formed of a silicon carbide semiconductor.

Citation Information

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