Silicon substrate and heat treatment method for silicon substrate

A silicon substrate with a {110} orientation and controlled heat treatment suppresses defects, improving surface quality and device performance.

WO2025169680A1PCT designated stage Publication Date: 2025-08-14SHIN ETSU HANDOTAI CO LTD
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Patent Information

Application Number
PCT/JP2025/001240
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-07
Filing Date
2025-01-17
Publication Date
2025-08-14

AI Technical Summary

Technical Problem

Si(110) substrates face issues with high surface roughness, haze, and the generation of depression-like defects due to unstable 16x2 structure and phase transitions during heat treatments, which affect device performance.

Method used

A silicon substrate with a {110} plane orientation and an off-angle of 0.23° to 0.5°, subjected to a heat treatment method involving heating above 570°C, followed by cooling within 60,000 (°C·sec) to suppress the generation of defects.

Benefits of technology

The method results in a high-quality silicon substrate with improved surface roughness and reduced depression-like defects, enhancing device characteristics.

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Abstract

The present invention provides a silicon substrate in which the plane orientation of a main surface is (110), the silicon substrate including no hollow defect that has a length in the longitudinal direction of 50 nm to 2,000 nm inclusive in the surface. As a result, provided is an Si(110) substrate in which the formation of a hollow defect is suppressed.
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Description

Silicon substrate and method for heat treatment of silicon substrate

[0001] The present invention relates to a silicon substrate and a method for heat treating a silicon substrate.

[0002] Instead of the Fin structure currently used in logic ICs, Gate-All-Around (GAA) structures and Complementary Field Effect Transistors (CFETs) that stack NMOS and CMOS have been proposed for next-generation semiconductors and are being actively researched and developed. In this regard, the use of the (110) plane orientation of silicon (hereinafter also referred to as "Si"), one of several available plane orientations, has been considered as a method for improving hole mobility (Non-Patent Document 1).

[0003] JP 2008-091887 A JP 2006-100596 A JP 2008-088045 A JP 2014-239184 A JP 2008-091891 A JP 2001-253797 A

[0004] The 1st Workshop of the Industry-Academia Collaboration Committee on Crystal Growth, Processing and Evaluation of Semiconductors, Japan Society of Applied Physics, "Crystal Technology Supporting the Revival of Semiconductors," Yamada et al., "Fabrication of Si(110)-16x2 Single Domain Surface," Surface Science, 29(7), 401 (2008) Miyaji et al., "Observation of Si(110) Reconstructed Surface by Ultra-High Vacuum Non-Contact Atomic Microscopy," Journal of the Japan Institute of Metals, 72(4), 290 (2008)

[0005] However, problems with Si(110) substrates have been pointed out, such as high surface roughness and haze (Non-Patent Document 1). Haze, also known as the degree of cloudiness of the surface, is a measure of surface roughness expressed as the degree of light scattering, with higher haze indicating a rougher surface. Furthermore, the most stable structure of the Si(110) outermost surface has only been identified relatively recently (Non-Patent Documents 2 and 3).

[0006] As described in Non-Patent Documents 2 and 3, the most stable structure of the surface structure of Si(110), 16x2 domain (a region with a single structural unity), is said to undergo a phase transition depending on the temperature, as shown in Figure 2, and the structure changes in the range of 600 to 800°C.

[0007] In addition, this structural change also causes the phenomenon of step bunching. Step bunching is a phenomenon in which atomic-level irregularities called steps exist on the wafer surface of semiconductor materials such as silicon, and when atoms on the surface move due to heat treatment or the like, the steps gather together to form larger irregularities. Furthermore, for example, SiGe, which is stacked in GAA or CFET, is often processed in exactly this temperature range, which makes it easy to imagine that understanding the surface structure becomes even more difficult, and the phenomenon associated with this phase change becomes a large bias, hindering understanding of other phenomena (such as defects and contamination behavior).

[0008] This unique top surface structure of the Si(110) surface also affects the surface structure after etching. The step edges of the 16x2 domain surface structure are not monoatomic like Si(100), but have a two-atom step. When the energy of the reaction system is low (equilibrium reaction), the reaction proceeds at the top surface atoms, resulting in a linear structure of the surface after etching surrounded by the first-neighboring Si(111) atoms. On the other hand, when the energy of the reaction system is high, the top surface and atoms below it are also involved in the reaction, resulting in a square shape surrounded by the second-neighboring Si(111) atoms.

[0009] For Si(110) with such a surface state, Patent Document 1 discloses a method for reducing surface roughness by tilting the orientation during epitaxial growth. Patent Document 2 discloses the same epitaxial growth method, but with the specification of the cooling rate and surface protection. Furthermore, Patent Document 3 discloses a method for similarly reducing surface roughness by specifying the surface orientation during crystal growth rather than during epitaxial growth. Patent Document 4 discloses polishing the epitaxial surface. Patent Document 5 discloses a technology that differs from Patent Document 1 in LPD detection size. Furthermore, Patent Document 6 discloses a method for reducing annular surface roughness formed around the periphery of a very thick epitaxial film, 30 μm or more, by setting the off-angle during slicing to 0.5 to 7°.

[0010] On the other hand, the present inventors have clarified that in addition to defects resulting from such surface roughness and crystal defects, Si(110) substrates, unlike Si(100) substrates, have a special 16x2 most stable structure, and therefore have unstable regions (referred to as "disordered regions" in Non-Patent Document 2) adjacent to the most stable 16x2 structure, and that minute protrusion-like defects are generated from these regions by heat treatments such as hydrogen baking before epitaxial growth and epitaxial growth, thereby forming an in-plane distribution of the Si(110) substrate, and have presented countermeasures for this.

[0011] As described above, the surface of a Si(110) substrate has a very complex shape, and various techniques have been published to alleviate the surface roughness. However, as described above, the Si(110) substrate, in particular, differs from the Si(100) substrate in that its most stable structure is a special 16x2 structure. Therefore, the inventors have discovered that there are unstable regions adjacent to the most stable 16x2 structure, and that relatively large depression-like defects are generated from these regions by performing heat treatments such as hydrogen baking before epitaxial growth or epitaxial growth.

[0012] The present invention has been made to solve the above problems, and an object of the present invention is to provide a Si{110} substrate and a heat treatment method for a Si{110} substrate in which the generation of pit-like defects is suppressed.

[0013] The present invention has been made to achieve the above-mentioned object, and provides a silicon substrate having a principal surface with a plane orientation of {110}, characterized in that the surface does not contain depression-like defects with a longitudinal length of 50 nm or more and 2000 nm or less.

[0014] Such a silicon substrate is of high quality with no pit-like defects and improved surface roughness, and therefore, device characteristics can be improved.

[0015] In this case, the silicon substrate may have an off-angle of 0.23° or more in the plane orientation of the {110} principal surface.

[0016] This further improves the surface roughness and further improves the device characteristics.

[0017] The present invention has also been made to achieve the above-mentioned object, and provides a heat treatment method for a silicon substrate having a principal surface with a plane orientation of {110}, the heat treatment method comprising a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling the silicon substrate to a temperature lower than 570°C, wherein the sum of the products of the temperature and time of the silicon substrate during the period from when the temperature of the silicon substrate reaches 570°C in the heating step to when the temperature of the silicon substrate reaches 570°C in the cooling step is 60,000 (°C·sec) or less.

[0018] According to this method of heat treating a silicon substrate, it is possible to suppress the generation of depression-like defects.

[0019] In this case, the off-angle of the main surface of the silicon substrate can be set to 0.23° or more.

[0020] This makes it possible to further suppress the generation of depression-like defects.

[0021] As described above, the silicon substrate of the present invention is of high quality, free from pit-like defects and having improved surface roughness, which leads to improved device characteristics. Furthermore, the heat treatment method for a silicon substrate of the present invention makes it possible to suppress the generation of pit-like defects.

[0022] 1 shows the results of AFM measurement of the surface of a Si(110) substrate of an example; 2 shows the results of AFM measurement of the surface of a Si(110) substrate of comparative example 1; 3 shows the results of AFM measurement of the surface of a Si(110) substrate of comparative example 2; 4 shows a cross-sectional structural diagram of an example of a Si(110) (Si{110}) substrate;

[0023] The present invention will be described in detail below, but the present invention is not limited thereto.

[0024] As described above, there has been a demand for a Si{110} substrate and a heat treatment method for a Si{110} substrate that suppresses the generation of pit-like defects.

[0025] As a result of extensive research into the above-mentioned problems, the present inventors have found that a silicon substrate having a principal surface with a plane orientation of {110} and free of dent-like defects having a longitudinal length of 50 nm or more and 2000 nm or less on the surface can provide a high-quality silicon substrate free of dent-like defects and improved surface roughness, thereby enabling improved device characteristics to be achieved, and have completed the present invention.

[0026] As a result of extensive research into the above-mentioned problems, the present inventors have also found that it is possible to suppress the generation of dent-like defects by a heat treatment method for a silicon substrate having a principal surface with a plane orientation of {110}, the heat treatment method comprising a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling the silicon substrate to a temperature lower than 570°C, wherein the sum of the products of the temperature and time of the silicon substrate during the period from when the temperature of the silicon substrate reaches 570°C in the heating step to when the temperature of the silicon substrate reaches 570°C in the cooling step is set to 60,000 (°C·sec) or less, and have completed the present invention.

[0027] [Silicon Substrate] In the present invention, a plane having a plane orientation of {110} includes a plane having a plane orientation equivalent to (110), and also includes a plane having an off angle of 0.23 to 0.5 degrees from the {110} plane.

[0028] Fig. 4 shows a cross-sectional structure of an example of a Si(110) substrate. As shown in Fig. 4, a Si(110) substrate 2 has a surface 3 (the outermost surface of the surface stable structure). It is on surface 3 that pit-like defects having a longitudinal length of 50 nm or more and 2000 nm or less (hereinafter simply referred to as "pit-like defects"), which are the subject of the present invention, exist.

[0029] When a Si (110) substrate is subjected to hydrogen annealing before epitaxial growth, or when epitaxial growth (silicon, SiGe, etc.) or heat treatment is performed, depression-like defects such as those shown in FIG. 2 may occur.

[0030] This defect is generated due to differences in the stable structure of Si(110), as described in Patent Document 2 and Non-Patent Documents 2 and 3. The research and studies of the present researchers have revealed that such long defects can exist in particular when stable structures such as 16x2 domains are connected.

[0031] To generate such long defects, atomic interactions must occur over a long distance. In other words, when considering a pit-like defect, an interaction of (surface energy) x (thermal energy) is required.

[0032] As shown in FIG. 4, the silicon {110} substrate 2 of the present invention does not contain such depression-like defects on the surface 3 of the surface stable structure.

[0033] Furthermore, pit defects are affected not only by heat treatment conditions but also by the off-angle of the substrate's main surface. In other words, pit defects can be suppressed by understanding that they are the result of an interaction between (surface energy) and (thermal energy).

[0034] Here, the surface energy corresponds to the step-terrace width formed by the off-angle of the silicon (110) substrate, and as the off-angle becomes smaller and the terrace width becomes smaller, the surface energy becomes relatively larger.

[0035] In the present invention, the off-angle of the main surface of the silicon {110} substrate 2 can be 0.23° or more. The upper limit of the off-angle is not particularly limited, but may be 0.5°.

[0036] Such a silicon substrate has improved surface roughness and device characteristics, because the large off-angle causes the ES effect (the Ahrlich-Schwebel effect: the wider the terrace, the greater the amount of atom diffusion, suppressing step motion), which suppresses the generation of defects.

[0037] [Silicon Substrate Heat Treatment Method] The silicon {110} substrate heat treatment method according to the present invention comprises a heating step of heating the silicon substrate to a heat treatment temperature higher than 570° C., a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling the silicon substrate to a temperature lower than 570° C. The upper limit of the heat treatment temperature is not particularly limited, but can be 1200° C. The lower limit of the temperature in the cooling step is not particularly limited, but can be room temperature.

[0038] Here, the heat treatment refers to a heat treatment in which the silicon substrate is treated at a temperature of 570° C. or higher, and includes annealing, epitaxial growth, and other layer formation treatments. The heat treatment does not have to be performed at a constant temperature.

[0039] In order to reduce the above-mentioned dent-like defects, it is necessary to set the sum of the product of the temperature and time of the silicon substrate to 60,000 (°C·sec) or less during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step.

[0040] That is, when a Si (110) substrate having an off-angle of 0.26° on the main surface was subjected to hydrogen annealing in a heat treatment step at a temperature of 1080°C for 60 seconds, depression-like defects with a longitudinal length of 1 μm were generated, as shown in Figure 2. In this case, the sum of the product of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reached 570°C in the heating step to the time when the temperature of the silicon substrate reached 570°C in the cooling step was 65000 (°C·sec).

[0041] Next, when a Si(110) substrate having the same main surface off-angle of 0.26° as above was subjected to hydrogen annealing at a temperature of 900°C for 60 seconds in a heat treatment step, no pit-like defects were generated, as shown in Figure 1. In this case, the sum of the product of the temperature and time of the silicon substrate during the period from when the temperature of the silicon substrate reached 570°C in the heating step to when the temperature of the silicon substrate reached 570°C in the cooling step was 57,000 (°C·sec).

[0042] In this way, by taking into consideration the heat treatment temperature and time, and performing the heat treatment with the sum of the product of the temperature and time of the silicon substrate being 60,000 (°C·sec) or less during the period from when the temperature of the silicon substrate reaches 570°C in the heating step to when the temperature of the silicon substrate reaches 570°C in the cooling step, it is possible to suppress the generation of dent-like defects.

[0043] The lower limit of the sum of the products of the temperatures and times is not particularly limited, but may be 5400 (°C·sec).

[0044] In the heat treatment method for a Si {110} substrate according to the present invention, the off-angle of the main surface of the silicon substrate can be set to 0.23° or more. This makes it possible to further suppress the generation of pit-like defects. The upper limit of the off-angle is not particularly limited, but may be set to 0.5°.

[0045] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0046] (Example) A silicon single crystal substrate having a diameter of 300 mm, a (110) orientation, boron doping, a resistance of 10 Ω·cm, and an off-angle of 0.26° from the (110) principal surface was prepared, and hydrogen annealing was performed at a temperature of 900°C for 60 seconds at atmospheric pressure. During this time, the sum of the product of the temperature and time of the silicon substrate from the time when the temperature of the silicon substrate reached 570°C in the heating step to the time when the temperature of the silicon substrate reached 570°C in the cooling step was 57,000 (°C·sec).

[0047] After that, the angle of view was adjusted so that one side of the acquired image was 1 μm, and AFM measurement was performed. The measurement results are shown in Figure 1. As shown in Figure 1, no depression-like defects were observed on the surface of the silicon substrate.

[0048] Comparative Example 1: The same silicon single crystal substrate as in Example was prepared and subjected to hydrogen annealing at atmospheric pressure for 60 seconds at a temperature of 1080° C. During this time, the sum of the product of the temperature and time of the silicon substrate during the period from when the temperature of the silicon substrate reached 570° C. in the heating step to when the temperature of the silicon substrate reached 570° C. in the cooling step was 65000 (° C. sec).

[0049] The angle of view was then adjusted so that one side of the acquired image was 1 μm, and AFM measurement was performed. The measurement results are shown in Figure 2. A depression-like defect with a longitudinal length of 1 μm, as shown in Figure 2, was observed on the surface of the silicon substrate.

[0050] Comparative Example 2: A silicon single crystal substrate identical to that of Example was prepared, except that the off-angle of the principal surface was 0.24°, and this was subjected to hydrogen annealing at a temperature of 1030°C for 60 seconds at atmospheric pressure. During this time, the sum of the product of the temperature and time of the silicon substrate during the period from when the temperature of the silicon substrate reached 570°C in the heating step to when the temperature of the silicon substrate reached 570°C in the cooling step was 65000 (°C·sec).

[0051] The angle of view was then adjusted so that one side of the acquired image was 1 μm, and AFM measurement was performed. The measurement results are shown in Figure 3. A 0.8 μm depression-like defect, as shown in Figure 3, was observed on the surface of the silicon substrate.

[0052] As described above, according to the examples of the present invention, the heat treatment of the Si(110) substrate can be performed without generating pit-like defects on the surface, and a Si(110) substrate without pit-like defects of 50 nm to 2000 nm in size on the surface can be obtained.

[0053] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits similar effects is included within the technical scope of the present invention.

Claims

1. A silicon substrate having a principal surface with a {110} orientation and containing no depression-like defects with a longitudinal length of 50 nm or more and 2000 nm or less on the surface.

2. A silicon substrate having a {110} principal surface orientation according to claim 1, characterized in that the principal surface has an off-angle of 0.23° or more.

3. A method for heat treating a silicon substrate having a {110} principal surface orientation, said heat treatment method comprising a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at that heat treatment temperature, and a cooling step of cooling the silicon substrate to a temperature lower than 570°C, characterized in that the sum of the product of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step is 60,000 (°C·sec) or less.

4. The method for heat treating a silicon substrate according to claim 3, wherein the off-angle of the main surface of the silicon substrate is set to 0.23° or more.

Citation Information

Patent Citations

  • Method for producing silicon epitaxial wafer and silicon epitaxial wafer

    JP2001253797A

  • Silicon epitaxial wafer and manufacturing method thereof

    JP2006100596A

  • Manufacture process of silicon single crystal and manufacture process of silicon wafer

    JP2008088045A

  • Epitaxial silicon wafer and manufacturing method thereof

    JP2008091887A

  • Epitaxial silicon wafer and manufacturing method thereof

    JP2008091891A