Semiconductor device and method for manufacturing semiconductor device

Abstract

This semiconductor device comprises: an amorphous glass substrate; a first buffer layer formed on the amorphous glass substrate; and a GaN device layer that is formed on the first buffer layer and that contains gallium nitride (GaN). The first buffer layer has a plurality of first layers containing indium (In) and nitrogen (N), and a plurality of second layers made of GaN. The first layers and the second layers are alternately laminated.

Description

Semiconductor device and method for manufacturing the same

[0001] The present invention relates to semiconductor devices and methods for manufacturing semiconductor devices.

[0002] Patent Documents 1 and 2 disclose techniques for forming a GaN film on a glass substrate instead of a sapphire substrate in order to reduce costs in gallium nitride (GaN)-based semiconductor devices.

[0003] In Patent Document 1, a buffer layer having a superlattice structure is formed on a glass substrate, and a GaN-based semiconductor is grown thereon. In Patent Document 2, an underlayer made of AlN having a c-axis orientation is formed on a glass substrate, and a GaN-based semiconductor is grown thereon.

[0004] JP 2006-310527 A International Publication No. 2022 / 259918

[0005] In such GaN-based semiconductor devices using glass substrates, it is necessary to improve the crystallinity of GaN.

[0006] An object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device that can improve the crystallinity of GaN.

[0007] A semiconductor device according to one aspect of the present disclosure includes an amorphous glass substrate, a first buffer layer formed on the amorphous glass substrate, and a GaN device layer formed on the first buffer layer and containing gallium nitride (GaN), wherein the first buffer layer includes a plurality of first layers containing indium (In) and nitrogen (N) and a plurality of second layers made of GaN, and the first layers and the second layers are stacked alternately.

[0008] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes the steps of: preparing an amorphous glass substrate; depositing a first buffer layer on the amorphous glass substrate by alternately stacking a plurality of first layers containing indium (In) and nitrogen (N) and a plurality of second layers made of GaN; and depositing a GaN device layer containing gallium nitride (GaN) on the first buffer layer.

[0009] FIG. 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. FIG. 2 is a table showing the thermal expansion coefficients and lattice constants of various materials used in the semiconductor device. FIG. 3 is a graph schematically showing the half-width of the GaN (0002) plane of each of multiple second layers (GaN layers) included in the first buffer layer. FIG. 4 is a cross-sectional view showing a semiconductor device according to a first modification. FIG. 5 is a table showing the refractive indexes and extinction coefficients of various materials used in the semiconductor device according to the first modification. FIG. 6 is a cross-sectional view showing a semiconductor device according to a second modification. FIG. 7 is a cross-sectional view showing a semiconductor device according to the second embodiment. FIG. 8 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment. FIG. 9 is an explanatory view for explaining the laser lift-off process in FIG. 8. FIG. 10 is a cross-sectional view showing a semiconductor device according to a third modification. FIG. 11 is a cross-sectional view showing a semiconductor device according to a fourth modification.

[0010] Modes (embodiments) for carrying out the present disclosure will be described in detail with reference to the drawings. The present disclosure is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially identical. Furthermore, the components described below can be combined as appropriate. Note that the disclosure is merely an example, and any appropriate modifications that a person skilled in the art can easily conceive while maintaining the gist of the present disclosure are naturally included within the scope of the present disclosure. Furthermore, for clarity of explanation, the drawings may schematically depict the width, thickness, shape, etc. of each part compared to the actual embodiment. However, these are merely examples and are not intended to limit the interpretation of the present disclosure. Furthermore, in this disclosure and each figure, elements similar to those described above with reference to the previous figures may be designated by the same reference numerals, and detailed descriptions may be omitted as appropriate.

[0011] In the present disclosure, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.

[0012] 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. A semiconductor device 1 according to this embodiment can be applied to, for example, a light-emitting diode (LED) or a high electron mobility transistor (HEMT) device.

[0013] 1, the semiconductor device 1 of this embodiment includes an amorphous glass substrate 10, a first buffer layer 20, and a GaN device layer 30. The amorphous glass substrate 10, the first buffer layer 20, and the GaN device layer 30 are stacked in this order in a direction perpendicular to the surface of the amorphous glass substrate 10.

[0014] The amorphous glass substrate 10 has a composition of, for example, alkaline earth aluminoborosilicate glass or alkali-free aluminosilicate glass. The glass transition temperature (Tg) is 720° C. or higher and 810° C. or lower. The coefficient of thermal expansion (CTE) of the amorphous glass substrate 10 is 3.5×10 －６ [1 / K] or more 4.0×10 －６ The softening point of the amorphous glass substrate 10 is 950° C. or higher and 1050° C. or lower.

[0015] The first buffer layer 20 is formed directly on the amorphous glass substrate 10. The first buffer layer 20 contains a group 13 nitride having a wurtzite structure and is configured by stacking two or more different group 13 nitrides. The first buffer layer 20 has a so-called superlattice structure.

[0016] Specifically, the first buffer layer 20 has a plurality of first layers 21-1, 21-2, ..., 21-n and a plurality of second layers 22-1, 22-2, ..., 22-n. In the following description, when it is not necessary to distinguish between the plurality of first layers 21-1, 21-2, ..., 21-n, they will simply be referred to as first layers 21. Furthermore, when it is not necessary to distinguish between the plurality of second layers 22-1, 22-2, ..., 22-n, they will simply be referred to as second layers 22.

[0017] The plurality of first layers 21 and the plurality of second layers 22 are alternately stacked on the amorphous glass substrate 10. That is, the first layer 21-1, the second layer 22-1, the first layer 21-2, the second layer 22-2, ..., the first layer 21-n, the second layer 22-n are stacked on the amorphous glass substrate 10 in this order.

[0018] Each of the first layers 21 contains indium (In) and nitrogen (N). Specifically, each of the first layers 21 contains InN or In ｘ Ga （１－ｘ） N (0.5<x≦1.0). Each of the second layers 22 is made of gallium nitride (GaN).

[0019] In the first buffer layer 20, the bottom layer closest to the amorphous glass substrate 10 is the first layer 21-1. In addition, in the first buffer layer 20, the top layer closest to the GaN device layer 30 (furthest from the amorphous glass substrate 10) is the second layer 22-n.

[0020] Of the multiple first layers 21, the film thickness t1-1 of the lowest first layer 21-1 is thicker than the film thicknesses t1-2, ..., t1-n of the other first layers 21-2, ..., 21-n. The film thickness t1-1 of the lowest first layer 21-1 is, for example, about 30 nm. The film thicknesses t1-2, ..., t1-n of the other first layers 21-2, ..., 21-n are each 3 nm or more and 20 nm or less, for example, about 8 nm.

[0021] The thicknesses t2-1, t2-2, ..., t2-n of the second layers 22 are equal to or greater than the thicknesses t1-2, ..., t1-n of the other first layers 21. The thickness t1-1 of the lowermost first layer 21-1 is greater than the thickness t2 of the second layers 22. The thicknesses t1, t2 of the first layers 21 and the second layers 22 satisfy the relationship (t1-2, ..., t1-n)≦t2<t1-1. The thickness t2 of the second layers 22 is 10 nm or more and 30 nm or less, for example, about 15 nm.

[0022] 2 is a table showing the thermal expansion coefficients and lattice constants of various materials used in semiconductor devices, including the thermal expansion coefficient and lattice constant of aluminum nitride (AlN) used in the semiconductor device 1A of the first modification (see FIG. 4).

[0023] As shown in FIG. 2, the thermal expansion coefficient of InN used in the first layers 21 is 3.8×10 －６ The thermal expansion coefficient of GaN used in the second layers 22 and the GaN device layer 30 is about 5.6×10 －６ The thermal expansion coefficient of the amorphous glass substrate 10 is about 3.5×10 －６ The thermal expansion coefficient of the first layer 21 (InN) is greater than that of the amorphous glass substrate 10 and less than that of the second layer 22 (GaN). That is, the thermal expansion coefficients of the amorphous glass substrate 10 and the first buffer layer 20 satisfy the relationship: amorphous glass substrate 10 < the plurality of first layers 21 < the plurality of second layers 22.

[0024] The lattice constant of the plurality of first layers 21 (InN) is approximately 0.354 [nm]. The lattice constant of the plurality of second layers 22 (GaN) and the GaN device layer 30 is approximately 0.319 [nm]. The lattice constant of the amorphous glass substrate 10 is approximately 0.491 [nm]. The lattice constant of the amorphous glass substrate 10 is approximately 0.491 [nm]. ２ The lattice constant of the first layer 21 (InN) is smaller than that of the amorphous glass substrate 10 and larger than that of the second layer 22 (GaN). That is, the lattice constants of the amorphous glass substrate 10 and the first buffer layer 20 satisfy the relationship: multiple second layers 22 < multiple first layers 21 < amorphous glass substrate 10.

[0025] The table shown in FIG. 2 shows the thermal expansion coefficient and lattice constant of InN. ｘ Ga （１－ｘ） The thermal expansion coefficient and lattice constant of N are estimated to be between those of GaN and InN.ｘ Ga （１－ｘ） When N is used, the constants of the amorphous glass substrate 10 and the first buffer layer 20 have the same relationship as above.

[0026] Thus, the difference between the thermal expansion coefficient of the first layer 21 (InN) of the first buffer layer 20 and the thermal expansion coefficient of the amorphous glass substrate 10 is smaller than the difference between the thermal expansion coefficient of GaN and the thermal expansion coefficient of the amorphous glass substrate 10. In addition, the difference between the lattice constant of the first layer 21 (InN) of the first buffer layer 20 and the lattice constant of the amorphous glass substrate 10 is smaller than the difference between the lattice constant of GaN and the lattice constant of the amorphous glass substrate 10.

[0027] As a result, in the first buffer layer 20, a plurality of first layers 21 and a plurality of second layers 22 are alternately stacked. As the number of stacked layers increases, the number of first layers 21 (InN or In ｘ Ga （１－ｘ） The first buffer layer 20 is crystallized so as to minimize strain caused by the difference in thermal expansion between the first buffer layer 20 (GaN) and the plurality of second layers 22 (GaN layers) and strain caused by lattice mismatch. Furthermore, the more the number of layers stacked, the more the plurality of first layers 21 and the plurality of second layers 22 are crystallized to have a good c-axis orientation (i.e., to suppress misalignment of the c-axes between the crystals), thereby suppressing screw dislocations. As a result, the closer the first buffer layer 20 is to the GaN device layer 30, the better the crystallinity (c-axis orientation) it has.

[0028] 3 is a graph showing the half-widths of the GaN (0002) planes of the second layers (GaN) of the first buffer layer, which were measured by X-ray rocking curve (XRC).

[0029] 3, the full width at half maximum of the second layers 22 (GaN) decreases in the order of the second layers 22-1, 22-2, 22-3, 22-4, ..., 22-n as the number of layers increases. In other words, the full width at half maximum of the second layers 22 (GaN layers) decreases as they approach the GaN device layer 30 (as they move farther away from the amorphous glass substrate 10). The uppermost second layer 22-n has a full width at half maximum that is equal to or less than the threshold value TH of GaN crystallinity required for the GaN device layer 30.

[0030] 1, the GaN device layer 30 is formed directly on the first buffer layer 20. The GaN device layer 30 includes gallium nitride (GaN). The GaN device layer 30 is formed on the uppermost second layer 22-n, which has good crystallinity. Therefore, the GaN device layer 30 is formed with good crystallinity (c-axis orientation) reflecting the crystallinity of the first buffer layer 20 (second layer 22-n).

[0031] As described above, in the semiconductor device 1, the GaN device layer 30 is provided on the amorphous glass substrate 10 with the first buffer layer 20 provided as an orientation control layer sandwiched therebetween, thereby improving the crystallinity (c-axis orientation) of the GaN device layer 30.

[0032] Furthermore, in the first buffer layer 20, the film thickness t1-1 of the lowermost first layer 21-1 is thicker than the film thickness t1 of each of the other first layers 21. This allows the first layer 21-1 to effectively absorb the laser light L irradiated from the amorphous glass substrate 10 when laser lift-off (see FIG. 9) is performed in the manufacturing process of the semiconductor device 1. This makes it possible to prevent damage to the GaN device layer 30 caused by the laser light L during laser lift-off.

[0033] In addition, if the number of stacked first layers 21 is sufficiently large and multiple first layers 21 can absorb the laser light L, the film thickness t1-1 of the bottommost first layer 21-1 may be the same as that of the other first layers 21.

[0034] 1, the GaN device layer 30 is shown as a single layer, but may be configured by stacking multiple GaN layers. The GaN device layer 30 will be described later in the second embodiment (FIG. 7). The thickness t1 of the first layer 21 and the thickness t2 of the second layer 22 of the first buffer layer 20 are merely examples and are not limited to the above values.

[0035] 4 is a cross-sectional view showing a semiconductor device according to a first modification. In the following description, the same components as those described in the above embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0036] 4, the semiconductor device 1A according to the first modification has a second buffer layer 40 provided between the amorphous glass substrate 10 and the first buffer layer 20. The second buffer layer 40 contains c-axis oriented aluminum nitride (AlN). Specifically, the second buffer layer 40 is an AlN single layer film, a stacked film of AlN and InGaN, or a stacked film of AlN and Ti.

[0037] Since the second buffer layer 40 contains c-axis oriented AlN, the first buffer layer 20 formed on the second buffer layer 40 has good crystallinity (c-axis orientation). As a result, the GaN device layer 30 formed on the first buffer layer 20 is formed with good crystallinity (c-axis orientation).

[0038] Furthermore, since the semiconductor device 1A has the first buffer layer 20 and the second buffer layer 40, it is possible to control the stress generated in each layer. As a result, the semiconductor device 1A can suppress warping of the substrate and the occurrence of cracks in the GaN device layer 30.

[0039] 4, arrows A, B, C1, C2, and C3 schematically indicate the direction of stress acting on each layer. Compressive stress, indicated by arrow A, occurs in the amorphous glass substrate 10. Tensile stress, indicated by arrow C1, occurs in the second layer 22 of the first buffer layer 20. As a result, stresses are balanced between the amorphous glass substrate 10 and a layer (e.g., the second layer 22) of the first buffer layer 20 located away from the amorphous glass substrate 10.

[0040] Here, among the multiple first buffer layers 20, the first layer 21-m (m is a natural number satisfying 1<m<n) is located in the center in the film thickness direction, in other words, midway between the lowermost first layer 21-1 and the uppermost second layer 22-n. In the first layer 21-m located farther from the amorphous glass substrate 10, stress indicated by arrow C3, which is opposite to the arrows C1 and C2, is generated. In the first layer 21-m and the second layer 22, which are adjacent to each other in the film thickness direction of the multiple first buffer layers 20, stress is generated in the opposite directions indicated by arrows C1 and C3. As a result, the further away from the amorphous glass substrate 10 the layer 20 is, the more stress acts to balance the adjacent layers of the first buffer layer 20. Furthermore, compressive stress indicated by arrow B is generated in the GaN device layer 30. Stress is generated so as to balance between the GaN device layer 30 and a layer of the first buffer layer 20 located away from the GaN device layer 30 (for example, the second layer 22-m).

[0041] In this way, in the semiconductor device 1A, the amorphous glass substrate 10, the first buffer layer 20, and the GaN device layer 30 can ensure a balance of stress between layers located far apart in the film thickness direction and between layers located close together in the film thickness direction, thereby achieving a balance of stress throughout the entire semiconductor device 1A.

[0042] Alternatively, a stacked film (InGaN / AlN or Ti / AlN) containing c-axis oriented AlN may be used as the second buffer layer 40. In this case, the thickness of the AlN is approximately 20 nm to 100 nm. The thickness of the InGaN is approximately 5 nm to 40 nm, and is thinner than the thickness of the AlN. Alternatively, the thickness of the Ti is approximately 20 nm to 100 nm, and is thicker than the thickness of the AlN.

[0043] As shown in FIG. 2, the thermal expansion coefficient of AlN in the second buffer layer 40 is 5.3×10 －６[1 / K]. That is, the thermal expansion coefficients of AlN contained in the amorphous glass substrate 10, the first buffer layer 20, and the second buffer layer 40 have the following relationship: amorphous glass substrate 10 < plural first layers 21 (InN) < second buffer layer 40 (AlN) < plural second layers 22 (GaN).

[0044] The lattice constant of AlN in the second buffer layer 40 is approximately 0.311 nm. That is, the lattice constants of AlN in the amorphous glass substrate 10, the first buffer layer 20, and the second buffer layer 40 satisfy the relationship: second buffer layer 40 (AlN) < multiple second layers 22 (GaN) < multiple first layers 21 (InN) < amorphous glass substrate 10.

[0045] Thus, the second buffer layer 40 (AlN) has a mismatch in thermal expansion coefficient and lattice constant with the first buffer layer 20 (InN). Even in this case, by employing an InGaN / AlN or Ti / AlN stacked film as the second buffer layer 40, the mismatch in thermal expansion coefficient and lattice constant between the AlN of the second buffer layer 40 and the first buffer layer 20 (InN) can be alleviated. This allows the semiconductor device 1A to suppress warpage of the substrate and the occurrence of cracks in the GaN device layer 30.

[0046] 5 is a table showing the refractive indexes and extinction coefficients of various materials used in the semiconductor device according to the first modification. The table shows the refractive indexes and extinction coefficients for light with a wavelength of 354 nm. Here, the wavelength of 354 nm is the wavelength used for the laser light L in laser lift-off.

[0047] 5, Ti or InGaN used in the second buffer layer 40 has a larger extinction coefficient than the GaN layer. The first layer 21 (InN) of the first buffer layer 20 also has a larger extinction coefficient than the GaN layer. This allows the second buffer layer 40 and the first layer 21 of the first buffer layer 20 to effectively absorb the laser light L irradiated from the amorphous glass substrate 10 when laser lift-off (see FIG. 9) is performed in the manufacturing process of the semiconductor device 1A. This prevents damage to the GaN device layer 30 caused by the laser light L during laser lift-off.

[0048] Furthermore, in this modification, since the second buffer layer 40 also functions as a light absorption layer, the film thickness t1-1 of the first layer 21-1 of the first buffer layer 20 may be the same as the film thickness of the other first layers 21 (for example, t1-1 = approximately 8 nm).

[0049] (Second Modification) Fig. 6 is a cross-sectional view showing a semiconductor device according to a second modification. As shown in Fig. 6, a semiconductor device 1B according to the second modification has a protective layer 50 containing AlN. The protective layer 50 is provided on the surface of the amorphous glass substrate 10 opposite to the surface on which the first buffer layer 20 is formed (the lower surface of the amorphous glass substrate 10 in Fig. 6).

[0050] The protective layer 50 contains AlN, similar to the second buffer layer 40. The protective layer 50 may be a single layer film, similar to the second buffer layer 40, or may be a stacked film. The thickness of the protective layer 50 is, for example, 100 nm or more and 1000 nm or less. In the second modification, the second buffer layer 40 containing AlN is provided on the upper surface of the amorphous glass substrate 10, and the protective layer 50 containing AlN is provided on the lower surface of the amorphous glass substrate 10, so that the occurrence of substrate warpage due to thermal stress can be suppressed.

[0051] Furthermore, in the second modified example, a protective layer 50 is provided on the underside of the amorphous glass substrate 10, so that when the first buffer layer 20, the second buffer layer 40, and the GaN device layer 30 are formed in the manufacturing process of the semiconductor device 1B (see Figure 8), it is possible to prevent degassing from the amorphous glass substrate 10 from escaping to the underside.

[0052] Second Embodiment Fig. 7 is a cross-sectional view showing a semiconductor device according to a second embodiment. As shown in Fig. 7, a semiconductor device 1C according to the second embodiment is an LED (Light Emitting Diode), that is, a light emitting element.

[0053] The GaN device layer 30A is provided on the amorphous glass substrate 10 and first buffer layer 20 of the first embodiment (see FIG. 1 ). The GaN device layer 30A includes a bonding layer 31, an electron injection layer 32, a light-emitting layer 33, a hole injection layer 34, electrodes 35 and 36, and a passivation film 37.

[0054] An junction layer 31, an electron injection layer 32, a light-emitting layer 33, and a hole injection layer 34 are stacked in this order on the first buffer layer 20. A passivation film 37 covers the top surface of the hole injection layer 34 and the side surfaces of the junction layer 31, the electron injection layer 32, the light-emitting layer 33, and the hole injection layer 34. Electrodes 35 and 36 are provided in regions overlapping with openings 38 and 39 provided in the passivation film 37. The electrode 35 is electrically connected to the cathode, and the electrode 36 is electrically connected to the anode.

[0055] (Manufacturing Method) Fig. 8 is a flowchart showing a manufacturing method of a semiconductor device according to the second embodiment. As shown in Fig. 8, an amorphous glass substrate 10 is prepared as a substrate for a semiconductor device 1C (step ST1). The amorphous glass substrate 10 has a glass transition temperature (Tg) of 720°C or higher and 810°C or lower. The amorphous glass substrate 10 has a coefficient of thermal expansion (CTE) of 3.5 x 10 －６ [1 / K] or more 4.0×10 －６ The softening point of the amorphous glass substrate 10 is 950° C. or higher and 1050° C. or lower.

[0056] A first buffer layer 20 is formed directly on the amorphous glass substrate 10 (step ST2). In step ST2, a plurality of first layers 21 (InN) containing indium (In) and nitrogen (N) and a plurality of second layers 22 made of GaN are alternately formed to form the first buffer layer 20. In step ST2, each layer of the first buffer layer 20 is formed as a thin film using a sputtering apparatus (not shown) rather than metal organic chemical vapor deposition (MOCVD).

[0057] The first layer 21 (InN) of the first buffer layer loses nitrogen (N) due to thermal decomposition of InN at a temperature of about 550° C., so the deposition temperature of the first layer 21 (InN) is preferably 550° C. or lower. Similarly, in the subsequent deposition processes, it is preferable to deposit the films at a temperature of 550° C. or lower using a sputtering apparatus.

[0058] After step ST2, a GaN device layer 30A containing gallium nitride (GaN) is deposited on the first buffer layer 20. More specifically, after step ST2, a bonding layer 31 is deposited on the first buffer layer 20 (step ST3). The bonding layer 31 is an undoped GaN layer. Each layer of the GaN device layer 30A is formed by sputtering deposition, which allows low-temperature deposition, similar to the first buffer layer 20.

[0059] After step ST3, an electron injection layer 32 made of silicon (Si)-doped gallium nitride (n-GaN) is formed on the bonding layer 31 (step ST4).

[0060] After step ST4, indium gallium nitride (In ｘ Ga １－ｘ Then, a light emitting layer 33 is formed in which a plurality of layers of silicon nitride (SiN) and gallium nitride (GaN) are repeatedly stacked (step ST5).

[0061] After step ST5, a hole injection layer 34 made of magnesium (Mg)-doped gallium nitride (p-GaN) is formed on the light emitting layer 33 (step ST6).

[0062] After step ST6, activation annealing of the hole injection layer 34 (p-GaN) is performed at a predetermined temperature (step ST7).

[0063] After step ST7, the bonding layer 31, the electron injection layer 32, the light emitting layer 33, and the hole injection layer 34 are patterned by photolithography, etching, and the like (step ST8).

[0064] After step ST8, a passivation film 37 is formed to cover the bonding layer 31, the electron injection layer 32, the light emitting layer 33, and the hole injection layer 34 (step ST9).

[0065] After step ST9, the passivation film 37 is processed by photolithography, etching, etc., to form openings 38 and 39 (step ST10).

[0066] After step ST10, a p-type electrode (electrode 36) is formed. In the p-type electrode formation step, the electrode 36 is formed as a film of a palladium-gold alloy (PdAu) or a nickel-gold alloy (NiAu) (step ST11).

[0067] After step ST11, an n-type electrode (electrode 35) is formed. In the n-type electrode formation step, the electrode 35 is formed as a film having a layered structure of indium (In) or titanium (Ti) / aluminum (Al) / titanium (Ti) / gold (Au) (step ST12).

[0068] After step ST12, annealing is performed at a predetermined temperature (step ST13).

[0069] After step ST13, laser lift-off is performed (step ST14). Fig. 9 is an explanatory diagram for explaining the laser lift-off process in Fig. 8. As shown in Fig. 9, in the laser lift-off process, first, a transfer substrate 60 is bonded onto the GaN device layer 30A via an adhesive layer 61 (step ST14-1).

[0070] After step ST14-1, the lower surface (the surface opposite to the surface on which the first buffer layer 20 is formed) of the amorphous glass substrate 10 is irradiated with laser light L toward the first buffer layer 20 (step ST14-2).

[0071] In step ST14-2, the laser light L decomposes In and N in the first layer 21 of the first buffer layer 20, and the amorphous glass substrate 10 is peeled off (step ST14-3). The GaN device layer 30A from which the amorphous glass substrate 10 has been peeled off is mounted on another mounting substrate.

[0072] 10 is a cross-sectional view showing a semiconductor device according to a third modification. As shown in Fig. 10, a semiconductor device 1D according to the third modification differs from the second embodiment in that it has a second buffer layer 40 provided between the amorphous glass substrate 10 and the first buffer layer 20. The second buffer layer 40 is the same as that in the first modification (see Fig. 4), and therefore a repeated description will be omitted.

[0073] 8, the second buffer layer 40 is formed after step ST1 and before step ST2. That is, the method for manufacturing the semiconductor device 1D according to the third modification includes a step of forming the second buffer layer 40 containing c-axis-oriented aluminum nitride (AlN) on the amorphous glass substrate 10 between the step of preparing the amorphous glass substrate 10 (step ST1) and the step of forming the first buffer layer 20 (step ST2).

[0074] The AlN contained in the second buffer layer 40 is deposited directly on the amorphous glass substrate 10 by magnetron sputtering at a deposition temperature of 400°C or higher and 600°C or lower. If the deposition temperature is lower than 400°C, the AlN layer is less likely to be c-axis oriented, and if the deposition temperature exceeds 600°C, degassing from the deposition chamber makes it less likely that the AlN layer will be c-axis oriented. Since the AlN layer is deposited at a temperature of 400°C or higher and 600°C or lower, the AlN layer can be deposited on the amorphous glass substrate 10 in a c-axis oriented state. Preferably, deposition is performed at 550°C or lower, taking into account the heat resistance of the first buffer layer 20 (InN). Here, the thermal expansion coefficient of the deposited AlN layer is 4.2×10 －６ [1 / K] or more 5.3×10 －６Even if the film formation temperature rises and the amorphous glass substrate 10 thermally expands, the thermal expansion coefficient of the amorphous glass substrate 10 is close to that of the AlN layer, so that mismatch in thermal expansion is unlikely to occur, and the AlN layer is likely to be c-axis oriented.

[0075] The amorphous glass substrate 10 has a glass transition temperature (Tg) of 720°C or higher and 810°C or lower, and a softening point of 950°C or higher and 1050°C or lower. Because the film formation temperature is low, the stability of the amorphous glass substrate 10 can be maintained high during film formation. If the amorphous glass substrate 10 has a glass transition temperature (Tg) lower than 720°C and a softening point lower than 950°C, the formed AlN layer will be less likely to have a c-axis orientation. If the amorphous glass substrate 10 has a glass transition temperature (Tg) higher than 810°C and a softening point higher than 1050°C, the film formation temperature can be set high, but the formed AlN will be less likely to have a c-axis orientation.

[0076] 11 is a cross-sectional view showing a semiconductor device according to a fourth modification. As shown in Fig. 11, the semiconductor device 1E according to the fourth modification differs from the second embodiment and the third modification in that it has a protective layer 50 provided on the surface of the amorphous glass substrate 10 opposite to the first buffer layer 20. The protective layer 50 is the same as that in the second modification (see Fig. 6), and therefore a repeated description will be omitted.

[0077] 8 , the protective layer 50 is deposited after step ST1 and before step ST2. That is, the method for manufacturing the semiconductor device 1E according to the fourth modification includes a step of depositing the protective layer 50 containing AlN on the surface of the amorphous glass substrate 10 opposite to the surface on which the first buffer layer 20 is formed, between the step of preparing the amorphous glass substrate 10 (step ST1) and the step of depositing the second buffer layer 40 and the first buffer layer 20 (step ST2). The protective layer 50 is deposited by magnetron sputtering, similar to the second buffer layer 40.

[0078] The above-described embodiments and modifications can be used as a semiconductor device substrate. The semiconductor device substrate is, for example, the semiconductor device 1C shown in FIGS. 7 and 8 in a state before the GaN device layer 30A is patterned (the state before step ST8 in FIG. 8 ). In other words, the semiconductor device substrate includes, for example, an amorphous glass substrate 10, a first buffer layer 20 formed on the amorphous glass substrate 10, and an unpatterned GaN device layer 30A. The semiconductor device substrate may further include a second buffer layer 40 and a protective layer 50.

[0079] Although preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to such embodiments. The contents disclosed in the embodiments are merely examples, and various modifications are possible within the scope of the present disclosure. Appropriate modifications made within the scope of the present disclosure naturally fall within the technical scope of the present disclosure. At least one of various omissions, substitutions, and modifications of components can be made within the scope of the gist of each of the above-described embodiments and modifications.

[0080] 1, 1A, 1B, 1C, 1D, 1E Semiconductor device 10 Amorphous glass substrate 20 First buffer layer 21, 21-1, 21-2, ..., 21-n First layer 22, 22-1, 22-2, ..., 22-n Second layer 30, 30A GaN device layer 31 Bonding layer 32 Electron injection layer 33 Light-emitting layer 34 Hole injection layer 35, 36 Electrode 37 Passivation film 38, 39 Opening 40 Second buffer layer 50 Protective layer

Claims

1. A semiconductor device comprising: an amorphous glass substrate; a first buffer layer formed on the amorphous glass substrate; and a GaN device layer formed on the first buffer layer and containing gallium nitride (GaN), wherein the first buffer layer has a plurality of first layers containing indium (In) and nitrogen (N) and a plurality of second layers made of GaN, and the first layers and the second layers are alternately stacked.

2. The semiconductor device according to claim 1, further comprising a second buffer layer provided between the amorphous glass substrate and the first buffer layer, the second buffer layer containing c-axis oriented aluminum nitride (AlN).

3. The semiconductor device according to claim 1, further comprising a protective layer containing AlN, the protective layer being provided on the surface of the amorphous glass substrate opposite to the surface on which the first buffer layer is formed.

4. The first layer is made of InN or In ｘ Ga （１－ｘ） 2. The semiconductor device of claim 1 , wherein x is N (0.5<x≦1.0), and the first layer is the bottom layer of the first buffer layer closest to the amorphous glass substrate, and the second layer is the top layer of the first buffer layer closest to the GaN device layer.

5. The semiconductor device according to claim 4, wherein the thickness of the lowermost first layer of the plurality of first layers of the first buffer layer is thicker than the thickness of each of the other first layers, and the thickness of each of the plurality of second layers is equal to or greater than the thickness of each of the other first layers.

6. The semiconductor device according to claim 4, wherein the thickness of the first layer, which is the lowest layer, is thicker than the thickness of each of the plurality of second layers.

7. The semiconductor device according to claim 5, wherein each of the other first layers has a thickness of 3 nm or more and 20 nm or less, and each of the second layers has a thickness of 10 nm or more and 30 nm or less.

8. The semiconductor device according to claim 1, wherein the thermal expansion coefficient of the first layer is greater than the thermal expansion coefficient of the amorphous glass substrate and less than the thermal expansion coefficient of the second layer.

9. The semiconductor device according to claim 1, wherein the lattice constant of the first layer is smaller than the lattice constant of the amorphous glass substrate and larger than the lattice constant of the second layer.

10. The semiconductor device according to claim 1, wherein the half-width of the GaN (0002) plane of each of the plurality of second layers decreases from the amorphous glass substrate side toward the GaN device layer.

11. The semiconductor device according to claim 2, wherein the second buffer layer is an AlN single layer film, a laminated film of AlN and InGaN, or a laminated film of AlN and Ti.

12. A method for manufacturing a semiconductor device, comprising: preparing an amorphous glass substrate; depositing a first buffer layer on the amorphous glass substrate by alternately stacking a plurality of first layers containing indium (In) and nitrogen (N) and a plurality of second layers made of GaN; and depositing a GaN device layer containing gallium nitride (GaN) on the first buffer layer.

13. The method for manufacturing a semiconductor device according to claim 12, further comprising the step of depositing a second buffer layer containing c-axis oriented aluminum nitride (AlN) on the amorphous glass substrate between the step of preparing the amorphous glass substrate and the step of depositing the first buffer layer.

14. The method for manufacturing a semiconductor device according to claim 12, further comprising, between the step of preparing the amorphous glass substrate and the step of depositing the first buffer layer, a step of depositing a protective layer containing AlN on the surface of the amorphous glass substrate opposite to the surface on which the first buffer layer is to be formed.

15. A method for manufacturing a semiconductor device according to claim 12, comprising the steps of: bonding a transfer substrate to the surface of the GaN device layer opposite to the amorphous glass substrate; and irradiating a laser beam from the surface of the amorphous glass substrate opposite to the surface on which the first buffer layer is formed toward the first buffer layer, thereby peeling off the amorphous glass substrate.

16. The method for manufacturing a semiconductor device according to claim 12, wherein the first layer is sputter-deposited at a temperature of 550°C or less.

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