Pulse current output device

Abstract

This pulse current output device (1) is provided with: a current limiting circuit (11) that limits the current input from an external power source by dynamically controlling the resistance value of a semiconductor element; capacitors (12, 15, 17) that store charges on the basis of the current limited by the current limiting circuit; a pulse output control unit (18) that controls a pulse output time in accordance with a predetermined pulse output time ratio; and a pulse output switching circuit (19) that outputs, to the outside, the charges stored in the capacitors in accordance with control from the pulse output control unit.

Description

Pulse current output device

[0001] The present disclosure relates to a pulse current output device.

[0002] There is a need to capture images of rapidly moving products, equipment, jigs, etc. for purposes such as visual inspection of products in factories, alignment control for positioning during product processing, and observation of the operation of high-speed mechanical devices. In particular, for visual inspection and alignment control, lighting fixtures that illuminate the object to be photographed for only a very short time, i.e., lighting fixtures that use strobe lighting, are sometimes used to obtain clear images without blur. In recent years, the use of LED lighting fixtures that use light-emitting diodes (LEDs) as a light source has rapidly increased due to their advantages such as long life and energy saving.

[0003] When lighting an LED, the amount of current is generally controlled to control the amount of light. For example, the amount of current is controlled to match the specifications of the LED lighting fixture by combining a voltage control circuit that maintains a specified voltage with a current limiting resistor mounted on the LED side. When a voltage control circuit and a current limiting resistor are combined, the voltage and current are not proportional, so even a small voltage drop will significantly reduce the amount of current, and therefore the amount of light. For this reason, maintaining the output voltage is an important issue. In particular, to obtain clear, blur-free images, it is desirable to irradiate with a brighter amount of light in a shorter period of time, so maintaining the output voltage is even more important.

[0004] Furthermore, LED lighting fixtures that emit strobe light have a duty ratio (ratio of lighting time) depending on the product specifications. For example, even if a pulse current output device that outputs a pulse current of 2400 W is used, if the duty ratio is 1%, the required power capacity will be about 24 W on average.

[0005] Patent Document 1 discloses an LED strobe lighting power supply device including a pulse current output device in which a capacitor for suppressing voltage drops is provided between the positive and negative voltage input terminals of a constant voltage circuit.

[0006] Japanese Patent Application Laid-Open No. 2017-220349

[0007] The pulse current output device included in the LED strobe lighting power supply device described in Patent Document 1 requires a sufficiently large capacitor for voltage drop suppression, resulting in a sudden large charging current flowing from the AC / DC converter during startup and recharging after pulse output. To address this issue, a resistor is used to limit the current, but current limiting using a resistor reduces the amount of current when the AC / DC converter and the voltage drop suppression capacitor are near the same potential, and resistor losses also occur, slowing the charging of the capacitor. To shorten the charging time, a switching power supply with a larger power supply capacity than the power supply capacity required when averaged based on the duty ratio is required is required. As a result, the increased power supply capacity and heat dissipation increase the size and cost of the device using the pulse current output device.

[0008] The present disclosure has been made to solve the above-mentioned problems, and aims to reduce the required power supply capacity of a pulse current output device and to reduce the size and cost of devices that use the pulse current output device.

[0009] To achieve the above object, a pulse current output device according to the present disclosure includes a current limiting circuit, a capacitor, a pulse output control unit, and a pulse output switching circuit. The current limiting circuit limits a current input from an external power source by dynamically controlling the resistance value of a semiconductor element. The capacitor stores charge based on the current limited by the current limiting circuit. The pulse output control unit controls the pulse output time in accordance with a predetermined pulse output time ratio. The pulse output switching circuit outputs the charge stored in the capacitor to the outside in accordance with control from the pulse output control unit.

[0010] According to the present disclosure, by providing a current limiting circuit that dynamically controls the resistance value of a semiconductor element, it is possible to charge a capacitor quickly within the limited current, reduce the required power supply capacity of the pulse current output device, and reduce the size and cost of devices that use the pulse current output device.

[0011]

[0012] A pulse current output device according to this embodiment will be described in detail below with reference to the drawings, in which the same or corresponding parts are designated by the same reference numerals.

[0013] (Embodiment 1) The configuration of a pulse current output device 1 according to embodiment 1 will be described with reference to FIG. 1 . The pulse current output device 1 includes a current limiting circuit 11 that limits the current input to a power source, an input capacitor 12 that stores the charge of the current that has passed through the current limiting circuit 11, a voltage monitoring circuit 13 that monitors the voltage of the input capacitor 12, a step-up / step-down circuit 14 that increases or decreases the voltage, a main capacitor 15 that stores the charge that has passed through the step-up / step-down circuit 14, a high-speed voltage compensation circuit 16 that compensates for the voltage, an output capacitor 17 that stores the charge that has passed through the high-speed voltage compensation circuit 16, a pulse output control unit 18 that controls a pulse output that lights an external LED 2, and a pulse output switching circuit 19 that lights the external LED 2 using the charge stored in the output capacitor 17. The input capacitor 12 is an example of a first capacitor. The main capacitor 15 is an example of a second capacitor. The high-speed voltage compensation circuit 16 is an example of a voltage compensation circuit. The output capacitor 17 is an example of a third capacitor.

[0014] A current input from an external power source is limited by a current limiting circuit 11, and charge is stored in an input capacitor 12. The charge stored in the input capacitor 12 is transferred to a main capacitor 15 via a step-up / step-down circuit 14. At this time, a voltage monitoring circuit 13 monitors the voltage of the input capacitor 12, and if the voltage does not reach a predetermined voltage, the step-up / step-down operation of the step-up / step-down circuit 14 is stopped. The charge stored in the main capacitor 15 is transferred to an output capacitor 17 via a high-speed voltage compensation circuit 16. A pulse output control unit 18 controls a pulse output switching circuit 19 in accordance with a predetermined duty ratio (lighting time ratio), whereby the charge stored in the output capacitor 17 is output from the pulse output switching circuit 19, controlling the lighting of the external LED 2. The duty ratio is an example of the ratio of the pulse output time.

[0015] The external power supply may be not only a DC power supply but also an AC power supply. When an AC power supply is used, a rectifier circuit is provided in front of the current limiting circuit 11, and the current passing through the rectifier circuit passes through the current limiting circuit 11, and the charge is stored in the input capacitor 12.

[0016] The current limiting circuit 11 will now be described with reference to FIGS. 2, 3, and 4. The current limiting circuit 11-1 shown in FIG. 2 measures the minute voltage drop across a current-measuring shunt resistor 61 and controls the current flow to a specified level by varying the resistance of a P-channel metal oxide semiconductor field-effect transistor (MOSFET) element 63 so that the specified voltage is achieved through an operational amplifier 62. The P-channel MOSFET element 63 is an example of a semiconductor element. For example, if the specifications of the pulse current output device 1 are an output voltage of 48 V, a maximum output current of 50 A, and a duty ratio of 1%, the average power is 48 V × 50 A × 0.01 = 24 W. With an input voltage of 24 V, the required current is 24 W / 24 V = 1 A. However, taking into account the conversion efficiency during boosting and various losses in the circuit, the current may be limited to, for example, twice the current, or 2 A. In this case, if the resistance value of the shunt resistor 61 is 0.1 Ω, the comparison voltage 64 of the operational amplifier 62 is designed so that the potential difference is 0.2 V. The circuit that controls the resistance value of the P-channel MOSFET element 63 including the operational amplifier 62 is an example of a first feedback circuit.

[0017] However, for example, at startup, there are cases where control of operational amplifier 62 is not fast enough, resulting in an inrush current. The period of high current is extremely short compared to when current is limited by a resistor as in the technology described in Patent Document 1, and the configuration of current limiting circuit 11-1 may be acceptable depending on the power supply specifications, but to prevent this inrush current, as shown in Figure 3, an inductor 71 may be inserted in the current path of current limiting circuit 11-1 to form current limiting circuit 11-2, or as shown in Figure 4, an inductor 81 may be inserted in the current path of current limiting circuit 11-1 to form current limiting circuit 11-3.

[0018] FIG. 5 is a graph comparing the inrush current suppression effects of the configurations shown in FIGS. 2, 3, and 4. Graph 91 represents the current limited by the current limiting circuit 11-1 shown in FIG. 2, graph 92 represents the current limited by the current limiting circuit 11-2 shown in FIG. 3, and graph 93 represents the current limited by the current limiting circuit 11-3 shown in FIG. 4. As shown in graph 92, the current limiting circuit 11-2 uses the inductance of inductor 71 to suppress sudden changes in current, thereby slowing the inrush current more than the current limiting circuit 11-1. As shown in graph 93, the current limiting circuit 11-3 uses the inductance of inductor 81 to feed back to the operational amplifier 62 the potential difference of the induced electromotive force that occurs prior to a change in current, thereby enabling the operation of the operational amplifier 62 to proceed ahead. Because the potential difference for current measurement is generally less than 1 V, the potential difference of the induced electromotive force can be small, and an inductor of several μH is sufficient.

[0019] 6 is a graph showing proactive current control using inductance in the current limiting circuit 11-3. The voltage change due to inductance, shown in graph 101, precedes the change in current, shown in graph 103. The voltage change is fed back to the operational amplifier 62, which then initiates control, shown in graph 104, with a delay relative to the voltage change, completing the necessary control before the current change overshoots. As a result, inrush current can be prevented, as shown in graph 93 of FIG. 5.

[0020] Returning to FIG. 4 , in the current limiting circuit 11-3, the potential difference between terminal 84a and terminal 84b fed back to the operational amplifier 62 during a balanced state is the sum of the potential differences due to the shunt resistor 61 and the series resistance of the inductor 81 when the induced electromotive force of the inductor 81 becomes 0 V. However, the series resistance of an inductor generally has a larger accuracy error than the shunt resistor used for current measurement. Therefore, to improve the accuracy of current limiting, it is advisable to use an inductor whose series resistance is sufficiently smaller than that of the shunt resistor. For example, when using a 0.1 Ω shunt resistor, it is advisable to use an inductor with a series resistance of 0.02 Ω. Generally, the accuracy error of the series resistance of an inductor is ±20%. Therefore, for example, when combining a shunt resistor of 0.1 Ω ±1% with an inductor of 0.02 Ω ±20%, the total resistance is within 0.12 Ω ±5%.

[0021] Here, we compare the change in voltage across the input capacitor 12 when current limiting is performed using the current limiting circuit 11-3 with the change in voltage across the input capacitor 12 when current limiting is performed using a resistor. FIG. 7 is a graph showing the operational difference between current limiting using the current limiting circuit 11-3 and current limiting using a resistor. Current graph 111 and input capacitor 12 voltage graph 113 correspond to current limiting using a resistor, while current graph 112 and input capacitor 12 voltage graph 114 correspond to current limiting using the current limiting circuit 11-3. When current limiting is performed using a resistor, a large current initially flows and gradually drops in value. Accordingly, the voltage across the input capacitor 12 rises and then plateaus. In contrast, when current limiting is performed using the current limiting circuit 11-3, the current transitions in a rectangular waveform, and the voltage across the input capacitor 12 rises proportionally. In current limiting using the current limiting circuit 11-3, the voltage of the input capacitor 12 overshoots due to the inductance of the inductor 81, but since the step-up / step-down circuit 14 is located in the subsequent stage, the voltage accuracy of the input capacitor 12 is not important, and on the contrary, the overshoot has the effect of making the operation of the step-up / step-down circuit 14 more efficient.

[0022] The voltage step-up / step-down circuit 14 generally uses an inductance such as an inductor or a transformer, or a charge pump using a capacitor, and either method is acceptable. Here, we will explain an example of a step-up using an inductor or an isolated step-up / step-down using a transformer. In particular, in the case of an isolated step-up / step-down using a transformer, the step-up and step-down functions differ between the input and output voltages. However, the operation remains the same: the output-side capacitor switches to step up or maintain a specified voltage while transmitting power in isolation through electromagnetic induction caused by switching.

[0023] When the amount of current consumed by the step-up / step-down circuit exceeds a certain amount relative to the amount of current supplied by the power supply or current limiting circuit 11, the voltage of the input capacitor 12 drops, significantly reducing the step-up / step-down efficiency. For this reason, a voltage monitoring circuit 13 is provided to monitor the voltage of the input capacitor 12, and when the voltage drops below a certain voltage, the operation of the step-up / step-down circuit is stopped, and when the voltage exceeds the certain voltage, the operation of the step-up / step-down circuit is started.

[0024] FIG. 8 is a graph showing the relationship between the voltage of the input capacitor 12 and the voltage of the main capacitor 15 during startup with and without voltage monitoring. Without voltage monitoring, when the current consumed by the step-up / step-down circuit exceeds a certain level, the voltage of the input capacitor 12, as shown by graph 121, drops significantly, and the voltage of the main capacitor 15, as shown by graph 122, never rises. Furthermore, the voltage difference between the power supply voltage and the voltage of the input capacitor 12 increases, causing a huge loss in the current limiting circuit 11, calculated by multiplying the voltage difference by the amount of current. In response to this, the voltage of the input capacitor 12, as shown by graph 123, is monitored to prevent the voltage from dropping. If the operation of the step-up / step-down circuit 14 is stopped when the voltage drops below a certain level, the voltage of the main capacitor 15, as shown by graph 124, is quickly boosted to an appropriate voltage. Furthermore, by preventing the voltage of the input capacitor 12 from deviating from the power supply voltage, the loss in the current limiting circuit 11 can be reduced.

[0025] 9 shows an example of the voltage monitoring circuit 13. The power supply voltage and the voltage of the input capacitor 12, which are respectively input to the input terminals 133 and 134 of the comparator 132, are compared at a ratio based on voltage division, and if the voltage falls below a threshold, the operation of the step-up / step-down circuit 14 is stopped. For example, if the voltage of the input capacitor 12 is less than 95% of the power supply voltage, a signal that disables the switching operation for stepping up and down by the step-up / step-down circuit 14 is output from the output terminal 135 of the comparator 132, thereby stopping the consumption of charge by the input capacitor 12.

[0026] Next, the high-speed voltage compensation circuit 16 will be described with reference to FIGS. 10 to 14. In the high-speed voltage compensation circuit 16-1 shown in FIG. 10, the main capacitor 15 charged by the step-up / step-down circuit 14 is connected to the drain terminal of an N-channel MOSFET element 142, and the source terminal is connected to an output capacitor 17 for LED output. In this embodiment, the main capacitor 15 varies between 50 V and 55 V, and the objective is to fix the output capacitor 17 to 48 V. To this end, an operational amplifier 144 compares the voltage of the output capacitor 17 with a reference voltage and controls the resistance value of the N-channel MOSFET element 142 so that the output capacitor 17 is 48 V. A boost capacitor 145 for boosting voltage is inserted between the gate terminal of the N-channel MOSFET element 142 and the operational amplifier 144. In other words, the boost capacitor 145 and the operational amplifier 144 are connected in series with the N-channel MOSFET element 142. The circuit that controls the resistance value of the N-channel MOSFET device 142, including the operational amplifier 144, is an example of a second feedback circuit. The operational amplifier 144 is on the low side of the low voltage, and the output capacitor 17 is on the high side of the high voltage. The low side and the high side share a ground voltage.

[0027] FIG. 11 is a graph showing the boost control operation by boost capacitor 145. Graph 151 represents the charging voltage of boost capacitor 145, graph 152 represents the voltage at the source terminal of N-channel MOSFET element 142, graph 153 represents the voltage applied to the gate terminal of N-channel MOSFET element 142, and graph 154 represents the output voltage of operational amplifier 144. As shown in FIG. 11, boost capacitor 145, which has a capacitance sufficiently large compared to the capacitance of the gate terminal, is charged to a constant voltage based on 48 V, which is the designated voltage of output capacitor 17. Boost capacitor 145 boosts the output voltage of operational amplifier 144 without delay to a voltage higher than the voltage at the source terminal of N-channel MOSFET element 142, and applies it to the gate terminal of N-channel MOSFET element 142. In other words, the constant voltage to which boost capacitor 145 is charged is a voltage that can boost the output voltage of operational amplifier 144 without delay to a voltage higher than the voltage at the source terminal of N-channel MOSFET element 142.

[0028] Generally, semiconductor elements can operate faster and are less expensive when the voltage range is lower. Furthermore, for this purpose, since the resistance value of the MOSFET element is used within a limited range, a voltage applied to the gate terminal of the MOSFET element with a potential difference of 5 V relative to the voltage of the source terminal is sufficient. In other words, by providing the boost capacitor 145, a power supply voltage of 5 V is also sufficient for the operational amplifier 144. This provides a wide range of options for the operational amplifier 144, making it easy to select one that prioritizes speed. The provision of the boost capacitor 145 is an effective configuration for realizing a high-speed voltage compensation circuit. Another advantage is that boosting the voltage to a higher voltage than the source terminal voltage of the MOSFET element allows the use of a high-speed, low-cost N-channel.

[0029] The high-speed voltage compensation circuit 16-2 shown in FIG. 12 is an example that includes a circuit for charging the boost capacitor 145 in addition to the configuration of the high-speed voltage compensation circuit 16-1. By connecting a diode 146 between the connection between the gate terminal of the N-channel MOSFET element 142 and the boost capacitor 145 and the connection between the source terminal of the N-channel MOSFET element 142 and the output capacitor 17, the boost capacitor 145 is charged when the potential is lower than that of the source terminal of the N-channel MOSFET element 142. In the case of switching elements with insulated gate terminals, such as MOSFETs and IGBTs (insulated gate bipolar transistors), no current flows between the gate terminal and other terminals. Additionally, when the gate terminal of the N-channel MOSFET element has a higher potential than the source terminal of the N-channel MOSFET element, the charging voltage of the boost capacitor 145 is maintained due to the backflow prevention effect of the diode.

[0030] In this case, using a Zener diode for diode 146 can prevent the application of an overvoltage to the gate terminal of N-channel MOSFET element 142. For example, if the operating power supply for low-side operational amplifier 144 is 5 V, it is advisable to use a Zener diode with a Zener voltage of around 5.6 V to match the low-side voltage. Note that application of an overvoltage can also occur when, in addition to a surge, the output capacitor 17 discharges due to a power outage, making it impossible to maintain 48 V. In this case, it is reasonable to discharge boost capacitor 145 in accordance with the drop in voltage of output capacitor 17.

[0031] When charging the boost capacitor 145, the voltage at the output terminal of the operational amplifier 144 may be increased, which may exceed the allowable operating voltage of the operational amplifier 144. For this reason, in the high-speed voltage compensation circuit 16-3 shown in FIG. 13, in addition to the configuration of the high-speed voltage compensation circuit 16-2, a Zener diode 147 is connected to the output terminal of the operational amplifier 144 to protect the operational amplifier 144. For example, if the operating power supply for the operational amplifier 144 is 5 V, it is advisable to use a Zener diode of around 5.6 V, which is slightly higher than 5 V. Note that while a configuration in which the operating power supply for the operational amplifier 144 is clamped with a diode may be used, it is simpler to use a Zener diode in cases where the 5 V power supply needs to be boosted.

[0032] 13 has the problem that charging the boost capacitor 145 requires that the output capacitor 17 be charged, whereas charging the output capacitor 17 requires that the boost capacitor 145 be charged in advance so that a higher voltage can be applied to the gate terminal of the N-channel MOSFET element 142 than to the source terminal, which are contradictory assumptions. For this reason, the high-speed voltage compensation circuit 16-4 shown in FIG. 14 adds a simple voltage compensation circuit 181 as a bypass, configured by connecting a PNP bipolar transistor 182 and an NPN bipolar transistor 183 to the output terminal of the same operational amplifier 144, in addition to the configuration of the high-speed voltage compensation circuit 16-3. The simple voltage compensation circuit 181 does not need to perform high-speed voltage compensation; it only needs to have a compensation speed faster than the speed at which the main capacitor 15 is charged in the step-up / step-down circuit 14.

[0033] For example, if the specifications of the pulse current output device 1 are an output voltage of 48 V, a maximum output current of 50 A, and a duty ratio of 1%, the average current amount is 0.5 A. Therefore, the current amount required for voltage compensation is sufficient if it is doubled to 1 A. Therefore, it is sufficient to select components and determine the resistance value for the PNP bipolar transistor 182 that can pass a current of 1 A.

[0034] Figure 15 is a graph showing the charging operation of the high-speed voltage compensation circuit 16-4 shown in Figure 14. Graph 191 shows the output terminal voltage of the operational amplifier 144, graph 192 shows the charging voltage of the boost capacitor 145, graph 193 shows the gate terminal voltage of the N-channel MOSFET element 142, graph 194 shows the voltage of the output capacitor 17, and graph 195 shows the voltage of the main capacitor 15. When the voltage of the output capacitor 17 does not reach the designated voltage of 48 V, the output terminal voltage of the operational amplifier 144 is output as the power supply voltage of 5 V for the operational amplifier 144, and the output capacitor 17 is charged via the simple voltage compensation circuit 181. As shown in graph 192, the boost capacitor 145 is charged with a voltage obtained by subtracting the Zener voltage of the Zener diode from the voltage of the output capacitor 17. When the voltage of output capacitor 17 shown by graph 194 reaches the specified voltage of 48 V, simple voltage compensation circuit 181 stops its voltage compensation operation, so that the output terminal voltage of operational amplifier 144 shown by graph 191 drops to the ground voltage, and the voltage of boost capacitor 145 shown by graph 192 becomes close to the voltage of output capacitor 17 shown by graph 194, thereby completing the charging of boost capacitor 145.

[0035] In the pulse current output device 1, the continuous output time is limited by the amount of energy that can be stored in the main capacitor 15. Furthermore, due to the duty ratio specifications, there are times when pulse current output is not performed for a sufficiently long period of time at short intervals. In this state, the boost capacitor 145 is in charging mode, which is not a problem. However, if the output state continues, charging will not be possible, and voltage drop due to natural discharge of the boost capacitor 145 will become a problem. In this case, in addition to charging using an isolated power supply, a simpler method can be implemented, as shown in FIG. 16 , by adding a charge pump circuit 201 that utilizes repeated switching to the configuration of the high-speed voltage compensation circuit 16-3. This is a countermeasure against natural discharge. Because sudden voltage changes in the boost capacitor 145 affect the voltage compensation operation and are undesirable, it is recommended to use resistors 202 and 203 with high resistances, for example, 100 kΩ or more, in the charge pump circuit 201 to enable charging with a small current.

[0036] According to the pulse current output device 1 of the first embodiment, by providing a current limiting circuit that dynamically controls the resistance value of the semiconductor element, it is possible to charge the capacitor at high speed within the limited current, reduce the required power supply capacity of the pulse current output device, and reduce the size and cost of the device that uses the pulse current output device.

[0037] (Embodiment 2) In embodiment 2, multiple LEDs are connected and illuminated at different timings. The configurations of pulse current output devices 1-1 and 1-2 according to embodiment 2 will be described with reference to FIGS. 17 and 18, respectively. The pulse current output device 1-1 shown in FIG. 17 is an example of a configuration in which the circuit upstream of the output capacitor 17 and the pulse output control unit 18 are shared, and two channels are provided: a pulse output switching circuit 19-1 and an external LED 2-1, and a pulse output switching circuit 19-2 and an external LED 2-2. The pulse current output device 1-2 shown in FIG. 18 is an example of a configuration in which the circuit upstream of the main capacitor 15 and the pulse output control unit 18 are shared, and two channels are provided: a high-speed voltage compensation circuit 16-1, an output capacitor 17-1, a pulse output switching circuit 19-1, and an external LED 2-1, and a high-speed voltage compensation circuit 16-2, an output capacitor 17-2, a pulse output switching circuit 19-2, and an external LED 2-2. 17 and 18, for convenience, the number of LED channels is shown as two, but it may be three or more.

[0038] The configuration of Figure 18 is preferable because a sudden change due to the start or end of pulse output may affect other channels, but the configuration of Figure 17 may be sufficient depending on product specifications such as allowable brightness variations and lighting pattern restrictions.

[0039] 19 is a graph showing the change in voltage of the main capacitor 15 when the LEDs of four channels are continuously lit. Graphs 231 to 234 show the current flowing through the LEDs of each channel, graph 235 shows the voltage of the output capacitor 17, and graph 236 shows the voltage of the main capacitor 15.

[0040] Generally, the duty ratio is a setting for the lighting time ratio of each channel for the purpose of protecting the LEDs. The required storage capacity of the main capacitor 15 is the number of channels × the maximum output power of each channel × the maximum lighting time of each channel. However, for products intended to provide strong, short-duration lighting, it is rare to use the maximum lighting time specified in the specifications. Therefore, if the product is designed assuming continuous lighting for the maximum lighting time, there is a high possibility that the device size, materials, and costs will be wasted. In response to this, for example, by recording data indicating the remaining charge of the main capacitor 15 and notifying the user each time the minimum value of the main capacitor 15 is updated, and taking measures to change the usage method in the rare event of a shortage, it is no longer necessary to set the storage capacity of the main capacitor 15 to the number of channels × the maximum output power of each channel × the maximum lighting time of each channel, thereby solving the aforementioned problem of wasted device size, materials, and costs.

[0041] Specifically, measures to change the usage method include shortening the lighting time or increasing the interval between lighting to allow time for charging. If these measures are difficult, it is sufficient to prepare multiple pulse current output devices. The data indicating the remaining charge of the main capacitor 15 is an example of voltage information.

[0042] To achieve high-speed and flexible control, the pulse output control unit 212 and the pulse output control unit 222 are preferably programmable devices such as a field programmable gate array (FPGA) or a complex programmable logic device (CPLD). Because these devices record data in internal registers and allow for external communication with relative ease, it is preferable to configure the device so that data indicating the remaining charge of the main capacitor 15 is recorded in the pulse output control unit 212 and the pulse output control unit 222 via an A-D converter and notified to the user. In this case, the pulse output control unit 212 and the pulse output control unit 222 are examples of a voltage information recording unit. The voltage information recording unit may be provided separately from the pulse output control unit 212 and the pulse output control unit 222.

[0043] According to pulse current output device 1-1 and pulse current output device 1-2 of embodiment 2, even when a plurality of LEDs are connected and turned on at different timings, by providing a current limiting circuit that dynamically controls the resistance value of the semiconductor element, it is possible to charge the capacitor at high speed within the limited current, reduce the required power supply capacity of the pulse current output device, and reduce the size and cost of the device that uses the pulse current output device.

[0044] (Embodiment 3) A high-speed voltage compensation circuit is useful for applications other than pulse current output devices. In embodiment 3, a high-speed voltage compensation circuit is used in a power supply. The configuration of a power supply circuit using the high-speed voltage compensation circuit according to embodiment 3 will be described with reference to FIGS. 20 and 21.

[0045] The power supply circuit shown in Figure 20 uses a high-speed voltage compensation circuit to prevent voltage drops when inrush current occurs. An output capacitor 245 is charged to an appropriate voltage from the power supply input. In parallel, a voltage compensation capacitor 243 is charged to a voltage higher than that of the output capacitor 245 via a boost circuit 242 from the power supply input.

[0046] If the current consumption of the external circuit 246 can be covered by the supply current of the power supply input, the voltage of the output capacitor 245 is maintained. However, if the current consumption cannot be covered by the supply current of the power supply input, such as in the case of an inrush current, the voltage of the output capacitor 245 drops. When the voltage of the output capacitor 245 drops, the high-speed voltage compensation circuit 244 operates, transferring charge from the voltage compensation capacitor 243 to the output capacitor 245 and compensating the voltage so as to maintain the specified voltage of the output capacitor 245. In this case, it is advisable to configure the voltage compensation trigger to be lowered by, for example, 0.5 V. This prevents voltage drops due to inrush currents of several microseconds to several milliseconds, while reducing the capacity of the output capacitor 245 to smooth the voltage caused by current fluctuations, thereby enabling the size of the power supply device to be reduced.

[0047] The power supply circuit shown in Figure 21 is a low-ripple power supply circuit that uses a high-speed voltage compensation circuit. Fluctuations in the power supply input that exceed the voltage compensation speed are removed by a low-pass filter 252, and then the voltage is stored in a voltage compensation capacitor 253. When the amount of current changes due to an external circuit 256, a high-speed voltage compensation circuit 254 quickly compensates the voltage to maintain the voltage of an output capacitor 255, making it possible to construct a low-cost power supply with almost no ripple even during output. Note that with this configuration, the natural discharge countermeasures shown in Figure 16 are necessary.

[0048] The power supply circuit according to the third embodiment uses a high-speed voltage compensation circuit to reduce the size of the power supply device that prevents a voltage drop when an inrush current occurs. In addition, the use of a high-speed voltage compensation circuit can reduce the cost of the low-ripple power supply device.

[0049] (Fourth Embodiment) A boost capacitor that boosts an input voltage without delay is useful for purposes other than a pulse current output device. In the fourth embodiment, the boost capacitor is used in a level shift circuit for a pulse signal. The configuration of a level shift circuit using a boost capacitor according to the fourth embodiment will be described with reference to FIG.

[0050] The level shift circuit shown in Figure 22 quickly level-shifts a 3.3V pulse signal to a 48V pulse signal. A low-side pulse signal 261 is inverted by an inverter circuit 262, boosted by a boost capacitor 263 charged to a constant voltage based on the difference between the low-side voltage and the high-side voltage, and then applied to the gate terminal of a high-side P-channel MOSFET 266 without delay, thereby achieving high-speed level shifting. The P-channel MOSFET 266 is an example of a semiconductor element with an insulated gate terminal. In other words, the constant voltage to which the boost capacitor 263 is charged is a voltage that can boost the low-side pulse signal 261 to the high-side voltage without delay. The low and high sides share a ground voltage.

[0051] Generally, the reason why the transmission speed decreases when the voltage is increased is the Miller effect that occurs when voltage is amplified, which is due to the voltage difference between the terminals of the semiconductor switching element. However, by using the boost capacitor 263, voltage amplification by the semiconductor switching element is no longer necessary, making it possible to minimize the decrease in transmission speed.

[0052] 22 , by providing Zener diodes 264 and 265, charging is performed when low-side pulse signal 261 is HI, that is, when the low-side voltage is inverted by inversion circuit 262 and is 0 V. The charging voltage of boost capacitor 263 is adjusted by the Zener voltage of Zener diode 264.

[0053] 23 is a graph showing high-speed high-voltage level shifting of a pulse signal using a boost capacitor. Graph 271 shows the low-side pulse signal, graph 272 shows the low-side power supply voltage, graph 273 shows the pulse signal voltage obtained by inverting the low-side pulse signal and the low-side power supply voltage using inverter circuit 262, graph 274 shows the boosted pulse signal voltage, and graph 275 shows the high-side power supply voltage. The low-side pulse signal and the pulse voltage obtained by inverting the low-side power supply voltage using inverter circuit 262, shown in graph 273, are boosted to the high-side voltage without delay, as shown in graph 274. Due to the difference between the high-side power supply voltage shown in graph 275 and the boosted pulse signal voltage shown in graph 274, a negative voltage is applied to the gate terminal of P-channel MOSFET 266, causing conduction between the drain and source of P-channel MOSFET 266.

[0054] As a result, as shown in FIG. 24, both the rising and falling edges of the low-side pulse signal shown by graph 281 and the high-side pulse signal shown by graph 282 can be transmitted at high speed.

[0055] According to the level shift circuit of the fourth embodiment, in the circuit that transmits a low-side signal to the high-side, a boost capacitor is provided that boosts the voltage of the control signal of the low-side circuit to the high-side voltage. This eliminates voltage constraints in the low-side circuit, makes it possible to select a high-speed device from low-cost options, and eliminates the need for voltage amplification using a semiconductor switching element, thereby minimizing the decrease in transmission speed and enabling low-cost, high-speed transmission to be achieved even when the voltage is increased.

[0056] In the first embodiment described above, pulse current output device 1 includes current limiting circuit 11, input capacitor 12, voltage monitoring circuit 13, step-up / step-down circuit 14, main capacitor 15, high-speed voltage compensation circuit 16, output capacitor 17, pulse output control unit 18, and pulse output switching circuit 19. However, the configuration is not limited to this. Pulse current output device 1 may include at least current limiting circuit 11 that limits the current input to the power source, main capacitor 15 that stores the charge of the current that has passed through current limiting circuit 11, pulse output control unit 18 that controls the pulse output that lights external LED 2, and pulse output switching circuit 19 that lights external LED 2 using the charge stored in main capacitor 15. In this configuration, main capacitor 15 is an example of a first capacitor. Furthermore, the pulse current output device 1 may be configured to include a current limiting circuit 11 that limits the current input to the power source, an input capacitor 12 that stores the charge of the current that has passed through the current limiting circuit 11, a voltage monitoring circuit 13 that monitors the voltage of the input capacitor 12, a step-up / step-down circuit 14 that raises or lowers the voltage, a main capacitor 15 that stores the charge that has passed through the step-up / step-down circuit 14, a pulse output control unit 18 that controls the pulse output that lights up the external LED 2, and a pulse output switching circuit 19 that lights up the external LED 2 using the charge stored in the main capacitor 15. In this configuration, the main capacitor 15 is an example of a second capacitor. Alternatively, the pulse current output device 1 may be configured to include a current limiting circuit 11 that limits the current input to the power source, a main capacitor 15 that stores the charge of the current that has passed through the current limiting circuit 11, a high-speed voltage compensation circuit 16 that compensates for the voltage, an output capacitor 17 that stores the charge that has passed through the high-speed voltage compensation circuit 16, a pulse output control unit 18 that controls the pulse output that lights the external LED 2, and a pulse output switching circuit 19 that lights the external LED 2 using the charge stored in the output capacitor 17. In this configuration, the main capacitor 15 is an example of the first capacitor. Also, each configuration may be combined with the second embodiment to provide multiple LED channels.

[0057] It should be noted that the present disclosure allows various embodiments and modifications without departing from the broad spirit and scope of the present disclosure. Furthermore, the above-described embodiments are intended to explain the disclosure and do not limit the scope of the present disclosure. That is, the scope of the present disclosure is defined by the claims, not the embodiments. Various modifications made within the scope of the claims and within the meaning of the disclosure equivalent thereto are considered to be within the scope of the present disclosure.

[0058] 1, 1-1, 1-2 pulse current output device, 2, 2-1, 2-2 LED, 11, 11-1, 11-2, 11-3 current limiting circuit, 12 input capacitor, 13 voltage monitoring circuit, 14 step-up / step-down circuit, 15 main capacitor, 16, 16-1, 16-2, 16-3, 16-4, 16-5, 244, 254 high-speed voltage compensation circuit, 17, 17-1, 17-2, 245, 255 output capacitor, 18, 212, 222 pulse output control section, 19, 19-1, 19-2 pulse output switching circuit, 61 shunt resistor, 62 operational amplifier, 63 P-channel MOSFET element, 64 comparison voltage, 71, 81 inductor, 84a, 84b Terminals, 91-93, 101, 103, 104, 111-114, 121-124, 151-154, 191-195, 231-236, 271-275, 281, 282 Graph, 132 Comparator, 133, 134 Input terminal, 135 Output terminal, 142 N-channel MOSFET element, 144 Operational amplifier, 145 Boost capacitor, 146 Diode, 147 Zener diode, 181 Voltage compensation circuit, 182 PNP bipolar transistor, 183 NPN bipolar transistor, 201 Charge pump circuit, 202, 203 Resistor, 242 Boost circuit, 243, 253 Voltage compensation capacitor, 246, 256 External circuit, 252 Low-pass filter, 261 Pulse signal, 262 Inverting circuit, 263 boost capacitor, 264, 265 Zener diodes, 266 P-channel MOSFET.

Claims

1. A pulse current output device comprising: a current limiting circuit that limits a current input from an external power source by dynamically controlling the resistance value of a semiconductor element; a capacitor that stores an electric charge based on the current limited by the current limiting circuit; a pulse output control unit that controls the pulse output time in accordance with a predetermined pulse output time ratio; and a pulse output switching circuit that outputs the electric charge stored in the capacitor to the outside in accordance with the control of the pulse output control unit.

2. The pulse current output device according to claim 1, further comprising: a step-up / step-down circuit that steps up and down a voltage; and a voltage monitoring circuit that controls the operation of said step-up / step-down circuit, wherein said capacitors include a first capacitor that stores charge of the current limited by said current limiting circuit and a second capacitor that stores the charge stored in said first capacitor via said step-up / step-down circuit, and said voltage monitoring circuit monitors the voltage of said first capacitor and controls the operation of said step-up / step-down circuit based on the voltage of said first capacitor.

3. The pulse current output device according to claim 1, further comprising a voltage compensation circuit that performs voltage compensation, wherein the capacitors further include a first capacitor that stores the charge of the current limited by the current limiting circuit and a third capacitor that stores the charge stored in the first capacitor via the voltage compensation circuit, and wherein the voltage compensation circuit performs voltage compensation for the third capacitor.

4. The pulse current output device according to claim 2, further comprising a voltage compensation circuit that performs voltage compensation, wherein the capacitor further includes a third capacitor that stores the charge stored in the second capacitor via the voltage compensation circuit, and wherein the voltage compensation circuit performs voltage compensation for the third capacitor.

5. A pulse current output device according to claim 3 or 4, comprising a plurality of said pulse output switching circuits, and further comprising a voltage information recording unit that records voltage information relating to the voltage of said capacitor that stores the charge input to said voltage compensation circuit.

6. The pulse current output device according to claim 1, wherein the current limiting circuit limits the amount of current to a certain amount or less by changing the resistance value of the semiconductor element so that a specified voltage is achieved by a first feedback circuit.

7. The pulse current output device according to claim 6, wherein the current limiting circuit limits the current to a required current amount calculated based on the maximum value of the ratio of the pulse output time.

8. The pulse current output device according to claim 6 or 7, wherein the current limiting circuit has an inductor inserted in a current path, and the inductance of the inductor reduces the inrush current.

9. The pulse current output device according to claim 8, wherein the first feedback circuit feeds back a potential difference generated by the inductance of the inductor.

10. The pulse current output device according to claim 3 or 4, wherein the voltage compensation circuit compensates for the voltage of the third capacitor by changing the resistance of a switching element having an insulated gate terminal connected to the first capacitor or the second capacitor and the third capacitor using a second feedback circuit so that the third capacitor has a designated voltage.

11. The pulse current output device according to claim 10, wherein the voltage compensation circuit includes a boost capacitor charged to a constant voltage based on the designated voltage of the third capacitor, inserted between the insulated gate terminal of the switching element and the second feedback circuit.

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