Wiring board and mounting structure

Abstract

A wiring board according to the present disclosure comprises: a first insulating layer having a first surface and a second surface positioned on the opposite side to the first surface; a via hole positioned in the first insulating layer so as to penetrate from the first surface to the second surface; and a first conductor layer positioned at least along the side wall of the via hole from the first surface. The first conductor layer includes a first portion that protrudes into the first insulating layer from the side wall of the via hole in a first direction parallel to the first surface, and a second portion that protrudes into the first insulating layer from the first surface in a second direction perpendicular to the first surface. When the average thickness value of the first conductor layer including the first portion in the first direction is defined as a first average value and the average thickness value of the first conductor layer including the second portion in the second direction is defined as a second average value, the first average value is larger than the second average value.

Description

Wiring board and mounting structure

[0001] The present invention relates to a wiring board and a mounting structure using the same.

[0002] In order to improve adhesion to the insulating layer, the wiring pattern formed on the wiring board is formed by forming an electroless plating film on the surface of the insulating layer, as described in Patent Document 1, for example.

[0003] Japanese Patent Application Laid-Open No. 2022-30289

[0004] A wiring board according to the present disclosure includes a first insulating layer having a first surface and a second surface located opposite the first surface, a via hole located in the first insulating layer so as to penetrate from the first surface to the second surface, and a first conductor layer located from the first surface along at least a sidewall of the via hole. The first conductor layer includes a first portion extending from the sidewall of the via hole into the first insulating layer in a first direction parallel to the first surface, and a second portion extending from the first surface into the first insulating layer in a second direction perpendicular to the first surface. When the average thickness of the first conductor layer including the first portion in the first direction is defined as a first average value and the average thickness of the first conductor layer including the second portion in the second direction is defined as a second average value, the first average value is greater than the second average value.

[0005] A mounting structure according to the present disclosure includes the above-described wiring board and an electronic component mounted on the wiring board.

[0006] 2A is an explanatory diagram illustrating a wiring board according to an embodiment of the present disclosure. Fig. 2A is an enlarged explanatory diagram illustrating an embodiment of region X shown in Fig. 1, and Fig. 2B is an enlarged explanatory diagram illustrating an embodiment of region Y shown in Fig. 2A. Fig. 4A to Fig. 4C are explanatory diagrams illustrating an embodiment of a method for forming a first conductor layer (first portion and second portion).

[0007] In conventional wiring boards, stress tends to concentrate in the via hole portion. This can lead to barrel cracks in the via hole conductors formed in the via holes, or to via hole conductor loss, where the via hole conductor peels off from the wall of the via hole. A barrel crack is a crack that divides the via hole conductor into upper and lower parts. When a barrel crack occurs, the connection reliability in the vertical direction (thickness direction) of the wiring board decreases. Therefore, when a barrel crack occurs or a via hole conductor loss occurs, the electrical reliability of the wiring board decreases. Therefore, there is a demand for a wiring board that reduces the occurrence of barrel cracks and via hole conductor loss and has excellent electrical reliability.

[0008] The wiring board according to the present disclosure has a configuration as described in the section on means for solving the above problems, thereby reducing the occurrence of barrel cracks and via-hole conductor disconnections and providing excellent electrical reliability.

[0009] A wiring board according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 2B. FIG. 1 is an explanatory diagram illustrating a wiring board 1 according to an embodiment of the present disclosure. FIG. 2A is an enlarged explanatory diagram illustrating an embodiment of region X shown in FIG. 1. FIG. 2B is an enlarged explanatory diagram illustrating an embodiment of region Y shown in FIG. 2A. FIG. 2B is a photograph showing an embodiment of region Y shown in FIG. 2A. As shown in FIG. 1, the wiring board 1 according to the embodiment includes a core insulating layer 20, a first insulating layer 21, a core conductor layer, a first conductor layer 3, and a solder resist 4.

[0010] The core insulating layer 20 is an insulating layer located approximately in the center in the thickness direction of the wiring board 1. The core insulating layer 20 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more.

[0011] The thickness of the core insulating layer 20 is not particularly limited and is, for example, 40 μm or more and 10 mm or less. The core insulating layer 20 is not an essential component, and is not used in, for example, a substrate known as a coreless substrate or a 2.3D substrate. For example, in a motherboard, the thickness of the core insulating layer 20 may exceed 10 mm.

[0012] Core conductor layers are located on both sides of the core insulating layer 20. The core conductor layers are not particularly limited as long as they are made of a conductive material. Examples of conductive materials include metals such as copper. The thickness of the core conductor layers is not limited, and is, for example, 2 μm or more and 30 μm or less. In FIG. 1 , the core conductor layers are located on both sides of the core insulating layer 20, but they may be located on at least one side of the core insulating layer 20.

[0013] As shown in Fig. 1, a through-hole conductor 20a is located in the core insulating layer 20 to electrically connect the top and bottom surfaces of the core insulating layer 20. The through-hole conductor 20a is located in a through-hole that penetrates from the top surface to the bottom surface of the core insulating layer 20. The through-hole conductor 20a is formed by metal plating such as copper plating. The through-hole conductor 20a is connected to core conductor layers formed on both surfaces of the core insulating layer 20. The through-hole conductor 20a may be located only on the inner wall surface of the through-hole, or may fill the through-hole.

[0014] As shown in FIG. 1 , build-up layers having a structure in which first insulating layers 21 and first conductor layers 3 are alternately laminated are located on both sides of a core layer including a core insulating layer 20 and a core conductor layer. The first insulating layer 21 is not particularly limited as long as it is made of an insulating material, and examples of the first insulating layer 21 include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin, as described above. These resins may be used alone or in combination of two or more. While the build-up layers are located on both sides of the core layer in FIG. 1 , they may be located on at least one side of the core layer.

[0015] The first insulating layers 21 may be made of the same resin or different resins. The first insulating layers 21 and the core insulating layers 20 may be made of the same resin or different resins. The thickness of the first insulating layers 21 is not particularly limited and is, for example, 10 μm or more and 60 μm or less. The first insulating layers 21 may have the same thickness or different thicknesses.

[0016] 1 to 2B, the first conductor layer 3 is located from the first surface 211 of the first insulating layer 21 along at least the sidewall 221 of the via hole 22. The first conductor layer 3 is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper.

[0017] In the wiring board 1, the build-up layer has a structure in which two first insulating layers 21 and two first conductor layers 3 are alternately stacked. However, the build-up layer is not limited to this structure as long as it has a structure in which at least one first insulating layer 21 and at least one first conductor layer 3 are alternately stacked.

[0018] At least one of the core insulating layer 20 and the first insulating layer 21 may contain a reinforcing material. Examples of reinforcing materials include insulating fabric materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, as shown in Figures 2A and 2B, at least one of the core insulating layer 20 and the first insulating layer 21 may have an insulating filler 23 dispersed therein. Examples of insulating fillers 23 include silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of insulating filler 23 may be used, or two or more types may be used in combination.

[0019] 1, a solder resist 4 may be located on the surface of the build-up layer. The solder resist 4 is made of a resin, such as an acrylic-modified epoxy resin. The solder resist 4 has openings for electrically connecting the first conductor layer 3 to electrodes of an electronic component E via solder 5. Examples of the electronic component E include semiconductor integrated circuit elements and optoelectronic elements.

[0020] A via-hole conductor 3a is formed in the first insulating layer 21 to electrically connect the upper and lower surfaces of the first insulating layer 21. The via-hole conductor 3a is located in a via hole 22 formed to penetrate the first insulating layer 21. That is, as shown in FIG. 1 , for example, the via-hole conductor 3a is located in a via hole 22 that penetrates from a first surface 211 to a second surface 212 of the first insulating layer 21. Specifically, the via-hole conductor 3a is connected to a first conductor layer 3 (land conductor 3b) located on a second surface 212 of the first insulating layer 21 located directly below (on the core layer side). The via-hole conductor 3a is formed of a metal such as copper, and is connected to the first conductor layer 3. The first surface 211 of the first insulating layer 21 is the surface farther from the core layer, and the second surface 212 of the first insulating layer 21 is the surface closer to the core layer. The via-hole conductor 3a is also connected to the first conductor layer 3 and the core conductor layer located in the first insulating layer 21.

[0021] The first conductor layer 3 includes a first portion 31 that protrudes from the sidewall 221 of the via hole 22 into the first insulating layer 21 in a first direction parallel to the first surface 211, and a second portion 32 that protrudes from the first surface 211 into the first insulating layer 21 in a second direction perpendicular to the first surface 211. In Figures 2A and 2B, the first conductor layer 3 includes, in addition to the first portion 31 and the second portion 32, a third portion 33 that is attached to the sidewall 221 of the via hole 22. The third portion 33 may also be located on the first surface 211. The first conductor layer 3 may be formed only by the first portion 31 and the second portion 32.

[0022] In the wiring board 1 according to one embodiment, when the average thickness of the first conductor layer 3 in the first direction, including the first portion 31, is defined as a first average value, and the average thickness of the first conductor layer 3 in the second direction, including the second portion 32, is defined as a second average value, the first average value is greater than the second average value. The thickness of the first conductor layer 3 in the first direction refers to, for example, the portion extending from the surface of the third portion 33 into the first insulating layer 21. The thickness of the first conductor layer 3 in the second direction refers to, for example, the portion extending from the surface of the third portion 33 into the first insulating layer 21. In other words, the thickness of the first conductor layer 3 in the first direction is the length from the surface of the third portion 33 on the via hole 22 side to the tip of the first portion 31 farthest from the via hole 22. Furthermore, the thickness of the first conductor layer 3 in the second direction is the length from the surface of the third portion 33 opposite the first surface 211 to the tip of the second portion 32 farthest from the first surface 211.

[0023] With this configuration, the amount of leaching of the second portion 32 is relatively small, thereby reducing peeling of the first conductor layer 3. Specifically, for example, when the first conductor layer 3 is electroless plated, electrolytic plating may be formed in a predetermined pattern on the electroless plating, and the electroless plating outside the patterned area may be removed by etching. If the amount of leaching of the second portion 32 is large, the electroless plating that has leached deep from the first surface 211 is removed during etching, making the first conductor layer 3 on the first surface 211 more likely to peel. On the other hand, at the sidewall 221 of the via hole 22, the amount of leaching of the first portion 31 is relatively large, and the first conductor layer 3 is easily engaged with the sidewall 221, improving the adhesion of the via-hole conductor 3a, which is susceptible to stress. As a result, the occurrence of barrel cracks and via-hole conductor loosening is reduced, and the wiring board 1 according to one embodiment has excellent electrical reliability.

[0024] The first average value may be, for example, 7.0 μm or more and 20 μm or less. The second average value may be, for example, 2 μm or more and 15 μm or less. In particular, when the second average value is 1, the first average value may be, for example, 2 or more and 4 or less. With such a configuration, the wiring board 1 according to one embodiment allows wiring to be formed normally while maintaining insulation reliability between adjacent via-hole conductors. The first average value may be defined, for example, as the average of 10 lengths measured at predetermined intervals in the thickness direction of the wiring board 1 in the first direction between the end of the first portion 31 opposite the via hole 22 and the end of the third portion 33 toward the center of the via hole 22. The second average value may be defined, for example, as the average of 10 lengths measured at predetermined intervals in the horizontal direction of the wiring board 1 in the second direction between the end of the second portion 32 opposite the first surface 211 and the end of the third portion 33 opposite the first surface 211. These lengths can be measured, for example, by image analysis using an electron microscope.

[0025] As long as the first average value of the first portion 31 is greater than the second average value as described above, there are no limitations. For example, in a cross-sectional view, the thickness of the first portion 31 may be greatest at a corner including an opening edge where the first surface 211 of the first insulating layer 21 and the sidewall 221 of the via hole 22 meet. This configuration increases the amount of extrusion of the first portion 31 at the corner of the via hole 22, where stress tends to concentrate. As a result, corner cracks and crack initiation points are reduced, and the wiring board 1 according to the embodiment has superior electrical reliability. The corner can be defined as, for example, a region extending from the intersection of the first surface 211 and the sidewall 221 of the via hole 22 to 20% of the depth of the via hole 22.

[0026] 2A and 2B , when the first insulating layer 21 contains insulating filler 23, the average particle diameter of the insulating filler 23 is not limited. For example, if the average particle diameter of the insulating filler 23 in contact with the first portion 31 is defined as a first average particle diameter and the average particle diameter of the insulating filler 23 not in contact with the first portion 31 is defined as a second average particle diameter, the first average particle diameter may be smaller than the second average particle diameter. The first portion 31 and the second portion 32 permeate the interface between the insulating filler 23 and the first insulating layer 21. Therefore, when multiple insulating fillers 23 with small particle diameters are located along the sidewall 221, the interface between the insulating filler 23 and the first insulating layer 21 is enlarged, thereby increasing the amount of permeation.

[0027] The first average particle diameter is not limited and may be, for example, 0.5 μm or more and 3 μm or less. The second average particle diameter is not limited and may be, for example, 2.5 μm or more and 10 μm or less. As long as the first average particle diameter is smaller than the second average particle diameter, the difference therebetween is not limited. The difference between the first average particle diameter and the second average particle diameter may be, for example, 1.5 μm or more and 5.5 μm or less. If the difference between the first average particle diameter and the second average particle diameter is 1.5 μm or more and 5.5 μm or less, the adhesion strength between the first conductor layer 3 and the sidewall 221 can be improved and peeling between the first conductor layer 3 and the first surface 211 can be reduced.

[0028] 2A and 2B , the insulating filler 23 may be covered with a first portion 31 and a second portion 32. By covering the insulating filler 23 with the first portion 31 and the second portion 32, the first portion 31 and the second portion 32 can be made relatively thick. Furthermore, the insulating filler 23 is not exposed from the first portion 31 and the second portion 32. As a result, the coverage when forming the via-hole conductor 3a by electroplating is improved, further reducing the occurrence of barrel cracks and via-hole conductor loss. The coverage is a term that refers to both coverage and throwing power in electroplating.

[0029] As shown in FIG. 3 , the first conductor layer 3 may further include a third portion 33 that is in contact with the first portion 31 and located on the sidewall 221 of the via hole 22. The third portion 33 may be continuous and integral with the first portion 31. The third portion 33 may be located on the first surface 211 and integral with the second portion 32. FIG. 3 is an enlarged explanatory view for explaining another embodiment of the region X shown in FIG. 1 . With this configuration, the first portion 31 is covered with the third portion 33, and the insulating filler 23 is less likely to be exposed from the first portion 31. As a result, the coverage is improved when the via-hole conductor 3a is formed by electrolytic plating, further reducing the occurrence of barrel cracks and via-hole conductor missing.

[0030] The thickness of the third portion 33, i.e., the average thickness in the first direction, is not limited. The average thickness of the third portion 33 may be smaller than the first average value, specifically, may be 2 μm or more and 10 μm or less, for example.

[0031] Next, one embodiment of a method for forming the first conductor layer 3 (first portion 31 and second portion 32) will be described with reference to Figures 4A to 4C. Figures 4A to 4C are explanatory diagrams for describing one embodiment of a method for forming the first conductor layer 3 (first portion 31 and second portion 32).

[0032] 4A , via holes 22 are formed through first insulating layer 21 from first surface 211 to second surface 212. Via holes 22 are formed by, for example, laser processing. Examples of lasers used for laser processing include carbon dioxide lasers, YAG lasers, and excimer lasers.

[0033] After the via holes 22 are formed, a desmearing process is performed as shown in FIG. 4B to remove the insulating filler particles 23 having a relatively large diameter that are exposed from the via holes 22. Specifically, the laminate (a laminate of the first insulating layer 21 and the first conductor layer 3) with the via holes 22 formed therein is immersed in a potassium permanganate aqueous solution or the like at a temperature of 70° C. to 90° C. for 20 to 40 minutes to swell the laminate. The swollen laminate is then subjected to a reduction process. The reduction process is performed, for example, using an acidic chemical solution containing sulfuric acid as the main component at a temperature of 30° C. to 50° C. for 3 to 10 minutes. After the reduction process, the insulating filler particles 23 having a relatively large diameter that are exposed from the via holes 22 are removed by high-pressure water washing.

[0034] 4C , the conductor forming first conductor layer 3 is allowed to seep into the gaps between first insulating layer 21 and insulating filler 23, thereby forming first portion 31 and second portion 32. Specifically, after desmearing, a metal such as copper is allowed to seep into the gaps between first insulating layer 21 and insulating filler 23 by electroless plating, thereby forming first portion 31 and second portion 32. In this way, in wiring board 1 according to one embodiment, first portion 31 and second portion 32 are formed as shown in FIGS. 2A and 2B .

[0035] Next, a mounting structure according to the present disclosure will be described. The mounting structure according to one embodiment includes a wiring board 1 according to one embodiment and an electronic component E located on the surface of the wiring board 1. A first conductor layer 3 in an opening of a solder resist 4 is connected to an electrode of the electronic component E via solder 5. As described above, examples of the electronic component E include semiconductor integrated circuit elements and optoelectronic elements. The electronic component E may be located on both surfaces of the wiring board 1, or the electronic component E may be located on one surface and, for example, a motherboard may be located on the other surface.

[0036] The embodiments of the present disclosure have been described above. However, the invention according to the present disclosure is not limited to the above embodiments, and various modifications and improvements are possible within the scope of the present disclosure as shown in (1) to (8) below.

[0037] (1) A wiring board according to the present disclosure includes a first insulating layer having a first surface and a second surface opposite the first surface, a via hole positioned in the first insulating layer so as to penetrate from the first surface to the second surface, and a first conductor layer positioned from the first surface along at least a sidewall of the via hole. The first conductor layer includes a first portion extending from the sidewall of the via hole into the first insulating layer in a first direction parallel to the first surface, and a second portion extending from the first surface into the first insulating layer in a second direction perpendicular to the first surface. When the average thickness of the conductor layer including the first portion in the first direction is defined as a first average value and the average thickness of the conductor layer including the second portion in the second direction is defined as a second average value, the first average value is greater than the second average value. (2) In the wiring board described in (1) above, when the second average value is defined as 1, the first average value is greater than 2 and less than 4. (3) In the wiring board described in (1) or (2) above, the first insulating layer further includes an insulating filler, and the first average particle diameter of the insulating filler in contact with the first portion is smaller than the second average particle diameter of the insulating filler in contact with the second portion. (4) In the wiring board described in (3) above, the difference between the first average particle diameter and the second average particle diameter is 1.5 μm or more and 5.5 μm or less. (5) In the wiring board described in (3) or (4) above, the insulating filler includes one that is covered with the first portion and the second portion. (6) In the wiring board described in any of (1) to (5) above, the thickness of the first portion is greatest at a corner including an opening edge where the first surface and the sidewall meet in a cross-sectional view. (7) In the wiring board described in any of (1) to (6) above, the first conductor layer further includes a third portion that is in contact with the first portion and located on the sidewall. (8) A mounting structure according to the present disclosure includes the wiring board according to any one of (1) to (7) above, and an electronic component mounted on the wiring board.

[0038] REFERENCE SIGNS LIST 1 wiring substrate 20 core insulating layer 20a through-hole conductor 21 first insulating layer 211 first surface 212 second surface 22 via hole 221 side wall 23 insulating filler 3 first conductor layer 31 first portion 32 second portion 33 third portion 3a via-hole conductor 3b land conductor 4 solder resist 5 solder

Claims

1. A wiring board comprising: a first insulating layer having a first surface and a second surface located opposite the first surface; a via hole located in the first insulating layer so as to penetrate from the first surface to the second surface; and a first conductor layer located from the first surface along at least a side wall of the via hole, wherein the first conductor layer includes a first portion protruding from the side wall of the via hole into the first insulating layer in a first direction parallel to the first surface, and a second portion protruding from the first surface into the first insulating layer in a second direction perpendicular to the first surface, wherein when the average thickness of the first conductor layer including the first portion in the first direction is defined as a first average value and the average thickness of the first conductor layer including the second portion in the second direction is defined as a second average value, the first average value is greater than the second average value.

2. The wiring board according to claim 1, wherein when the second average value is 1, the first average value is 2 or more and 4 or less.

3. The wiring board according to claim 1 or 2, wherein the first insulating layer further contains an insulating filler, and a first average particle diameter of the insulating filler in contact with the first portion is smaller than a second average particle diameter of the insulating filler in contact with the second portion.

4. The wiring board according to claim 3, wherein the difference between the first average particle size and the second average particle size is 1.5 μm or more and 5.5 μm or less.

5. The wiring board according to claim 3 or 4, wherein the insulating filler includes one that is covered with the first portion and the second portion.

6. The wiring board according to any one of claims 1 to 5, wherein, in a cross-sectional view, the thickness of the first portion is greatest at a corner including an opening edge where the first surface and the side wall meet.

7. The wiring board according to any one of claims 1 to 6, wherein the first conductor layer further includes a third portion that is in contact with the first portion and located on the side wall.

8. A mounting structure comprising: the wiring board according to any one of claims 1 to 7; and an electronic component mounted on the wiring board.

Images