Modular multilevel converter submodules

Abstract

A submodule (120) for a modular multilevel converter (102) includes a bridge cell (220) and an active power decoupling module (140). The bridge cell includes an energy storage capacitor (222) and a first bridge pair of power switches (224, 224') connected in parallel with the energy storage capacitor. The active power decoupling module includes first and second terminals (150, 152), a second bridge pair (169) of power switches (170, 170') connected between the first and second terminals and in parallel with the energy storage capacitor, and an inductor (166) connected in series with a power decoupling capacitor (168) to a junction between the power switches of the second bridge pair of power switches.

Description

MODULAR MULTILEVEL CONVERTER SUBMODULESFIELD

[0001] Embodiments of the present disclosure relate to the power transmission and distribution field, and more particularly, to submodules for a modular multilevel converter. BACKGROUND

[0002] Power converter systems enable power transfer from energy sources to energy loads by reconciling their differences in voltages, currents, frequency of operation and facilitate voltage conversion between Direct Current (DC) sources, a DC source and an alternating current (AC) source, or AC sources. Such power converter systems have various applications including renewable energy integration, long distance high-voltage DC (HVDC) electric power transmission, electrified transportation systems, industrial motor drives, energy storage systems, and other applications.

[0003] The building block elements of power converter systems are semiconductor power switches (such as MOSFETS, IGBTs, thyristors, etc.) and energy storage elements (such as capacitors and inductors). The power switches operate at a switching frequency and connect their associated nodes or terminals to different voltage and / or current levels leading to switched voltage and current waveforms. The energy storage elements act as smoothening elements for the switched voltages and / or currents to meet the source and load performance specifications.

[0004] For numerous case studies, for example, medium / high-voltage grid-connected applications, the ratings of the energy sources and loads go significantly beyond the ratings of the building block elements, i.e., the semiconductor power switches and the energy storage elements. In order to realize such power converters, several smaller power converters called submodules are connected in series and / or in parallel. A Modular Multi-level Power Converter (MMC) architecture forms the most common modern-day circuit topology to realize such applications.

[0005] MMC based voltage source converters utilize submodules that act as modular building blocks consisting of switches in half-bridge or full-bridge configurations, and energy storage elements in the form of large capacitors. Large capacitors are selected as the energy storage element to handle significant active power ripple currents in the submodules.

[0006] Conventional MMC submodules utilize large film type capacitors. Althoughlarge film capacitors have a high reliability a low equivalent series resistance, they are costly, are relatively heavy and have a large volume. For example, the energy storage capacitor of a conventional MMC submodule may comprise more than 50% of the SM volume and 80% of the SM weight. Thus, the large capacitors of conventional submodules limit the power density of the MMC, while increasing the weight and volume of the submodules. SUMMARY

[0007] Embodiments of the present disclosure generally relate to submodules for use in a modular multilevel converter (MMC), and power converter systems having an MMC that includes the submodules.

[0008] One embodiment of the submodule for an MMC includes a bridge cell and an active power decoupling (APD) module. The bridge cell includes an energy storage capacitor and a first bridge pair of power switches connected in parallel with the energy storage capacitor. The APD module includes first and second terminals, a second bridge pair of power switches connected between the first and second terminals and in parallel with the energy storage capacitor, and an inductor connected in series with a power decoupling capacitor to a junction between the power switches of the second bridge pair of power switches.

[0009] In one embodiment, the inductor and the power decoupling capacitor are connected in series between the junction and the second terminal, and the submodule includes a first output terminal connected at a junction between the power switches of the first bridge pair of power switches, and a second output terminal connected to a negative terminal of the energy storage capacitor.

[0010] In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0011] In one embodiment, the submodule includes: a fault current control module (FCC) comprising a third bridge pair of power switches connected in parallel with the power decoupling capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between thepower switches of the third bridge pair of switches. In one embodiment, each power switchcomprises a semiconductor switching in antiparallel with a diode.

[0012] In one embodiment, the submodule includes: a third bridge pair of power switches connected between a junction between the inductor and the power decoupling capacitor and a negative terminal of the energy storage capacitor; a fourth bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches, wherein the inductor and the power decoupling capacitor are connected in series between the junction between the power switches of the fourth bridge pair of power switches. In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0013] In one embodiment, the bridge cell includes: a third bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal at a junction between the power switches of the first bridge pair of power switches; and a second output terminal at a junction between the power switches of the third pair of power switches.

[0014] In one embodiment, the submodule includes a bypass module comprising a bidirectional semiconductor switch connected between the first and second output terminals and in parallel with the first and third bridge pairs of power switches.

[0015] In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0016] In one embodiment: the inductor and the power decoupling capacitor are connected in series between the junction and the second terminal; and the submodule includes: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; a bypass module comprising a bidirectional semiconductor switch connected between the second terminal and a second output terminal; and a fault current correction module (FCCM) connected in parallel with the bypass module through first and second FCCM terminals and configured to maintain a positive or negative voltage across the first and second FCCM terminals during a fault mode of operation.

[0017] In one embodiment, the FCCM a primary energy storage capacitorconnected between the first and second terminals; a first secondary energy storage capacitor connected between the first FCCM terminal and an upper leg; a second secondary energy storage capacitor connected between the second FCCM terminal and a lower leg; a first power switch connected between the upper leg and a first node; a second power switch connected between the lower leg and a second node; third and fourth power switches connected in series between the first and second nodes; and a transformer having a first winding connected in series with the first FCCM terminal and the first node, and a second winding connected in series with the second FCCM terminal and the second node.

[0018] One embodiment of a power converter system includes a modular multilevel converter and a controller. The modular multilevel converter includes a plurality of leg units and submodules. The leg units are connected in parallel between positive and negative DC terminals. Each leg unit includes an upper arm and a lower arm connected in series and being connected to an AC line corresponding to a phase of an AC power system. Each upper arm and lower arm includes at least one of the submodules. Each submodule includes a bridge cell and an active power decoupling module. The bridge cell includes an energy storage capacitor and a first bridge pair of power switches connected in parallel with the energy storage capacitor. The active power decoupling module includes first and second terminals, a second bridge pair of power switches connected between the first and second terminals and in parallel with the energy storage capacitor, and an inductor connected in series with a power decoupling capacitor to a junction between the power switches of the second bridge pair of power switches. The controller is configured to control the power switches of the submodules to perform power conversion between the positive and negative DC terminals and the AC lines.

[0019] In one embodiment: the inductor and the power decoupling capacitor are connected in series between the junction and the second terminal; and each submodule includes: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected to a negative terminal of the energy storage capacitor.

[0020] In one embodiment, each power switch comprises a semiconductor switching elementconnected in antiparallel with a diode.

[0021] In one embodiment, each submodule includes: a fault current control module comprising a third bridge pair of power switches connected in parallel with the power decoupling capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches. In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0022] In one embodiment, each submodule comprises: a third bridge pair of power switches connected between a junction between the inductor and the power decoupling capacitor and a negative terminal of the energy storage capacitor; a fourth bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches, wherein the inductor and the power decoupling capacitor are connected in series between the junction between the power switches of the fourth bridge pair of power switches. In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0023] In one embodiment, the bridge cell of each submodule includes: a third bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal at a junction between the power switches of the first bridge pair of power switches; and a second output terminal at a junction between the power switches of the third pair of power switches.

[0024] In one embodiment, each submodule includes a bypass module comprising a bidirectional semiconductor switch connected between the first and second output terminals and in parallel with the first and third bridge pairs of power switches. In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0025]

[0026] In one embodiment: the inductor and the power decoupling capacitor of each submodule are connected in series between the junction and the second terminal; and eachsubmodule comprises: a first output terminal connected at a junction between the power switchesof the first bridge pair of power a bypass module comprising a bidirectional semiconductor switch connected between the second terminal and a second output terminal; and a fault current correction module (FCCM) connected in parallel with the bypass module through first and second FCCM terminals and configured to maintain a positive or negative voltage across the first and second FCCM terminals during a fault mode of operation.

[0027] In one embodiment, each FCCM includes: a primary energy storage capacitor connected between the first and second FCCM terminals; a first secondary energy storage capacitor connected between the first FCCM terminal and an upper leg; a second secondary energy storage capacitor connected between the second FCCM terminal and a lower leg; a first power switch connected between the upper leg and a first node; a second power switch connected between the lower leg and a second node; third and fourth power switches connected in series between the first and second nodes; and a transformer having a first winding connected in series with the first FCCM terminal and the first node, and a second winding connected in series with the second FCCM terminal and the second node.

[0028] One embodiment of a submodule for a modular multilevel converter includes: a full- bridge cell and a bypass module. The full-bridge cell including: an energy storage capacitor; a first bridge pair of power switches connected in parallel with the energy storage capacitor; a second bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal connected between the power switches of the first bridge pair of power switches; and a second output terminal connected between the power switches of the second bridge pair of power switches. The bypass module including a bidirectional semiconductor switch connected between the first and second output terminals and in parallel with the full-bridge cell.

[0029] In one embodiment, each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

[0030] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as anaid in determining the scope of the claimed matter. The claimed subject matter is notlimited to implementations that solve any or noted in the Background. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] FIG. 1 is an example of a power converter system in accordance with embodiments of the present disclosure.

[0032] FIGS. 2 and 3 respectively are circuit diagrams of an example of a conventional half- bridge cell and an example of a conventional full-bridge cell in accordance with submodules of the prior art.

[0033] FIG. 4 is a simplified block diagram of an example submodule for use in an MMC in accordance with embodiments of the present disclosure.

[0034] FIG. 5 is a circuit diagram of an example of an APD module in accordance with embodiments of the present disclosure.

[0035] FIG. 6 is a circuit diagram of an example of a submodule in accordance with embodiments of the present disclosure.

[0036] FIG.7 is an example candidate control scheme in accordance with embodiments of the present disclosure.

[0037] FIG. 8 is a circuit diagram of an example of a submodule in accordance with embodiments of the present disclosure.

[0038] FIG. 9 is a circuit diagram of an example of a bypass module in accordance with embodiments of the present disclosure.

[0039] FIG.10 is a circuit diagram of an example submodule in accordance with embodiments of the present disclosure.

[0040] FIG.11 is a circuit diagram of an example submodule in accordance with embodiments of the present disclosure.

[0041] FIG.12 is a circuit diagram of an example submodule in accordance with embodiments of the present disclosure.

[0042] FIG.13 is a circuit diagram of an example submodule in accordance with embodiments of the present disclosure.

[0043] FIG.14 is a circuit diagram of an submodule in accordance with embodimentsof the present disclosure.

[0044] FIG. 15 is a simplified block diagram of an example controller in accordance with embodiments of the present disclosure. DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0045] Embodiments of the present disclosure are described more fully hereinafter with reference to the accompanying drawings. Elements that are identified using the same or similar reference characters refer to the same or similar elements. The various embodiments of the present disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0046] FIG.1 is an example of a power converter system 100 in accordance with embodiments of the present disclosure. The system 100 includes a modular multilevel converter (MMC) 102 that facilitates high voltage, high power conversion applications between a first power system (e.g., source or load) 104 and a second power system (e.g., source or load) 106. The power systems may each represent a renewable power source, a non-renewable power source, a generator, an electric grid (e.g., nano-grid, utility grid), an appliance, or another source or load of electrical power. In the example system 100 of FIG. 1, the MMC is configured to convert high alternating current (AC) voltage from the power system 104 to high direct current (DC) voltage from the power system 106, or vice versa. The MMC 102 may also be configured to convert power between two different DC power systems or two different AC power systems 104 and 106.

[0047] The MMC 102 generally includes a controller 110 and one or more leg units 112, such as leg units 112A-C, each comprising an upper arm 114, an upper arm inductor 116, a lower arm inductor 117, and a lower arm 118 sequentially connected to each other in series. Each arm 114 and 118 comprises N sub-modules 120 that are sequentially connected to each other in series through terminals 122 and 124. A positive DC terminal 126 of each leg unit 112 is connected to a positive DC bus 127, and a negative terminal 128 of each leg unit 112 is connected to a negative DC bus 129.

[0048] The example MMC 102 of FIG. 1 includes three leg units 112A-C, each respectivelyconnected to one of the phases A-C of the phase AC power system 104 through an AC terminal 130 at a junction between the upper and lower arms 114 and 118 and connecting arms 132. The phase of each leg unit 112 may be separated by 120 degrees from the phases of the other leg units 112. The MMC 102 may take on other conventional configurations in accordance with a desired voltage conversion.

[0049] The submodules 120 are generally of the same or similar design and generally include an energy storage capacitor and semiconductor power switches. A controller controls the power switches of each submodule 120 to either connect the stored voltage of the energy storage capacitor to its terminals 122 and 124 or to disconnect the storage voltage from the terminals 122 and 124. In this manner, the controller 110 selectively produces a desired AC voltage waveform at the AC terminals 130, or a DC voltage at the DC terminals 126 and 128 depending on the voltage conversion direction.

[0050] The controller 110 can be embodied in the form of hardware, firmware, software executable by hardware, or as any combination thereof, in accordance with conventional MMC controllers. The controller 110 is generally configured to continuously calculate certain error values as differences between desired operating characteristics of the MMC 102 and measured operating characteristics of the MMC 102, such as the voltage υDC across the terminals or DC busses 126 and 128, branch currents iBA, iBB, iBC in the upper and lower arms 114 and 118 of the leg units 112, the currents ia, iband icin the AC arms 132, the voltage between each AC terminal 130 and the negative DC terminal 128, among others. Using the error values, the MMC controller 110 can generate switching control signals that are used to control the power switches in the submodules 120 of each leg unit 112, to provide a desired power conversion.

[0051] Embodiments of the present disclosure are directed to designs of the submodules 120 that provide significant advantages over conventional half-bridge and full-bridge submodules of the prior art, such as reduced energy storage capacitor size, fault current correction and / or a direct bypass to reduce conductive losses in the submodule, for example. Embodiments of the present disclosure also include an MMC 120 having any number of the submodules 120 in one or moreleg units 112. Before discussing the details of the improved submodule designs, a discussion ofconventional half-bridge and full-bridge cells will be discussed.

[0052] FIGS. 2 and 3 respectively are circuit diagrams of an example of a conventional half- bridge cell 220A and an example of a conventional full-bridge cell 220B used as submodules of MMCs of the prior art. The half-bridge cell 220A and the full-bridge cell 220B each include an energy storage capacitor 222 and power switches 224.

[0053] The power switches 224, as well as other power switches of the present disclosure, may take on a conventional form and comprise a switching element 226 connected in antiparallel with a unidirectional conduction element 228, such as a diode. The switching element 226 may take the form of a conventional semiconductor power switching element, such as a metal oxide semiconductor field effect transistor (MOSFET), such as an n-channel MOSFET having a drain 230, a gate 232, and a source 234. Other suitable switching elements include, for example, bipolar transistors, an insulated-gate bipolar transistor (IGBT), high-electron-mobility transistor (HEMT), or other conventional or compatible switching elements.

[0054] In the half-bridge cell 220A, the capacitor 222 is connected in parallel with a single bridge pair 223 of the power switches 224A and 224A’, which are connected in series and controlled in a complimentary manner in accordance with conventional techniques. The positive output terminal 122 of the half-bridge cell 220A connects at a junction between the power switches 224A and 224A’. The negative output terminal 124 may connect between the energy storage capacitor 222 and the negative side (e.g., source 234 side) of the power switch 224A’. When the power switch 224A is in the “on” state and the power switch 224A’ is in the “off” state the voltage across the terminals 122 and 124 is the same as the voltage υS across the capacitor 222. When the power switch 224A is in the “off” state and the power switch 224A’ is in the “on” state the voltage across the terminals 122 and 124 is 0V.

[0055] The example full-bridge cell 220B shown in FIG. 3 includes an energy storage capacitor 222 that is connected in parallel to two half-bridges formed by a first bridge pair 240 of series-connected power switches 224A and 224A’ and a second bridge pair 242 of series- connected power switches 224B and 224B’. The positive output terminal 122 is connected at a junction between the bridge pair 240 and the negative output terminal 124 is connected at ajunction between the bridge pair 242. Each 240 and 242 of the power switches 224 is generallyoperated in a complimentary manner in with conventional MMC full-bridge submodule cell controls. The presence of half-bridge pairs 240 and 242 of the power switches 224 permit bipolar output voltages (+ / -υS). For example, when the power switches 224B and 224A’ are in the “on” state, the voltage across the output terminals 122 and 124 is -υS. When the power switches 224B’ and 224A are in the “on” state, the voltage across the output terminals is +υS. When the power switches 224B and 224A are in the “on” state, or the power switches 224B’ and 224A’ are in the “on” state, the voltage across the terminals 122 and 124 is 0V (submodule zero state).

[0056] There are several issues with the use of either the half-bridge cell 220A and the full- bridge cell 220B as the submodules 120 of an MMC, such as MMC 102 (FIG. 1). For example, under ideal operating conditions, the voltage υS across the energy storage capacitor 222 of the half- bridge cell 220A would be constant, and the submodule current iSMwould include DC and sinusoidal currents at the AC power frequency of the connected AC power system (e.g., system 104). The current ICs through the capacitor 222 generally consists of currents at the AC power frequency and second harmonic currents at twice the power frequency. As a result, the capacitor 222 must have a large capacitance to absorb ripple currents and maintain a stiff DC voltage υS.

[0057] Under realistic design conditions, with finite reactive components for the inductors 116, 117 (FIG. 1) and the capacitor 222, significant amounts of second harmonic components at twice the power frequency are present in iSM, iCsand υS. Similar issues arise with submodules that utilize the full-bridge cell 220B. These second harmonic components in currents lead to additional ohmic losses in the power circuit components of the SM and the bridge inductor. In order to mitigate these effects, Circulating Current Control (CCC) techniques are employed, wherein the energy fluctuation occurring at the second harmonic frequencies are exchanged between the top and bottom arm within a phase leg of the MMC or between the three different phase legs of the MMC. Implementation of CCC requires sensing various currents and voltages, coordinate transformation and careful design approaches to ensure the SM capacitor voltages in various arms and legs remain balanced. While this approach reduces ohmic losses, it does not eliminate second harmonic components of υS.

[0058] The MMCs that utilize submodules formed of the half-bridge cells 220A are alsosusceptible to a short circuit fault condition leg units 112 between the positive DC terminal 126 and the negative DC terminal 128 and the corresponding AC arm 132 due to the pathway formed by the diodes 228 of the power switch 224A’. Under such a fault condition for any of the three phase AC system voltages, an uncontrolled amount of current may flow into the fault.

[0059] The full-bridge cells 220B do not have this issue because the uncontrolled fault-current pathway formed by the diodes 228 is eliminated, resulting in improved DC short-circuit fault tolerance of leg units 112 that are formed using the full-bridge submodules 220B. Thus, full-bridge cells 220B allow full control over the AC and DC voltages and currents during AC and DC side faults.

[0060] However, full-bridge cells 220B feature twice the semiconductor switch rating and double the number of semiconductors in the conduction path over the half-bridge cells 220A, resulting in a doubling of switch losses. In other words, in contrast to the half-bridge cells 220A, in which only one power switch is in the conduction state, the full-bridge cell 220B always has two power switches 224 in the conduction path. As a result, the full-bridge cell 220B is generally a cost-ineffective solution for HVDC applications due to higher investment and operational cost (e.g., power losses).

[0061] Embodiments of the present disclosure relate to improved submodule 120 designs that facilitate higher power density and greater fault-tolerance, efficiency and reliability, while also reducing cost. The improved submodules 120 generally build upon traditional submodules consisting of either the half-bridge cell 220A or the full-bridge cell 220B in several configurations with a primary focus on reduced energy storage capacitance and higher power density. Some of the improvements are realized through power decoupling circuitry that reduces or minimizes bridge active power ripple and steers the power ripple away from the DC system bus 127, allowing for a reduction in the size of the energy storage capacitor of each submodule 120. All the proposed circuit configurations have varying degrees of advantages in terms of reduced submodule capacitance, DC fault ride through, system losses, and cost. Their adoption in particular applications such as point-to-point or multiterminal on-shore and off-shore systems may involve trade-offs among the different circuit configurations, component design and operating envelopes.

[0062] FIG. 4 is a block diagram of a submodule 120 for use in an MMC, such as MMC 102(FIG. 1), in accordance with the present disclosure. Embodiments of the submodule include a bridge cell 220, which may include a conventional half-bridge cell, such as the example half-bridge cell 220A shown in FIG. 2, or a conventional full-bridge cell, such as the example full-bridge cell 220B shown in FIG. 3. Additionally, the submodule includes an active power decoupling (APD) circuit module 140 (hereinafter “APD module”), a bypass circuit module 142 (hereinafter “bypass module”), and / or a fault current control (FCC) circuit module 144 (hereinafter “FCC module”).

[0063] The APD module 140 generally operates to divert ripple current from power fluctuations injected into the DC terminals or nodes 146 and 148 into a shunt connected circuit. As indicated in FIG. 4, the APD module 140 may include terminals or nodes 150 and 152 that are connected to the positive and negative DC terminals 146 and 148 of the bridge cell 220. Series connected options and partial power processing options can also be utilized to realize the power decoupling function.

[0064] The bypass module 142 generally operates to provide a direct bypass of the bridge cell 220 during fault conditions as well as during normal operation. The bypass module 142 generally connects across the terminals 122 and 124 of the submodule 120 at terminals or nodes 155 and 157 and is in parallel with the AC terminals or nodes 154 and 156 of the bridge cell 220. The bypass module 142 may be controlled by the controller 110 to form a pathway for the current through the branch or arm 114, 118 to flow between the terminals 122 and 124. The bypass module 142 may be used to reduce conduction losses of the bridge cell 220 (e.g., full-bridge cell 220A), and / or the FCC module 144, as discussed below.

[0065] The FCC module 144 operates to control fault currents in the bridge cell 220. In one example, the FCC module 144 is connected in line between the output terminal 124 and the negative AC terminal 156 of the bridge cell 220 at terminals or nodes 158 and 160. A terminal 162 may be connected to a terminal 164 of the APD module 140.

[0066] FIG. 5 is a circuit diagram of an example of the APD module 140, in accordance with embodiments of the present disclosure. The APD module 140 generally takes the form of a DC / DC converter comprising an inductor 166, a power decoupling capacitor 168, and a bridge pair 169 ofpower switches 170 and 170’ that are controlled the controller 110 in a complimentary manner.The inductor 166 and the capacitor 168 are in series from the junction between the power switches 170 and 170’ and the terminals 152 and 164.

[0067] FIG. 6 is a circuit diagram of a submodule 120A comprising the APD module 140 connected to the half-bridge cell 220A, in accordance with embodiments of the present disclosure. The bridge pair 223 of half-bridge cell 220A and the bridge pair 169 of the APD module 140 are connected in parallel across the energy storage capacitor 222 of the half-bridge cell 220A.

[0068] The power switches 170 and 170’ are operated in a complimentary manner, as indicated by their reference numbers, typically at a constant switching frequency, with a controlled duty ratio to divert most or (ideally all) of the line frequency and double line frequency AC components of currents in ICsaway from the energy storage capacitor 222. As these components are diverted from ICs to the APD circuit, the double line frequency component in IS is also reduced leading to reduced circulating current in MMC arms. This can be realized through various control methods that employ feedback of the capacitor voltage υSacross the capacitor 222, and / or the capacitor 168, as well as currents iSM and / or id. It should be noted that the power circuit or half-bridge cell 220A of the submodule 120A and the APD module 140 may be controlled independently of each other by the controller 110.

[0069] An example candidate control scheme is illustrated in the block diagram of FIG. 7. In general, a constant voltage command for the capacitor voltage υS* is compared with actual feedback of the capacitor voltage υS, generating an error υSethat drives a voltage controller 174. The output of the voltage controller provides a current command id* for the current in the inductor 166, which is in turn compared with the actual inductor current id. The resulting error ide drives a current controller 176, which in turn develops the duty ratio control signal d3for the power switch 170. The voltage controller 174 and the current controller 176 may be realized in the controller 110 (FIG. 1).

[0070] The design of the voltage controller 174 and the current controller 176 may, for example, be performed on the basis of a linearized dynamic model of the APD module 140. This approach leads to a reduction of the capacitance of the energy storage capacitor 222, as well as substantial reduction of double line frequency AC current components in the current ISM. The APDmodule 140 may, in addition to reducing the overall capacitance requirement to support the ripplepower in the submodule 120A, also double line frequency components of circulating currents in the corresponding MMC leg unit 112, directly translating to reduced converter loss and reduced filter requirements.

[0071] The following example illustrates the significant benefits of maintaining acceptable ripple voltage levels across the energy storage capacitor 222, while utilizing lower capacitance values when the MMC 102 utilizes the submodule 120A of FIG.6 relative to a conventional MMC configuration, in which the MMC 102 utilizes the half-bridge cell 220A (FIG.2) as the submodules 120.

[0072] The example scenario simulates an HVDC application employing MMCs 102 with a capacity of 450 MVA, operating at 230 kV (line-to-line rms) and 60 Hz for the AC system 104, with a DC system voltage υDC of 421 kV across the busses 127 and 129 (FIG. 1) featuring an internal resistance of 0.1 ohm. The load in the example comprises a series RL load with parameters of 94 ohms and 188 mH, consuming approximately 360 MW and 270 MVAR at nominal voltage. In this example, each of the MMC arms are represented by their averaged model incorporating an equivalent DC bus capacitance and an equivalent arm inductance to account for the series connected string of submodules 120A.

[0073] The example base case MMC 102 employing the conventional half-bridge cell 220A submodule includes parameters that are derived from equations (1). Using the example scenario results in a branch inductor 116, 117 (LB) of 10 mH and a net energy storage capacitor 222 (CS) of 78 μF at 421 kV. (1)

[0074] the base case utilizing the half-bridge cell 220A as the submodule and the submodule 120 of FIG. 6 are listed in Table 1. Base Case (HB cell Submodule 120 ParametersArm Inductor (116, 10 mH10 mH 117)20A and the APD module 140 may be implemented by the controller 110 using a simple open loop control system as shown in (2). Control of the duty ratio control signal d1 for the power switch 224A of the half- bridge cell 220A is chosen to provide the appropriate voltage balance for the MMC power transfer, augmented with a current feedback term of gain Ra. For the APD module 140, the duty cycle of the control signal d3 to the power switch 170 may be set at 80%, augmented with a current feedback term of gain Ra. The current feedback term Ra provides active damping and mitigates resonance between various energy storage elements in the circuit.

[0076] both cases, indicating that the submodule 120A effectively maintains voltage ripple levels comparable to those of the base case, despite utilizing a significantly smaller effective capacitor that is approximately seven times smaller.

[0077] Corresponding to the reduction in capacitance, there is a proportional decrease in the current iCS. For example, the base case exhibits an RMS current value of 1.8 kA, while the submodule 120A demonstrates a mere 30 A, indicating a 60-fold reduction. Furthermore, the submodule 120 experiences an 80% reduction in the 120 Hz component of the branch current through the arm (114, 118), attributed to circulating currents.

[0078] Additionally, the voltage across the decoupling capacitor 168 receives 80% of the DC component of voltage υS, as determined by the control scheme. The current iCs through the capacitor 222 has 80% reduction in the line frequency component while 88% reduction in the double line frequency component. As a result, most of the double line frequency componentcurrent in iSis transferred to the AC side of the APD module 140, manifesting as id. Consequently,the APD module / decoupling circuit 140 most part of the energy oscillations affecting υS, thereby keeping them circulating within the loop formed by the inductor 166 and the capacitor 168.

[0079] Table 2 provides a comparison of the lower order harmonic components for the base case submodule formed by the half-bridge cell 220A and the submodule 120A of FIG.6 including the voltage υSacross the energy storage capacitor 222, the current through the energy storage capacitor iCS, the voltage υB across the arm or branch (114, 118) of the leg unit 112, and the current iB through the arm or branch (114, 118) of the leg unit 112. Table 2 also provides the voltage υd across the capacitor 168 and the current idthrough the capacitor 168.

[0080] As can be observed, for the same average and ripple voltages in υS, the current iCSthrough the capacitor 222 has been drastically reduced for all the lower harmonic components. More specifically, there is a 50, 80, and 50 times reduction in 60 Hz, 120 Hz, and 180 Hz components, respectively. Additionally, there is a 6 times reduction of the branch current iBfor the 180 Hz component, while the DC and 60 Hz components responsible for the power transfer remain similar.current iCS through the DC-link or energy storage capacitor 222 for each submodule 120 of the MMC 102, but also minimizes the 180 Hz component of branch current iB. A more sophisticated control scheme can further optimize the converter ripple component.

[0083] FIG.8 is a circuit diagram of an of a submodule 120B that comprises the full-bridge cell 220B, in accordance with of the present disclosure. As mentioned above, the uncontrolled diodes pathways are eliminated in the full-bridge cell 220B thereby improving the DC short-circuit fault tolerance capability. The APD module 140 operates in a similar manner as in the submodule 120A of FIG. 6 using a similar control scheme (FIG. 7) to absorb part of the energy oscillations affecting the voltage υS across the energy storage capacitor 222 and significantly reduce the ripple current iCSthrough the energy storage capacitor 222. This allows for a significant reduction in the capacitance of the energy storage capacitor 222 in the submodule 120B relative to that required by the energy storage capacitor 222 of the full-bridge cell 220B shown in FIG. 3, such as about a seven times reduction in the effective capacitance. As a result, the submodule 120B can be formed much smaller and at a lower cost than submodules formed using the full-bridge cell 220B or similar full-bridge cells and provide other advantages.

[0084] FIG.9 is a circuit diagram of an example of the bypass module 142, in accordance with embodiments of the present disclosure. The bypass module 142 may comprise a bidirectional semiconductor switch 180, such as, for example, a bidirectional control thyristor (shown), or another bidirectional semiconductor switch that is suitable for high power applications. When activated by the controller 110, the switch 180 provides a path between the terminals 155 and 157 for the branch current in the arm 114, 118 to flow that bypasses the bridge cell 220 and possibly other components of the submodule 120.

[0085] FIG.10 is a circuit diagram of an example submodule 120C comprising the full-bridge cell 220B and the bypass module 142, in accordance with embodiments of the present disclosure. Since the submodule 120C does not include the APD module 140 or the FCC module 144 (FIG. 4), the bypass module 142 is connected across the AC terminals 122 and 124 and in parallel with the terminals 154 and 156 of the full-bridge cell 220B. This configuration allows the bypass cell 142 to offset the conduction losses of the full-bridge cell 220B while retaining the inherent fault blocking capability of the full bridge cell 220B.

[0086] For example, when the power switches 224B and 224A’ are in the “on” state, the voltage across the terminals 154 and 156 is +υS. When the power switches 224B’ and 224A are in the “on” state, the voltage across the terminals 154 and 156 is - υS. The contrasting state is the 0Vstate across the terminals 154 and 156 or zero in which the switches of the bidirectionalsemiconductor switch 180 are turned-on, in a current path through a single semiconductor device. Furthermore, the thyristor devices of the example semiconductor bidirectional switch 180 have lower conduction losses than power switches (e.g., switches 224) formed using MOSFETs or IGBTs. As a result, the submodule 120C of FIG.10 has significantly lower zero state conduction losses than a submodule formed by the full-bridge cell 220B (FIG. 3), in which the zero state conduction path must travel through two of the power switches 224. Hence, the submodule 120C retains the fault blocking capabilities of the full-bridge cell 220B, while significantly reducing zero state conduction losses.

[0087] FIG. 11 is a circuit diagram of an example submodule 120D that combines the submodule 120B of FIG. 8 with the bypass module 142. Thus, when compared to a submodule formed by the conventional full-bridge cell 220B (FIG.3), the submodule 120D may be configured with a much smaller energy storage capacitor 222, provides fault-tolerance capability, and has lower zero state conduction losses.

[0088] FIG. 12 is a circuit diagram of an example submodule 120E that includes an example of the FCC module 144 in combination with the submodule 120A of FIG. 6, in accordance with embodiments of the present disclosure. While the addition of the APD module 140 enables a reduction in the size of the energy storage capacitor 222, the half-bridge cell 220A still has a low fault-tolerance capability. This deficiency is overcome using the FCC module 140, which can provide fault-blocking capability, similar to that of the full-bridge cell 220B, during DC and AC side faults.

[0089] In one example, the FCC module 140 comprises a bridge pair 183 of semiconductor power switches 184 and 184’, which may be controlled in a complimentary manner by the controller 110 (FIG.1). During normal operation, the power switch 184’ is always kept in the “on” state. Hence, the submodule 120E essentially reduces to the submodule 120A of FIG.6. However, during a fault mode, the power switch 184’ is turned “off” and the power switch 184 is turned “on”. This causes the submodule 120E to behave as the submodule 120B (FIG. 8) having the full- bridge cell 220B, which is inherently fault-tolerant.

[0090] Thus, during a normal operation the submodule 120E will enable a reduction inthe size of the energy storage capacitor 222 the APD module 140, and during a fault mode, the submodule 120E will enable fault-blocking capability due to the FCC module 144. The particular design of the power switches 184 and 184’ can be optimized to feature very low conduction losses with relatively higher switching losses.

[0091] FIG. 13 is a circuit diagram of an example submodule 120F that includes an example of the FCC module 144 in combination with the submodule 120A of FIG. 6, in accordance with embodiments of the present disclosure. Accordingly, the submodule 120F includes the features provided by the APD module 140, such as a relatively small energy storage capacitor 222. The example FCC module 144 provides fault-blocking capability while also increasing the output voltage across the terminals 122 and 124.

[0092] In one embodiment, in addition to the bridge pair 183 of power switches 184 and 184’, the FCC module 144 includes a bridge pair 185 of power switches 186 and 186’, which are controlled in a complimentary manner by the controller 110 to provide the desired fault-blocking and voltage increase capability. The bridge pair 183 is connected between a junction 187 located between the power decoupling capacitor 168 and the inductor 166 and the negative terminal of the energy storage capacitor 222 (e.g., terminals 148 or 152). The bridge pair 185 is connected in parallel with the energy storage capacitor 222. The output terminal 122 is connected at a junction between the power switches 224A and 224A’ of the bridge pair 223, and the output terminal 124 is connected at a junction between the power switches 184 and 184’ of the bridge pair 183. Additionally, the inductor 166 and the power decoupling capacitor 168 are connected in series at the junction between the power switches 186 and 186’ of the bridge pair 185 and the junction between the power switches 170 and 170’ of the bridge pair 169.

[0093] During a normal operational mode when the power switches 186 and 184’ are “on”. As a result, the submodule 120F essentially reduces to the submodule 120A of FIG. 6 and operates accordingly.

[0094] During a fault mode, the power switches of the modules 220A, 140 and 144 can be modulated to output combinations of the voltage υd across the capacitor 168 of the APD module140 and the voltage υSacross the energy 222 at the output terminals 122 and 124.For example, the output across the terminals and 124 is:

[0095] +υd+ υSwhen the power switches 184, 186 and 224A’ are “on”;

[0096] +υd- υSwhen the power switches 184, 186’ and 224A “on”;

[0097] -υd + υS when 184’, 186’, 170 and 224A’ are “on”; and

[0098] -υd - υS when 184’, 186’, 170; and 224A are “on”.

[0099] Accordingly, the FCC module 144 facilitates operation of the submodule 120F as a buck-boost converter that can provide a submodule output voltage across the terminals 122 and 124 that is beyond what is permissible by the full-bridge cell 220B (FIG. 3), while providing increased fault-tolerance. The trade-offs for the submodule 120F include an additional device being in the conduction path beyond what is needed with full-bridge cell designs.

[0100] FIG. 14 is a circuit diagram of an example submodule 120G, in accordance with embodiments of the present disclosure. The submodule 120G includes the submodule 120A of FIG. 6 and features (i) the APD module 140 that allows the size of the energy storage capacitor 222 to be reduced over conventional submodules, (ii) the bypass module 142 for reducing zero state conduction losses, and (iii) an example FCC module 144 for high voltage output during the normal operating mode when the bidirectional semiconductor switch 180 of the bypass module 142 is “on” and the submodule 120G is essentially reduced to the submodule 120A (FIG. 6).

[0101] The FCC module 144 is connected in parallel with the bypass module 142 through connections between terminals 155 and 188 and terminals 157 and 190. The FCC module 144 is generally configured to maintain a positive or negative voltage across the terminals 188 and 190 during a fault mode of operation.

[0102] In some embodiments, the FCC module 144 includes a primary energy storage capacitor 192 connected between the terminals 188 and 190, a secondary storage capacitor 194 connected between the terminal 188 and an upper leg 196, and a secondary storage capacitor 198 connected between the terminal 190 and a lower leg 200. The FCC module 144 also includes a group of power switches including a power switch 202 connected between the upper leg 196 and a node 203, a power switch 204 connected between the lower leg 200 and a node 205, and power switches 206 and 208 connected in series between the nodes 203 and 205. The module 144 alsoincludes a transformer 210 having a first 211 that is connected in series between theterminal 188 and the node 203, and a second 212 that is connected in series between the terminal 190 and the node 205.

[0103] During a fault mode of operation, the bidirectional semiconductor switch 180 of the bypass module 142 is turned “off” and the FCC module 144 is activated by the controller 110 (FIG. 1). The capacitors 194 and 198 operate as energy storage capacitors that can each be pre- charged to hold a certain pre-designed level of voltage υf. The power switches 202, 204, 206 and 208 are operated by the controller 110 to maintain either a positive or a negative voltage υf0 across the capacitor 192 at the terminals 188 and 190. In one embodiment, the gate terminals of the power switches 206 and 208 are tied together to operate synchronously. It is understood that the power switches 206 and 208 could be replaced by a single device capable of four quadrant operation.

[0104] In order to maintain a positive voltage polarity across the output terminals 188 and 190 of the FCC module 144 (i.e., υf0>0), the power switch 202 is operated under a duty ratio (df) by the controller 110. The power switches 206 and 208 are operated in a complementary manner with the power switch 202. Similarly, in order to maintain a negative voltage polarity across the output terminals 188 and 190 (i.e., υf0 <0), the power switch 204 is operated under a duty ratio (df) by the controller 110. The power switches 206 and 208 are operated in a complementary manner with the power switch 204. As a result, υf0 = + / - 2 df υf / (1-df). The duty ratio expression can be derived using state-space averaging techniques, for example.

[0105] Note that 0<df<1 and hence, both buck and boost mode (voltage step-up and step- down) are possible at the output ports 188 and 190 of the submodule 120G during a fault. In other words, the output voltage υf0 of the FCC module 144 could be larger or smaller than the pre- charged voltage υf. Additionally, the output voltage υf0is bipolar and could be positive or negative based on the operation of either power switch 202 or 204, respectively.

[0106] As a result, the submodule 120G allows for much higher voltages across the terminals 122 and 124, and increased fault management, beyond what is possible with conventional submodule designs as well as the submodule of FIG. 13.

[0107] While functions described herein may be disclosed as being performed by a single controller (e.g., controller 110), it is understood that the functions may be performed by a singlecontroller or multiple controllers. The controller 110, the voltage controller 174, and the currentcontroller 176 may take on any suitable form, such as that of the example controller 213 shown in FIG. 15.

[0108] The controller 213 may include one or more processors 214 and memory 215, which may be local memory or memory that is accessible to the controller 213. The one or more processors 214 are configured to perform various functions described herein in response to the execution of instructions contained in the memory 215, such as a test program, for example.

[0109] The one or more processors 214 may be components of one or more computer-based systems, and may include one or more control circuits, microprocessor-based engine control systems, and / or one or more programmable hardware components, such as a field programmable gate array (FPGA). The memory 215 represents local and / or remote memory or computer-readable media. As used herein, such memory 215 comprises any suitable patent subject matter eligible computer-readable media and does not include transitory waves or signals. Examples of the memory 215 include conventional data storage devices, such as hard disks, CD-ROMs, optical storage devices, magnetic storage devices and / or other suitable data storage devices. The controller 213 may include circuitry 216 for use by the one or more processors 214 to receive input signals 217 (e.g., voltage and current parameters), issue control signals 218 (e.g., power switch control signals) and / or communicate data 219, such as in response to the execution of the instructions stored in the memory 215 by the one or more processors 214.

[0110] Although the embodiments of the present disclosure have been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the present disclosure.

Claims

WHAT IS CLAIMED IS:

1. A submodule (120) for a modular (102) comprising: a bridge cell (220) including an energy storage capacitor and a first bridge pair of power switches (224, 224’) connected in parallel with the energy storage capacitor (222); and an active power decoupling module (140) comprising first and second terminals (150, 152), a second bridge pair (169) of power switches (170, 170’) connected between the first and second terminals and in parallel with the energy storage capacitor, and an inductor (166) connected in series with a power decoupling capacitor (168) to a junction between the power switches of the second bridge pair of power switches.

2. The submodule according to claim 1, wherein: the inductor and the power decoupling capacitor are connected in series between the junction and the second terminal; and the submodule includes: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected to a negative terminal of the energy storage capacitor.

3. The submodule according to claim 2, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

4. The submodule according to claim 1, further comprising: a fault current control module (FCC) comprising a third bridge pair of power switches connected in parallel with the power decoupling capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches.

5. The submodule according to claim 4, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

6. The submodule according to claim 1, furthera third bridge pair of power switches between a junction between the inductor and the power decoupling capacitor and a negative terminal of the energy storage capacitor; a fourth bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches, wherein the inductor and the power decoupling capacitor are connected in series between the junction between the power switches of the fourth bridge pair of power switches.

7. The submodule according to claim 6, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

8. The submodule according to claim 1, wherein the bridge cell includes: a third bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal at a junction between the power switches of the first bridge pair of power switches; and a second output terminal at a junction between the power switches of the third pair of power switches.

9. The submodule according to claim 8, further comprising a bypass module comprising a bidirectional semiconductor switch connected between the first and second output terminals and in parallel with the first and third bridge pairs of power switches.

10. The submodule according to claim 9, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

11. The submodule according to claim 1, wherein:the inductor and the power capacitor are connected in series between thejunction and the second and the submodule includes: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; a bypass module comprising a bidirectional semiconductor switch connected between the second terminal and a second output terminal; and a fault current correction module (FCCM) connected in parallel with the bypass module through first and second FCCM terminals and configured to maintain a positive or negative voltage across the first and second FCCM terminals during a fault mode of operation.

12. The submodule according to claim 11, wherein the FCCM comprises: a primary energy storage capacitor connected between the first and second FCCM terminals; a first secondary energy storage capacitor connected between the first FCCM terminal and an upper leg; a second secondary energy storage capacitor connected between the second FCCM terminal and a lower leg; a first power switch connected between the upper leg and a first node; a second power switch connected between the lower leg and a second node; third and fourth power switches connected in series between the first and second nodes; and a transformer having a first winding connected in series with the first FCCM terminal and the first node, and a second winding connected in series with the second FCCM terminal and the second node.

13. A power converter system comprising: modular multilevel converter (102) comprising: a plurality of leg units (112), each leg unit connected in parallel between positive and negative DC terminals (126, 128) and including an upper arm (116) anda lower arm (118) connected in series and being connected to an AC line(132) corresponding a of an AC power system (104); and each upper arm and lower arm including at least one submodule (120) comprising: a bridge cell (220) including an energy storage capacitor (222) and a first bridge pair of power switches (224, 224’) connected in parallel with the energy storage capacitor; and an active power decoupling module (140) comprising first and second terminals (150, 152), a second bridge pair (169) of power switches (170, 170’) connected between the first and second terminals and in parallel with the energy storage capacitor, and an inductor (166) connected in series with a power decoupling capacitor (168) to a junction between the power switches of the second bridge pair of power switches; and a controller (110) configured to control the power switches of the submodules to perform power conversion between the positive and negative DC terminals and the AC lines.

14. The system according to claim 13, wherein: the inductor and the power decoupling capacitor are connected in series between the junction and the second terminal; and each submodule includes: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected to a negative terminal of the energy storage capacitor.

15. The system according to claim 14, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

16. The system according to claim 13, wherein each submodule comprises: a fault current control module comprising a third bridge pair of power switches connected in parallel with the power decoupling capacitor;a first output terminal connected at a between the power switches of the first bridgepair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches.

17. The system according to claim 16, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

18. The system according to claim 13, wherein each submodule comprises: a third bridge pair of power switches connected between a junction between the inductor and the power decoupling capacitor and a negative terminal of the energy storage capacitor; a fourth bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; and a second output terminal connected at a junction between the power switches of the third bridge pair of power switches, wherein the inductor and the power decoupling capacitor are connected in series between the junction between the power switches of the fourth bridge pair of power switches.

19. The system according to claim 18, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

20. The system according to claim 13, wherein the bridge cell of each submodule comprises: a third bridge pair of power switches connected in parallel with the energy storage capacitor; a first output terminal at a junction between the power switches of the first bridge pair of power switches; and a second output terminal at a junction between the power switches of the third pair of power switches.

21. The system according to claim 20, wherein each submodule comprises a bypass modulecomprising a bidirectional semiconductor connected between the first and second output terminals and in parallel with the first and third bridge pairs of power switches.

22. The system according to claim 21, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

23. The system according to claim 13 wherein: the inductor and the power decoupling capacitor of each submodule are connected in series between the junction and the second terminal; and each submodule comprises: a first output terminal connected at a junction between the power switches of the first bridge pair of power switches; a bypass module comprising a bidirectional semiconductor switch connected between the second terminal and a second output terminal; and a fault current correction module (FCCM) connected in parallel with the bypass module through first and second FCCM terminals and configured to maintain a positive or negative voltage across the first and second FCCM terminals during a fault mode of operation.

24. The system according to claim 23, wherein each FCCM comprises: a primary energy storage capacitor connected between the first and second FCCM terminals; a first secondary energy storage capacitor connected between the first FCCM terminal and an upper leg; a second secondary energy storage capacitor connected between the second FCCM terminal and a lower leg; a first power switch connected between the upper leg and a first node; a second power switch connected between the lower leg and a second node; third and fourth power switches connected in series between the first and second nodes; anda transformer having a first winding connected in series with the first FCCM terminal and the first node, and a second winding connected in series with the second FCCM terminal and the second node.

25. A submodule (120) for a modular multilevel converter (102) comprising: a full-bridge cell (220B) comprising: an energy storage capacitor (222); a first bridge pair (240) of power switches (224A, 224A’) connected in parallel with the energy storage capacitor; a second bridge pair (242) of power switches (224B, 224B’) connected in parallel with the energy storage capacitor; a first output terminal (122) connected between the power switches of the first bridge pair of power switches; and a second output terminal (124) connected between the power switches of the second bridge pair of power switches; and a bypass module (142) comprising a bidirectional semiconductor switch (180) connected between the first and second output terminals and in parallel with the full-bridge cell.

26. The submodule according to claim 25, wherein each power switch comprises a semiconductor switching element connected in antiparallel with a diode.

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