Optical module

Abstract

The present disclosure provides an optical module, comprising a circuit board; and a hybrid integrated optical chip electrically connected to the circuit board and configured to modulate and generate an optical signal. The hybrid integrated optical chip comprises: a Si-based platform provided with a substrate layer, a cladding layer located on the substrate layer and a Si waveguide layer located between the substrate layer and the cladding layer, a first heating part and a second heating part being separately embedded in the cladding layer; a InP light-emitting area arranged on the Si-based platform, a plurality of lasers being arranged side by side in the InP light-emitting area; and a InP modulation area arranged on the Si-based platform and arranged on a light exit path of the InP light-emitting area to receive light output by the lasers. A plurality of InP modulators are arranged side by side in the InP modulation area, and the InP modulators are linear electro-optic modulators; the InP modulators are correspondingly connected to the lasers; the InP modulators is each provided with a first modulation waveguide and a second modulation waveguide, the first modulation waveguide and the second modulation waveguide are in optical coupling connection to each laser to receive light output by the lasers and perform signal modulation so as to generate an optical signal.

Description

optical modules

[0001] This application claims the priority of application number 202410308800.3 filed with the China Patent Office on March 18, 2024; the priority of application number 202410308726.5 filed with the China Patent Office on March 18, 2024; the priority of application number 202410308715.7 filed with the China Patent Office on March 18, 2024; the priority of application number 202410702563.9 filed with the China Patent Office on May 31, 2024; and the priority of application number 202421234608.6 filed with the China Patent Office on May 31, 2024; all of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of optical communication technology, and in particular to an optical module. Background Art

[0003] With the development of new services and applications such as cloud computing, mobile internet, and video, advances in optical communication technology are becoming increasingly important. As a key component in optical communication equipment, optical modules enable photoelectric signal conversion. As optical communication technology evolves, the data transmission rate of these modules continues to increase.

[0004] Summary of the Invention

[0005] An embodiment of the present disclosure provides an optical module, including:

[0006] circuit boards;

[0007] A hybrid integrated optical chip is electrically connected to the circuit board, the hybrid integrated optical chip is configured to modulate and generate an optical signal, and the hybrid integrated optical chip includes:

[0008] The Si-based platform comprises a substrate layer, a cladding layer located above the substrate layer, and a Si waveguide layer located between the substrate layer and the cladding layer; a first heating portion and a second heating portion are embedded in the cladding layer;

[0009] An InP light-emitting region is provided on the Si-based platform, wherein a plurality of lasers are arranged side by side in the InP light-emitting region; the lasers include an active quantum well layer and a grating layer; the active quantum well layer is configured to output light; the grating layer is provided on the surface of the Si waveguide layer, and the grating layer is configured to select the wavelength of the light output by the active quantum well layer;

[0010] An InP modulation region is provided on the Si-based platform and on the light output path of the InP light-emitting region to receive the light output by the laser; a plurality of InP modulators are arranged side by side in the InP modulation region, and the InP modulators are linear electro-optical modulators; the InP modulators are connected to the lasers accordingly; the InP modulators respectively include a first modulation waveguide and a second modulation waveguide, and the first modulation waveguide and the second modulation waveguide are respectively optically coupled to the laser to receive the light output by the laser and perform signal modulation to generate an optical signal;

[0011] The first modulation waveguide is arranged adjacent to the first heating part so that the temperature of the first modulation waveguide is adjusted by the first heating part; the second modulation waveguide is arranged adjacent to the second heating part so that the temperature of the second modulation waveguide is adjusted by the second heating part. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] FIG1 is a partial architecture diagram of an optical communication system provided according to some embodiments of the present disclosure;

[0014] FIG2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure;

[0015] FIG3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure;

[0016] FIG4 is an exploded view of an optical module according to some embodiments of the present disclosure;

[0017] FIG5 is a schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure;

[0018] FIG6 is a schematic diagram of an optical signal modulation principle of a hybrid integrated optical chip provided according to some embodiments of the present disclosure;

[0019] FIG7 is a schematic diagram of the internal structure of a hybrid integrated optical chip provided according to some embodiments of the present disclosure;

[0020] FIG8 is a structural diagram of a Si-based platform in a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0021] FIG9 is a first schematic diagram of a connection between a Si-based platform and an InP modulator according to some embodiments of the present disclosure;

[0022] FIG10 is a schematic diagram of optical transmission of a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0023] FIG11 is a second schematic diagram of a connection between a Si-based platform and an InP modulator according to some embodiments of the present disclosure;

[0024] FIG12 is a third schematic diagram of a connection between a Si-based platform and an InP modulator according to some embodiments of the present disclosure;

[0025] FIG13 is a schematic diagram of a top view of a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0026] FIG14 is a schematic diagram of a preparation process of a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0027] FIG15 is a structural diagram 1 of a hybrid integrated optical chip provided according to some embodiments of the present disclosure;

[0028] FIG16 is a second structural diagram of a hybrid integrated optical chip provided according to some embodiments of the present disclosure;

[0029] FIG17 is a partial cross-sectional structural diagram of a hybrid integrated optical chip provided according to some embodiments of the present disclosure;

[0030] FIG18 is a schematic diagram of optical transmission of a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0031] FIG19 is a schematic diagram of external electrical connections of a hybrid integrated optical chip according to some embodiments of the present disclosure;

[0032] FIG20 is a schematic diagram of the internal structure of an optical chip provided according to some embodiments of the present disclosure;

[0033] FIG21 is a top view of a light modulator according to some embodiments of the present disclosure;

[0034] FIG22 is a structural diagram of a silicon waveguide provided according to some embodiments of the present disclosure;

[0035] FIG23 is a perspective structural diagram of an optical modulator provided according to some embodiments of the present disclosure;

[0036] FIG24 is a cross-sectional structural diagram of an optical modulator provided according to some embodiments of the present disclosure;

[0037] FIG25 is a second top view of a light modulator according to some embodiments of the present disclosure;

[0038] FIG26 is a first layered structure diagram of an optical modulator according to some embodiments of the present disclosure;

[0039] FIG27 is a second layered structure diagram of an optical modulator provided according to some embodiments of the present disclosure;

[0040] FIG28 is a schematic diagram of an optical path of an optical modulator according to some embodiments of the present disclosure;

[0041] FIG29 is a schematic diagram of a gradual change of a silicon waveguide according to some embodiments of the present disclosure;

[0042] FIG30 is a structural diagram of an N-type InP layer provided according to some embodiments of the present disclosure;

[0043] FIG31 is a structural diagram of a quantum well layer provided according to some embodiments of the present disclosure;

[0044] FIG32 is a structural diagram of a P-type InP layer provided according to some embodiments of the present disclosure;

[0045] FIG33 is a schematic diagram of the structure of a modulator integrated within an optical chip according to some embodiments of the present disclosure;

[0046] FIG34 is a schematic diagram of a cross-sectional structure of a laser according to some embodiments of the present disclosure;

[0047] FIG35 is a partial schematic diagram of a laser according to some embodiments of the present disclosure;

[0048] FIG36 is a schematic diagram of a structure of an integrated heater inside an optical modulator according to some embodiments of the present disclosure;

[0049] FIG37 is a schematic diagram of the layout of a hybrid InP / Si optical chip according to some embodiments;

[0050] FIG38 is a partial schematic diagram of a hybrid InP / Si optical chip according to some embodiments;

[0051] FIG39 is a first cross-sectional view of a hybrid InP / Si optical chip according to some embodiments;

[0052] FIG40 is a graph showing the relationship between quantum well absorption coefficient and wavelength according to some embodiments;

[0053] FIG41 shows the width of the depletion region of a PIN junction when the reverse bias voltage is 0V according to some embodiments;

[0054] FIG42 shows the width of the depletion region of a PIN junction when the reverse bias voltage is -3V according to some embodiments;

[0055] FIG43 is a second cross-sectional view of a hybrid InP / Si optical chip according to some embodiments;

[0056] FIG44 is a third cross-sectional view of a hybrid InP / Si optical chip according to some embodiments;

[0057] FIG45 is a top view of a first silicon-coupled waveguide layer provided in accordance with some embodiments;

[0058] FIG46 is a top view of a second silicon-coupled waveguide layer according to some embodiments;

[0059] FIG47 is a top view of a quantum well coupled waveguide layer according to some embodiments;

[0060] FIG48 is a top view of a p-InP coupled waveguide layer according to some embodiments;

[0061] FIG49 is an overlapping diagram of a first silicon coupling waveguide layer, a second silicon coupling waveguide layer, a quantum coupling waveguide layer, and a p-InP coupling waveguide layer according to some embodiments;

[0062] FIG50 is a combined diagram of a first silicon coupling waveguide layer, a second silicon coupling waveguide layer, a quantum coupling waveguide layer, and a p-InP coupling waveguide layer according to some embodiments;

[0063] FIG51 is a diagram illustrating light distribution in an optical coupler according to some embodiments;

[0064] FIG52 is a diagram showing FDTD simulation results of an optical coupler according to some embodiments;

[0065] FIG53 is a schematic diagram illustrating the growth of an optical coupler according to some embodiments. DETAILED DESCRIPTION

[0066] Some embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. However, the embodiments described are only some of the embodiments of the present disclosure, not all of them. All other embodiments obtained by those of ordinary skill in the art based on the embodiments provided in the present disclosure are within the scope of protection of the present disclosure.

[0067] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as open and inclusive, that is, "including, but not limited to"; the terms "first" and "second" are not to be understood as indicating or implying relative importance or indicating an upper limit on quantity; the term "plurality" means two or more; the term "connected" is to be understood in a broad sense, for example, "connected" can be a fixed connection, a detachable connection, or an integral connection, and can be directly connected or indirectly connected through an intermediate medium; the use of the terms "suitable for" or "configured to" means open and inclusive language, which does not exclude equipment that is suitable for or configured to perform additional tasks or steps; terms such as "parallel", "perpendicular", "same", "consistent", "level" and so on are not limited to absolute mathematical theoretical relationships, but also include acceptable error ranges generated in practice, and also include differences based on the same design concept but due to manufacturing reasons.

[0068] In optical communication technology, to establish information transmission between information processing devices, it is necessary to load the information onto light and use the propagation of light to achieve information transmission. Here, the light loaded with information is an optical signal. When transmitting optical signals within information transmission equipment, they can reduce optical power loss, thereby enabling high-speed, long-distance, and low-cost information transmission. The signals that information processing equipment can recognize and process are electrical signals. Information processing equipment typically includes optical network units (ONUs), gateways, routers, switches, mobile phones, computers, servers, tablets, televisions, etc., and information transmission equipment typically includes optical fibers and optical waveguides.

[0069] Optical modules can convert optical signals into electrical signals between information processing devices and information transmission devices. For example, at least one of the optical signal input or output ends of an optical module is connected to an optical fiber, and at least one of the electrical signal input or output ends of the optical module is connected to an optical network terminal. A first optical signal from the optical fiber is transmitted to the optical module, which converts the first optical signal into a first electrical signal and transmits the first electrical signal to the optical network terminal. A second electrical signal from the optical network terminal is transmitted to the optical module, which converts the second electrical signal into a second optical signal and transmits the second optical signal to the optical fiber. Because multiple information processing devices can transmit information via electrical signals, at least one of the multiple information processing devices needs to be directly connected to the optical module, rather than all of them. Here, the information processing device directly connected to the optical module is referred to as the optical module's host computer. Furthermore, the optical signal input or output end of the optical module can be referred to as an optical port, and the electrical signal input or output end of the optical module can be referred to as an electrical port.

[0070] FIG1 is a partial structural diagram of an optical communication system according to some embodiments. As shown in FIG1 , the optical communication system mainly includes a remote information processing device 1000 , a local information processing device 2000 , a host computer 100 , an optical module 200 , an optical fiber 101 , and a network cable 103 .

[0071] One end of optical fiber 101 extends toward remote information processing device 1000, and the other end of optical fiber 101 is connected to optical module 200 through the optical port of optical module 200. Optical signals can be totally reflected in optical fiber 101, and the propagation of the optical signal in the direction of total reflection can almost maintain the original optical power. The optical signal undergoes multiple total reflections in optical fiber 101 to transmit the optical signal from remote information processing device 1000 to optical module 200, and vice versa, thereby achieving long-distance, low-power information transmission.

[0072] The optical communication system may include one or more optical fibers 101, and the optical fibers 101 may be detachably connected or fixedly connected to the optical module 200. The host computer 100 is configured to provide data signals to the optical module 200, receive data signals from the optical module 200, or monitor or control the operating status of the optical module 200.

[0073] The host computer 100 includes a substantially rectangular housing and an optical module interface 102 disposed on the housing. The optical module interface 102 is configured to connect to the optical module 200 to establish a unidirectional or bidirectional electrical signal connection between the host computer 100 and the optical module 200.

[0074] The host computer 100 also includes an external electrical interface that can access an electrical signal network. For example, the external electrical interface includes a Universal Serial Bus (USB) interface or a network cable interface 104. The network cable interface 104 is configured to access a network cable 103 so that the host computer 100 establishes a unidirectional or bidirectional electrical signal connection with the network cable 103. One end of the network cable 103 is connected to the local information processing device 2000, and the other end of the network cable 103 is connected to the host computer 100, so that an electrical signal connection is established between the local information processing device 2000 and the host computer 100 via the network cable 103. For example, a third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 via the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. The second electrical signal from the host computer 100 is transmitted to the optical module 200. The optical module 200 converts the second electrical signal into a second optical signal and transmits the second optical signal to the optical fiber 101. The second optical signal is then transmitted to the remote information processing device 1000 via the optical fiber 101. For example, a first optical signal from the remote information processing device 1000 propagates through the optical fiber 101. The first optical signal from the optical fiber 101 is transmitted to the optical module 200. The optical module 200 converts the first optical signal into a first electrical signal. The optical module 200 transmits the first electrical signal to the host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal and transmits the fourth electrical signal to the local information processing device 2000. It should be noted that optical modules are tools for converting optical signals into electrical signals. During this conversion process, the information does not change, but the encoding and decoding methods of the information can change.

[0075] In addition to the optical network terminal, the host computer 100 also includes an optical line terminal (OLT), an optical network device (ONT), or a data center server.

[0076] Figure 2 is a partial structural diagram of a host computer according to some embodiments. To clearly illustrate the connection between the optical module 200 and the host computer 100, Figure 2 only shows the structure of the host computer 100 related to the optical module 200. As shown in Figure 2, the host computer 100 also includes a PCB circuit board 105 disposed within the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector disposed within the cage 106. The electrical connector is configured to connect to the electrical port of the optical module 200; the heat sink 107 has raised structures such as fins to increase the heat dissipation area.

[0077] The optical module 200 is inserted into the cage 106 of the host computer 100. The cage 106 secures the optical module 200. Heat generated by the optical module 200 is transferred to the cage 106 and then dissipated through the heat sink 107. After the optical module 200 is inserted into the cage 106, the electrical port of the optical module 200 connects with the electrical connector inside the cage 106, thereby establishing a bidirectional electrical signal connection between the optical module 200 and the host computer 100. Furthermore, the optical port of the optical module 200 connects to the optical fiber 101, thereby establishing a bidirectional optical signal connection between the optical module 200 and the optical fiber 101.

[0078] FIG3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure, and FIG4 is an exploded view of an optical module provided according to some embodiments of the present disclosure. As shown in FIG3 and FIG4, the optical module 200 includes a housing (shell), a circuit board 300 disposed within the housing, an optical chip 400, and a light source 500. Exemplarily, the optical chip 400 and the light source 500 are electrically connected to the circuit board 300, respectively, and the light output end of the light source 500 is optically coupled to the optical chip 400. In some embodiments, the light output end of the light source 500 is connected to the optical chip 400 via an optical fiber coupling.

[0079] The housing includes an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing having two openings 204 and 205 . The outer contour of the housing is generally a square.

[0080] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicular to the base plate 2021; the upper shell 201 includes a cover plate 2011, and the cover plate 2011 covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.

[0081] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicularly to the base plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and arranged perpendicularly to the cover plate 2011. The two upper side plates are combined with the two lower side plates 2022 to achieve the upper shell 201 covering the lower shell 202.

[0082] The direction of the line connecting the two openings 204 and 205 can be consistent with the length direction of the optical module 200, or it can be inconsistent with the length direction of the optical module 200. For example, opening 204 is located at the end of the optical module 200 (the left end in Figure 3), and opening 205 is also located at the end of the optical module 200 (the right end in Figure 3). Alternatively, opening 204 is located at the end of the optical module 200, while opening 205 is located on the side of the optical module 200. Opening 204 is an electrical port, and the gold finger 301 of the circuit board 300 extends from opening 204 and is inserted into the electrical connector of the host computer 100. Opening 205 is an optical port, configured to receive an external optical fiber 101, so that the optical fiber 101 can connect to the optical chip 400 in the optical module 200.

[0083] The combined assembly of upper and lower housings 201 and 202 facilitates the installation of the circuit board 300, optical modulation chip, and light source within the housing. These components are encapsulated and protected by the upper and lower housings 201 and 202. Furthermore, during assembly of the circuit board 300, optical chip 400, and light source, positioning components, heat dissipation components, and electromagnetic shielding components are easily positioned, facilitating automated production.

[0084] In some embodiments, the upper shell 201 and the lower shell 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.

[0085] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to achieve a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.

[0086] For example, the unlocking component 600 is located on the outside of the two lower side panels 2022 of the lower housing 202 and includes a snap-fit ​​component that mates with the cage 106 of the host computer 100. When the optical module 200 is inserted into the cage 106, the snap-fit ​​component of the unlocking component 600 secures the optical module 200 in the cage 106. When the unlocking component 600 is pulled, the snap-fit ​​component of the unlocking component 600 moves accordingly, thereby changing the connection between the snap-fit ​​component and the host computer, thereby releasing the optical module 200 from the cage 106 and allowing the optical module 200 to be removed from the cage 106.

[0087] The circuit board 300 includes circuit traces, electronic components, and chips. The electronic components and chips are connected according to the circuit design through the circuit traces to achieve functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include, for example, microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers (LAs), clock and data recovery chips (CDRs), power management chips, and digital signal processing (DSP) chips.

[0088] The circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board can also be inserted into the electrical connector in the cage 106 of the host computer 100.

[0089] The circuit board 300 also includes a gold finger 301 formed on its end surface, and the gold finger 301 is composed of a plurality of independent pins. The circuit board 300 is inserted into the cage 106, and the gold finger 301 is connected to the electrical connector in the cage 106. The gold finger 301 can be set only on the surface of one side of the circuit board 300 (for example, the upper surface shown in Figure 4), or it can be set on the upper and lower surfaces of the circuit board 300 to provide a larger number of pins, thereby adapting to occasions where a large number of pins are required. The gold finger 301 is configured to establish an electrical connection with the host computer to achieve power supply, grounding, two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission, data signal transmission, etc. Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement rigid circuit boards.

[0090] Figure 5 is a schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure. As shown in Figure 5, in some embodiments, a light source 500 is disposed on the side of the optical chip 400. Light from the light source 500 is emitted from the side and coupled into the optical chip 400. The light source 500 serves as an external light source for the optical chip 400, and the light emitted by the light source 500 enters the optical chip 400. The light source 500 can optionally be a laser box, which encapsulates a laser. The laser generates a laser beam, and the light source 500 is used to transmit laser light to the optical chip 400. Lasers, due to their excellent single-wavelength characteristics and wavelength tuning properties, are the preferred light source for optical modules and even optical fiber transmission. Other types of light, such as LEDs, are generally not used in common optical communication systems. Even if such light sources are used in specific optical communication systems, their light source characteristics and chip components differ significantly from those of lasers. This results in significant technical differences between optical modules using lasers and those using other light sources. Those skilled in the art generally do not consider these two types of optical modules to be technically instructive for each other.

[0091] The light emitted by the light source 500 is light that does not carry data and enters the optical chip 400. The optical chip 400 performs phase modulation on it to load the electrical signal into the light to obtain light that carries data, that is, to generate an optical transmission signal, thereby realizing the transmission of the optical signal.

[0092] In some embodiments, the optical chip 400 is a silicon photonic chip, that is, the optical chip 400 is formed by packaging silicon materials. The silicon photonic chip includes a Mach-Zehnder Modulator (MZM), and the MZ modulator has a silicon photonic phase modulator integrated inside it, which is used to realize the modulation and demodulation of optical signals. Since silicon photonic chips are easy to etch, other functional devices such as splitters, combiners, mixers, photodetectors, etc. can be integrated inside them to realize more functions. As an indirect bandgap semiconductor material, silicon does not have a linear electro-optical effect, but only a weak second-order electro-optical effect, which results in a low modulation rate of the silicon photonic chip.

[0093] FIG6 is a schematic diagram of an optical signal modulation principle of a hybrid integrated optical chip according to some embodiments of the present disclosure. As shown in FIG6 , an optical chip 400 is optically connected to a light source 500 .

[0094] The optical chip 400 can be a monolithic integrated optical chip, for example, a silicon photonic chip. Since the surface of the silicon photonic chip is easy to etch, other functional devices such as splitters, combiners, mixers, photodetectors, etc. can be integrated inside it to achieve more functions. A silicon-based optical modulator is integrated inside the silicon photonic chip. The silicon-based optical modulator uses the plasma dispersion effect of silicon material to achieve control of the light field, thereby achieving optical signal modulation. However, the basic characteristics of silicon material lead to defects in the implementation of optical modulators, such as low modulation efficiency, large capacitance, limited bandwidth, and large optical loss.

[0095] The optical chip 400 can be a hybrid integrated optical chip. A hybrid integrated optical chip refers to an optical chip in which the optical modulator growth platform is different from the growth platform of other functional devices, such as a splitter, a combiner, a mixer, a photodetector, etc. For example, since silicon-based platforms are easy to etch, the growth platforms of the splitter, the combiner, the mixer, the photodetector, etc. adopt a silicon-based platform. The optical modulator integrated inside the hybrid integrated optical chip is a non-silicon-based optical modulator. Non-silicon-based optical modulators, such as InP-based optical modulators. InP-based optical modulators perform optical signal modulation based on the quantum well-confined Stark effect. By controlling the change of the external electric field, the carriers are changed to achieve a change in the refractive index, thereby achieving optical signal modulation.

[0096] It is understandable that when the optical chip 400 is a hybrid integrated optical chip, the non-silicon-based optical modulator can also be a thin-film lithium niobate-based optical modulator, etc. The lithium niobate material has a strong electro-optical effect, and its refractive index changes linearly with the external driving voltage. This allows the light waves transmitted in the medium to have controllable intensity, phase and other information. Therefore, thin-film lithium niobate can be selected as the material for the optical modulator to achieve a higher modulation rate, etc. The thin-film lithium niobate material is relatively hard and difficult to etch, making it difficult to integrate multiple functional devices on its surface. At the same time, the optical loss of the thin-film lithium niobate chip is low.

[0097] Specifically, the hybrid integrated optical chip can be a III-V / Si hybrid integrated optical chip. In the III-V / Si hybrid integrated optical chip, the growth material system of the optical modulator is a III-V semiconductor material. III-V is a direct bandgap semiconductor material with a strong quantum well-confined Stark effect. By controlling the change of the external electric field, the carrier changes and thus the refractive index change are caused to achieve optical signal modulation. The growth material system of the optical splitter, optical combiner, mixer, optical detector, etc. is a Si-based material. In some embodiments, the III-V / Si hybrid integrated optical chip can be an InP / Si hybrid integrated optical chip.

[0098] The following embodiments are illustrative in that the optical chip 400 is an InP / Si hybrid integrated optical chip.

[0099] In InP / Si hybrid integrated optical chips, because Si is an indirect bandgap semiconductor material, its luminous efficiency is extremely low. The light source of the aforementioned InP / Si hybrid integrated optical chip can be either an external light source or an internal integrated light source. Group III-V semiconductors are direct bandgap semiconductor materials with strong gain characteristics, and therefore have excellent luminescence properties, such as InP lasers. Therefore, an InP laser is integrated within the InP / Si hybrid integrated optical chip.

[0100] In the present disclosure, an example is given in which the optical chip 400 is a hybrid integrated optical chip, and the non-silicon-based optical modulator integrated inside the optical chip 400 is an InP-based optical modulator.

[0101] The optical chip 400 may include a Si-based platform 410. A beam splitter, a beam combiner, a mixer, a photodetector, etc. may be formed on the surface of the Si-based platform 410. The Si-based platform 410 is grown from Si material.

[0102] The optical chip 400 may include an InP modulation region 420. The InP modulation region 420 is grown from an InP material and has an InP modulator disposed therein.

[0103] The InP modulation region 420 is located in the Si-based platform 410 , so that the Si-based platform 410 wraps the InP modulation region 420 in front, back, left, right, and bottom directions.

[0104] The laser generated by the light source 500 is coupled into the optical chip 400. The laser is divided into a first light beam and a second light beam by an integrated optical splitter inside the optical chip 400. The first light beam serves as the light source of the optical emission signal and is transmitted to the InP modulation area 420 for optical signal modulation. In some embodiments, the first light beam is divided into two beams of light with different polarization directions, such as TE polarized light and TM polarized light, by a polarization beam splitter. The InP modulation area 420 performs signal modulation on the TE polarized light and the TM polarized light, respectively, to generate a first modulated light signal and a second modulated light signal, respectively. The first modulated light signal and the second modulated light signal are combined by the optical combiner 440 to generate an optical emission signal. The optical emission signal is coupled out of the optical chip 400 to the outside. The second light beam is coupled to the optical demodulation unit 470 as local oscillator light. The external optical signal is also coupled to the optical demodulation unit 470. The second light beam and the external optical signal are coherently demodulated in the optical demodulation unit 470 to demodulate the corresponding electrical signal.

[0105] In some embodiments, the InP modulators provided in the InP modulation region 420 include a first InP modulator 421 , a second InP modulator 422 , a third InP modulator 423 , and a fourth InP modulator 424 .

[0106] The first InP modulator 421, the second InP modulator 422, the third InP modulator 423, and the fourth InP modulator 424 are arranged side by side in the InP modulation area 420. Based on the characteristics of InP, each InP modulator has a high modulation efficiency and modulation rate.

[0107] The first light beam is split by the polarization beam splitter into two beams of light with different polarization directions, such as TE polarized light and TM polarized light. The first InP modulator 421 and the second InP modulator 422 perform I modulation and Q modulation on the TE polarized light, respectively, thereby performing IQ high-order modulation on the TE polarized light to generate a first modulated light signal. The third InP modulator 423 and the fourth InP modulator 424 perform I modulation and Q modulation on the TM polarized light, respectively, thereby performing IQ high-order modulation on the TE polarized light to generate a second modulated light signal. The first modulated light signal and the second modulated light signal are combined by the light combiner 440 to generate a light emission signal. Of course, the first InP modulator 421 and the second InP modulator 422 may also perform I modulation and Q modulation on the TM polarized light, respectively; and the third InP modulator 423 and the fourth InP modulator 424 may respectively perform I modulation and Q modulation on the TE polarized light, without specific limitation.

[0108] In the present disclosure, the optical chip 400 is a hybrid integrated optical chip, which realizes the hybrid integration of Si materials and InP materials, so as to utilize InP materials to provide high-speed modulation and Si materials to provide highly integrated silicon optical circuits, so that the optical chip 400 can have the high-speed modulation characteristics of InP materials, so that the optical chip 400 can meet the needs of high baud rate modulation and give full play to the characteristics of Si materials and InP materials.

[0109] In some embodiments, a TEC (Thermoelectric cooler) is used to temperature-regulate the hybrid integrated optical chip to maintain its operating temperature within a certain range. However, temperature control using a TEC consumes significant power. In the present disclosure, based on the fact that the InP modulator is more sensitive to temperature than Si-based materials, the temperature of the optical chip is controlled locally, namely, on the InP modulator, rather than on the entire chip. This allows the optical chip to operate within a certain temperature range while reducing power consumption.

[0110] In some embodiments, a hybrid integrated optical chip is formed by bonding an InP modulation region 420 formed of an InP material to a Si-based platform 410 formed of a Si material, and then processing the InP modulation region 420 after bonding to form various InP modulators, and forming silicon optical circuits on the Si-based platform after bonding. However, there is a large mismatch in thermal expansion coefficients between the InP modulation region 420 and the Si-based platform 410 formed of Si material. For example, the thermal expansion coefficient of the InP material is greater than the thermal expansion coefficient of Si, which leads to problems such as large interfacial thermal stress when the two are bonded. The thermal stress can cause defects and dislocations to appear when the two are bonded, and even large thermal stress can cause the InP modulation region 420 to fail to bond to the Si-based platform 410. In the present disclosure, by regulating the temperature of the InP modulator, the thermal stress when the InP modulation region is bonded to the Si-based platform can be reduced, thereby improving the reliability and modulation rate of the InP modulator, and meeting the requirements of high-speed optical modules.

[0111] In the present disclosure, a heating part is embedded inside the optical chip. Based on the fact that the sensitivity of InP material to temperature is stronger than that of Si material to temperature, the temperature of a local area of ​​the optical chip (especially the InP modulation area 420) is adjusted by the heating part, thereby achieving the purpose of temperature adjustment of the entire area of ​​the optical chip, thereby reducing power consumption.

[0112] In the present disclosure, the InP modulator in the InP modulation area 420 can be an InP-based Mach-Zehnder (MZ) modulator. Electro-absorption modulators (EAM) and electro-absorption modulated lasers (EML) utilize the quantum confined Stark effect of semiconductors to change the absorption characteristics of the device by applying an external voltage, so that its absorption of modulated light increases, thereby modulating the intensity of the output light. Different from the modulation principle of EAM and EML intensity modulation, the MZ modulator modulates the phase by changing the refractive index of the material, and then uses the constructive interference and destructive interference principle of light to indirectly achieve intensity modulation of light. The modulation principle determines the characteristics of the modulator. Compared with EAM modulators and EMLs, the MZ modulator has a higher modulation speed and can achieve longer-distance transmission, and the extinction of the MZ modulator is relatively high.

[0113] FIG7 is a schematic diagram of the internal structure of a hybrid integrated optical chip according to some embodiments of the present disclosure. As shown in FIG7 , the optical chip 400 may include a heating region 430 . The heating region 430 is surrounded by an InP modulation region 420 .

[0114] Since the InP material is more sensitive to temperature than the Si material, the Si-based platform 410 is less responsive to temperature. Therefore, in the present disclosure, the temperature of a local area of ​​the optical chip, i.e., the InP modulation area 420, is adjusted rather than the temperature of the entire optical chip, thereby enabling the entire optical chip to operate within a certain temperature range while reducing power consumption.

[0115] In the present disclosure, based on the fact that InP material is more sensitive to temperature than Si material, the temperature of a local area of ​​the optical chip is adjusted to achieve the purpose of temperature adjustment of the entire area of ​​the optical chip, thereby reducing power consumption.

[0116] The temperature of the InP modulation area 420 is adjusted by the heating area 430 instead of adjusting the temperature of the entire optical chip, so that the optical chip operates within a certain temperature range.

[0117] In some embodiments, a heating zone 430 is formed in the Si-based platform 410. The heating zone 430 includes various heating portions.

[0118] In the present disclosure, a heating unit is embedded within the Si-based platform 410, and each InP modulator is disposed within the Si-based platform 410. The heat generated by the heating unit heats the Si-based platform 410, which in turn heats each InP modulator, thereby achieving temperature regulation of the InP modulation area 420 and, in turn, the entire optical chip.

[0119] The heating unit regulates the temperature of a localized area of ​​the optical chip, the InP modulator, allowing the chip to operate within a specific temperature range using a low-power approach. This temperature regulation also reduces thermal stress during bonding between the InP modulator region and the Si-based platform, thereby improving the reliability and modulation rate of the InP modulator.

[0120] An InP modulator may include two modulation waveguides, namely a first modulation waveguide and a second modulation waveguide. The first modulation waveguide and the second modulation waveguide are InP-based modulation waveguides.

[0121] The first and second modulation waveguides form the two modulation arms of the InP modulator. By controlling the applied electric field, the phase difference between the first and second modulation waveguides can be varied. The output light intensity varies with this phase difference, meaning it is modulated by the modulating electrical signal. The modulated electrical signal is then converted into the output light intensity of the modulated optical signal, thus achieving modulation.

[0122] Correspondingly, the heating unit includes a first heating unit and a second heating unit, wherein the temperature of the first modulation waveguide is adjusted by the first heating unit and the temperature of the second modulation waveguide is adjusted by the second heating unit. The following names of the structures of the multiple InP modulators and the components of the heating zone 430 are only for the purpose of easy distinction.

[0123] The first InP modulator 421 may include a first modulation waveguide 4211 and a second modulation waveguide 4212. The second InP modulator 422 may include a third modulation waveguide 4221 and a fourth modulation waveguide 4222. The third InP modulator 423 may include a fifth modulation waveguide 4231 and a sixth modulation waveguide 4232. The fourth InP modulator 424 may include a seventh modulation waveguide 4241 and an eighth modulation waveguide 4242.

[0124] Correspondingly, the heating zone 430 includes a first heating section 4311 and a second heating section 4312. The heating zone 430 also includes a third heating section 4321 and a fourth heating section 4322. The heating zone 430 also includes a fifth heating section 4331 and a sixth heating section 4332. The heating zone 430 also includes a seventh heating section 4341 and an eighth heating section 4342.

[0125] The above-mentioned heating parts constitute a heating zone 430. The above-mentioned heating parts are all integrated into the optical chip 400, that is, the heating zone 430 is integrated into the optical chip 400.

[0126] The first heating unit 4311 is disposed adjacent to the first modulation waveguide 4211. The first heating unit 4311 regulates the temperature of the first modulation waveguide 4211, thereby regulating the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range. The second heating unit 4312 is disposed adjacent to the second modulation waveguide 4212. The second heating unit 4312 regulates the temperature of the second modulation waveguide 4212, thereby regulating the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0127] The third heating unit 4321 is disposed adjacent to the third modulation waveguide 4221. The third heating unit 4321 and the third modulation waveguide 4221 are used to regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range. The fourth heating unit 4322 is disposed adjacent to the fourth modulation waveguide 4222. The fourth heating unit 4322 and the fourth modulation waveguide 4222 are used to regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0128] The fifth heating unit 4331 is disposed adjacent to the fifth modulation waveguide 4231. Temperature regulation is achieved through the fifth heating unit 4331 and the fifth modulation waveguide 4231, thereby regulating the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range. The sixth heating unit 4332 is disposed adjacent to the sixth modulation waveguide 4232. Temperature regulation is achieved through the sixth heating unit 4332 and the sixth modulation waveguide 4232, thereby regulating the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0129] The seventh heating unit 4341 is disposed adjacent to the seventh modulation waveguide 4241. The seventh heating unit 4341 and the seventh modulation waveguide 4241 are used to regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range. The eighth heating unit 4342 is disposed adjacent to the eighth modulation waveguide 4242. The eighth heating unit 4342 and the eighth modulation waveguide 4242 are used to regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0130] Figure 8 illustrates the structure of a Si-based platform in a hybrid integrated optical chip, according to some embodiments of the present disclosure. As shown in Figure 8 , first and second heating units 4311, 4312 are located on the surface of cladding 414, while first and second modulation waveguides 4211, 4212 are embedded within cladding 414. The heat generated by first and second heating units 4311, 4312 heats cladding 414, which in turn heats first and second modulation waveguides 4211, 4212, respectively, achieving temperature regulation for the first InP modulator 421 and, consequently, the entire optical chip.

[0131] Similarly, the other heating parts also use the same temperature regulation and control principles for the InP modulator.

[0132] Illustratively, a first modulation waveguide 4211 and a second modulation waveguide 4212 are respectively disposed between the first heating unit 4311 and the second heating unit 4312. The first heating unit 4311 is disposed on one side of the first modulation waveguide 4211, and the second heating unit 4312 is disposed on one side of the second modulation waveguide 4212.

[0133] Illustratively, a third modulation waveguide 4221 and a fourth modulation waveguide 4222 are respectively disposed between the third heating portion 4321 and the fourth heating portion 4322. The third heating portion 4321 is disposed on one side of the third modulation waveguide 4221, and the fourth heating portion 4322 is disposed on one side of the fourth modulation waveguide 4222.

[0134] For example, a fifth modulation waveguide 4231 and a sixth modulation waveguide 4232 are respectively provided between the fifth heating portion 4331 and the sixth heating portion 4332. The fifth heating portion 4331 is provided on one side of the fifth modulation waveguide 4231, and the sixth heating portion 4332 is provided on one side of the sixth modulation waveguide 4232.

[0135] Illustratively, a seventh modulation waveguide 4241 and an eighth modulation waveguide 4242 are respectively disposed between the seventh heating portion 4341 and the eighth heating portion 4342. The seventh heating portion 4341 is disposed on one side of the seventh modulation waveguide 4241, and the eighth heating portion 4342 is disposed on one side of the eighth modulation waveguide 4242.

[0136] Then, the second heating unit 4312 is disposed adjacent to the third heating unit 4321. The sixth heating unit 4332 is disposed adjacent to the seventh heating unit 4341.

[0137] In this disclosure, heating elements are embedded within the Si-based platform 410. These elements regulate the temperature of a localized region of the optical chip, namely the InP modulation region 420, ensuring that the entire optical chip operates within a specific temperature range using a low-power approach. Furthermore, temperature regulation of the InP modulator reduces thermal stress during bonding between the InP modulation region and the Si-based platform, thereby improving the reliability and modulation rate of the InP modulator, meeting the requirements of high-speed optical modules.

[0138] In the present disclosure, in order to monitor the temperature of the InP modulation area 420 in real time, a temperature sensor 460 is embedded in the Si-based platform 410. The temperature of the InP modulation area 420 is collected in real time by the temperature sensor 460, so that the temperature of the InP modulation area 420 is adjusted in real time, thereby achieving closed-loop control of temperature regulation. Exemplarily, the temperature sensor 460 is located between the fourth heating section 4322 and the fifth heating section 4331. Of course, in order to improve the detection accuracy of the temperature sensor 460, the temperature sensor 460 is usually located in the middle area of ​​the multiple heating sections.

[0139] In the present disclosure, based on the fact that InP material is more sensitive to temperature than Si material, the temperature of a local area of ​​the optical chip is adjusted to achieve the purpose of temperature adjustment of the entire area of ​​the optical chip, thereby reducing power consumption.

[0140] As shown in FIG8 , Si-based platform 410 includes various layered structures. Si-based platform 410 may include a substrate layer 411. Exemplarily, substrate layer 411 is epitaxially grown using Si material. Si-based platform 410 may include an intermediate layer 412. Exemplarily, intermediate layer 412 is epitaxially grown using SiO2 material. Si-based platform 410 may include an optical waveguide layer 413. Exemplarily, optical waveguide layer 413 is a silicon waveguide layer. Silicon waveguides have low-loss transmission characteristics, so optical waveguide layer 413 is a silicon waveguide layer. Optical waveguide layer 413 is disposed between intermediate layer 412 and cladding layer 414.

[0141] In some embodiments, the optical waveguide layer 413 includes a Si input waveguide. The Si input waveguide is used to transmit light into the InP modulator. The Si input waveguide has a convex cross-section, meaning that the top of the Si input waveguide is smaller than the bottom. This configuration facilitates coupling light input through the Si input waveguide into the InP modulator.

[0142] The Si-based platform 410 may include a cladding layer 414. Exemplarily, the cladding layer 414 is formed by epitaxial growth of SiO2 material.

[0143] The substrate layer 411 , the intermediate layer 412 , the optical waveguide layer 413 , and the cladding layer 414 are arranged in order from bottom to top.

[0144] Figure 9 shows a schematic diagram of the connection between a Si-based platform and an InP modulator according to some embodiments of the present disclosure. Figure 9 shows a cross-section taken along the direction A in Figure 6, and then the cross-sectional structure corresponding to the first modulator 421 is obtained. As shown in Figure 9, an InP modulation region 420 is formed within the Si-based platform 410. InP modulation region 420 is equipped with individual InP modulators arranged side by side.

[0145] The following is an exemplary description using the first InP modulator 421 as an example.

[0146] The first InP modulator 421 is coupled to the optical waveguide layer 413. Exemplarily, the first InP modulator 421 is disposed above the optical waveguide layer 413. The optical waveguide layer 413 couples and transmits light that does not carry information into the first InP modulator 421.

[0147] The first InP modulator 421 may include a first modulation waveguide 4211 and a second modulation waveguide 4212 , respectively.

[0148] The first modulation waveguide 4211 includes, from top to bottom, a p-InP layer 4201, an active quantum well layer 4202, and an n-InP layer 4203. The p-InP layer 4201 forms a PN junction with the n-InP layer 4203. The second modulation waveguide 4212 has the same structure.

[0149] The first InP modulator 421 may include a first P-electrode metal layer 4213 and a second P-electrode metal layer 4214. The top of the first P-electrode metal layer 4213 and the top of the second P-electrode metal layer 4214 are opposite to each other with a gap therebetween.

[0150] The first P-electrode metal layer 4213 is disposed on the surface of the cladding layer 414. The second P-electrode metal layer 4214 is disposed on the surface of the cladding layer 414. The first P-electrode metal layer 4213 is electrically connected to the first modulation waveguide 4211. Exemplarily, the first P-electrode metal layer 4213 is disposed above the first modulation waveguide 4211.

[0151] The second P-electrode metal layer 4214 is electrically connected to the second modulation waveguide 4212. Exemplarily, the second P-electrode metal layer 4214 is disposed above the second modulation waveguide 4212.

[0152] The first InP modulator 421 may include a first N-electrode metal layer 4215 and a second N-electrode metal layer 4216 . For example, the first N-electrode metal layer 4215 and the second N-electrode metal layer 4216 may be disposed on surfaces of the n-InP layer 4203 .

[0153] The first P-electrode metal layer 4213 and the first N-electrode metal layer 4215 are arranged in a pair, and the two are arranged opposite to each other to form a PN junction.

[0154] The second P-electrode metal layer 4214 and the second N-electrode metal layer 4216 are arranged in a pair, and the two are arranged opposite to each other to form a PN junction.

[0155] In this disclosure, the InP modulator is an InP-based MZ modulator. An MZ modulator is a modulator based on the electro-optic effect. The electro-optic effect refers to the change in the refractive index of a material caused by an applied electric field.

[0156] Since the conductivity of the active quantum well layer 4202 is very small, the applied electric field is mostly concentrated in the active quantum well layer 4202, and light is also transmitted to the active quantum well layer 4202, thereby interacting with the transmitted optical signals.

[0157] The first P-electrode metal layer 4213 and the second P-electrode metal layer 4214 each provide P-type carriers, and the first N-electrode metal layer 4215 and the second N-electrode metal layer 4216 each provide N-type carriers. The P-type carriers are transported downward to the active quantum well layer 4202. The N-type carriers are transported upward to the active quantum well layer 4202. For example, the P-type carriers are holes, and the N-type carriers are electrons.

[0158] By utilizing the electro-optic effect of the active quantum well layer 4202 material and controlling the applied electric field to induce carrier changes, the refractive index of the active quantum well layer 4202 changes. The change in the refractive index of the active quantum well layer 4202 is proportional to the phase shift between the first modulation waveguide 4211 and the second modulation waveguide 4212. Therefore, when the refractive index of the active quantum well layer 4202 changes, the phase of the light passing through it changes, achieving modulation.

[0159] The first P-electrode metal layer 4213 and the second P-electrode metal layer 4214 are each loaded with a modulating electrical signal. By controlling the changes in the applied electric field, the carriers change, which in turn changes the refractive index of the active quantum well layer, creating a phase difference between the first modulation waveguide 4211 and the second modulation waveguide 4212. The output light intensity varies with this phase difference, meaning that the output light intensity is modulated by the modulating electrical signal. The modulated electrical signal is then converted into the output light intensity of the modulated optical signal, thus achieving modulation.

[0160] In some embodiments, the optical waveguide layer 413 includes a Si output waveguide. The modulated optical signal formed after modulation by the first modulation waveguide 4211 and the second modulation waveguide 4212 is coupled into the Si output waveguide to be transmitted through the Si output waveguide.

[0161] A gap exists between the input and output Si waveguides, with the first InP modulator positioned above the gap. The input Si waveguide transmits light upward into the first modulation waveguide 4211 and the second modulation waveguide 4212. The modulated optical signal then transmits downward into the output Si waveguide for output via the Si output waveguide.

[0162] Figure 10 is a schematic diagram of the optical transmission path of a hybrid integrated optical chip according to some embodiments of the present disclosure. Figure 10 illustrates the optical transmission path corresponding to an InP modulator. As shown in Figure 10 , the optical waveguide layer 413 includes a Si input waveguide 4131 and a Si output waveguide 4132, located at opposite ends of the InP modulation region 420.

[0163] Light from the light source is split by a beam splitter into two beams with different polarization directions. These two beams travel along the Si input waveguide 4131 into the first and second InP modulated modulation waveguides 4211 and 4212, respectively, and are then connected to their corresponding active quantum well layers. The modulated electrical signal to be loaded is then transmitted through the first and second P-electrode metal layers 4213 and 4214 to the first and second modulation waveguides 4211 and 4212, reaching their corresponding active quantum well layers.

[0164] A phase difference is generated between the first modulation waveguide 4211 and the second modulation waveguide 4212. The output light intensity varies with this phase difference, meaning it is modulated by the modulating electrical signal. The modulated electrical signal is then converted into the output light intensity of the modulated optical signal, thereby achieving modulation. The modulation generates an optical signal that is then output along the Si output waveguide 4132.

[0165] The first P-electrode metal layer 4213 on the first modulation waveguide 4211 and the second P-electrode metal layer 4214 on the second modulation waveguide 4212 form a pair of electrodes. Multiple first P-electrode metal layers 4213 are provided on the first modulation waveguide 4211, and multiple first P-electrode metal layers 4213 are provided on the second modulation waveguide 4212. Thus, multiple pairs of first P-electrode metal layers exist within a single InP modulator. Light enters and exits the InP modulation region 420 through the Si input waveguide 4131 and Si output waveguide 4132, respectively.

[0166] When light is transmitted in the InP modulation region 420 , it is transmitted and modulated through the InP-based waveguides, namely the first modulation waveguide 4211 and the second modulation waveguide 4212 .

[0167] Figure 11 is a second schematic diagram of the connection between a Si-based platform and an InP modulator, according to some embodiments of the present disclosure. Figure 11 is a cross-section taken along direction A in Figure 6, and then the cross-sectional structure corresponding to the first modulator 421 is obtained. As shown in Figure 11, the Si-based platform 410 includes, from bottom to top, a substrate layer 411, an intermediate layer 412, an optical waveguide layer 413, and a cladding layer 414.

[0168] In this disclosure, various heating units are embedded within the Si-based platform 410. This means the heating units are embedded. These units regulate the temperature of a localized region of the optical chip, the InP modulation zone 420, allowing the entire optical chip to operate within a specific temperature range using a low-power approach. Furthermore, temperature regulation of the InP modulator reduces thermal stress during bonding between the InP modulation zone and the Si-based platform, thereby improving the reliability and modulation rate of the InP modulator, meeting the requirements of high-speed optical modules.

[0169] Taking the first InP modulator 421 as an example, the first InP modulator 421 may include a first modulation waveguide 4211 and a second modulation waveguide 4212 for the following exemplary description.

[0170] The first heating unit 4311 is provided on one side of the first modulation waveguide 4211 to regulate the temperature of the first modulation waveguide 4211 through the first heating unit 4311 , thereby regulating the temperature of a local area of ​​the optical chip to maintain the entire area of ​​the optical chip within a certain temperature range.

[0171] The second heating portion 4312 is provided on one side of the second modulation waveguide 4212 to adjust the temperature of a local area of ​​the optical chip through the second heating portion 4312 and the second modulation waveguide 4212, so as to maintain the entire area of ​​the optical chip within a certain temperature range.

[0172] In some embodiments, the first heating unit 4311 and the second heating unit 4312 may be in the form of heating resistors, which heat the first modulation waveguide 4211 and the second modulation waveguide 4212 respectively.

[0173] In the present disclosure, the first heating portion 4311 and the second heating portion 4312 are embedded in the cladding 414 .

[0174] In this disclosure, metal vias are provided in the cladding 414 where the first and second heating units 4311, 4312 are located to provide power to the first and second heating units 4311, 4312. These vias connect to the power supply metal area of ​​the optical chip, thereby heating the first and second heating units 4311, 4312.

[0175] Figure 12 is a third schematic diagram of the connection between a Si-based platform and an InP modulator, according to some embodiments of the present disclosure. Figure 12 is a cross-section taken along direction A in Figure 6, and then the cross-sectional structure corresponding to the first modulator 421 is obtained. As shown in Figure 12, the Si-based platform 410 includes, from bottom to top, a substrate layer 411, an intermediate layer 412, an optical waveguide layer 413, and a cladding layer 414.

[0176] The first heating unit 4311 and the second heating unit 4312 are located on the surface of the cladding layer 414. The cladding layer 414 is epitaxially grown from SiO2, while the substrate layer 411 is epitaxially grown from Si. The thermal conductivity of Si is greater than that of SiO2, meaning that the thermal conductivity of the substrate layer 411 is greater than that of the cladding layer 414. Consequently, the heat generated by the first and second heating units 4311, 4312, is transferred downward to the substrate layer 411, reducing the temperature regulation efficiency.

[0177] A first heat insulating portion 451 is formed on one side of the first heating portion 4311 . The first heat insulating portion 451 extends downward from the cladding layer 414 to the substrate layer 411 to reduce heat conducted downward from the first heating portion 4311 to the substrate layer 411 .

[0178] A second heat insulating portion 452 is formed on one side of the second heating portion 4312 . The second heat insulating portion 452 extends downward from the cladding layer 414 to the substrate layer 411 to reduce heat conducted downward from the second heating portion 4312 to the substrate layer 411 .

[0179] In some embodiments, the first thermal isolation portion 451 and the second thermal isolation portion 452 can be in the form of a groove-like structure. The first thermal isolation portion 451 and the second thermal isolation portion 452 are obtained by hollowing out downward. The first thermal isolation portion 451 and the second thermal isolation portion 452 extend downward to the substrate layer 411. The area below the first heating portion 4311 is not hollowed out to ensure the support of the first heating portion 4311. The area below the second heating portion 4312 is not hollowed out to ensure the support of the second heating portion 4311.

[0180] The medium in the first thermal isolation part 451 and the second thermal isolation part 452 can be air, and the thermal conductivity of air is extremely small, and the thermal conductivity of air is less than the thermal conductivity of SiO2 material, and the thermal conductivity of air is less than the thermal conductivity of InP material. Then the amount of heat generated by the first heating part 4311 and the second heating part 4312 that is conducted downward is very small, and the first thermal isolation part 451 and the second thermal isolation part 452 can block the path for heat to be conducted downward. Then the heat generated by the first heating part 4311 and the second heating part 4312 can be well maintained near the first InP modulator 421, thereby improving the temperature regulation efficiency. Of course, the provision of the first thermal isolation part 451 and the second thermal isolation part 452 can also reduce the amount of heat generated by the first heating part 4311 and the second heating part 4312 that is conducted to the surrounding areas, thereby minimizing the diffusion of heat into the surrounding Si-based platform 410.

[0181] In some embodiments, the first thermal isolation portion 451 includes a first connecting groove 4511 and a second connecting groove 4512. The first connecting groove 4511 extends downward to the substrate layer 411 and partially hollows out the substrate layer 411. The second connecting groove 4512 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0182] The second thermal isolation portion 452 includes a third connecting groove 4521 and a fourth connecting groove 4522. The third connecting groove 4521 extends downward to the substrate layer 411 and partially hollows out the substrate layer 411. The fourth connecting groove 4522 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0183] Illustratively, the first connection groove 4511 is formed by etching downward, and then etching is continued and the etching range is increased to form the second connection groove 4512. Illustratively, the final shape of the first heat isolation portion 451 and the second heat isolation portion 452 can be irregular or regular.

[0184] In the present disclosure, a first thermal isolation portion 451 and a second thermal isolation portion 452 are formed in the Si-based platform 410 to block the downward conduction path of the heat generated by the first heating portion 4311 and the second heating portion 4312, thereby limiting the heat to the vicinity of the first InP modulator 421, thereby improving the temperature regulation efficiency.

[0185] For an InP modulator, the first thermal isolation portion 451 and the second thermal isolation portion 452 on either side form the thermal isolation zone of the InP modulator. The first heating portion 4311 and the second heating portion 4312 form the heating zone of the InP modulator. The distance from the first connecting groove 4511 to the first heating portion 4311 satisfies that the thermal isolation zone formed surrounds the InP modulator, with the InP modulator located between the thermal isolation zone and the heating zone. This concentrates and confines the heat generated in the heating zone around the InP modulator, preventing it from being transferred to areas outside the thermal isolation zone, thereby improving temperature regulation efficiency.

[0186] In the present disclosure, the first heating portion 4311 and the second heating portion 4312 form a heating zone of the InP modulator, and the area occupied by the heating zone is not limited. The heating zone can be within the InP modulation zone or outside the InP modulation zone.

[0187] FIG13 is a schematic diagram of a top-down structure of a hybrid integrated optical chip provided according to some embodiments of the present disclosure. The viewing angle of FIG13 may be the same as that of FIG6 . As shown in FIG13 , the first heating sections and second heating sections corresponding to the multiple InP modulators, from the topmost first heating section to the bottommost second heating section, form a heating zone 430 of the hybrid integrated optical chip. The heating zone 430 includes the heating zones corresponding to the individual InP modulators. In other words, the heating zones corresponding to the individual InP modulators constitute the heating zone 430 of the hybrid integrated optical chip.

[0188] The first thermal isolation sections 451 and second thermal isolation sections 452 corresponding to the multiple InP modulators, from the topmost first thermal isolation section 451 to the bottommost second thermal isolation section 452, form a thermal isolation region 450 of the hybrid integrated optical chip. Thermal isolation region 450 includes the thermal isolation regions corresponding to the individual InP modulators. In other words, the thermal isolation regions corresponding to the individual InP modulators constitute thermal isolation region 450 of the hybrid integrated optical chip.

[0189] The thermal isolation region 450 surrounds the InP modulation region 420 , the InP modulation region 420 surrounds the heating region 430 , and the InP modulation region 420 is located between the heating region 430 and the thermal isolation region 450 .

[0190] In the present disclosure, an InP modulation region 420, a heating region 430, and a thermal isolation region 450 are integrated within an optical chip 400. In this disclosure, the heating region 430 heats the InP modulation region 420, thereby regulating the temperature of a localized region of the optical chip. This achieves the goal of regulating the temperature of the entire optical chip, thereby reducing power consumption.

[0191] In the present disclosure, based on the fact that the InP modulator is more sensitive to temperature, while the Si material is more passive in its temperature response, the temperature of the local area of ​​the optical chip, namely the InP modulation area 420, is adjusted to achieve the purpose of temperature adjustment of the entire optical chip, thereby reducing power consumption, thereby replacing the method of temperature adjustment of the optical chip through TEC.

[0192] In the present disclosure, the heat isolation region 450 blocks the path of heat generated by the heating region 430 from being conducted to the substrate layer 411 , thereby preventing heat from being conducted toward the substrate layer 411 , thereby confining the heat around the InP modulation region 420 and improving the temperature regulation efficiency.

[0193] In the present disclosure, according to the perspective shown in FIG. 13 , the thermal isolation region 450 is used to concentrate heat between the thermal isolation region 450 and the heating region 430 , preventing heat from being conducted toward the peripheral area of ​​the thermal isolation region 450 , thereby improving temperature regulation efficiency.

[0194] Of course, in the present disclosure, the radiating area of ​​the heating zone 430 can extend to the periphery of the InP modulation zone 420 , that is, the area occupied by the heating zone 430 is larger than the area occupied by the InP modulation zone 420 . In this case, the heating zone 430 is located between the InP modulation zone 420 and the thermal isolation zone 450 .

[0195] Based on the hybrid integrated optical chip provided in the embodiments of the present disclosure, a method for preparing a hybrid integrated optical chip is also provided in the embodiments of the present disclosure. The method for preparing a hybrid integrated optical chip provided in the embodiments of the present disclosure is used to facilitate the preparation of the hybrid integrated optical chip provided in the above embodiments. Figure 14 is a schematic diagram of the preparation process of a hybrid integrated optical chip provided in accordance with some embodiments of the present disclosure. As shown in Figure 14, the method for preparing a hybrid InP / Si optical chip provided in the embodiments of the present disclosure includes:

[0196] S100: preparing a silicon platform substrate, wherein the silicon platform substrate comprises a substrate layer and an intermediate layer, wherein the intermediate layer is located above the substrate layer.

[0197] The substrate layer 411 is epitaxially grown, and the intermediate layer 412 is grown on the substrate layer 4601. The substrate layer 411 is epitaxially grown using Si material, and the intermediate layer 412 is epitaxially grown using SiO2 material.

[0198] S200: Etching to form an optical waveguide layer on the intermediate layer.

[0199] An optical waveguide layer 413 is epitaxially grown on the intermediate layer 412 , a Si waveguide pattern is formed on the optical waveguide layer 413 by masking, and an input Si waveguide and an output Si waveguide are formed by etching.

[0200] There is a gap between the input Si waveguide and the output Si waveguide, and an InP modulator is placed above the gap. The input Si waveguide is used to input light and transmit it to the InP modulator; the output Si waveguide is used to output light and transmit the light output by the InP modulator.

[0201] S300: A first SiO2 layer is formed around the etched optical waveguide layer, the first SiO2 layer fills the etched area in the optical waveguide layer, and an InP bare chip is arranged above the first SiO2 layer. The InP bare chip includes an n-InP layer, an active quantum hydrazine layer, and a p-InP layer from bottom to top.

[0202] A first SiO 2 layer is epitaxially grown so that the first SiO 2 layer wraps around the side of the optical waveguide layer 413 and the top of the optical waveguide layer 413 is exposed.

[0203] An InP bare chip is arranged above the first SiO2 layer. The InP bare chip includes an n-InP layer, a quantum hydrazine layer, and a p-InP layer from bottom to top.

[0204] An InP die is disposed on the first SiO2 layer, the InP die covers the gap between the input Si waveguide and the output Si waveguide, and the end of the input Si waveguide and the end of the output Si waveguide are located below the end of the InP die.

[0205] The InP bare chip is flipped on the first SiO2 layer so that the n-InP layer contacts the top surface of the first SiO2 layer.

[0206] S400: Etching the InP bare wafer to form a first modulation waveguide and a second modulation waveguide, and simultaneously growing a first N-electrode metal layer, a second N-electrode metal layer, a first heating portion, and a second heating portion.

[0207] The first and second modulation waveguides are formed by etching. Simultaneously, a first N-electrode metal layer 4215, a second N-electrode metal layer 4216, a first heating portion 4311, and a second heating portion 4312 are grown. The first N-electrode metal layer 4215 and the second N-electrode metal layer 4216 are disposed on either side of the n-InP layer.

[0208] S500: Filling to form a second SiO2 layer, the first SiO2 layer and the second SiO2 layer form a cladding layer; and forming a first P-electrode metal layer and a second P-electrode metal layer on the surface of the cladding layer respectively.

[0209] A second SiO2 layer is epitaxially grown so that the second SiO2 layer is included on the sides of the first modulation waveguide and the second modulation waveguide and is filled in the surrounding area. The first SiO2 layer and the second SiO2 layer form a cladding layer.

[0210] A first P-electrode metal layer and a second P-electrode metal layer are respectively formed on the surface of the cladding layer.

[0211] S600: Etching downwards on one side of the corresponding heating portion to form a corresponding heat isolation portion.

[0212] In some embodiments, the first thermal isolation portion 451 includes a first connecting groove 4511 and a second connecting groove 4512. The first connecting groove 4511 extends downward to the substrate layer 411 and partially hollows out the substrate layer 411. The second connecting groove 4512 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0213] The second thermal isolation portion 452 includes a third connecting groove 4521 and a fourth connecting groove 4522. The third connecting groove 4521 extends downward to the substrate layer 411 and partially hollows out the substrate layer 411. The fourth connecting groove 4522 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0214] Illustratively, the first connection groove 4511 is formed by etching downward, and then etching is continued and the etching range is increased to form the second connection groove 4512. Illustratively, the final shape of the first heat isolation portion 451 and the second heat isolation portion 452 can be irregular or regular.

[0215] In the present disclosure, based on the fact that the InP modulator is more sensitive to temperature than Si-based materials, the temperature of a local area of ​​the optical chip, namely the InP modulation area, is regulated, rather than the entire optical chip. This allows the optical chip to operate within a certain temperature range while reducing power consumption. For example, a first heating unit and a second heating unit are embedded on the surface of the cladding. The first modulation waveguide in the InP modulator is disposed adjacent to the first heating unit so that the temperature of the first modulation waveguide is regulated by the first heating unit; the second modulation waveguide is disposed adjacent to the second heating unit so that the temperature of the second modulation waveguide is regulated by the second heating unit.

[0216] In this disclosure, a heating element is embedded within the Si-based platform. This element regulates the temperature of a localized region of the optical chip, the InP modulation zone, allowing the optical chip to operate within a specific temperature range using a low-power approach. Furthermore, temperature regulation of the InP modulator reduces thermal stress during bonding between the InP modulation zone and the Si-based platform, thereby improving the reliability and modulation rate of the InP modulator, meeting the requirements of high-speed optical modules.

[0217] In this disclosure, an integrated heating unit is embedded within the optical chip. Taking advantage of the greater temperature sensitivity of InP materials compared to Si, the heating unit regulates the temperature of a localized area of ​​the optical chip, thereby achieving overall temperature regulation across the entire chip, thereby reducing power consumption. Furthermore, a thermal isolation unit confines heat to the InP modulation area, improving temperature regulation efficiency.

[0218] As shown in FIG5 , in some embodiments, light source 500 may be an electro-absorption modulated laser (EML). EML lasers require independent packaging space, and one EML laser corresponds to one optical channel. Therefore, EML lasers are not suitable for multi-channel transmission. Furthermore, EML lasers cannot reduce the effects of optical fiber dispersion, making them unsuitable for long-distance transmission.

[0219] In this disclosure, the lasers corresponding to each channel are integrated within a hybrid integrated optical chip to increase integration. Furthermore, each channel has a laser, which reduces local power density and thermal stress, thereby improving the reliability of the hybrid integrated optical chip and making it suitable for multi-channel transmission.

[0220] Figure 15 is a structural diagram 1 of a hybrid integrated optical chip provided according to some embodiments of the present disclosure. As shown in Figure 15 , the optical chip 400 is a hybrid integrated optical chip.

[0221] In addition to the Si-based platform 410 in the above embodiment, the optical chip 400 may also include the following InP light-emitting region 480 and InP modulation region 420. The structure and formation of the Si-based platform 410 can be understood with reference to the above embodiment and will not be described in detail here.

[0222] Optical chip 400 may include an InP light-emitting region 480. InP light-emitting region 480 is grown from InP material. Each laser 481 is disposed within InP light-emitting region 480. Lasers 481 may be Group III-V lasers, such as InP lasers. Group III-V materials are direct bandgap materials with a strong linear electro-optical Pockels effect, making them easy to implement for optical gain.

[0223] The optical chip 400 may include an InP modulation region 420. The InP modulation region 420 is grown from InP material. Individual InP modulators 421 are located within the InP modulation region 420. InP-based optical modulators modulate optical signals based on the quantum well-confined Stark effect. By controlling the applied electric field, carriers change, thereby varying the refractive index and thus modulating the optical signal. InP modulators offer high modulation rates and efficiency.

[0224] The InP modulation region 420 is disposed on the light-emitting path of the InP light-emitting region 480 to receive the light emitted by the InP light-emitting region 480 and perform signal modulation on the light.

[0225] A coupling waveguide is provided between the InP light-emitting region 480 and the InP modulation region 420. The coupling waveguide can be either a Si waveguide or an InP waveguide. Considering optical transmission loss, a Si waveguide with lower optical loss can be used for the coupling waveguide. Considering the growth process, the coupling waveguide can be made of the same InP material as the InP light-emitting region 480 and the InP modulation region 420. In this case, the coupling waveguide is an InP waveguide.

[0226] In the present disclosure, the InP light-emitting region 480 and the InP modulation region 420 are combined into an InP region. Optical chip 400 is then an InP / Si hybrid integrated optical chip. In the present disclosure, optical chip 400 is a hybrid integrated optical chip that achieves hybrid integration of Si and InP materials, utilizing the high-speed modulation provided by InP materials and the highly integrated silicon optical circuits provided by Si materials. This allows optical chip 400 to combine the high-speed modulation characteristics of InP materials, meeting the requirements of high-baud-rate modulation and fully utilizing the characteristics of both Si and InP materials.

[0227] In the present disclosure, the hybrid integrated optical chip integrates both the InP light emitting region 480 and the InP modulation region 420, thereby simultaneously having light emitting and signal modulation functions, completing light emitting and signal modulation within the same chip.

[0228] The InP light emitting region 480 and the InP modulation region 420 are respectively located in the Si-based platform 410 , so that the Si-based platform 410 wraps the InP light emitting region 480 and the InP modulation region 420 in the front, back, left, right and bottom directions.

[0229] The InP modulation region 420 in the present disclosure can be understood with reference to the above embodiments and will not be described in detail here.

[0230] The InP modulator in the present disclosure is a linear electro-optic modulator, such as an MZ modulator. Then the hybrid integrated optical chip in the present disclosure has a linear electro-optic modulation effect. Based on the linear electro-optic modulation effect, the hybrid integrated optical chip in the present disclosure has a high modulation efficiency and a high bit rate; at the same time, the hybrid integrated optical chip in the present disclosure can achieve higher-order PAM (Pulse Amplitude Modulation) modulation at a lower modulation bandwidth at the same modulation rate; at the same time, in the hybrid integrated optical chip in the present disclosure, the chirp parameters of the InP modulator are optimized by adjusting the working parameters of the InP modulator, thereby reducing the influence of the optical fiber dispersion effect, making the hybrid integrated optical chip in the present disclosure more suitable for long-distance transmission; at the same time, the hybrid integrated optical chip in the present disclosure can support linear drive applications. The hybrid integrated optical chip provided in the present disclosure is more suitable for multi-channel and long-distance transmission, and can also achieve high bit rate and higher-order PAM modulation.

[0231] In some embodiments, one laser corresponds to one InP modulator on one channel. For an 8-channel optical module, eight lasers are integrated into the InP light-emitting region 480, and eight InP lasers are integrated into the InP modulation region 420. For a 16-channel optical module, 16 lasers are integrated into the InP light-emitting region 480, and 16 InP lasers are integrated into the InP modulation region 420. The specific configuration is not limited here.

[0232] In this disclosure, the lasers corresponding to each channel are integrated within a hybrid integrated optical chip to increase integration. Furthermore, each channel has a laser, which reduces local power density and thermal stress, thereby improving the reliability of the hybrid integrated optical chip and making it suitable for multi-channel transmission.

[0233] Figure 16 is a second structural diagram of a hybrid integrated optical chip according to some embodiments of the present disclosure. As shown in Figure 16, an optical chip 400 is internally integrated with an optical multiplexing component 490. The optical multiplexing component 490 combines various optical signals into a single beam and outputs the combined beam.

[0234] In some embodiments, the InP light emitting region 480 and the InP modulation region 420 are combined into an InP region. Light within the InP region is transmitted through the InP waveguide. Light outside the InP region is transmitted through the optical waveguide layer 413.

[0235] 8 , the Si-based platform 410 may include a cladding layer 414. For example, the cladding layer 414 is epitaxially grown using SiO2. The substrate layer 411, the intermediate layer 412, the optical waveguide layer 413, and the cladding layer 414 are sequentially arranged from bottom to top.

[0236] Figure 17 is a partial cross-sectional structural diagram of a hybrid integrated optical chip according to some embodiments of the present disclosure. Figure 17 is a structural diagram formed along the cross-section direction marked in Figure 15 to position B. As shown in Figure 17, the laser 481 is disposed within the Si-based platform 410.

[0237] The laser 481 may include a first electrode metal layer 4811. When the second electrode metal layer 4816 forms a PN junction with the first electrode metal layer 4811, the concentration difference of carriers causes diffusion movement, resulting in the first electrode metal layer 4811 containing holes and negative ions.

[0238] The laser 481 may include a p-InP layer 4812 .

[0239] Laser 481 may include an active quantum well layer 4813. Active quantum well layer 4813 may employ a multi-quantum well structure, thereby enhancing its ability to collect carriers and increase radiative recombination. As the number of quantum wells increases, the amount of activated material increases, and the optical gain gradually increases, thereby increasing the output optical power.

[0240] The laser 481 may include an n-InP layer 4814. Both ends of the n-InP layer 4814 extend relative to the active quantum well layer 4814, so that second electrode metal layers 4816 are respectively provided on surfaces of both ends of the n-InP layer 4814.

[0241] Laser 481 may include a grating layer 4815 .

[0242] In some embodiments, etching is performed along the surface of the optical waveguide layer 413 to form a grating layer 4815 .

[0243] Laser 481 may include a second electrode metal layer 4816. The second electrode metal layer 4816 is disposed on surfaces extending from opposite ends of the n-InP layer 4814. When the second electrode metal layer 4816 forms a PN junction with the first electrode metal layer 4811, the concentration difference in carriers causes diffusion. As a result of this carrier diffusion, the second electrode metal layer 4816 includes electrons and positive ions.

[0244] In some embodiments, when the second electrode metal layer 4816 forms a PN junction with the first electrode metal layer 4811, the carrier concentration difference causes diffusion. This carrier diffusion results in the first electrode metal layer 4811 containing holes and negative ions, while the second electrode metal layer 4816 contains electrons and positive ions. Based on the charge principle, holes are driven downward into the active quantum well layer 4813, while electrons are driven upward into the active quantum well layer 4813. Therefore, the first electrode metal layer 4811 is used to inject holes, which are P-type carriers, into the active quantum well layer 4813, while the second electrode metal layer 4816 is used to inject electrons, which are N-type carriers, into the active quantum well layer 4813. Within the active quantum well layer 4813, stimulated emission causes discrete electron-hole pairs to recombine, generating photons. This effectively converts the electrically injected carriers into photons and generates gain light. The photons generated by the recombination in the active quantum well layer 4813 are reflected by the resonant cavity or the distributed feedback grating to form positive feedback, thereby generating lasing light.

[0245] In some embodiments, by changing the current injected into the grating layer 4815, the effective refractive index of the grating layer 4815 can be changed, thereby changing the resonant lasing wavelength of the laser 481, thereby achieving the selection of a specific wavelength.

[0246] In the present disclosure, the p-InP layer corresponding to the first modulation waveguide, the p-InP layer corresponding to the second modulation waveguide, and the p-InP layer corresponding to the laser are located on the same layer. The n-InP layer corresponding to the first modulation waveguide, the n-InP layer corresponding to the second modulation waveguide, and the n-InP layer corresponding to the laser are located on the same layer. The active quantum well layer corresponding to the first modulation waveguide, the active quantum well layer corresponding to the second modulation waveguide, and the active quantum well layer corresponding to the laser are located on the same layer.

[0247] In this disclosure, an optical channel is used as an example for illustrative description. A beam splitter is formed on the optical path between the laser 481 and the InP modulator 421. The light emitted by the laser 481 is split into two beams by the beam splitter, which enter the first modulation waveguide 4211 and the second modulation waveguide 4212 respectively. By controlling the different phase differences between the first modulation waveguide 4211 and the second modulation waveguide 4212, the output light intensity of the laser is modulated by the modulated electrical signal. After modulation, the modulated electrical signal becomes the output light intensity of the modulated optical signal, thereby achieving modulation.

[0248] The InP modulator in the present disclosure is a linear electro-optic modulator, such as an MZ modulator, so the hybrid integrated optical chip in the present disclosure has a strong linear electro-optic modulation effect.

[0249] Due to its strong linear electro-optical modulation effect, the hybrid integrated optical chip disclosed herein has high modulation efficiency and high bit rate. Furthermore, at the same modulation rate, the hybrid integrated optical chip disclosed herein can achieve higher-order PAM modulation at a lower modulation bandwidth. For example, at the same modulation rate of 448 Gbps, the modulation bandwidth corresponding to PAM6 modulation is 87 GHz, while the modulation bandwidth corresponding to PAM4 modulation is 112 GHz.

[0250] Based on the strong linear electro-optical modulation effect, the hybrid integrated optical chip disclosed herein optimizes the chirp parameter of the InP MZ modulator by adjusting its operating parameters, thereby reducing the impact of fiber dispersion effects, making the hybrid integrated optical chip disclosed herein more suitable for long-distance transmission. For example, by adjusting parameters such as the splitting ratio and operating point of the InP MZ modulator, the chirp parameter of the InP MZ modulator is optimized, thereby reducing the impact of fiber dispersion effects, making the hybrid integrated optical chip disclosed herein more suitable for long-distance transmission.

[0251] Based on the strong linear electro-optical modulation effect, the hybrid integrated optical chip of the present disclosure can support linear drive applications. The hybrid integrated optical chip provided by the present disclosure is more suitable for multi-channel and long-distance transmission, and can also achieve high bit rate and higher-order PAM modulation.

[0252] Figure 18 is a schematic diagram of the optical transmission path of a hybrid integrated optical chip according to some embodiments of the present disclosure. As shown in Figure 18, the InP modulation region 420 is provided on the light output path of the InP light emitting region 480 to receive the light emitted by the InP light emitting region 480 and perform signal modulation on it.

[0253] A beam splitter is formed in the optical path between laser 481 and InP modulator 421. The beam splitter splits the light emitted by laser 481 into two beams, which enter the first modulation waveguide 4211 and the second modulation waveguide 4212, respectively. By controlling the phase difference between the first modulation waveguide 4211 and the second modulation waveguide 4212, the output light intensity is modulated by the modulating electrical signal. The modulated electrical signal is modulated to become the output light intensity of the modulated optical signal, thus achieving modulation. The modulated optical signal is transmitted through the optical waveguide layer 413.

[0254] A coupling waveguide is provided between laser 481 and InP modulator 421. The coupling waveguide can be either a Si waveguide or an InP waveguide. Considering optical transmission loss, a Si waveguide with lower optical loss can be used for the coupling waveguide. Considering the growth process, the coupling waveguide can be made of the same InP material as the InP light-emitting region 480 and the InP modulation region 420. In this case, the coupling waveguide is an InP waveguide.

[0255] The first P-electrode metal layer 4213 on the first modulation waveguide 4211 and the second P-electrode metal layer 4214 on the second modulation waveguide 4212 form a pair of electrodes. Multiple first P-electrode metal layers 4213 are provided on the first modulation waveguide 4211, and multiple first P-electrode metal layers 4213 are provided on the second modulation waveguide 4212. Thus, multiple pairs of first P-electrode metal layers exist on a single InP modulator.

[0256] An InP modulator includes two modulation waveguides, namely a first modulation waveguide 4211 and a second modulation waveguide 4212 . The first modulation waveguide 4211 and the second modulation waveguide 4212 are two modulation arms of the InP modulator 421 .

[0257] The first modulation waveguide 4211 and the second modulation waveguide 4212 are InP-based modulation waveguides. To improve optical coupling efficiency, a spot size converter can be provided between the InP-based modulation waveguide and the Si waveguide. Large mode field mismatch between the InP-based modulation waveguide and the Si waveguide can lead to significant coupling loss. The spot size converter can be used to match the mode field between the two, thereby improving optical coupling efficiency.

[0258] Figure 19 is a schematic diagram illustrating the external electrical connections of a hybrid integrated optical chip according to some embodiments of the present disclosure. Based on the hybrid integrated optical chip provided in the embodiments of the present disclosure, the present disclosure also provides a hybrid integrated optical chip assembly. As shown in Figure 19, the hybrid integrated optical chip assembly includes a substrate 700, a driver 800, and an optical chip 400. Driver 800 and optical chip 400 are disposed above substrate 700. Optical chip 400 is a hybrid integrated optical chip.

[0259] Exemplarily, the driver 800 and the hybrid integrated optical chip are connected to the substrate 700 via solder balls respectively.

[0260] One end of the hybrid integrated optical chip assembly is embedded in the electrical connection portion 900. One end of the electrical connection portion 900 is electrically connected to the driver 800 and the optical chip 400, respectively, and the other end is electrically connected to the ASIC electrical device through a high-frequency transmission line.

[0261] The InP modulator in the present disclosure is a linear electro-optic modulator, and the hybrid integrated optical chip in the present disclosure has a linear electro-optic modulation effect. Based on the linear electro-optic modulation effect, the hybrid integrated optical chip in the present disclosure can support linear drive applications.

[0262] Since the hybrid integrated optical chip in the present disclosure can support linear drive applications, the quality of high-frequency signal transmission can be guaranteed, thereby allowing longer high-frequency transmission lines to transmit electrical signals to the optical chip 400 .

[0263] Based on the hybrid integrated optical chip provided in the embodiments of the present disclosure, the preparation process of the hybrid integrated optical chip in the embodiments of the present disclosure may include:

[0264] S100: preparing a silicon platform substrate, wherein the silicon platform substrate comprises a substrate layer and an intermediate layer, wherein the intermediate layer is located above the substrate layer.

[0265] The substrate layer 411 is epitaxially grown, and the intermediate layer 412 is grown on the substrate layer 4601. The substrate layer 411 is epitaxially grown using Si material, and the intermediate layer 412 is epitaxially grown using SiO2 material.

[0266] S200: etching to form a Si waveguide layer above the intermediate layer, and etching to form a grating layer on the surface of the Si waveguide layer.

[0267] A Si waveguide layer 413 is epitaxially grown on the intermediate layer 412. At the same time, a grating layer 4815 is formed on the surface of the Si waveguide layer 413 by etching.

[0268] S300: forming a first SiO2 layer around the etched Si waveguide layer and the grating layer, the first SiO2 layer filling the etched area in the Si waveguide layer, and growing an InP bare chip on the first SiO2 layer.

[0269] SiO2 is used to fill the area around the etched Si waveguide layer and grating layer.

[0270] S400: etching the InP bare wafer layer by layer to obtain n-InP layers for the laser, the first modulation waveguide, and the second modulation waveguide; active quantum hydrazine layers for the laser, the first modulation waveguide, and the second modulation waveguide; and p-InP layers for the laser, the first modulation waveguide, and the second modulation waveguide.

[0271] In the present disclosure, the p-InP layer corresponding to the first modulation waveguide, the p-InP layer corresponding to the second modulation waveguide, and the p-InP layer corresponding to the laser are located on the same layer. The n-InP layer corresponding to the first modulation waveguide, the n-InP layer corresponding to the second modulation waveguide, and the n-InP layer corresponding to the laser are located on the same layer. The active quantum well layer corresponding to the first modulation waveguide, the active quantum well layer corresponding to the second modulation waveguide, and the active quantum well layer corresponding to the laser are located on the same layer.

[0272] S500: forming a second electrode metal layer of the laser on surfaces at both ends of the n-InP layer of the laser; forming a first N-electrode metal layer and a second N-electrode metal layer on surfaces at both ends of the n-InP layer of the InP modulator.

[0273] Both ends of the n-InP layer 4814 of the laser extend out relative to the active quantum well layer 4814 , so that second electrode metal layers 4816 are respectively provided on the surfaces of both ends of the n-InP layer 4814 .

[0274] Both ends of the n-InP layer 4203 of the InP modulator extend relative to the active quantum well layer 4202 , so that a first N-electrode metal layer 4215 and a second N-electrode metal layer 4216 are respectively provided on the surfaces of the two ends of the n-InP layer 4203 .

[0275] S600: Fill the current blank area to form a second SiO2 layer. The first SiO2 layer and the second SiO2 layer form a cladding layer.

[0276] SiO2 is filled in the blank area within the region enclosed by the substrate layer 411, extending from the p-InP layer corresponding to the first modulation waveguide downward to the n-InP layer corresponding to the first modulation waveguide. The filled SiO2 layer is the second SiO2 layer. The first and second SiO2 layers form the cladding layer 414.

[0277] S700: a first electrode metal layer of the laser, a first P-electrode metal layer corresponding to the first modulation waveguide, and a second P-electrode metal layer corresponding to the second modulation waveguide are respectively manufactured on the surface of the cladding.

[0278] In the present disclosure, the hybrid integrated optical chip includes a Si-based platform, an InP light-emitting area, and an InP modulation area. The InP light-emitting area and the InP modulation area are respectively arranged on the Si-based platform. The InP modulation area is arranged on the light-emitting optical path of the InP light-emitting area to receive the light emitted by the InP light-emitting area and perform signal modulation on it. Various lasers are arranged side by side on the surface of the InP light-emitting area. The laser includes an active quantum well layer and a grating layer. The active quantum well layer is used to output light and transmit the output light toward the grating layer. The grating layer is arranged on the surface of the Si waveguide layer to select the wavelength of the light output by the active quantum well layer. Various InP modulators are arranged side by side on the surface of the InP modulation area. The InP modulator is a linear electro-optical modulator. The InP modulator is connected to the laser accordingly. The InP modulator is arranged on the surface of the Si waveguide layer. The InP modulator includes a first modulation waveguide and a second modulation waveguide. The first modulation waveguide and the second modulation waveguide are respectively optically coupled to the laser to receive the light output by the laser. The InP modulator is used to modulate the light output by the laser to generate an optical signal. The hybrid integrated optical chip in this disclosure is an InP / Si hybrid integrated optical chip. The InP modulator has a high modulation rate, and the Si-based platform surface can be etched to form various functional devices. Therefore, the hybrid integrated optical chip in this disclosure has both a high modulation rate and a surface that is etchable.

[0279] In this disclosure, the lasers corresponding to each channel are integrated within a hybrid integrated optical chip to increase integration. Furthermore, each channel has a laser, which reduces local power density and thermal stress, thereby improving the reliability of the hybrid integrated optical chip and making it suitable for multi-channel transmission.

[0280] The InP modulator in the present disclosure is a linear electro-optic modulator, and the hybrid integrated optical chip in the present disclosure has a linear electro-optic modulation effect. Based on the linear electro-optic modulation effect, the hybrid integrated optical chip in the present disclosure has high modulation efficiency and high bit rate.

[0281] The hybrid integrated optical chip disclosed in the present invention can achieve higher-order PAM modulation at a lower modulation bandwidth at the same modulation rate.

[0282] In the hybrid integrated optical chip disclosed in the present invention, the chirp parameters of the InP modulator are optimized by adjusting the operating parameters of the InP modulator, thereby reducing the impact of the optical fiber dispersion effect, making the hybrid integrated optical chip disclosed in the present invention more suitable for long-distance transmission.

[0283] The hybrid integrated optical chip disclosed in the present disclosure can support linear drive applications. The hybrid integrated optical chip provided in the present disclosure is more suitable for multi-channel and long-distance transmission, and can also achieve high bit rate and higher-order PAM modulation.

[0284] The embodiments of the present disclosure are based on the above-mentioned example optical modulator structure (including, from bottom to top, a silicon waveguide layer, an N-type InP layer, a quantum well layer, and a P-type InP layer). In order to improve the optical coupling efficiency between the optical modulator and the splitter and combiner (also called beam splitter and beam combiner) located on both sides thereof, the structures at both ends of the optical modulator are improved. That is, a gradient structure is formed at both ends of the optical modulator to reduce mode mutation when light is coupled between the silicon waveguide and the InP waveguide, thereby realizing low-loss coupling of light between the silicon waveguide and the InP waveguide. The specific structure of the optical modulator can be understood with reference to the following embodiments.

[0285] FIG20 is a schematic diagram of the internal structure of an optical chip according to some embodiments of the present disclosure. As shown in FIG20 , an external light source 500 provides light to the optical chip 400 .

[0286] The laser light generated by the external light source 500 is coupled into the optical chip 400. The laser light is split into a first light beam and a second light beam by the optical splitter 410 integrated in the optical chip 400.

[0287] The first light beam is coupled as local oscillator light into the optical demodulator built into the optical chip 400, and the external light signal is coupled into the optical demodulator at the same time. The second light beam and the external light signal are coherently demodulated in the optical demodulator to demodulate the corresponding electrical signal.

[0288] The second light beam, serving as the light source of the optical transmission signal, is transmitted to the polarization beam splitter 430. The second light beam is split by the polarization beam splitter 430 into two beams with different polarization directions: TE polarized light and TM polarized light.

[0289] The TE polarized light is split into two beams by the optical splitter 450, and the two beams are respectively coupled to the two optical modulators 460 located at the top in Figure 20. Of the two optical modulators 460, the upper optical modulator 460 performs I modulation on the received light to generate an I-modulated signal; the lower optical modulator 460 performs Q modulation on the received light to generate a Q-modulated signal. The I-modulated signal and the Q-modulated signal of the light beam are combined by the combiner 471 to generate a first modulated optical signal. Of course, the upper optical modulator 460 can also perform Q modulation on the received light, while the lower optical modulator 460 performs I modulation on the received light, but this is not a limitation here.

[0290] The TM polarized light is split into two beams by beam splitter 440. These beams are then coupled to the two optical modulators 460 located at the bottom in Figure 20 . The upper optical modulator 460 performs I-modulation on the received light, generating an I-modulated signal; the lower optical modulator 460 performs Q-modulation on the received light, generating a Q-modulated signal. The I-modulated and Q-modulated signals of these beams are then combined in a combiner 472 to generate a second modulated optical signal.

[0291] The first modulated optical signal and the second modulated optical signal are combined by the combiner 473 to generate an optical transmit signal, thereby completing optical signal modulation.

[0292] The following embodiment is described by taking one of the light modulators 460 , such as the area encircled by the ellipse in FIG. 20 , as an example.

[0293] FIG21 is a top view of an optical modulator according to some embodiments of the present disclosure. As shown in FIG21 , in some embodiments, one end of the optical modulator 460 is connected to a demultiplexer 710 and the other end is connected to a combiner 720 .

[0294] In some embodiments, the wavelength splitter 710 is disposed on one side of the optical modulator 460 to output two paths of light to be modulated to the optical modulator 460 respectively.

[0295] In some embodiments, the combiner 720 is disposed on the other side of the optical modulator 460 to combine the two optical modulation signals generated by the optical modulator 460 .

[0296] In some embodiments, optical modulator 460 can be understood with reference to the above examples and may utilize an InP-based Mach-Zehnder (MZ) modulator. The incident light of the MZ modulator is split into two paths by a wave splitter 710. Phase modulation is performed on one or both paths simultaneously, creating a phase difference between the two paths, thereby achieving light intensity modulation. The modulated two optical signals are then combined by a combiner 720 and output. In some embodiments, silicon waveguides are used as optical waveguides in InP / Si hybrid integrated optical chips due to their low transmission loss.

[0297] For an optical modulator 460, the silicon waveguide includes the silicon waveguide between the output of the splitter 710 and the input of the optical modulator 460, the silicon waveguide of the optical modulator 460 itself, and the silicon waveguide between the output of the optical modulator 460 and the input of the combiner 720. These three waveguide sections are sequentially connected to form a single silicon waveguide.

[0298] The incident light of the MZ modulator is split into two paths by the demultiplexer 710, which then has two output terminals. The optical modulator 460 has two input terminals and two output terminals. The input terminal and output terminal of the optical modulator 460 are respectively located on the silicon waveguide of the optical modulator 460 itself.

[0299] In some embodiments, the silicon waveguide between the first output terminal of splitter 710 and the first input terminal of optical modulator 460 is referred to as silicon waveguide 810. The silicon waveguide after the first output terminal of optical modulator 460 is referred to as silicon waveguide 820. Silicon waveguide 810 and silicon waveguide 820 correspond to one optical signal outputted by splitter 710.

[0300] The silicon waveguide between the second output terminal of splitter 710 and the second input terminal of optical modulator 460 is called silicon waveguide 830. The silicon waveguide after the second output terminal of optical modulator 460 is called silicon waveguide 840. Silicon waveguides 830 and 840 correspond to the other optical signal output by splitter 710.

[0301] The silicon waveguide 810 , the silicon waveguide 820 , the silicon waveguide 830 , and the silicon waveguide 840 are external silicon waveguides for the optical modulator 460 .

[0302] In some embodiments, the silicon waveguide between the first input and first output of optical modulator 460 is a first silicon ridge waveguide 4613. This section of silicon waveguide is a ridge waveguide because it offers high modulation rate and efficiency. First silicon ridge waveguide 4613 corresponds to one optical signal output by splitter 710.

[0303] The silicon waveguide between the second input and second output of optical modulator 460 is a second silicon ridge waveguide 4614. This section of silicon waveguide is a ridge waveguide because of its high modulation rate and efficiency. Second silicon ridge waveguide 4614 corresponds to the other optical signal output by splitter 710.

[0304] With respect to the optical modulator 460 , the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 are silicon waveguides of the optical modulator 460 itself.

[0305] In some embodiments, the silicon waveguide 810, the first silicon ridge waveguide 4613, and the silicon waveguide 820 are continuous with each other, that is, the input end of the first silicon ridge waveguide 4613 is connected to the silicon waveguide 810 to receive the light to be modulated; and the output end is connected to the silicon waveguide 820 to output the optical modulation signal generated by the modulation.

[0306] The silicon waveguide 830, the second silicon ridge waveguide 4614, and the silicon waveguide 840 are continuous with each other, that is, the input end of the second silicon ridge waveguide 4614 is connected to the silicon waveguide 830 to receive the light to be modulated; the output end is connected to the silicon waveguide 840 to output the optical modulation signal generated by the modulation.

[0307] In some embodiments, since the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 adopt a ridge waveguide structure, in order to simplify the growth process, the silicon waveguide 810 and the silicon waveguide 820 also adopt a ridge waveguide structure, and the silicon waveguide 830 and the silicon waveguide 840 also adopt a ridge waveguide structure.

[0308] In some embodiments, to achieve modulation, the optical modulator 460 includes an N-type InP layer 462, a quantum well layer 465, and a P-type InP layer 466. The N-type InP layer 462, the quantum well layer 465, and the P-type InP layer 466 are stacked vertically in sequence.

[0309] The quantum well layer 465 is a target layer for the light to be modulated to reach, so that modulation is achieved within the quantum well layer 465. By controlling the change of the external electric field, the carriers are changed, and thus the refractive index of the quantum well layer 465 changes, thereby achieving signal modulation.

[0310] The quantum well layer 465 is located between the N-type InP layer 462 and the P-type InP layer 466. The N-type InP layer 462 and the P-type InP layer 466 arranged above each other confine the light field to the quantum well layer 465, preventing the light field from diverging.

[0311] It can be understood that the light field in the first silicon ridge waveguide 4613 will diffuse upward to the InP region, that is, the light spot will expand to the InP region. Therefore, the light to be modulated transmitted in the first silicon ridge waveguide 4613 will be coupled upward to the InP region.

[0312] Similarly, the light field in the InP region will diffuse downward into the first silicon ridge waveguide 4613 , that is, the light spot will expand to the first silicon ridge waveguide 4613 region, so the modulated optical modulation signal will be coupled downward into the first silicon ridge waveguide 4613 .

[0313] In some embodiments, the incident light of the MZ modulator is split into two paths by the wavelength splitter 710 .

[0314] One channel of light to be modulated is coupled along silicon waveguide 810 to the input end of first silicon ridge waveguide 4613. The light to be modulated within first silicon ridge waveguide 4613 is then coupled upward to quantum well layer 465 for modulation. The modulated optical signal is then coupled downward to the output end of first silicon ridge waveguide 4613 and then transmitted sequentially along first silicon ridge waveguide 4613 and silicon waveguide 820 to combiner 720.

[0315] Another path of light to be modulated is coupled along silicon waveguide 830 to the input end of second silicon ridge waveguide 4614. The light to be modulated within second silicon ridge waveguide 4614 is then coupled upward to quantum well layer 465 for modulation. The modulated optical signal is then coupled downward to second silicon ridge waveguide 4614 and then sequentially transmitted along second silicon ridge waveguide 4614 and silicon waveguide 840 to combiner 720.

[0316] The two modulated optical signals are respectively connected to the combiner 720, and are combined into one optical signal and output.

[0317] Figure 22 is a structural diagram of a silicon waveguide provided according to some embodiments of the present disclosure. As shown in Figure 22, in some embodiments, the silicon waveguide adopts a ridge structure to reduce transmission loss.

[0318] When a silicon waveguide adopts a ridge structure, it consists of a silicon slab with a larger cross-sectional area and a silicon ridge with a smaller cross-sectional area. The silicon ridge is located on the surface of the silicon slab.

[0319] A complete silicon waveguide is divided into sections along the optical transmission direction. Silicon waveguide 810 and silicon waveguide 820 are respectively connected to the first input and first output of optical modulator 460; silicon waveguide 830 and silicon waveguide 840 are respectively connected to the second input and second output of optical modulator 460.

[0320] An InP modulation region of the optical modulator 460 is provided above the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614. Therefore, the two paths of light transmitted in the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 are respectively coupled upward into the InP modulation region, and then coupled downward back to the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 for output after modulation is completed.

[0321] A silicon waveguide 810 is provided between the first output end of the demultiplexer 710 and the first input end of the optical modulator 460 to couple the demultiplexed light into the optical modulator 460. A first silicon ridge waveguide 4613 is provided between the first input end and the first output end of the optical modulator 460. A silicon waveguide 820 is provided behind the first output end of the optical modulator 460 to output the optical signal modulated by the optical modulator 460.

[0322] A silicon waveguide 830 is provided between the second output end of the demultiplexer 710 and the second input end of the optical modulator 460 to couple the demultiplexed light into the optical modulator 460. A second silicon ridge waveguide 4614 is provided between the second input end and the second output end of the optical modulator 460. A silicon waveguide 840 is provided behind the second output end of the optical modulator 460 to output the modulated optical signal generated by the optical modulator 460.

[0323] One optical path output by the splitter 710 is transmitted along the silicon waveguide 810 to the input end of the first silicon ridge waveguide 4613. This light path is then coupled upward to the optical modulation area of ​​the optical modulator 460 for signal modulation. The modulated optical signal is then coupled downward back to the output end of the first silicon ridge waveguide 4613 and continues to transmit along the silicon waveguide 820 before being connected to the combiner 720.

[0324] The other light path output by splitter 710 is transmitted along silicon waveguide 830 to the input end of second silicon ridge waveguide 4614. This light path is then coupled upward to the optical modulation region of optical modulator 460 for signal modulation. The modulated optical signal is then coupled downward back to the output end of second silicon ridge waveguide 4614 and continues to transmit along silicon waveguide 840 before being connected to combiner 720.

[0325] The two modulated optical signals are respectively connected to the combiner 720, and are combined into one optical signal and output.

[0326] Figure 23 is a perspective view of an optical modulator according to some embodiments of the present disclosure; Figure 24 is a cross-sectional view of an optical modulator according to some embodiments of the present disclosure. As shown in Figures 23 and 24, in some embodiments, taking an InP / Si hybrid integrated optical chip as an example, optical chip 400 includes an optical modulator 460.

[0327] In some embodiments, the optical modulator 460 is an InP / Si hybrid integrated optical modulator.

[0328] The optical modulator 460 may include a silicon waveguide layer 461 at the bottom. The silicon waveguide layer 461 is the silicon waveguide of the optical modulator 460 itself, so as to fully utilize the advantage of low transmission loss of the silicon waveguide.

[0329] The optical modulator 460 may include an InP modulation region located above the silicon waveguide layer 461 to fully utilize the advantage of the high modulation rate of the InP semiconductor material.

[0330] In some embodiments, the silicon waveguide layer 461 is formed of silicon-on-insulator (SOI).

[0331] In some embodiments, the SOI waveguide includes a bottom silicon layer 4611, a buried oxide layer 4612 located on the upper surface of the bottom silicon layer 4611, and a first silicon ridge waveguide 4613 and a second silicon ridge waveguide 4614 located on either side of the upper surface of the buried oxide layer 4612. Two paths of light to be modulated are transmitted through the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614, respectively, to prevent mutual coupling between the two paths of light to be modulated. Exemplarily, the bottom silicon layer 4611 serves as a substrate layer.

[0332] Exemplarily, the buried oxide layer 4612 is a SiO2 layer. Due to the large refractive index difference between silicon and SiO2, the SOI silicon waveguide has a strong light field confinement capability, and thus the SOI silicon waveguide has low light transmission loss.

[0333] Exemplarily, the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 serve as transmission layers for the two light paths, respectively. Ridge waveguides offer low transmission loss, so a ridge waveguide structure is employed in this disclosure. It is understood that non-ridge waveguide structures may also be employed in some embodiments.

[0334] In some embodiments, the incident light of the MZ modulator is split into two paths by a wave splitter 710 at the input end.

[0335] The first output end of the demultiplexer 710 is connected to the input end of the first silicon ridge waveguide 4613 via a silicon waveguide 810 to receive one path of light outputted by the demultiplexer 710 and couple it to the first silicon ridge waveguide 4613 .

[0336] The second output end of the demultiplexer 710 is connected to the input end of the second silicon ridge waveguide 4614 via a silicon waveguide 830 to receive another path of light output by the demultiplexer 710 and couple it into the second silicon ridge waveguide 4614 .

[0337] The two paths of light to be modulated coupled and transmitted to the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 are respectively coupled upward to the InP modulation area, and after completing modulation in the InP modulation area, they are coupled downward back to the output ends of the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614. Then, the two paths of optical modulation signals generated by modulation are respectively connected to the combiner 720 along the silicon waveguide 820 and the silicon waveguide 840, and are combined into one optical signal and output.

[0338] In some embodiments, the InP modulation region includes, from bottom to top, an N-type InP layer 462 located on the upper surface of the silicon waveguide layer 461; a stress confinement layer 463; an N-InP ohmic contact layer 464; a quantum well layer 465; a P-type InP layer 466; and a P-InP ohmic contact layer 467. In some embodiments, the N-type InP layer 462 is an N-type doped semiconductor, such as one doped with a pentavalent element.

[0339] The P-type InP layer 466 is a P-type doped semiconductor, such as doped with a trivalent element.

[0340] The N-type InP layer 462 and the P-type InP layer 466 are doped with different impurity elements to form a PN junction.

[0341] When no forward bias voltage is applied to the PN junction, the carrier movement is in equilibrium. When a forward bias voltage is applied to the PN junction, the carrier movement equilibrium is disrupted, thereby generating an on-current. The generated on-current is applied to the quantum well layer 465.

[0342] In some embodiments, an i-InP intrinsic layer 468 is formed below the P-type InP layer 466. The i-InP intrinsic layer 468 is undoped.

[0343] A depletion region exists at the junction of the P and N regions of a PN junction. This narrow depletion region contains diffuse carriers, significantly impacting the modulation rate. By placing an i-InP intrinsic layer 468 in the middle of the PN junction, the width of the depletion region is increased, allowing carriers to drift to the PN junction under the influence of a strong electric field. This prevents the diffuse carrier component from affecting the optical modulator 460, thereby improving the modulation rate.

[0344] In some embodiments, the silicon waveguide layer 461 is grown from silicon, and the InP modulation region is an InP region. The lattice constants of the silicon material and the InP semiconductor material differ significantly, resulting in a significant lattice mismatch between the two, which results in stress during epitaxial growth of the InP material on silicon. The stress-limiting layer 463 confines the stress between the silicon and InP semiconductor materials within this layer, preventing stress from being transmitted upward to the quantum well layer 465, thereby protecting the quantum well layer 465.

[0345] In some embodiments, the quantum well layer 465 is an active region, where light to be modulated reaches the target layer to achieve modulation within the quantum well layer 465. The refractive index of the quantum well material is relatively high, and the optical signal can be well confined within the quantum well layer 465 in the longitudinal direction.

[0346] By controlling the change in the applied electric field, the carriers are changed, thereby changing the refractive index of quantum well layer 465. Since the change in the refractive index of quantum well layer 465 is proportional to the phase difference between the two modulation arms of optical modulator 460, the phase difference between the two modulation arms can be adjusted by adjusting the refractive index of quantum well layer 465.

[0347] The output light intensity varies with the phase difference between the two modulation arms, meaning that the output light intensity is modulated by the modulating electrical signal. The modulated electrical signal is modulated and converted into the output light intensity of the modulated optical signal, thus achieving modulation.

[0348] The two paths of light to be modulated transmitted to the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 are respectively coupled upward into the quantum well layer 465. After completing modulation in the quantum well layer 465, they are coupled downward back to the output ends of the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614. Then, the two modulated optical signals are respectively connected to the combiner 720 along the silicon waveguide 820 and the silicon waveguide 840, and are combined into one optical signal and output.

[0349] In some embodiments, in the InP modulation region, the area above the first silicon ridge waveguide 4613 corresponds to the first modulation arm 462a of the optical modulator 460 , and the area above the second silicon ridge waveguide 4614 corresponds to the second modulation arm 462b of the optical modulator 460 .

[0350] The quantum well layer 465 includes a first modulation partition corresponding to the first modulation arm 462a and a second modulation partition corresponding to the second modulation arm 462b. The first modulation partition modulates the light to be modulated output by the first silicon ridge waveguide 4613, and the second modulation partition modulates the light to be modulated output by the second silicon ridge waveguide 4614.

[0351] In some embodiments, the quantum well layer 465 is located between the N-type InP layer 462 and the P-type InP layer 466. The N-type InP layer 462 and the P-type InP layer 466 confine the light field from top to bottom, and confine the light field to the upper and lower regions of the quantum well layer 465. The light field does not exceed the P-type InP layer upward and does not exceed the N-type InP layer 462 downward, thereby constraining the light field and avoiding light field divergence, thereby increasing the optical coupling efficiency.

[0352] In order to increase the optical confinement effect of the P-type InP layer 466, the two light fields to be modulated are respectively confined to the first modulation partition and the second modulation partition of the quantum well layer 465, and the i-InP intrinsic layer 468, the P-type InP layer 466, and the P-InP ohmic contact layer 467 are respectively etched to obtain a first P-type InP region 466a corresponding to the upper and lower parts of the first modulation partition, and a second P-type InP region 466b corresponding to the upper and lower parts of the second modulation partition.

[0353] The first P-type InP region 466a and the second P-type InP region 466b protrude relative to the quantum well layer 465, forming a ridge structure. For ease of description, the first P-type InP region 466a includes, from bottom to top, an i-InP intrinsic layer 468, a P-type InP layer 466, and a P-InP ohmic contact layer 467; the second P-type InP region 466b includes, from bottom to top, an i-InP intrinsic layer 468, a P-type InP layer 466, and a P-InP ohmic contact layer 467.

[0354] In some embodiments, a P-type electrode 4671 is provided on the surface of the P-InP ohmic contact layer 467 in the first P-type InP region 466 a , and a P-type electrode 4671 is provided on the surface of the P-InP ohmic contact layer 467 in the second P-type InP region 466 b .

[0355] The width of the N-InP ohmic contact layer 464 is greater than the width of the quantum well layer 465, so there is a gap at both ends of the N-InP ohmic contact layer 464 relative to the end of the quantum well layer 465, and then an N-type electrode 4641 can be formed at both ends of the N-InP ohmic contact layer 464.

[0356] In some embodiments, the optical modulator 460 may include an intermediate bonding layer 469. The intermediate bonding layer 469 is located between the silicon waveguide layer 461 and the InP modulation region.

[0357] The silicon waveguide layer 461 is grown from silicon, and the InP modulation region is an InP region. The lattice constants of silicon and InP semiconductor materials differ significantly, resulting in a significant lattice mismatch. This leads to stress during epitaxial growth of InP on silicon, resulting in poor hybrid integration quality. To address this, an intermediate bonding layer 469 is placed between the silicon waveguide layer 461 and the InP modulation region.

[0358] The intermediate bonding layer 469 is located between the silicon material and the InP semiconductor material. The silicon material and the InP semiconductor material are bonded together by the bonding force between the intermediate bonding layer 469 and the silicon material and the InP semiconductor material, such as van der Waals force or chemical bond, to achieve hybrid integration of the silicon material and the InP semiconductor material.

[0359] For example, the middle bonding layer 469 is a SiO 2 layer. SiO 2 has good hydrophilicity and can form stable covalent bonds at lower temperatures, thereby achieving higher bonding strength and a good bonding interface.

[0360] In the present disclosure, the growth material of the silicon waveguide layer 461 in the optical modulator 460 is silicon, and the InP modulation region is an InP region, so the optical modulator 460 is an InP / Si hybrid integrated optical modulator.

[0361] Silicon waveguide and InP waveguide are waveguides made of different materials, and their optical field modes are different. Therefore, when light is coupled between the silicon waveguide and the InP waveguide, there is a large mode mutation, a mode field mismatch, and a large coupling loss.

[0362] For example, when the light to be modulated is coupled upward from the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 to the quantum well layer 465, a certain loss is generated, and when the optical modulation signal is coupled downward from the quantum well layer 465 back to the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614, a certain loss is generated again, thereby reducing the optical coupling efficiency.

[0363] Figure 25 is a second top-down structural diagram of an optical modulator 460 according to some embodiments of the present disclosure. As shown in Figure 25 , in some embodiments, the optical modulator 460 includes, from bottom to top, a silicon waveguide layer 461, an N-type InP layer 462, a quantum well layer 465, and a P-type InP layer 466.

[0364] In some embodiments, in order to increase the optical confinement effect of the P-type InP layer 466, the two light fields to be modulated are respectively confined to the first modulation partition and the second modulation partition of the quantum well layer 465. The P-type InP layer 466 can be divided into two independent structures corresponding to the two light fields to be modulated, such as the first P-type InP region 466a and the second P-type InP region 466b shown in Figure 10.

[0365] In the present disclosure, each layer of waveguide of the optical modulator 460 toward the demultiplexer 710 and toward the combiner 720 is formed with a gradient structure, and the silicon waveguide and the InP region waveguide at the same end present opposite gradient trends to reduce mode mutations when light is coupled between the silicon waveguide and the InP waveguide, thereby achieving low-loss coupling of light between the silicon waveguide and the InP waveguide.

[0366] In the coupling region at one end of the optical modulator 460, that is, toward the end of the demultiplexer 710, the waveguide widths of the first and second silicon ridge waveguides 4613 and 4614 gradually narrow, while the waveguide widths of the various layers of the InP region gradually widen. This squeezes the optical field energy in the silicon ridge waveguide into the InP region waveguide, coupling more of the optical field energy to be modulated upward into the InP region for modulation. Maximum optical coupling efficiency is achieved when the refractive index of the silicon ridge waveguide and the InP region waveguide are equal at a certain moment.

[0367] In the coupling region at the other end of the optical modulator 460, that is, toward the combiner 720, the waveguide widths of the first and second silicon ridge waveguides 4613 and 4614 gradually widen, while the waveguide widths of the various layers in the InP region gradually narrow. This squeezes the light field energy of the InP region waveguide into the silicon ridge waveguide, coupling more modulated light field energy downward into the silicon ridge waveguide for output. Maximum optical coupling efficiency occurs when the refractive index of the silicon ridge waveguide and the InP region waveguide are equal at a certain moment.

[0368] In the middle coupling region of the optical modulator 460 , each waveguide is not designed with a gradient structure, so as to maintain the light field energy within the coupling region for modulation.

[0369] For ease of description, the end of the optical modulator 460 facing the demultiplexer 710 is referred to as the first end, and the end of the optical modulator 460 facing the combiner 720 is referred to as the second end. The coupling region corresponding to the first end is referred to as the first tapered coupling region 460a, and the coupling region corresponding to the second end is referred to as the second tapered coupling region 460c.

[0370] In some embodiments, a waveguide gradient structure is formed at the first end of the optical modulator 460 to gradually change the waveguide dimensions of each layer in the first gradient coupling region, thereby reducing the ability of the silicon ridge waveguide in the first gradient coupling region 460a to restrict the light field and increasing the ability of the InP waveguide to restrict the light field, so that more light fields to be modulated in the silicon ridge waveguide in the first gradient coupling region 460a can be squeezed into the InP modulation region for modulation.

[0371] In some embodiments, a waveguide gradient structure is formed at the second end of the optical modulator 460 to gradually change the waveguide dimensions of each layer in the second gradient coupling region, thereby reducing the ability of the InP waveguide in the second gradient coupling region 460c to restrict the light field and increasing the ability of the silicon ridge waveguide to restrict the light field. In this way, the modulated light field of the InP modulation region in the second gradient coupling region 460c is squeezed into the silicon ridge waveguide to output the modulated light signal.

[0372] The waveguide layers at both ends of the optical modulator 460 are formed with gradient structures, and the silicon waveguide and the InP region waveguide in the coupling region at the same end show opposite gradient trends, which can reduce the optical loss of coupling from the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 upward to the quantum well layer 465, and at the same time reduce the optical loss of coupling from the quantum well layer 465 downward to the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614, thereby achieving low-loss coupling.

[0373] Figure 26 shows a first layered structure diagram of an optical modulator according to some embodiments of the present disclosure, and Figure 27 shows a second layered structure diagram of an optical modulator according to some embodiments of the present disclosure. As shown in Figures 26 and 27, a first silicon ridge waveguide 4613 and a second silicon ridge waveguide 4614, an N-type InP layer 462, a quantum well layer 465, and a P-type InP layer 466 are sequentially stacked on the same layer.

[0374] In some embodiments, the waveguide width of the N-type InP layer 462 is relatively large to provide better support.

[0375] In some embodiments, the incident light of the MZ modulator is split into two paths by the wave splitter 710, and the wave splitter 710 has two output terminals. The optical modulator 460 correspondingly has two input terminals and two output terminals.

[0376] In some embodiments, the silicon waveguide layer 461 has a silicon contraction region 4615 for receiving two modulated lights at one end facing the demultiplexer 710 , and a silicon expansion region 4616 for coupling two optical modulated signals at one end facing the combiner 720 .

[0377] In some embodiments, the N-type InP layer 462 has a first InP expansion region 4621 corresponding to coupling two modulated lights at one end facing the demultiplexer 710 , and a first InP contraction region 4623 corresponding to coupling two optical modulation signals at one end facing the combiner 720 .

[0378] In some embodiments, the quantum well layer 465 has a second InP expansion region 4651 corresponding to coupling two modulated lights at one end facing the demultiplexer 710 , and a second InP contraction region 4653 corresponding to coupling two optical modulation signals at one end facing the combiner 720 .

[0379] In some embodiments, the P-type InP layer 466 has a third InP expansion region 4661 corresponding to coupling two modulated lights at one end facing the demultiplexer 710 , and a third InP contraction region 4663 corresponding to coupling two optical modulation signals at one end facing the combiner 720 .

[0380] The silicon contraction region 4615, the first InP expansion region 4621, the second InP expansion region 4651, and the third InP expansion region 4661 corresponding to a path of light to be modulated are stacked vertically in sequence to couple the light to be modulated in the silicon contraction region 4615 upward to the quantum well layer 465 for signal modulation.

[0381] The silicon expansion region 4616, the first InP contraction region 4623, the second InP contraction region 4653, and the third InP contraction region 4663 corresponding to one optical modulation signal are stacked vertically in sequence to couple the optical modulation signal generated by the modulation of the quantum well layer downward to the silicon expansion region for output.

[0382] In some embodiments, the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 have the same structure. As previously described, the silicon ridge waveguide comprises a silicon slab with a larger cross-sectional area and a silicon ridge with a smaller cross-sectional area. The silicon slab and the silicon ridge have the same gradient structure. The gradient structure of the first silicon ridge waveguide 4613 and the second silicon ridge waveguide 4614 is described below using the silicon slab as an example.

[0383] In some embodiments, to increase the coupling efficiency between the silicon waveguide and the InP waveguide, the first silicon ridge waveguide 4613 has a silicon contraction region 4615 at the input end, a silicon expansion region 4616 at the output end, and a silicon flat region 4617 in the middle.

[0384] The N-type InP layer 462 includes two symmetrical partitions to couple the two optical signals. The two symmetrical partitions have the same structure. In the N-type InP layer 462, the corresponding ends of the two optical paths have a first InP expansion region 4621 at the end facing the splitter 710, a first InP contraction region 4623 at the end facing the combiner 720, and a first InP flat region 4622 in the middle.

[0385] The quantum well layer 465 is used to modulate the two optical signals separately. The quantum well layer 465 includes a first modulation partition and a second modulation partition that are symmetrically arranged to modulate the two optical signals separately. The first modulation partition and the second modulation partition have the same structure. In the quantum well layer 465, the corresponding ends of the two light paths are: the end facing the splitter 710 has a second InP expansion region 4651, the end facing the combiner 720 has a second InP contraction region 4653, and the middle has a second InP flat region 4652. Among them, the second InP expansion region 4651 is a coupling structure at one end of the quantum well layer 465; the second InP contraction region 4653 is a coupling structure at the other end of the quantum well layer 465; the second InP flat region 4652 is an effective modulation structure of the quantum well layer 465, and the light to be modulated is modulated in the second InP flat region 4652.

[0386] In the P-type InP layer 466 , the corresponding ends of the two light paths have a third InP expansion region 4661 at the end facing the demultiplexer 710 , a third InP contraction region 4663 at the end facing the combiner 720 , and a third InP flat region 4662 in the middle.

[0387] The term "contraction" means that the waveguide width gradually narrows along the direction from splitter 710 to combiner 720. The term "expansion" means that the waveguide width gradually widens along the direction from splitter 710 to combiner 720. The meanings of the aforementioned contraction and expansion regions all fall within this interpretation.

[0388] In the coupling region of the optical modulator 460 toward the wavelength splitter 710 , the silicon contraction region 4615 , the first InP expansion region 4621 , the second InP expansion region 4651 , and the third InP expansion region 4661 are stacked in sequence along the vertical direction.

[0389] In the output coupling region of the optical modulator 460 , the silicon expansion region 4616 , the first InP contraction region 4623 , the second InP contraction region 4653 , and the third InP contraction region 4663 are stacked in sequence along the vertical direction.

[0390] In the middle region of the optical modulator 460 , the silicon flat region 4617 , the first InP flat region 4622 , the second InP flat region 4652 , and the third InP flat region 4662 are stacked in sequence along the vertical direction.

[0391] The purpose of setting the above-mentioned contraction zone and expansion zone is to reduce the sudden change of the coupling zone mode, while the purpose of setting the flat zone is to maintain the current light field mode.

[0392] In some embodiments, the first tapered coupling region 460a of the optical modulator 460 includes, from bottom to top, a silicon contraction region 4615, a first InP expansion region 4621, a second InP expansion region 4651, and a third InP expansion region 4661.

[0393] In the first tapered coupling region 460a, the width of the silicon waveguide gradually narrows, and thus the effective refractive index of the silicon waveguide at the input end gradually decreases, the ability to limit light waves gradually weakens, and the light field area gradually increases.

[0394] The first InP expansion region 4621, the second InP expansion region 4651, and the third InP expansion region 4661 form the waveguide structures of each layer of the InP region. Within the first tapered coupling region 460a, the width of each InP waveguide layer gradually increases, and the effective refractive index of each InP waveguide layer gradually increases, gradually strengthening the ability to confine light waves. This squeezes the light field from the silicon waveguide into the InP region within the first tapered coupling region 460a, thereby performing signal modulation.

[0395] In the present disclosure, in the first gradient coupling region 460a of the optical modulator 460, each waveguide is provided with a gradient structure, thereby reducing the mode mutation of the modulated light between the silicon waveguide and the InP waveguide, and realizing low-loss coupling in the coupling region.

[0396] In some embodiments, the second tapered coupling region 460 c of the optical modulator 460 includes, from bottom to top, a silicon expansion region 4616 , a first InP contraction region 4623 , a second InP contraction region 4653 , and a third InP contraction region 4663 .

[0397] In the second tapered coupling region 460c, the width of the silicon waveguide gradually widens, and thus the effective refractive index of the silicon waveguide at the output end gradually increases, and the ability to confine light waves gradually increases.

[0398] The first InP contraction region 4623, the second InP contraction region 4653, and the third InP contraction region 4663 form the waveguide structures of each layer of the InP region. Within the second tapered coupling region 460c, the width of each waveguide layer in the InP region gradually narrows, and the effective refractive index of each waveguide layer in the InP region gradually decreases, gradually weakening the ability to confine light waves. As a result, within the second tapered coupling region 460c, the light field is squeezed from the InP region to the silicon waveguide to transmit the modulated optical signal.

[0399] In the present disclosure, in the second tapered coupling region 460c of the optical modulator 460, each waveguide is provided with a tapered structure, thereby reducing the mode mutation of the optical modulated signal between the silicon waveguide and the InP waveguide, and achieving low-loss coupling in the coupling region.

[0400] FIG28 is a schematic diagram of an optical path of an optical modulator according to some embodiments of the present disclosure. As shown in FIG28 , the optical path is exemplarily described below using an optical signal output by a demultiplexer 710 as an example.

[0401] The vertically stacked silicon flat region 4617, the first InP flat region 4622, the second InP flat region 4652, and the third InP flat region 4662 constitute the light modulation region 460b of the light modulator 460. The second InP flat region 4652 is a structure that substantially performs signal modulation.

[0402] The silicon contraction region 4615 , the first InP expansion region 4621 , the second InP expansion region 4651 , and the third InP expansion region 4661 stacked vertically constitute a first tapered coupling region 460 a .

[0403] The silicon expansion region 4616 , the first InP contraction region 4623 , the second InP contraction region 4653 , and the third InP contraction region 4663 stacked vertically constitute the second tapered coupling region 460 c .

[0404] By providing a first tapered coupling region 460 a at one end facing the wave splitter 710 , more optical field energy to be modulated is transferred from the silicon waveguide to the InP region for modulation.

[0405] By providing a second tapered coupling region 460 c at the end facing the combiner 720 , more modulated optical field energy is released from the InP region into the silicon waveguide.

[0406] The light modulation region 460b of the light modulator 460 is flat without any gradient, so as to ensure that the energy is maintained within this region.

[0407] The first gradient coupling region 460a is used to couple the light to be modulated upward to the light modulation region 460b.

[0408] The second tapered coupling region 460c is used to couple the optical modulation signal downward from the optical modulation region 460b.

[0409] In the first gradient coupling region 460a, the width of the silicon waveguide is gradually narrowed while the width of the InP waveguide is gradually widened, so that the light to be modulated is coupled upward from the silicon waveguide to the second InP flat region 4652 for signal modulation to generate an optical modulation signal.

[0410] In the second tapered coupling region 460c, the width of the InP waveguide is gradually narrowed while the width of the silicon waveguide is gradually widened, so as to couple the optical modulated signal downward from the second InP flat region 4652 to the silicon waveguide to output the optical modulated signal.

[0411] In some embodiments, an optical signal output by the demultiplexer 710 enters the silicon contraction region 4615 along the silicon waveguide 810, is upwardly coupled to the first InP expansion region 4621 and the second InP expansion region 4651 in sequence, and then is laterally coupled to the second InP flat region 4652 on the same layer as the second InP expansion region 4651, and signal modulation is performed in the second InP flat region 4652.

[0412] The optical modulated signal is laterally coupled from the second InP flat region 4652 to the second InP contraction region 4653 in the same layer. From the second InP contraction region 4653, the optical modulated signal is sequentially coupled downward to the first InP contraction region 4623 and the silicon expansion region 4616, and then enters the silicon waveguide 820 in the same layer as the silicon expansion region 4616, where it is output along the silicon waveguide 820.

[0413] It is understandable that, in some embodiments, the first tapered coupling region 460 a of the optical modulator 460 may be in the form of a coupler independent of the optical modulator 460 , that is, a coupler is provided at one end of the optical modulator 460 facing the wavelength splitter 710 .

[0414] Likewise, the second tapered coupling region 460 c of the optical modulator 460 may also be in the form of a coupler independent of the optical modulator 460 , that is, another coupler is provided at the end of the optical modulator 460 facing the combiner 720 .

[0415] The structures of these two separate couplers are the same as the structure of the optical modulator 460 , except that these two couplers are passive devices and do not require P-type electrodes and N-type electrodes.

[0416] FIG29 is a schematic diagram of a gradual transition of a silicon waveguide according to some embodiments of the present disclosure. As shown in FIG29 , in some embodiments, the silicon waveguide 810 , the first silicon ridge waveguide 4613 , and the silicon waveguide 820 correspond to one of the light paths output by the splitter 710 .

[0417] In some embodiments, the first silicon ridge waveguide 4613 has a silicon contraction region 4615 at the input end, a silicon expansion region 4616 at the output end, and a silicon flat region 4617 in the middle. The waveguide width is narrowest at the location of the silicon flat region 4617.

[0418] The silicon contraction region 4615 is used to squeeze the light field to be modulated upward to the quantum well layer 465 by gradually contracting the waveguide width, and the silicon expansion region 4616 is used to "attract" the modulated light field in the quantum well layer 465 downward by gradually expanding the waveguide width, thereby increasing the optical coupling efficiency between the silicon waveguide and the InP waveguide.

[0419] Figure 30 is a structural diagram of an N-type InP layer provided according to some embodiments of the present disclosure. As shown in Figure 30 , in some embodiments, both ends of the N-type InP layer 462 have a gradient structure.

[0420] The N-type InP layer 462 includes two symmetrical partitions with the same structure to transmit two optical signals respectively.

[0421] In the N-type InP layer 462 , the two corresponding ends of the light beam have a first InP expansion region 4621 at the end facing the demultiplexer 710 , a first InP contraction region 4623 at the end facing the combiner 720 , and a first InP flat region 4622 in the middle.

[0422] The first InP expansion region 4621 is used to attract the modulated light field upward to the quantum well layer 465 by gradually expanding the waveguide width, and the first InP contraction region 4623 is used to squeeze the modulated light field in the quantum well layer 465 downward to the silicon waveguide for output by gradually contracting the waveguide width, thereby increasing the optical coupling efficiency between the silicon waveguide and the InP waveguide.

[0423] Figure 31 is a structural diagram of a quantum well layer according to some embodiments of the present disclosure. As shown in Figure 31 , in some embodiments, the input end and the output end of the quantum well layer 465 each have a gradient structure.

[0424] The quantum well layer 465 includes a first modulation partition and a second modulation partition that are symmetrically arranged to modulate two optical signals respectively. The first modulation partition and the second modulation partition have the same structure.

[0425] In the quantum well layer 465 , the corresponding ends of the two light paths have a second InP expansion region 4651 at the end facing the demultiplexer 710 , a second InP contraction region 4653 at the end facing the combiner 720 , and a second InP flat region 4652 in the middle.

[0426] The second InP expansion region 4651 is a coupling structure at one end of the quantum well layer 465; the second InP contraction region 4653 is a coupling structure at the other end of the quantum well layer 465; the second InP flat region 4652 is an effective modulation structure of the quantum well layer 465, and the light to be modulated is modulated in the second InP flat region 4652.

[0427] The second InP expansion region 4651 is used to attract the modulated light field upward to the quantum well layer 465 by gradually expanding the waveguide width, and the second InP contraction region 4653 is used to squeeze the modulated light field in the quantum well layer 465 downward to the silicon waveguide for output by gradually contracting the waveguide width, thereby increasing the optical coupling efficiency between the silicon waveguide and the InP waveguide.

[0428] Figure 32 is a structural diagram of a P-type InP layer provided according to some embodiments of the present disclosure. As shown in Figure 32, in some embodiments, the P-type InP layer 466 has a third InP expansion region 4661 at the end facing the splitter 710, a third InP contraction region 4663 at the end facing the combiner 720, and a third InP flat region 4662 in between, corresponding to the two light paths.

[0429] The third InP expansion region 4661 is used to attract the modulated light field upward to the quantum well layer 465 by gradually expanding the waveguide width, and the third InP contraction region 4663 is used to squeeze the modulated light field in the quantum well layer 465 downward to the silicon waveguide for output by gradually contracting the waveguide width, thereby increasing the optical coupling efficiency between the silicon waveguide and the InP waveguide.

[0430] As previously mentioned, the light source of the InP / Si hybrid integrated optical chip can also be an internally integrated light source. Group III-V semiconductor materials are direct bandgap semiconductors with strong gain characteristics. Therefore, Group III-V materials have excellent luminescence properties, such as InP lasers. Therefore, an InP laser can be integrated within the InP / Si hybrid integrated optical chip.

[0431] Figure 33 is a schematic diagram of a structure of a modulator integrated within an optical chip according to some embodiments of the present disclosure. As shown in Figure 33, a laser 480 is integrated within the optical chip 400. For example, the laser 480 is an InP laser.

[0432] The laser 480 is integrated into the optical chip 400. The laser light outputted by the laser 480 is transmitted to the optical modulator 460 for signal modulation. The optical modulator 460 may have the first tapered coupling region 460a and the second tapered coupling region 460c formed at both ends thereof.

[0433] The light output from laser 480 is transmitted to splitter 710. The two optical beams output from splitter 710 are coupled to optical modulator 460 for signal modulation. The two optical signals generated after modulation are coupled to combiner 720. Combiner 720 combines the two optical modulated signals into a single optical beam and outputs it.

[0434] The optical chip 400 integrates both the laser 480 and the optical modulator 460 , thereby having both light emitting and signal modulation functions, and completing light emitting and signal modulation in the same chip.

[0435] In this disclosure, the lasers corresponding to each channel are integrated within a hybrid integrated optical chip to increase integration. Furthermore, each channel has a laser, which reduces local power density and thermal stress, thereby improving the reliability of the hybrid integrated optical chip and making it suitable for multi-channel transmission.

[0436] Figure 34 is a schematic cross-sectional view of a laser according to some embodiments of the present disclosure; Figure 35 is a partial schematic view of a laser according to some embodiments of the present disclosure. As shown in Figures 34 and 35, in some embodiments, the layers of laser 480 are made of the same material as the growth material of the layers.

[0437] In some embodiments, the laser 480 is an InP / Si hybrid integrated laser.

[0438] In some embodiments, the laser 480 may include a waveguide layer at the bottom. For example, the waveguide layer is a silicon waveguide layer 481, which is the silicon waveguide of the laser 480 itself, so as to fully utilize the advantage of low transmission loss of silicon waveguide.

[0439] In some embodiments, the laser 480 may include an InP light emitting region located above the silicon waveguide layer 481 , taking full advantage of the gain characteristics of the InP semiconductor material.

[0440] In some embodiments, the silicon waveguide layer 481 is formed of silicon-on-insulator (SOI).

[0441] In some embodiments, the SOI waveguide includes: an underlying silicon layer 4811 , a buried oxide layer 4812 located on the upper surface of the underlying silicon layer 4811 , and silicon ridge waveguides 4813 located on the upper surface of the buried oxide layer 4812 .

[0442] Illustratively, the bottom silicon 4811 is the substrate layer.

[0443] Exemplarily, the buried oxide layer 4812 is a SiO2 layer. Due to the large refractive index difference between silicon and SiO2, the SOI silicon waveguide has a strong light field confinement capability, and thus the SOI silicon waveguide has low light transmission loss.

[0444] Based on the low transmission loss of ridge waveguide, the present disclosure adopts a ridge waveguide structure. It is understood that in some embodiments, a non-ridge waveguide structure can also be used.

[0445] The laser 480 provided in the present disclosure can be understood with reference to the laser hierarchical structure in the above-mentioned embodiments. Of course, in order to understand the structure of each layer of the laser 480 more specifically, in some embodiments, the InP light-emitting area includes, from bottom to top: an N-type InP layer 482, located on the upper surface of the silicon waveguide layer 481; a stress limiting layer 483; an N-InP ohmic contact layer 484; a quantum well layer 485; a P-type InP layer 486; and a P-InP ohmic contact layer 4862.

[0446] In some embodiments, the N-type InP layer 482 is an N-type doped semiconductor, such as one doped with a pentavalent element.

[0447] The P-type InP layer 486 is a P-type doped semiconductor, such as doped with a trivalent element.

[0448] The N-type InP layer 482 and the P-type InP layer 486 are doped with different impurity elements to form a PN junction.

[0449] In some embodiments, when a PN junction is formed, the carrier concentration difference causes diffusion motion. This carrier diffusion motion results in the following: the P-type InP layer 486 contains holes and negative ions, while the N-type InP layer 482 contains electrons and positive ions. Based on the charge principle, holes are driven downward into the quantum well layer 485, while electrons are driven upward into the quantum well layer 485.

[0450] Within quantum well layer 485, stimulated emission causes discrete electron-hole pairs to recombine, generating photons. This effectively converts electrically injected carriers into photons and generates gain light. The photons recombined within quantum well layer 485 are reflected by the resonant cavity or distributed feedback grating, forming positive feedback, thereby generating lasing light.

[0451] In some embodiments, in order to enable the laser 480 to emit light of a specific wavelength, a grating layer 488 is further formed on the surface of the silicon ridge waveguide 4813. Exemplarily, the grating layer 488 is a Bragg grating.

[0452] In some embodiments, by changing the current injected into the grating layer 488 , the effective refractive index of the grating layer 488 can be changed, thereby changing the resonant lasing wavelength of the laser 480 , thereby achieving the selection of a specific wavelength.

[0453] In some embodiments, an undoped i-InP intrinsic layer 4861 is formed below the P-type InP layer 486 .

[0454] A depletion region exists at the junction of the P and N regions of a PN junction. This narrow depletion region contains diffuse carriers, significantly impacting the modulation rate. By placing an i-InP intrinsic layer 4861 in the middle of the PN junction, the depletion region width is increased, allowing carriers to drift to the PN junction under the influence of a strong electric field. This prevents the influence of diffuse carriers on the laser 480, thereby increasing the modulation rate.

[0455] In some embodiments, the silicon waveguide layer 481 is grown from silicon, and the InP light-emitting region is an InP region. The lattice constants of the silicon material and the InP semiconductor material differ significantly, resulting in a significant lattice mismatch between the two, which results in stress during epitaxial growth of the InP material on silicon. The stress-limiting layer 483 confines the stress between the silicon and InP semiconductor materials within this layer, preventing stress from being transmitted upward to the quantum well layer 485, thereby protecting the quantum well layer 485.

[0456] In some embodiments, the quantum well layer 485 is an active region, where carriers reach the target layer and recombine to generate photons within the quantum well layer 485. The refractive index of the quantum well material is relatively high, and the optical signal can be well confined within the quantum well layer 485 in the longitudinal direction.

[0457] In some embodiments, a P-type electrode 487 a is provided on the surface of the P-InP ohmic contact layer 4862 .

[0458] The width of the N-InP ohmic contact layer 484 is greater than the width of the quantum well layer 485, so there is a gap at both ends of the N-InP ohmic contact layer 484 relative to the end of the quantum well layer 485, and then an N-type electrode 487b can be formed at both ends of the N-InP ohmic contact layer 484.

[0459] In some embodiments, the laser 480 may include an intermediate bonding layer 489. The intermediate bonding layer 489 is located between the silicon waveguide layer 481 and the InP light emitting region.

[0460] The silicon waveguide layer 481 is grown from silicon, and the InP modulation region is an InP region. The lattice constants of silicon and InP semiconductor materials differ significantly, resulting in a significant lattice mismatch. This leads to stress during epitaxial growth of InP on silicon, resulting in poor hybrid integration quality. To address this, an intermediate bonding layer 489 is placed between the silicon waveguide layer 481 and the InP light-emitting region.

[0461] The intermediate bonding layer 489 is located between the silicon material and the InP semiconductor material. The silicon material and the InP semiconductor material are bonded together by the bonding force between the intermediate bonding layer 489 and the silicon material and the InP semiconductor material, such as van der Waals force or chemical bond, to achieve hybrid integration of the silicon material and the InP semiconductor material.

[0462] For example, the middle bonding layer 489 is a SiO2 layer. SiO2 has good hydrophilicity and can form stable covalent bonds at lower temperatures, thereby achieving higher bonding strength and a good bonding interface.

[0463] In some embodiments, the optical confinement factor of the silicon waveguide layer 481 is greater than that of the quantum well layer 485 , so the optical field in the quantum well layer 485 is larger and can be coupled downward into the silicon waveguide layer 481 .

[0464] In some embodiments, the optical field generated by the quantum well layer 485 is relatively large and can be coupled downwardly into the silicon waveguide layer 481. For example, when the propagation constant of the quantum well layer 485 is the same as the propagation constant of the silicon waveguide layer 481, the coupling efficiency between the quantum well layer 485 and the silicon waveguide layer 481 is relatively high.

[0465] In some embodiments, the silicon waveguide layer 481 and the quantum well layer 485 can be designed as waveguides with opposite gradient trends. When the effective refractive indices of the two are gradiented to the same, that is, when the transmission constants of the two are the same, the coupling efficiency between the two is the highest.

[0466] In some embodiments, the laser 480 emits light downward from the quantum well layer 485 and then outputs horizontally through the silicon waveguide layer 481 .

[0467] In some embodiments, the laser light output by the silicon waveguide layer 481 is a laser that does not carry a signal. The silicon waveguide layer 481 is coupled to the wave splitter 710, thereby transmitting the laser light output by the laser 480 to the wave splitter 710. The wave splitter 710 splits the laser light into two paths, each of which is transmitted to the optical modulator 460 for signal modulation.

[0468] In some embodiments, based on the above laser, the laser 480 can be integrated into a hybrid integrated optical chip, and the hybrid integrated optical chip includes the laser 480 , a wavelength splitter 710 , an optical modulator 460 , and a wavelength combiner 720 .

[0469] In some embodiments, a splitter 710 is disposed on the output optical path of the laser 480 to receive the light output by the waveguide layer of the laser 480 and split the light into two paths of light to be modulated. An optical modulator 460 is disposed on the output optical path of the splitter 710 to receive the two paths of light to be modulated and modulate the two paths of light to be modulated. A combiner 720 is disposed on one side of the optical modulator 460 to combine the two optical modulated signals generated by the optical modulator 460.

[0470] In some embodiments, the optical modulator 460 may have the first tapered coupling region 460 a and the second tapered coupling region 460 c formed at both ends, and the structure thereof will not be further described.

[0471] Figure 36 is a schematic diagram of a structure with an integrated heater within an optical modulator, according to some embodiments of the present disclosure. As shown in Figure 36 , a first heating portion 491 and a second heating portion 492 are formed on either side of an optical modulator 460. Furthermore, the first and second tapered coupling regions 460a and 460c described above can be formed at either end of the optical modulator 460.

[0472] In some embodiments, a first heating portion 491 and a second heating portion 492 are respectively formed on two sides of the P-type InP layer 466 .

[0473] In some embodiments, a first heating portion 491 is formed on one side of the first P-type InP region 466a, and a second heating portion 492 is formed on one side of the second P-type InP region 466b. It should be noted that the arrangement of the first heating portion and the second heating portion here has the same function and method as the arrangement of the heating portion in the InP modulation region in the above embodiment.

[0474] In some embodiments, the hybrid integrated optical chip is temperature-controlled using a TEC to maintain its operating temperature within a certain range. However, temperature control using a TEC consumes significant power. In the present disclosure, based on the fact that InP semiconductor materials are more sensitive to temperature than Si-based materials, the temperature of a portion of the optical chip, namely the first P-type InP region 466a and the second P-type InP region 466b, is controlled, rather than the entire optical chip. This allows the optical chip to operate within a certain temperature range while reducing power consumption.

[0475] In this disclosure, based on the fact that InP semiconductor materials are more sensitive to temperature than Si materials, the temperature of the optical chip is adjusted locally, rather than for the entire chip, to keep the chip operating within a certain temperature range. This achieves the goal of regulating the temperature of the entire optical chip, thereby reducing power consumption.

[0476] The heat generated by the first heating unit 491 heats the first P-type InP region 466a, and the heat generated by the second heating unit 492 heats the second P-type InP region 466b, thereby heating each InP modulation region. By regulating the temperature of the InP modulation region, the temperature of the entire optical chip is regulated.

[0477] The first heating unit 491 and the second heating unit 492 regulate the temperature of a localized area of ​​the optical chip, the InP modulation zone, allowing the optical chip to operate within a specific temperature range using a low-power approach. Furthermore, regulating the temperature of the InP modulation zone reduces thermal stress during bonding between the InP modulation zone and the Si-based substrate, thereby improving the reliability and modulation rate of the optical modulator 460.

[0478] The first heating unit 491 is disposed adjacent to the first P-type InP region 466a to regulate the temperature of the first P-type InP region 466a and thereby regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0479] The second heating unit 492 is disposed adjacent to the first P-type InP region 466a to regulate the temperature of the first P-type InP region 466a and thereby regulate the temperature of a local area of ​​the optical chip, thereby maintaining the entire optical chip within a certain temperature range.

[0480] In some embodiments, a temperature sensor is embedded within the Si-based platform to monitor the temperature of the InP modulation region in real time. The temperature sensor collects the temperature of the InP modulation region in real time, thereby adjusting the temperature of the InP modulation region in real time, thereby achieving closed-loop control of temperature regulation.

[0481] In some embodiments, the first heating unit 491 and the second heating unit 492 may be in the form of heating resistors, which heat the first P-type InP region 466a and the second P-type InP region 466b respectively.

[0482] In some embodiments, to provide power to the first heating unit 491 and the second heating unit 492, metal vias are provided in the layer where the first heating unit 491 and the second heating unit 492 are located. The metal vias are connected to the power supply metal area of ​​the optical chip, thereby heating the first heating unit 491 and the second heating unit 492.

[0483] In some embodiments, the regions where the first and second heating portions 491 and 492 are located are epitaxially grown from SiO2 materials, while the underlying silicon 4611 is also epitaxially grown from Si materials. The thermal conductivity of Si is greater than that of SiO2, meaning that the thermal conductivity of the underlying silicon 4611 is greater than that of the regions where the heating portions are located. Consequently, the heat generated by the first and second heating portions 491 and 492 is transferred downward to the underlying silicon 4611, reducing the efficiency of temperature regulation.

[0484] In some embodiments, a first heat isolating portion 493 is formed on one side of the first heating portion 491. The first heat isolating portion 493 penetrates downward to the underlying silicon 4611 to reduce heat conducted downward from the first heating portion 491 to the underlying silicon 4611.

[0485] A second heat isolating portion 494 is formed on one side of the second heating portion 492. The second heat isolating portion 494 extends downward from the cladding layer 414 to the underlying silicon 4611 to reduce heat conducted downward from the second heating portion 492 to the underlying silicon 4611.

[0486] In some embodiments, the first thermal isolation portion 493 and the second thermal isolation portion 494 can be in the form of a groove-like structure. The first thermal isolation portion 493 and the second thermal isolation portion 494 are obtained by hollowing out downward. The first thermal isolation portion 493 and the second thermal isolation portion 494 extend downward to the underlying silicon 4611. The area below the first heating portion 491 is not hollowed out to ensure the support of the first heating portion 491. The area below the second heating portion 492 is not hollowed out to ensure the support of the second heating portion 4311.

[0487] The medium within the first thermal isolation portion 493 and the second thermal isolation portion 494 is air, which has an extremely low thermal conductivity. The thermal conductivity of air is less than that of SiO2 material, and the thermal conductivity of air is less than that of InP material. Therefore, the amount of heat generated by the first heating portion 491 and the second heating portion 492 that is conducted downward is very small, and the first thermal isolation portion 493 and the second thermal isolation portion 494 can block the path for downward heat conduction. Furthermore, the heat generated by the first heating portion 491 and the second heating portion 492 can be well concentrated near the first P-type InP region 466a and the second P-type InP region 466b, respectively, thereby improving the temperature regulation efficiency.

[0488] In some embodiments, the first thermal isolation portion 493 includes a first connecting groove 4931 and a second connecting groove 4932. The first connecting groove 4931 extends downward to the bottom silicon 4611 and partially hollows out the bottom silicon 4611. The second connecting groove 4932 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0489] The second thermal isolation portion 494 includes a third connecting groove 4941 and a fourth connecting groove 4942. The third connecting groove 4941 extends downward to the bottom silicon layer 4611, partially hollowing out the bottom silicon layer 4611. The fourth connecting groove 4942 extends horizontally to increase the hollowing range, thereby increasing the thermal isolation area.

[0490] Illustratively, the first connecting groove 4931 is formed by etching downward, and then etching is continued and the etching range is increased to form the second connecting groove 4932. Illustratively, the final shape of the first heat isolation portion 493 and the second heat isolation portion 494 can be irregular or regular.

[0491] In the present disclosure, a first thermal isolation portion 493 and a second thermal isolation portion 494 are formed in the Si-based platform to block the downward conduction path of the heat generated by the first heating portion 491 and the second heating portion 492, thereby limiting the heat to the vicinity of the first P-type InP region 466a and the second P-type InP region 466b, preventing the heat from being conducted downward, thereby improving the temperature regulation efficiency.

[0492] In some embodiments, the optical chip 400 is a silicon photonic chip. However, the basic properties of silicon materials lead to defects such as relatively low modulation efficiency, large capacitance, limited bandwidth, and large optical loss in the implementation of optical modulators. Therefore, since the silicon photonic phase modulator is based on carrier operation, the transmission rate on each channel in the current long-distance 400G optical module can only reach 50-60G baud. In the next generation of 1.6-3.2T PAM short-distance transmission and 800G-3.2T coherent long-distance transmission optical module products, the transmission rate on each channel in the optical module needs to exceed 100Gbaud, and the modulation rate of the silicon photonic phase modulator needs to exceed 100Gbaud. When the modulation rate of the silicon photonic phase modulator approaches 100Gbaud, the output voltage swing of the driver is high, the power consumption of the driver is high, and it is not suitable for optical modules.

[0493] In some embodiments, the optical chip 400 is a hybrid InP / Si optical chip.

[0494] FIG37 is a schematic diagram of the layout of a hybrid InP / Si optical chip provided according to some embodiments. FIG38 is a partial schematic diagram of a hybrid InP / Si optical chip provided according to some embodiments. As shown in FIG37 and FIG38 , the hybrid InP / Si optical chip includes multiple channels, each of which includes an InP phase modulator 430, a thermal phase regulator 420, etc. The InP phase modulator 430 is made of InP material, and the thermal phase regulator 420, etc. are made of silicon material. The InP phase modulator 430, the thermal phase regulator 420, etc. are connected to each other through a silicon waveguide to form a high-traveling-wave MZM. The hybrid InP / Si optical chip provided by the present disclosure realizes the hybrid integration of Si-based chips and InP materials. The InP material provides high-speed modulation, and the Si base provides highly integrated silicon optical circuits, so that the optical chip 400 can have the high-speed modulation characteristics of the InP material, so that the optical chip 400 can meet the needs of high baud rate modulation.

[0495] In some embodiments, the InP (indium phosphide) modulator is an InP-based MZ modulator. An MZ modulator is a modulator based on the electro-optic effect. The electro-optic effect refers to a change in the refractive index of a material caused by an applied electric field (i.e., an external power source).

[0496] In some embodiments, InP-based materials are bonded to Si-based materials, and then InP phase modulators, silicon photonic circuits, and other devices are fabricated on the bonded materials. There is a significant mismatch in the coefficient of thermal expansion (CTE) between the InP-based material platform and the silicon-based photonic material platform, which generates thermal stress. InP-based materials are brittle, and any mechanical and thermal stress can cause reliability issues over temperature and time.

[0497] In some embodiments, the hybrid InP / Si optical chip may include an InP region 410. For example, region C in FIG38 is the InP region 410. The waveguide in region C may include an InP modulation waveguide.

[0498] In some embodiments, the hybrid InP / Si optical chip may include a Si platform 440. The InP region 410 may be located within the Si platform 440 such that the Si platform 440 surrounds the InP region 410 from the front, back, left, right, and bottom. This may be understood in detail with reference to the above embodiments.

[0499] In some embodiments, the Si platform 440 may include a region A. A waveguide may be provided on the region A. The waveguide in the region A may be a silicon waveguide 422 .

[0500] In some embodiments, the Si platform 440 may include a region B. An optical coupler 460 may be disposed on the region B.

[0501] A radio frequency pad may be provided on one side of the InP region 410. The radio frequency pad may be located on the Si platform 440. The radio frequency pad may be electrically connected to a driver to input a radio frequency signal, which is a modulated signal.

[0502] An InP phase modulator 430 is disposed within the InP region 410 . The InP phase modulator 430 may include an InP (indium phosphide) modulation waveguide 431 . The InP modulation waveguide 431 may be located within the InP region 410 .

[0503] A radio frequency (RF) traveling waveguide 450 can be disposed on top of the hybrid InP / Si optical chip. One end of RF traveling waveguide 450 can be connected to an RF pad. RF traveling waveguide 450 can extend above InP modulation waveguide 431 and across InP region 410 to the other side of InP region 410, coupling RF signals to InP modulation waveguide 431.

[0504] The InP phase modulator 430 may include an RF electrode 432. The RF electrode 432 may be located within the InP region 410. The RF electrode 432 may be disposed above the InP modulation waveguide 431. For example, multiple pairs of RF electrodes 432 may be disposed above the InP modulation waveguide 431, with each pair of RF electrodes 432 connected to a respective RF traveling waveguide 450.

[0505] In the InP phase modulator 430, an InP-MQW optical waveguide can have high-speed modulation efficiency with good quantum basis effect, realize high bandwidth of the InP-based traveling waveguide MZM, and thus meet the high-speed requirements of the optical module.

[0506] The InP area 410 is a prohibited area in the hybrid circuit layout of the hybrid InP / Si optical chip. No devices requiring bonding, such as pads, are set in the InP area 410 to avoid any bonding, mechanical and thermal stresses and eliminate problems caused by temperature and aging.

[0507] In some embodiments, the RF traveling waveguide 450 may include a first RF traveling waveguide 4501. The first RF traveling waveguide 4501 may extend from one side of the InP region 410 to the other side of the InP region 410. The middle of the first RF traveling waveguide 4501 may be located above one edge of the InP modulation waveguide 431.

[0508] In some embodiments, the RF traveling waveguide 450 may include a second RF traveling waveguide 4502. The second RF traveling waveguide 4502 may extend from one side of the InP region 410 to the other side of the InP region 410. The middle of the second RF traveling waveguide 4502 may be located above the other edge of the InP modulation waveguide 431.

[0509] In some embodiments, each pair of RF electrodes 433 may include a first RF electrode 4331 . The first RF electrode 4331 may be located above the InP modulation waveguide 431 . The first RF electrode 4331 may be electrically connected to the first RF traveling waveguide 4501 .

[0510] In some embodiments, each pair of RF electrodes 433 may include a second RF electrode 4332 . The second RF electrode 4332 may be located above the InP modulation waveguide 431 . The second RF electrode 4332 may be electrically connected to the second RF traveling waveguide 4502 .

[0511] The first RF electrode 4331 and the second RF electrode 4332 are spaced apart and located between the first RF traveling waveguide 4501 and the second RF traveling waveguide 4502. For example, the first RF electrode 4331 and the second RF electrode 4332 are uniform thin strips, but the present invention is not limited thereto.

[0512] Figure 39 is a first cross-sectional view of a hybrid InP / Si optical chip provided according to some embodiments. Figure 39 shows the cross-sectional structure of a hybrid InP / Si optical chip in the InP region, with the cross section intercepting the InP region. As shown in Figure 39 , in some embodiments, the InP region may include a modulation waveguide. The modulation waveguide may include an InP modulation waveguide 431. A silicon modulation waveguide may be disposed below the InP modulation waveguide. The silicon modulation waveguide may couple light to the InP waveguide 431. The width of the silicon modulation waveguide is much smaller than the width of the InP modulation waveguide 431.

[0513] As shown in FIG39 , the InP modulation waveguide 431 may include a first modulation waveguide layer 4311. The first modulation waveguide layer 4311 may be primarily composed of N-type doped InP material, such that the first modulation waveguide layer 4311 is an n-inp modulation waveguide layer. A silicon modulation waveguide may be disposed below the first modulation waveguide layer 4311, but the silicon modulation waveguide is much smaller than the width of the first modulation waveguide layer 4311.

[0514] An N-electrode 433 may be provided at one end above the first modulation waveguide layer 4311. The N-electrode 433 may be in contact with the upper surface of the first modulation waveguide layer 4311. The N-electrode 433 may be connected to the positive electrode of an external power source to supply power to the N-electrode 433.

[0515] The N-electrode 433 may include a first N-electrode 4331. The first N-electrode 4331 may be located at the left end above the first modulation waveguide layer 4311. The N-electrode 4333 may include a second N-electrode 4332. The second N-electrode 4332 may be located at the right end above the first modulation waveguide layer 4311.

[0516] As shown in FIG39 , the InP modulation waveguide 431 may include a second modulation waveguide layer 4312. The second modulation waveguide layer 4312 may be located above the first modulation waveguide layer 4311. The lower surface of the second modulation waveguide layer 4312 may be in contact with the upper surface of the first modulation waveguide layer 4311, so that light can be coupled between the second modulation waveguide layer 4312 and the first modulation waveguide layer 4311. The second modulation waveguide layer 4312 may be primarily made of InGaAsP or InAlGaAs multi-layer quantum well material, so that the second modulation waveguide layer 4312 is a quantum well modulation waveguide layer.

[0517] In some embodiments, the second modulation waveguide layer 4312 may include a fifth sub-modulation waveguide layer. The fifth sub-modulation waveguide layer may be located above the first modulation waveguide layer 4311. The lower surface of the fifth sub-modulation waveguide layer may be in contact with the upper surface of the first modulation waveguide layer 4311, so that light can be coupled between the fifth sub-modulation waveguide layer and the first modulation waveguide layer 4311.

[0518] In some embodiments, the second modulation waveguide layer 4312 may include a sixth sub-modulation waveguide layer. The sixth sub-modulation waveguide layer may be located above the first modulation waveguide layer 4311. The lower surface of the sixth sub-modulation waveguide layer may be in contact with the upper surface of the first modulation waveguide layer 4311, so that light can be coupled between the sixth sub-modulation waveguide layer and the first modulation waveguide layer 4311.

[0519] There may be a gap between the fifth sub-modulation waveguide layer and the sixth sub-modulation waveguide layer.

[0520] The second modulation waveguide layer 4312 may include a plurality of quantum wells. The number of quantum wells in the second modulation waveguide layer 4312 may be greater than a fifth preset value. For example, the fifth preset value may be 40, and the number of quantum wells in the second modulation waveguide layer 4312 is at least 40.

[0521] The greater the number of quantum wells, the greater the refractive index of the quantum well modulation layer. Δφ = 2πΔnL / λ, where Δφ is the phase difference between the two branches, Δn is the refractive index of the quantum well modulation layer, L is the length of the optical waveguide (i.e., the length of the Inp modulation waveguide), and λ is the wavelength of light.

[0522] Since Δφ = 2πΔnL / λ, when the phase difference Δφ remains constant, the larger the refractive index Δn of the quantum well modulation waveguide layer, the smaller the length L of the Inp modulation waveguide. The smaller the length L of the Inp modulation waveguide, the larger the modulation bandwidth. Therefore, including multiple quantum wells in the second modulation waveguide layer 4312 can increase the refractive index of the quantum well modulation waveguide layer, thereby reducing the length of the Inp modulation waveguide and increasing the modulation bandwidth.

[0523] Since the conductivity of the second modulation waveguide layer 4312 is relatively low, most of the electrical signals are concentrated in the second modulation waveguide layer 4312 .

[0524] As shown in FIG39 , the InP modulation waveguide 431 may include a third modulation waveguide layer 4313. The third modulation waveguide layer 4313 may be located above the second modulation waveguide layer 4312. The lower surface of the third modulation waveguide layer 4313 may be in contact with the upper surface of the second modulation waveguide layer 4312, so that electrical signals are transmitted to the second modulation waveguide layer 4312 via the third modulation waveguide layer 4313. The third modulation waveguide layer 4313 may be primarily composed of p-type doped InP material, so that the third modulation waveguide layer 4313 is a p-inp modulation waveguide layer.

[0525] In some embodiments, the third modulation waveguide layer 4313 may include a first sub-modulation waveguide layer 43131. The first sub-modulation waveguide layer 43131 may be located above the first sub-modulation waveguide layer. The lower surface of the first sub-modulation waveguide layer 43131 may be in contact with the lower surface of the first sub-modulation waveguide layer, so that electrical signals are transmitted through the first sub-modulation waveguide layer 43131 to the first sub-modulation waveguide layer, i.e., the second modulation waveguide layer 4312.

[0526] In some embodiments, the third modulation waveguide layer 4313 may include a second sub-modulation waveguide layer 43132. The second sub-modulation waveguide layer 43132 may be located above the second sub-modulation waveguide layer. The lower surface of the second sub-modulation waveguide layer 43132 may be in contact with the upper surface of the second sub-modulation waveguide layer, so that electrical signals are transmitted through the second sub-modulation waveguide layer 43132 to the second sub-modulation waveguide layer, i.e., the second modulation waveguide layer 4312.

[0527] A gap may be provided between the second sub-modulation waveguide layer 43132 and the first sub-modulation waveguide layer 43131 , so that electrical signals are transmitted to the second modulation waveguide layer 4312 through the first sub-modulation waveguide layer 43131 and the second sub-modulation waveguide layer 43132 , respectively.

[0528] The first modulation waveguide layer 4311, the second modulation waveguide layer 4312, and the third modulation waveguide layer 4313 form a PIN junction. The PIN junction includes a depletion region (i-region).

[0529] The depletion region may include the second modulation waveguide layer 4312 (i.e., the quantum well modulation waveguide layer), but is not limited to the second modulation waveguide layer 4312. The depletion region includes not only the second modulation waveguide layer 4312 but also a portion of the first modulation waveguide layer 4311 and a portion of the third modulation waveguide layer 4313.

[0530] As shown in FIG39 , the InP modulation waveguide 431 may include a fourth modulation waveguide layer 4314. The fourth modulation waveguide layer 4314 may be located above the third modulation waveguide layer 4313. The lower surface of the fourth modulation waveguide layer 4314 may be in contact with the upper surface of the third modulation waveguide layer 4313. The fourth modulation waveguide layer 4314 may be made of a P-type InGaAs material with a high doping concentration to achieve good contact with the RF electrode 432.

[0531] In some embodiments, the fourth modulation waveguide layer 4314 may include a third sub-modulation waveguide layer 43141. The third sub-modulation waveguide layer 43141 may be located above the first sub-modulation waveguide layer 43131. The lower surface of the third sub-modulation waveguide layer 43141 may be in contact with and connected to the upper surface of the first sub-modulation waveguide layer 43131, so that signals are transmitted to the first sub-modulation waveguide layer 43131 via the third sub-modulation waveguide layer 43141.

[0532] In some embodiments, the fourth modulation waveguide layer 4314 may include a fourth sub-modulation waveguide layer 43142. The fourth sub-modulation waveguide layer 43142 may be located above the second sub-modulation waveguide layer 43132. The lower surface of the fourth sub-modulation waveguide layer 43142 may be in contact with and connected to the upper surface of the second sub-modulation waveguide layer 43132, so that signals are transmitted to the second sub-modulation waveguide layer 43132 via the fourth sub-modulation waveguide layer 43142.

[0533] A gap may be formed between the third sub-modulation waveguide layer 43141 and the fourth sub-modulation waveguide layer 43142 , so that signals are transmitted to the third modulation waveguide layer 4313 through the third sub-modulation waveguide layer 43141 and the fourth sub-modulation waveguide layer 43142 , respectively.

[0534] 39 , an RF electrode 432 may be disposed above the fourth modulation waveguide layer 4314 . The lower surface of the RF electrode 432 may contact the upper surface of the third modulation waveguide layer 4313 , so that electrical signals can be transmitted from the RF electrode 432 to the fourth modulation waveguide layer 4314 .

[0535] Since the RF electrode 432 is also a P-electrode, which can be connected not only to the RF pad but also to the negative terminal of an external power supply, the electrical signal transmitted from the RF electrode 432 to the fourth modulation waveguide layer 4314 includes not only the modulation signal but also the reverse bias voltage.

[0536] In some embodiments, the first RF electrode 4321 (i.e., the first P-electrode) may be located above the third sub-modulation waveguide layer 43141. The first RF electrode 4321 may be in contact with the upper surface of the third sub-modulation waveguide layer 43141, so that the RF signal of the first RF electrode 4321 is transmitted to the first sub-modulation waveguide layer 43131 through the third sub-modulation waveguide layer 43141.

[0537] In some embodiments, the second RF electrode 4322 (i.e., the second P-electrode) may be located above the fourth sub-modulation waveguide layer 43142. The second RF electrode 4322 may be in contact with the upper surface of the fourth sub-modulation waveguide layer 43142, so that the RF signal of the second RF electrode 4322 is transmitted to the second sub-modulation waveguide layer 43132 through the fourth sub-modulation waveguide layer 43142.

[0538] The first P electrode and the second P electrode are respectively loaded with modulation signals. By controlling the change of the external electric field (i.e., the reverse bias voltage provided to the P electrode by the external power supply), the carriers of the PIN junction are changed, thereby changing the refractive index of the quantum well modulation layer, causing a phase difference between the first modulation waveguide and the second modulation waveguide. The output light intensity varies with the phase difference, that is, the output light intensity is modulated by the modulated electrical signal. After modulation, the modulated electrical signal becomes the output light intensity of the modulated optical signal, thereby achieving modulation. Among them, the first modulation waveguide is half of the InP modulation waveguide 431 where the first sub-modulation waveguide layer 43131 is located, and the second modulation waveguide is the other half of the InP modulation waveguide 431 where the second sub-modulation waveguide layer 43132 is located.

[0539] FIG40 is a graph showing the relationship between the quantum well absorption coefficient and wavelength, according to some embodiments. In FIG40 , the horizontal axis represents wavelength, and the vertical axis represents the absorption coefficient. The solid line represents the absorption coefficient curve when the reverse bias voltage is 0V, and the dashed line represents the absorption coefficient curve when the reverse bias voltage is -3V. As shown in FIG40 , as the reverse bias voltage increases, the quantum well absorption coefficient redshifts, i.e., the quantum well absorption coefficient increases. As the quantum well absorption increases, the quantum well absorption loss of the PIN junction increases.

[0540] As shown in Figure 40, the exciton absorption peak of the quantum well is at 1382 nm, and its absorption coefficient at 1550 nm is 1 / cm. When the voltage is increased to -3 volts, its exciton absorption peak shifts to 1403 nm, and its absorption coefficient at 550 nm is 1.4 / cm.

[0541] FIG41 illustrates the width of the depletion region of a PIN junction when the reverse bias voltage is 0 V, according to some embodiments. FIG42 illustrates the width of the depletion region of a PIN junction when the reverse bias voltage is -3 V, according to some embodiments. As shown in FIG41 and FIG42 , as the reverse bias voltage increases, the width of the depletion region increases, resulting in a decrease in carrier absorption loss in the PIN junction.

[0542] If the number of quantum wells in the second modulation waveguide layer is small, the change in the reverse bias voltage of the external power supply has little effect on the quantum well absorption coefficient, and there is no need to consider compensating for the increase in quantum well absorption loss. However, when the number of quantum wells increases, the change in the reverse bias voltage of the external power supply will affect the change in the quantum absorption coefficient, resulting in an increase in the quantum well absorption loss of the PIN junction. Excessive quantum well absorption loss will produce residual amplitude modulation, which will be added to the phase modulation of the Inp modulation waveguide, affecting the accuracy of the phase modulation of the Inp modulation waveguide. To solve this problem, in some embodiments, the reduction in carrier absorption loss is adjusted by optimizing the P doping concentration of the third modulation waveguide layer 4313 and the N doping concentration of the first modulation waveguide layer 4311 to compensate for the increase in quantum well absorption loss, avoid the generation of residual amplitude modulation, and improve the accuracy of phase modulation.

[0543] Due to the same doping concentration, the absorption loss of the P-doped third modulation waveguide layer 4313 is greater than the absorption loss of the N-doped first modulation waveguide layer 4311 (approximately 10 times). Therefore, in some embodiments, the reduction in carrier absorption loss is adjusted by optimizing the P-doping concentration of the third modulation waveguide layer 4313 to compensate for the increase in quantum well absorption loss.

[0544] If the P doping concentration of the third modulation waveguide layer 4313 is too low, the reverse bias voltage will cause the width of the depletion region to be too large, and more reverse bias voltage will fall outside the quantum well modulation waveguide layer, reducing the modulation efficiency of the InP modulation waveguide 431. If the P doping concentration of the third modulation waveguide layer 4313 is too high, the high P doping concentration will cause the width of the depletion region to be small, resulting in greater carrier absorption loss and greater optical loss. Therefore, in some embodiments, the P doping concentration of the third modulation waveguide layer 4313 can be within a first preset range. The first preset range can be 2-6e 17 cm -3 For example, the first preset range may be 2-4e 17 cm -3 The first preset range can be 4-6e 17 cm -3 .

[0545] In some embodiments, the P doping concentration of the first sub-modulation waveguide layer 43131 may be in the range of 2-6e 17 cm -3 .

[0546] In some embodiments, the P doping concentration of the second sub-modulation waveguide layer 43132 may be in the range of 2-6e 17 cm -3 .

[0547] If the N-doping concentration of the first modulation waveguide layer 4311 is too low, the reverse bias voltage will cause the width of the depletion region to be too large, and more reverse bias voltage will fall outside the quantum well modulation waveguide layer, reducing the modulation efficiency of the InP modulation waveguide 431. If the N-doping concentration of the first modulation waveguide layer 431 is too high, the high N-doping concentration will cause the width of the depletion region to be small, resulting in greater carrier absorption loss and greater optical loss. Therefore, in some embodiments, the N-doping concentration of the first modulation waveguide layer 431 may be within a second preset range. The second preset range may be 1-5e 18 cm -3 For example, the second preset range may be 1-3e 18 cm -3 The second preset range can be 3-5e 18 cm -3 .

[0548] Figure 43 is a second cross-sectional view of a hybrid InP / Si optical chip according to some embodiments. Figure 43 shows the cross-sectional structure of a hybrid InP / Si optical chip outside the InP region, excluding the InP region. As shown in Figure 43 , in some embodiments, Si platform 440 may include a silicon substrate 441. Silicon substrate 441 may include a substrate layer 4411. A BOX layer 4412 may be disposed above substrate layer 4411.

[0549] As shown in FIG43 , a plurality of silicon waveguides may be provided on a silicon substrate 441. The silicon waveguides may be located above a BOX layer 4412. The silicon waveguides may include an input and output waveguide 442.

[0550] The input-output waveguide 442 may include a first input-output waveguide layer 4421 . The first input-output waveguide layer 4421 may be located above the BOX layer 4412 .

[0551] The input / output waveguide 442 may include a second input / output waveguide layer 4422. The second input / output waveguide layer 4422 may be located above the first input / output waveguide layer 4421. The width of the second input / output waveguide layer 4422 may be smaller than the length of the first input / output waveguide layer 4421.

[0552] The input-output waveguide 442 includes a first input-output waveguide and a second input-output waveguide. The first input-output waveguide and the second input-output waveguide are respectively located on both sides of the InP region. The light emitted by the light source that does not carry data is transmitted to the InP region through the first input-output waveguide. The light that does not carry data is modulated into light that carries data in the InP region. The light that carries data is transmitted out of the optical chip through the second input-output waveguide.

[0553] The first input and output waveguide is a silicon waveguide, and the first input and output waveguide and the silicon modulation waveguide are located on the same layer of the optical chip. Light can be completely transmitted from the first input and output waveguide to the silicon modulation waveguide. However, because the width of the silicon modulation waveguide is much smaller than the width of the InP modulation waveguide 431, the refractive index difference between the InP modulation waveguide 431 and the silicon modulation waveguide is large, resulting in a large difference in the effective refractive index between the silicon modulation waveguide and the InP modulation waveguide 431. The large difference in the effective refractive index between the silicon modulation waveguide and the InP modulation waveguide 431 means that the propagation constants of the silicon modulation waveguide and the InP modulation waveguide 431 differ significantly, making it difficult to couple light between the silicon modulation waveguide and the InP modulation waveguide 431, resulting in low coupling efficiency.

[0554] To address this issue, in some embodiments, an optical coupler is provided between the input and output waveguides and the modulation waveguide. The optical coupler includes a silicon coupling waveguide layer and an InP coupling waveguide layer. The InP coupling waveguide layer is located above the silicon coupling waveguide layer. Both the silicon coupling waveguide layer and the InP coupling waveguide layer include a gradient region. The gradient region of the InP coupling waveguide layer overlaps with the gradient region of the silicon coupling waveguide layer. From the input and output waveguides to the modulation waveguide, the gradient region of the silicon coupling waveguide layer gradually decreases in width, while the gradient region of the InP coupling waveguide layer gradually increases in width. That is, the gradient region of the silicon coupling waveguide layer decreases in width in the same direction as the gradient region of the InP coupling waveguide layer increases in width.

[0555] The width of the gradient region of the silicon coupling waveguide layer gradually decreases, and the effective refractive index of the gradient region of the silicon coupling waveguide layer gradually decreases. The width of the gradient region of the InP coupling waveguide layer gradually increases, and the effective refractive index of the gradient region of the InP coupling waveguide layer gradually increases.

[0556] There is an overlapping area between the gradient zone of the indium phosphide coupling waveguide layer and the gradient zone of the silicon coupling waveguide layer. The effective refractive index of the gradient zone of the silicon coupling waveguide layer gradually decreases, and the effective refractive index of the gradient zone of the indium phosphide coupling waveguide layer gradually increases, so that when the effective refractive indices of the two are similar, light is almost completely coupled from the silicon coupling waveguide layer to the InP coupling waveguide layer, or light is almost completely coupled from the InP coupling waveguide layer to the silicon coupling waveguide layer, thereby improving the optical coupling efficiency between the silicon coupling waveguide layer and the indium phosphide coupling waveguide layer.

[0557] However, since the effective refractive index of the two layers gradually increases and decreases, respectively, once light is coupled from the coupling waveguide layer with a gradually decreasing effective refractive index to the coupling waveguide layer with a gradually increasing effective refractive index, the light will no longer be coupled from the coupling waveguide layer with a gradually increasing effective refractive index to the coupling waveguide layer with a gradually decreasing effective refractive index. For example, if the effective refractive index of the silicon coupling waveguide layer gradually decreases and the effective refractive index of the indium phosphide coupling waveguide layer gradually increases, light coupled from the silicon coupling waveguide layer to the indium phosphide coupling waveguide layer will no longer be coupled from the indium phosphide coupling waveguide layer to the silicon coupling waveguide layer.

[0558] For the optical coupler between the first input and output waveguide and the InP region, the effective refractive index of the gradient region of the silicon coupling waveguide layer gradually decreases from the first input and output waveguide to the modulation waveguide, while the effective refractive index of the gradient region of the InP coupling waveguide layer gradually increases, so that when the effective refractive indices of the two are similar, light is almost completely coupled from the silicon coupling waveguide layer to the InP coupling waveguide layer, thereby improving the optical coupling efficiency between the silicon coupling waveguide layer and the indium phosphide coupling waveguide layer.

[0559] For the optical coupler between the InP region and the second input and output waveguide, the effective refractive index of the gradient region of the silicon coupling waveguide layer gradually increases from the modulation waveguide to the second input and output waveguide, while the effective refractive index of the gradient region of the InP coupling waveguide layer gradually decreases, so that when the effective refractive indices of the two are similar, light is almost completely coupled from the InP coupling waveguide layer to the silicon coupling waveguide layer, thereby improving the optical coupling efficiency between the silicon coupling waveguide layer and the indium phosphide coupling waveguide layer.

[0560] The optical coupler is specifically described by taking the optical coupler between the first input and output waveguide and the InP region as an example.

[0561] Figure 44 is a third cross-sectional view of a hybrid InP / Si optical chip according to some embodiments. Figure 44 illustrates a cross-sectional structure of a hybrid InP / Si optical chip, with the cross section taken through an optical coupler. Figure 44 illustrates a hybrid InP / Si optical chip taken through the optical coupler. As shown in Figure 44, optical coupler 460 may be disposed on silicon substrate 441. Optical coupler 460 may extend beyond second BOX layer 4412 of silicon substrate 441.

[0562] As shown in Figure 44, in some embodiments, the optical coupler 460 may include a silicon coupling waveguide layer. One end of the silicon coupling waveguide layer may be connected to one end of the input / output waveguide 442. The other end of the silicon coupling waveguide layer may be connected to one end of the silicon modulation waveguide.

[0563] In some embodiments, the silicon coupling waveguide layer includes a first silicon coupling waveguide layer 4601. One end of the first silicon coupling waveguide layer 4601 may be connected to one end of the first input / output waveguide layer 4421. The other end of the first silicon coupling waveguide layer 4601 may be connected to a portion of the silicon modulation waveguide.

[0564] In some embodiments, the silicon coupling waveguide layer includes a second silicon coupling waveguide layer 4602. One end of the second silicon coupling waveguide layer 4602 can be connected to one end of the second input / output waveguide layer 4422. The other end of the second silicon coupling waveguide layer 4602 can be connected to another portion of the silicon modulation waveguide. The second silicon coupling waveguide layer 4602 can be located above the first silicon coupling waveguide layer 4601. The lower surface of the second silicon coupling waveguide layer 4602 can be in contact with and connected to the upper surface of the first silicon coupling waveguide layer 4601. The width of the second silicon coupling waveguide layer 4602 is smaller than the width of the first silicon coupling waveguide layer 4601.

[0565] In some embodiments, the width of the first silicon coupling waveguide layer 4601 may be greater than the width of the second silicon coupling waveguide layer 4602 .

[0566] In some embodiments, the height of the first silicon-coupling waveguide layer 4601 may be smaller than the height of the second silicon-coupling waveguide layer 4602 .

[0567] As shown in FIG44 , in some embodiments, the optical coupler 460 may include an InP coupling waveguide layer. One end of the InP coupling waveguide layer may be suspended above the input and output waveguides, and the other end of the InP coupling waveguide layer may be connected to the InP modulation waveguide 431. The InP coupling waveguide layer may be located above the silicon coupling waveguide layer. The silicon coupling waveguide layer may couple light to the InP coupling waveguide layer.

[0568] In some embodiments, the InP coupling waveguide layer may include an n-InP coupling waveguide layer 4603. The n-InP coupling waveguide layer 4603 may be located above the second silicon coupling waveguide layer 4602. The n-InP coupling waveguide layer 4603 may be mainly composed of N-type doped InP material.

[0569] In some embodiments, the InP coupling waveguide layer may include a quantum well coupling waveguide layer 4604. The quantum well coupling waveguide layer 4604 may be located above the n-InP coupling waveguide layer 4603. The lower surface of the quantum well coupling waveguide layer 4604 may be in contact with the upper surface of the n-InP coupling waveguide layer 4603. The quantum well coupling waveguide layer 4604 may be primarily composed of InGaAsP or InAlGaAs multi-layer quantum well material.

[0570] In some embodiments, the width of the n-InP coupling waveguide layer 4603 may be greater than the width of the quantum well coupling waveguide layer 4604 .

[0571] In some embodiments, the height of the n-InP coupling waveguide layer 4603 may be smaller than the height of the quantum well coupling waveguide layer 4604 .

[0572] In some embodiments, the InP coupling waveguide layer may include a p-InP coupling waveguide layer 4605. The p-InP coupling waveguide layer 4605 may be located above the quantum well coupling waveguide layer 4604. The lower surface of the p-InP coupling waveguide layer 4605 may be in contact with the upper surface of the quantum well coupling waveguide layer 4604. The p-InP coupling waveguide layer 4605 may be mainly composed of P-type doped InP material.

[0573] In some embodiments, the width of the quantum well coupling waveguide layer 4604 may be greater than the width of the p-InP coupling waveguide layer 4605 .

[0574] In some embodiments, the height of the quantum well coupling waveguide layer 4604 may be smaller than the height of the p-InP coupling waveguide layer 4605 .

[0575] Due to the different lattice constants of the silicon-coupled waveguide layer and the InP-coupled waveguide layer, the stress between the two layers is relatively high. To relieve the stress between the two layers, a gap is provided between the two layers. Specifically, a buffer layer 4606 is provided between the two layers. Buffer layer 4606 may be a SiO2 filling layer. Buffer layer 4606 is used to relieve the stress between the two layers, thereby providing a buffering effect.

[0576] In some embodiments, the height of the buffer layer 4606 is 10-100 nm, for example, the height of the buffer layer 4606 is 10-30 nm, the height of the buffer layer 4606 is 30-70 nm, and the height of the buffer layer 4606 is 70-100 nm.

[0577] The silicon coupling waveguide layer and the InP coupling waveguide layer are embedded in SiO 2 (silicon dioxide) so that the silicon coupling waveguide layer and the InP coupling waveguide layer are surrounded by SiO 2 .

[0578] FIG45 is a top view of a first silicon-coupled waveguide layer provided in accordance with some embodiments. As shown in FIG45 and Table 1, in some embodiments, the first silicon-coupled waveguide layer 4601 may include a first gradient region. The width of the first gradient region may gradually decrease from the input and output waveguides to the modulation waveguide (i.e., from left to right). The width of the first gradient region may gradually decrease, and the effective refractive index of the first gradient region may gradually increase.

[0579] As shown in FIG45 and Table 1, the first gradient region may include a first Si slab taper. The length of the first Si slab taper is 12 μm. The width of the first Si slab taper may be changed from 5.5 μm to 4.5 μm.

[0580] The first gradient region may include a second silicon substrate gradient strip. The second silicon substrate gradient strip may have a length of 10 μm and a width changed from 4.5 μm to 3.5 μm.

[0581] The first gradient region may include a third silicon substrate gradient strip. The length of the third silicon substrate gradient strip may be 12 μm. The width of the third silicon substrate gradient strip may be changed from 3.5 μm to 2.5 μm.

[0582] The first gradient region may include a fourth silicon substrate gradient strip. The fourth silicon substrate gradient strip may have a length of 14 μm and a width changed from 2.5 μm to 1.5 μm.

[0583] The first gradient region may include a fifth silicon substrate gradient strip, the length of the fifth silicon substrate gradient strip may be 16 μm, and the width of the fifth silicon substrate gradient strip may be changed from 1.5 μm to 0.9 μm.

[0584] The first gradient region may include a sixth silicon substrate gradient strip, the length of the sixth silicon substrate gradient strip may be 16 μm, and the width of the sixth silicon substrate gradient strip may be changed from 0.9 μm to 0.6 μm.

[0585] Table 1 is the parameter table of silicon substrate gradient strip

[0586] FIG46 is a top view of a second silicon-coupled waveguide layer provided in accordance with some embodiments. As shown in FIG46 and Table 2, the second silicon-coupled waveguide layer 4602 may include a second gradient region. The width of the second gradient region gradually decreases from the input and output waveguides to the modulation waveguide (i.e., from left to right). As the width of the second gradient region gradually decreases, the effective refractive index of the second gradient region gradually increases.

[0587] As shown in FIG46 and Table 2, the second gradient region may include a first silicon ridge taper. The length of the first silicon ridge taper is 12 μm. The width of the first silicon ridge taper may be changed from 2.0 μm to 1.6 μm.

[0588] The second gradient region may include a second silicon ridge gradient strip. The second silicon ridge gradient strip may have a length of 10 μm and a width changed from 1.6 μm to 1.2 μm.

[0589] The second gradient region may include a third silicon ridge gradient strip. The third silicon ridge gradient strip may have a length of 12 μm and a width changed from 1.2 μm to 0.9 μm.

[0590] The second gradient region may include a fourth silicon ridge gradient strip. The fourth silicon ridge gradient strip may have a length of 14 μm and a width changed from 0.9 μm to 0.6 μm.

[0591] The second gradient region may include a fifth silicon ridge gradient strip. The length of the fifth silicon ridge gradient strip may be 16 μm. The width of the fifth silicon ridge gradient strip may be changed from 0.6 μm to 0.3 μm.

[0592] Table 2 is the parameter table of silicon ridge gradient strip

[0593] FIG47 is a top view of a quantum well coupling waveguide layer according to some embodiments. As shown in FIG47 and Table 3, the quantum well coupling waveguide layer 4604 may include a third gradient region. The width of the third gradient region gradually increases from the input and output waveguides to the modulation waveguide (i.e., from left to right). As the width of the third gradient region gradually increases, the effective refractive index of the third gradient region gradually increases.

[0594] As shown in FIG47 and Table 3, the third gradient region may include a first quantum well step surface gradient strip (MQWs Mesa taper). The length of the first quantum well step surface gradient strip is 10 μm. The width of the first quantum well step surface gradient strip may be changed from 0.2 μm to 0.4 μm.

[0595] The third gradient region may include a second quantum well step surface gradient strip. The length of the second quantum well step surface gradient strip may be 15 μm. The width of the second quantum well step surface gradient strip may be changed from 0.4 μm to 0.8 μm.

[0596] The third gradient region may include a third quantum well step surface gradient strip. The length of the third quantum well step surface gradient strip may be 17.5 μm. The width of the third quantum well step surface gradient strip may be changed from 0.8 μm to 1.6 μm.

[0597] The third gradient region may include a fourth quantum well step surface gradient strip. The fourth quantum well step surface gradient strip may have a length of 22.5 μm and a width changed from 1.6 μm to 2.4 μm.

[0598] The third gradient region may include a fifth quantum well step surface gradient strip. The fifth quantum well step surface gradient strip may have a length of 27.5 μm and a width changed from 2.4 μm to 3.2 μm.

[0599] The third gradient region may include a sixth quantum well step surface gradient strip. The sixth quantum well step surface gradient strip may have a length of 27.5 μm. The fifth quantum well step surface gradient strip may have a width changed from 3.2 μm to 6.2 μm.

[0600] Table 3 is the parameter table of quantum well step surface gradient strip

[0601] FIG48 is a top view of a p-InP coupled waveguide layer according to some embodiments. As shown in FIG48 and Table 4, the p-InP coupled waveguide layer 4605 may include a fourth gradient region. The width of the fourth gradient region gradually increases from the input and output waveguides to the modulation waveguide (i.e., from left to right). The width of the fourth gradient region gradually increases, and the effective refractive index of the fourth gradient region gradually increases.

[0602] As shown in FIG44 and Table 4, the fourth gradient region may include a first InP ridge waveguide gradient strip (InP ridge taper). The width of the first InP ridge waveguide gradient strip may be changed from 0.2 μm to 0.4 μm.

[0603] The third gradient region may include a second indium phosphorus ridge waveguide gradient strip, and the width of the second indium phosphorus ridge waveguide gradient strip may be changed from 0.4 μm to 0.8 μm.

[0604] The third gradient region may include a third indium phosphorus ridge waveguide gradient strip, and the width of the third indium phosphorus ridge waveguide gradient strip may be changed from 0.8 μm to 1.6 μm.

[0605] The third gradient region may include a fourth indium phosphorus ridge waveguide gradient strip, and the width of the fourth indium phosphorus ridge waveguide gradient strip may be changed from 1.6 μm to 2.4 μm.

[0606] Table 4 is the parameter table of the InP ridge waveguide gradient strip

[0607] Figure 49 shows an overlapping diagram of a first silicon-coupled waveguide layer, a second silicon-coupled waveguide layer, a quantum-coupled waveguide layer, and a p-InP-coupled waveguide layer, according to some embodiments. Figure 50 shows a combined diagram of a first silicon-coupled waveguide layer, a second silicon-coupled waveguide layer, a quantum-coupled waveguide layer, and a p-InP-coupled waveguide layer, according to some embodiments. As shown in Figures 49 and 50, from left to right, the width of the gradient region of the silicon-coupled waveguide layer decreases, while the width of the gradient region of the InP-coupled waveguide layer increases. There is an overlap between the gradient regions of the silicon-coupled waveguide layer and the InP-coupled waveguide layer.

[0608] The width of the gradient zone of the silicon coupling waveguide layer gradually decreases, resulting in a gradual decrease in the effective refractive index of the gradient zone of the silicon coupling waveguide layer. The width of the gradient zone of the InP coupling waveguide layer gradually increases, resulting in an increase in the effective refractive index of the gradient zone of the InP coupling waveguide layer. The effective refractive index of the gradient zone of the silicon coupling waveguide layer gradually decreases, while the effective refractive index of the gradient zone of the InP coupling waveguide layer gradually increases. When the effective refractive indices of the two are similar, light can be coupled between the silicon coupling waveguide layer and the InP coupling waveguide layer. However, due to the increase in the effective refractive index of the InP coupling waveguide layer, after light is coupled from the silicon coupling waveguide layer to the InP coupling waveguide layer, it will no longer be coupled from the InP coupling waveguide layer to the silicon coupling waveguide layer.

[0609] As shown in FIG. 49 and FIG. 50 , in some embodiments, the starting point of the quantum well coupling waveguide layer and the starting point of the p-indium phosphide coupling waveguide layer may both be located above the first end of the silicon coupling waveguide layer.

[0610] As shown in FIG. 49 and FIG. 50 , in some embodiments, the end point of the quantum well coupling waveguide layer and the end point of the p-indium phosphide coupling waveguide layer may both be located above the second end of the silicon coupling waveguide layer.

[0611] The starting point of the quantum well coupling waveguide layer and the starting point of the p-Indium Phosphate coupling waveguide layer may both be located above the first end of the silicon coupling waveguide layer, and the ending point of the quantum well coupling waveguide layer and the ending point of the p-Indium Phosphate coupling waveguide layer may both be located above the second end of the silicon coupling waveguide layer, so that an overlapping region exists between the Indium Phosphate coupling waveguide layer and the silicon coupling waveguide layer. The width of the first end of the silicon coupling waveguide layer is greater than the width of the second end of the silicon coupling waveguide layer.

[0612] As shown in FIG. 49 and FIG. 50 , the first gradient region of the first silicon coupling waveguide layer 4601 and the second gradient region of the second silicon coupling waveguide layer 4602 have the same width reduction direction.

[0613] As shown in FIG49 and FIG50, the width increasing direction of the third gradient region of the quantum well coupling waveguide layer 4604 and the fourth gradient region of the p-InP coupling waveguide layer 4605 is the same.

[0614] As shown in Figures 49 and 50, the direction in which the width of the first gradient zone of the first silicon coupling waveguide layer 4601 and the gradient zone of the second silicon coupling waveguide layer 4602 decreases is the same as the direction in which the width of the third gradient zone of the quantum well coupling waveguide layer 4604 and the fourth gradient zone of the p-InP coupling waveguide layer 4605 increases.

[0615] Since the height of the n-InP coupling waveguide layer 4603 is much smaller than the height of the quantum well coupling waveguide layer 4604, the shape of the n-InP coupling waveguide layer 4603 has little effect on light coupling. Therefore, in some embodiments, the shape of the n-InP coupling waveguide layer 4603 is rectangular.

[0616] In some embodiments, the width of the n-InP coupling waveguide layer 4603 gradually increases from the input and output waveguides to the modulation waveguide, so that the shape of the n-InP coupling waveguide layer 4603 is tapered.

[0617] From the input and output waveguides to the modulation waveguide, the width of the n-InP coupling waveguide layer 4603 gradually increases, that is, the width increase direction of the n-InP coupling waveguide layer 4603 is the same as the width increase direction of the third gradient zone of the quantum well coupling waveguide layer 4604 or the fourth gradient zone of the p-InP coupling waveguide layer 4605, so that the boundary surface between the n-InP coupling waveguide layer 4603 and the buffer layer 4606 is a slope to minimize the light from returning along the original path.

[0618] Figure 51 is a diagram illustrating light distribution in an optical coupler according to some embodiments. As shown in Figure 51 , after light is coupled from the silicon coupling waveguide layer to the InP coupling waveguide layer, the light is primarily concentrated in the quantum well coupling waveguide layer.

[0619] Figure 52 shows the FDTD simulation results of an optical coupler according to some embodiments. The horizontal axis in Figure 52 represents wavelength, and the vertical axis represents power transmission loss. As shown in Figure 52 , the optical coupler's light loss (i.e., transmission loss) is relatively low, primarily between 0.06 and 0.08 dB, demonstrating the optical coupler's excellent coupling performance.

[0620] FIG53 is a schematic diagram of the growth of an optical coupler according to some embodiments. As shown in FIG53 , the growth process of the optical coupler is as follows:

[0621] (1) After the silicon substrate 441 is bonded to the long strip of silicon coupling waveguide layer, a first silicon coupling waveguide layer 4601 is first etched on the silicon substrate 441 using an etching process, and a second silicon coupling waveguide layer 4602 is etched on the first silicon coupling waveguide layer 4601 using an etching process. (2) After the second silicon coupling waveguide layer 4602 is bonded to the long strip of indium phosphide coupling waveguide layer, an n-InP coupling waveguide layer 4603 is first etched on the second silicon coupling waveguide layer 4602 using an etching process, and a quantum well coupling waveguide layer 4604 is etched on the n-InP coupling waveguide layer 4603 using an etching process, and finally a p-InP coupling waveguide layer is etched on the quantum well coupling waveguide layer 4604 using an etching process.

[0622] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. An optical module, comprising: circuit boards; A hybrid integrated optical chip is electrically connected to the circuit board, the hybrid integrated optical chip is configured to modulate and generate an optical signal, and the hybrid integrated optical chip includes: The Si-based platform comprises a substrate layer, a cladding layer located above the substrate layer, and a Si waveguide layer located between the substrate layer and the cladding layer; a first heating portion and a second heating portion are embedded in the cladding layer; An InP light-emitting region is provided on the Si-based platform, wherein a plurality of lasers are arranged side by side in the InP light-emitting region; the lasers include an active quantum well layer and a grating layer; the active quantum well layer is configured to output light; the grating layer is provided on the surface of the Si waveguide layer, and the grating layer is configured to select the wavelength of the light output by the active quantum well layer; An InP modulation zone is provided on the Si-based platform and on the light-emitting optical path of the InP light-emitting zone to receive the light output by the laser; a plurality of InP modulators are arranged side by side in the InP modulation zone, and the InP modulators are linear electro-optical modulators; the InP modulators are connected correspondingly to the laser; the InP modulators respectively include a first modulation waveguide and a second modulation waveguide, and the first modulation waveguide and the second modulation waveguide are respectively optically coupled with the laser to receive the light output by the laser and perform signal modulation, thereby generating an optical signal; wherein the first modulation waveguide is arranged adjacent to the first heating part to perform temperature adjustment on the first modulation waveguide by the first heating part; the second modulation waveguide is arranged adjacent to the second heating part to perform temperature adjustment on the second modulation waveguide by the second heating part.

2. The optical module according to claim 1, wherein: The refractive index of the substrate layer is greater than the refractive index of the cladding layer; A first heat isolating portion is formed on one side of the first heating portion, and the first heat isolating portion extends downward from the cladding layer to the substrate layer to reduce heat conducted downward from the first heating portion to the substrate layer; A second heat insulating portion is formed on one side of the second heating portion. The second heat insulating portion penetrates downward from the cladding layer to the substrate layer to reduce heat conducted downward from the second heating portion to the substrate layer.

3. The optical module according to claim 1, wherein: A first heat isolating portion is formed on one side of the first heating portion, and a second heat isolating portion is formed on one side of the second heating portion; The first thermal isolation portion includes a first connecting groove and a second connecting groove, wherein the first connecting groove extends downward and the second connecting groove extends horizontally; The second thermal isolation portion includes a third connecting groove and a fourth connecting groove, wherein the third connecting groove extends downward and the fourth connecting groove extends horizontally.

4. The optical module according to claim 1, wherein: A first heat isolating portion is formed on one side of the first heating portion, and a second heat isolating portion is formed on one side of the second heating portion; The InP modulation area is provided with a plurality of the InP modulators side by side; The first heating parts and the second heating parts corresponding to the plurality of InP modulators constitute a heating area of ​​the hybrid integrated optical chip; The first thermal isolation parts and the second thermal isolation parts corresponding to the plurality of InP modulators constitute a thermal isolation area of ​​the hybrid integrated optical chip; The thermal isolation region wraps the InP modulation region, and the InP modulation region wraps the heating region.

5. The optical module according to claim 1, wherein: The first modulation waveguide and the second modulation waveguide are respectively provided between the first heating portion and the second heating portion.

6. The optical module according to claim 1, wherein: An optical waveguide layer is formed between the substrate layer and the cladding layer; The optical waveguide layer is optically coupled to the first modulation waveguide and the second modulation waveguide respectively.

7. The optical module according to claim 2, wherein: The first heating parts and the second heating parts corresponding to the plurality of InP modulators constitute a heating area of ​​the hybrid integrated optical chip; The first thermal isolation parts and the second thermal isolation parts corresponding to the plurality of InP modulators constitute a thermal isolation area of ​​the hybrid integrated optical chip; The thermal isolation region wraps the InP modulation region, and the InP modulation region wraps the heating region.

8. The optical module according to claim 1, wherein: The laser comprises, from top to bottom, a first electrode metal layer, a p-InP layer, the active quantum well layer, an n-InP layer, and the grating layer; the first electrode metal layer is provided on the surface of the cladding layer; Two ends of the n-InP layer extend relative to the active quantum well layer, so that second electrode metal layers are respectively formed on surfaces of both ends of the n-InP layer; The first electrode metal layer and the second electrode metal layer respectively provide carriers to the active quantum well layer.

9. The optical module according to claim 1, wherein: The laser comprises, from top to bottom, a first electrode metal layer, a p-InP layer, the active quantum well layer, an n-InP layer, and the grating layer; The first modulation waveguide comprises, from top to bottom, a P-InP layer, an active quantum well layer, and an n-InP layer; A first P-electrode metal layer is formed on the surface of the p-InP layer, and both ends of the n-InP layer extend relative to the active quantum well layer, so that a first N-electrode metal layer is respectively provided on the surfaces of both ends of the n-InP layer; The p-InP layer of the first modulation waveguide is located on the same layer as the p-InP layer of the laser, the n-InP layer of the first modulation waveguide is located on the same layer as the n-InP layer of the laser, and the active quantum well layer of the first modulation waveguide is located on the same layer as the active quantum well layer of the laser.

10. The optical module according to claim 1, wherein: A spot converter is provided between the first modulation waveguide, the second modulation waveguide and the Si waveguide layer.

11. The optical module according to claim 1, wherein: The lasers are optically connected to the InP modulators in a one-to-one correspondence.

12. The optical module according to claim 1, wherein: The InP modulator is an InP-based MZ modulator.

13. The optical module according to claim 1, wherein: The hybrid integrated optical chip further includes: A wave splitter is provided on one side of the optical modulator and is configured to output two paths of light to be modulated to the optical modulator respectively; a combiner, provided on the other side of the optical modulator, configured to combine the two optical modulated signals generated by the optical modulator; The optical modulator comprises, from bottom to top: The silicon waveguide layer has a silicon contraction region corresponding to receiving two paths of light to be modulated formed on one end facing the demultiplexer, and a silicon expansion region corresponding to coupling two paths of optical modulation signals formed on one end facing the combiner; The N-type InP layer has a first InP expansion region corresponding to coupling two paths of light to be modulated formed on one end of the splitter, and a first InP contraction region corresponding to coupling two paths of light modulation signals formed on one end of the combiner; The quantum well layer has a second InP expansion region corresponding to coupling two paths of light to be modulated formed on one end of the splitter, and a second InP contraction region corresponding to coupling two paths of light modulation signals formed on one end of the combiner; The P-type InP layer has a third InP expansion region corresponding to coupling two paths of light to be modulated formed on one end facing the splitter, and a third InP contraction region corresponding to coupling two paths of light modulation signals formed on one end facing the combiner; The silicon contraction region, the first InP expansion region, the second InP expansion region, and the third InP expansion region corresponding to a path of light to be modulated are sequentially stacked vertically to couple the light to be modulated in the silicon contraction region upward to the quantum well layer for signal modulation; The silicon expansion region, the first InP contraction region, the second InP contraction region, and the third InP contraction region corresponding to one optical modulation signal are stacked vertically in sequence to couple the optical modulation signal generated by the quantum well layer modulation downward to the silicon expansion region for output.

14. The optical module according to claim 13, wherein: A silicon flat region is formed between the silicon contraction region and the corresponding silicon expansion region; A first InP flat region is formed between the first InP expansion region and the corresponding first InP contraction region; A second InP flat region is formed between the second InP expansion region and the corresponding second InP contraction region; A third InP flat region is formed between the third InP expansion region and the corresponding third InP contraction region; The silicon flat region, the first InP flat region, the second InP flat region, and the third InP flat region corresponding to one light path are stacked vertically in sequence to perform signal modulation in the second InP flat region.

15. The optical module according to claim 13, wherein: A second InP flat region is formed between the second InP expansion region and the corresponding second InP contraction region; the second InP flat region is configured to perform signal modulation; Along the direction from the splitter to the combiner, the waveguide width of the silicon contraction region gradually narrows, and the waveguide widths of the first InP expansion region, the second InP expansion region, and the third InP expansion region gradually widen, so that a path of light to be modulated is coupled to the corresponding silicon contraction region, and then upwardly coupled from the silicon contraction region to the first InP expansion region in the corresponding N-type InP layer and the second InP expansion region in the quantum well layer, and then laterally coupled along the second InP expansion region to the second InP flat region, and signal modulation is performed in the second InP flat region; wherein the generated optical modulated signal is laterally coupled to the second InP contraction region; Along the direction from the splitter to the combiner, the waveguide width of the silicon expansion region gradually widens, and the waveguide widths of the first InP contraction region, the second InP contraction region, and the third InP contraction region gradually narrow, so that an optical modulated signal is sequentially coupled downward from the second InP contraction region to the first InP contraction region in the N-type InP layer and the silicon expansion region of the silicon waveguide layer, and is output along the silicon expansion region.

16. The optical module according to claim 13, wherein: The input end of the combiner is formed with a laser; The laser comprises a silicon waveguide layer at the bottom and an InP light emitting region above the silicon waveguide layer; A grating layer is formed on the upper surface of the silicon waveguide layer; The InP light-emitting area includes from bottom to top: N-type InP layer; stress limiting layer; N-InP ohmic contact layer, with an N-type electrode formed on the surface; quantum well layer; P-type InP layer; The P-InP ohmic contact layer has a P-type electrode formed on its surface.

17. The optical module according to claim 13, wherein: A first heating portion and a second heating portion are respectively formed on both sides of the P-type InP layer; A first heat insulating portion is formed on one side of the first heating portion, and a second heat insulating portion is formed on one side of the second heating portion.

18. The optical module according to claim 13, wherein: The silicon waveguide layer comprises, from bottom to top,: underlying silicon; buried oxide layer; a first silicon ridge waveguide and a second silicon ridge waveguide respectively located on both sides of the upper surface of the buried oxide layer; The input end of the first silicon ridge waveguide is configured to receive a path of light to be modulated, and the output end is configured to output a path of optical modulation signal; The input end of the second silicon ridge waveguide is configured to receive another path of light to be modulated, and the output end is configured to output another path of optical modulated signal.

19. The optical module according to claim 13, wherein: Along the direction from one end of the optical modulator to the other end, the optical modulator includes a first gradient coupling region, a light modulation region, and a second gradient coupling region; The first tapered coupling region includes, from bottom to top, the silicon contraction region, the first InP expansion region, the second InP expansion region, and the third InP expansion region; The light modulation area includes, from bottom to top, the silicon flat area, the first InP flat area, the second InP flat area, and the third InP flat area; The second tapered coupling region includes, from bottom to top, the silicon expansion region, the first InP contraction region, the second InP contraction region, and the third InP contraction region.

20. An optical module, comprising: circuit boards; A hybrid integrated optical chip is electrically connected to the circuit board, the hybrid integrated optical chip is configured to modulate and generate an optical signal, and the hybrid integrated optical chip includes: The Si-based platform comprises a substrate layer, a cladding layer located above the substrate layer, and a Si waveguide layer located between the substrate layer and the cladding layer; An InP light-emitting region is provided on the Si-based platform, wherein lasers are arranged side by side in the InP light-emitting region; the lasers include an active quantum well layer and a grating layer; the active quantum well layer is configured to output light; the grating layer is provided on the surface of the Si waveguide layer, and the grating layer is configured to select the wavelength of light output by the active quantum well layer; An InP modulation area is provided on the Si-based platform and on the light-emitting optical path of the InP light-emitting area to receive the light output by the laser; various InP modulators are arranged side by side in the InP modulation area, and the InP modulators are linear electro-optical modulators; the InP modulators are connected to the laser accordingly; the InP modulators respectively include a first modulation waveguide and a second modulation waveguide, and the first modulation waveguide and the second modulation waveguide are respectively optically coupled to the laser to receive the light output by the laser and perform signal modulation, thereby generating an optical signal.

21. The optical module according to claim 20, wherein: The laser comprises, from top to bottom, a first electrode metal layer, a p-InP layer, the active quantum well layer, an n-InP layer, and the grating layer; the first electrode metal layer is provided on the surface of the cladding layer; Two ends of the n-InP layer extend relative to the active quantum well layer, so that second electrode metal layers are respectively formed on surfaces of both ends of the n-InP layer; The first electrode metal layer and the second electrode metal layer respectively provide carriers to the active quantum well layer.

22. The optical module according to claim 20, wherein: The laser comprises, from top to bottom, a first electrode metal layer, a p-InP layer, the active quantum well layer, an n-InP layer, and the grating layer; The first modulation waveguide comprises, from top to bottom, a P-InP layer, an active quantum well layer, and an n-InP layer; A first P-electrode metal layer is formed on the surface of the p-InP layer, and both ends of the n-InP layer extend relative to the active quantum well layer, so that a first N-electrode metal layer is respectively provided on the surfaces of both ends of the n-InP layer; The p-InP layer of the first modulation waveguide is located on the same layer as the p-InP layer of the laser, the n-InP layer of the first modulation waveguide is located on the same layer as the n-InP layer of the laser, and the active quantum well layer of the first modulation waveguide is located on the same layer as the active quantum well layer of the laser.

23. The optical module according to claim 20, wherein: A spot converter is provided between the first modulation waveguide, the second modulation waveguide and the Si waveguide layer.

24. The optical module according to claim 20, wherein The lasers are optically connected to the InP modulators in a one-to-one correspondence.

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