Protection circuit of radio frequency power amplifier

Abstract

The present application provides a protection circuit of a radio frequency power amplifier. The protection circuit consists of an output swing measurement circuit, an N-type current mirror circuit 1, a P-type current mirror circuit, a configurable resistance network, an amplifier and an N-type current mirror circuit 2. The output swing measurement circuit is connected to an output end of a radio frequency power amplifier, and when a voltage swing of the output end of the radio frequency power amplifier exceeds a threshold voltage of the measurement circuit, a current is generated in the current mirror circuit 1. The current in the current mirror circuit 1 is mirrored into the configurable resistance network, and a control voltage V1 is generated on a node 1, and the control voltage V1 is used as a voltage of a positive input end of a feedback amplifier and is replicated to an output end of the feedback amplifier. A current is generated by means of a voltage of an output end of a feedback amplifier on the current mirror circuit 2 and is finally replicated into a bias circuit of the radio frequency power amplifier as a pull-down current for turning off the bias circuit of the radio frequency amplifier, avoiding burnout.

Description

Protection circuit for RF power amplifier

[0001] This application claims priority to Chinese patent application No. 202410323418.X filed on March 20, 2024, and the contents of the above-mentioned Chinese patent application disclosure are hereby incorporated by reference in their entirety as part of this application. Technical Field

[0002] The present invention patent application generally relates to a radio frequency power amplifier, and specifically relates to a protection circuit of a radio frequency power amplifier with a configurable critical power protection value. Background Art

[0003] Existing RF power amplifiers typically connect multiple diodes in series to ground in the power output stage. When the output stage voltage swing exceeds the sum of the threshold voltages of the series diodes, the output stage voltage swing is fixed to the sum of the threshold voltages of the series diodes. This diode clamping function provides protection and prevents burnout.

[0004] RF power amplifiers are typically used in applications with varying power supply voltages, such as 3V, 4V, and 5V. The power supply voltage directly determines the voltage swing of the RF power amplifier's output stage. Therefore, when using a series diode-to-ground approach, the output swing threshold is fixed, equal to the sum of the series diode threshold voltages. This makes it difficult to adapt to applications with varying power supply voltages. Furthermore, the threshold voltage of a single diode is typically 0.7V to 1V. Increasing or decreasing the number of series diodes results in large step changes in the threshold value, making precise adjustment difficult. Summary of the Invention

[0005] The present invention aims to solve the problems that existing power protection circuits are difficult to accurately adjust their critical output voltage swing when shut down, that is, critical output power, and are difficult to adapt to application scenarios with different power supply voltages.

[0006] The present application proposes a protection circuit for a radio frequency power amplifier with a configurable critical power protection value, thereby achieving precise adjustment of the critical power protection value and being able to adapt to application scenarios of various power supply voltages.

[0007] One aspect of the present invention provides a protection circuit for a radio frequency power amplifier, comprising: an output swing detection circuit connected to an output stage of the radio frequency power amplifier for detecting a voltage swing of the output stage of the radio frequency power amplifier, and comprising an M connected in series between the output stage of the radio frequency power amplifier and a ground GND. D diodes, M R resistors and M NMOSNMOS transistors, each NMOS transistor is connected in the form of a diode; an N-type current mirror circuit 1, which is used to mirror the current generated by the output swing detection circuit and provide the mirrored current to the P-type current mirror circuit; the P-type current mirror circuit, which is used to mirror the current generated by the N-type current mirror circuit 1 and generate a control voltage V1 at node 1 between the P-type current mirror circuit and a configurable resistor network; the configurable resistor network is connected to the P-type current mirror circuit via node 1 to receive the current generated by the P-type current mirror circuit, and includes multiple resistors and multiple switches for respectively controlling the multiple resistors; an amplifier, whose positive input terminal is connected to node 1 and uses the control voltage V1 as an input voltage, whose output terminal is directly connected to the negative input terminal and is configured in the form of unity gain negative feedback to copy the control voltage V1 at its positive input terminal to its output terminal; an N-type current mirror circuit 2, which is connected to the output terminal of the amplifier and is used to mirror the current generated at the output terminal of the amplifier, and the mirrored current is connected as a pull-down current to the bias circuit of the RF power amplifier for shutting down the bias circuit of the RF power amplifier.

[0008] Among them, M D 、M R and M NMOS are integers greater than or equal to 1.

[0009] Wherein, the amplifier comprises an operational amplifier with an output buffer stage.

[0010] The N-type current mirror circuit 1 , the N-type current mirror circuit 2 and the P-type current mirror circuit include cascode current mirrors or low-voltage cascode current mirrors.

[0011] When the voltage swing at the output end of the RF power amplifier exceeds the threshold voltage of the output swing detection circuit, a current is generated in the N-type current mirror circuit 1 .

[0012] The N-type current mirror circuit 1 includes NMOS transistors N1 and N2, the P-type current mirror circuit includes PMOS transistors P1 and P2, and the N-type current mirror circuit 2 includes NMOS transistors N5 and N6. The ratio of the sizes of the NMOS transistors N2 and N1 is K. N1 , the size ratio of PMOS tube P2 and P1 is K P , the size ratio of NMOS tube N6 and N5 is K N2; wherein the sources of the NMOS transistors N1 and NMOS transistors N2 of the N-type current mirror circuit 1 are both connected to the ground GND, the N-type current mirror circuit 1 mirrors the current on the NMOS transistor N1 to the NMOS transistor N2, and provides the mirrored current to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the drain of the NMOS transistor N2, the sources of the PMOS transistors P1 and P2 of the P-type current mirror circuit are both connected to the power supply voltage VDD, the drain of the PMOS transistor P2 is connected to the configurable resistor network, the P-type current mirror circuit mirrors the current on the PMOS transistor P1 to the PMOS transistor P2 and generates a control voltage V1 at a node 1 between the drain of the PMOS transistor P2 and the configurable resistor network; the NMOS transistor N5 of the N-type current mirror circuit 2 is connected to the output end of the amplifier via the resistor R2, the N-type current mirror circuit 2 is used to mirror the current generated on the NMOS transistor N5 at the output end of the amplifier to the NMOS transistor N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

[0013] The output swing detection circuit includes a diode D1, a resistor R1, and NMOS transistors N1 and N3 connected in series between the output stage of the RF power amplifier and the ground GND, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor 3 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier; the N-type current mirror circuit 1 also includes an NMOS transistor N4, and the current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistor N4, wherein the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2, the gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3, and the drain of the NMOS transistor N4 is connected to the drain and gate of the PMOS transistor P1.

[0014] The output swing detection circuit includes diodes D1 and D2, a resistor R1, and NMOS transistors N1, N3, and N7 connected in series between the output stage of the RF power amplifier and the ground GND, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor N3 are commonly connected to the source of the NMOS transistor N7, the drain and gate of the NMOS transistor 7 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D2, the anode of the diode D2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the cathode of the RF power amplifier. The N-type current mirror circuit 1 further includes NMOS transistors N4 and N8, and the current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistors N4 and N8, wherein the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2, the gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3, the drain of the NMOS transistor N4 is connected to the source of the NMOS transistor N8, the gate of the NMOS transistor N8 is connected to the gate of the NMOS transistor N7, and the drain of the NMOS transistor N8 is connected to the drain and gate of the PMOS transistor P1.

[0015] The configurable resistor network includes resistors R3, R4 to Rn and switches 3, 4 to n. Switch 3 and resistors R3, R4 to Rn are connected in series between node 1 and ground. A first end of each of switches 3, 4 to n is connected to node 1, a second end of switch 3 is connected to a first end of resistor R3, a second end of switch 4 is connected to a second end of resistor R3 and a first end of resistor R4, and a second end of switch n is connected to a second end of resistor Rn-1 and a first end of resistor Rn. The second end of resistor Rn is connected to ground.

[0016] The configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between node 1 and ground, wherein the third resistor unit includes a resistor R3 and a switch 3 connected in series, the fourth resistor unit includes a resistor R4 and a switch 4 connected in series, and the nth resistor unit includes a resistor Rn and a switch n connected in series. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 is a schematic diagram illustrating a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the inventive concept.

[0018] FIG2 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a first embodiment of the present invention.

[0019] FIG3 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a second embodiment of the present invention. DETAILED DESCRIPTION

[0020] Before proceeding with the detailed description below, it may be helpful to set forth the definitions of certain words and phrases used throughout this patent document. The terms "couple," "connect," and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmit," "receive," and "communicate," and their derivatives, encompass both direct and indirect communication. The terms "include," "comprise," and their derivatives, mean including, but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with..." and its derivatives mean including, included within, interconnected, containing, contained within, connected or connected with, coupled or coupled with, communicate with, cooperate with, intertwine, juxtapose, approach, bound or bound with, have, have an attribute of, have a relationship with, or have a relationship with, etc. The term "controller" refers to any device, system, or portion thereof that controls at least one operation. Such a controller may be implemented using hardware, or a combination of hardware and software and / or firmware. The functionality associated with any particular controller may be centralized or distributed, whether local or remote. The phrase "at least one of," when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be needed. For example, "at least one of A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A, B, and C.

[0021] Throughout the text, N-type transistor refers to NMOS transistor, and P-type transistor refers to PMOS transistor.

[0022] Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0023] In this patent document, the application combination of modules and the division level of sub-modules are only used for illustration. Without departing from the scope of this disclosure, the application combination of modules and the division level of sub-modules can have different forms.

[0024] FIG. 1 is a schematic diagram illustrating a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the inventive concept.

[0025] The protection circuit of the radio frequency power amplifier with configurable critical power protection value according to the present invention is composed of an output swing detection circuit, an N-type current mirror circuit 1, a P-type current mirror circuit, a configurable resistor network, an amplifier, and an N-type current mirror circuit 2. The output swing detection circuit is connected to the output end of the radio frequency power amplifier and includes an MD diodes, M R resistors and M NMOS NMOS tubes, each NMOS tube is connected in the form of a diode, where M D 、M R and M NMOS are all integers greater than or equal to 1. When the voltage swing at the output of the RF power amplifier exceeds the threshold voltage of the output swing detection circuit, a current is generated in the mirror current circuit 1. The current in the mirror current circuit 1 is mirrored to a configurable resistor network comprising multiple resistors and multiple switches for controlling the multiple resistors, generating a control voltage V1 at node 1. The control voltage V1 serves as the positive input voltage of the feedback amplifier and is copied to the output of the feedback amplifier. The voltage at the output of the feedback amplifier generates a current in the mirror current circuit 2, which is ultimately copied to the bias circuit of the RF power amplifier as a pull-down current, shutting down the bias circuit of the RF amplifier to prevent burnout.

[0026] Compared with the existing method, the critical power protection value of the present invention is adjustable. In this regard, the first embodiment and the second embodiment of the present invention will be described in detail with reference to FIG2 and FIG3.

[0027] FIG2 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a first embodiment of the present invention.

[0028] The following describes various parts of the protection circuit and their functions with reference to FIG. 2 .

[0029] The output swing detection circuit includes a diode D1, a resistor R1, and N-type transistors N1 and N3 connected in the form of diodes. It is used to detect the voltage swing of the output stage and generate current when the output swing exceeds its threshold voltage.

[0030] The N-type current mirror circuit 1 includes N-type transistors N1 and N2, and mirrors the current generated by the output swing detection circuit.

[0031] The P-type current mirror circuit includes P-type transistors P1 and P2, which mirror the current generated by the N-type current mirror circuit 1 and inject it into a configurable resistor network.

[0032] The configurable resistor network includes resistors R3, R4, ..., Rn and switches 3, 4, ..., n. Different resistance values ​​can be configured by turning on different switches. The current generated by the P-type current mirror circuit flows through the configurable resistor network, generating a control voltage V1, which serves as the input voltage of the feedback amplifier.

[0033] The positive input of the amplifier is connected to node 1, with the control voltage V1 as input, and its output is directly connected to the negative input, configured in the form of unity gain negative feedback, copying the voltage V1 at its positive input to the output.

[0034] The N-type current mirror circuit 2 mirrors the current generated on the N-type transistor N5 at the output end of the amplifier to the N-type transistor N6, and connects it to the bias circuit of the power amplifier as a pull-down current.

[0035] The amplifier includes an operational amplifier with an output buffer stage, and the output buffer stage is configured as a 1:1 amplifier for output impedance matching.

[0036] The number of diodes, the number of resistors, and the number of N-type transistors connected in the form of diodes in the output swing detection circuit are adjustable.

[0037] Among them, the N-type current mirror circuit and the P-type current mirror circuit include a cascode current mirror and a low-voltage cascode current mirror.

[0038] The connection relationship of the various parts of the protection circuit will be described below with reference to FIG. 2 .

[0039] The output swing detection circuit includes a diode D1, a resistor R1, and NMOS transistors N1 and N3 connected in the form of diodes, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor 3 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier.

[0040] The N-type current mirror circuit 1 includes NMOS transistors N1 and N2, and an NMOS transistor N4. NMOS transistors N1 and N2 are used to mirror the current generated by N-type transistor N1 to N-type transistor N2. NMOS transistor N4 is used to reduce the channel length modulation effect, making the current replication of the N-type current mirror circuit 1 more accurate. The P-type current mirror circuit includes PMOS transistors P1 and P2. The current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of PMOS transistor P1 of the P-type current mirror circuit via NMOS transistor N4. The source of NMOS transistor N4 is connected to the drain of NMOS transistor N2, the gate of NMOS transistor N4 is connected to the gate of NMOS transistor N3, and the drain of NMOS transistor N4 is connected to the drain and gate of PMOS transistor P1.

[0041] The configurable resistor network includes resistors R3, R4, ..., Rn connected in series, and switches 3, switch 4, ..., switch n connected in series with the resistors R3, R4, ..., Rn, respectively. Switch 3 and the resistors R3, R4, ..., Rn are connected in series between node 1 and ground, respectively. A first end of each of switches 3, 4, ..., switch n is connected to node 1, a second end of switch 3 is connected to the first end of resistor R3, a second end of switch 4 is connected to the second end of resistor R3 and the first end of resistor R4, and a second end of switch n is connected to the second end of resistor Rn-1 and the first end of resistor Rn. The second end of resistor Rn is connected to ground.

[0042] The positive input of the amplifier is connected to node 1, with the control voltage V1 as input, and its output is directly connected to the negative input, configured in the form of unity gain negative feedback, copying the voltage V1 at its positive input to the output.

[0043] The N-type current mirror circuit 2 mirrors the current generated on the NMOS transistor N5 at the output end of the amplifier to the NMOS transistor N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

[0044] In the first embodiment, the pull-down current generated on the N-type transistor N6 is:

[0045] Where Vout is the output voltage of the RF power amplifier, V T.D1 is the threshold voltage of diode D1, V T.N1 is the threshold voltage of N-type tube N1, V T.N3 is the threshold voltage of N-type tube N3, V T.N5 is the threshold voltage of N5, N2 / N1 is the ratio of the sizes of N2 and N1, K N1 , P2 / P1 is the ratio of the size of the P-type tube P2 and P1 K P , N6 / N5 is the ratio of the size of NMOS tube N6 and N5 K N2 , R is the resistance value of the configurable resistor network, R1 is the resistance value of resistor R1, and R2 is the resistance value of resistor R2.

[0046] FIG3 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a second embodiment of the present invention.

[0047] The functions of the various parts of the protection circuit shown in FIG3 are the same as those of the protection circuit shown in FIG2 , and are not described again here.

[0048] The following describes the various components of the protection circuit of the second embodiment and their connection relationships with reference to FIG. 3 .

[0049] As shown in FIG3 , the output swing detection circuit includes diodes D1 and D2, a resistor R1, and NMOS transistors N1, N3, and N7 connected in diode form, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor N3 are commonly connected to the source of the NMOS transistor N7, the drain and gate of the NMOS transistor N7 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D2, the anode of the diode D2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier.

[0050] The N-type current mirror circuit 1 includes NMOS transistors N1 and N2, as well as NMOS transistors N4 and N8. NMOS transistors N1 and N2 are used to mirror the current generated by N-type transistor N1 to N-type transistor N2. NMOS transistors N4 and N8 are used to reduce the channel length modulation effect, thereby making the current replication of the N-type current mirror circuit 1 more accurate. The P-type current mirror circuit includes PMOS transistors P1 and P2. The current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of PMOS transistor P1 of the P-type current mirror circuit via NMOS transistors N4 and N8. The source of NMOS transistor N4 is connected to the drain of NMOS transistor N2, the gate of NMOS transistor N4 is connected to the gate of NMOS transistor N3, the drain of NMOS transistor N4 is connected to the source of NMOS transistor N8, the gate of NMOS transistor N8 is connected to the gate of NMOS transistor N7, and the drain of NMOS transistor N8 is connected to the drain and gate of PMOS transistor P1.

[0051] The configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between node 1 and ground, wherein the third resistor unit includes a resistor R3 and a switch 3 connected in series, the fourth resistor unit includes a resistor R4 and a switch 4 connected in series, and the nth resistor unit includes a resistor Rn and a switch n connected in series.

[0052] The positive input terminal of the amplifier is connected to node 1, with the control voltage V1 as input, and the output terminal is directly connected to the negative input terminal, and is configured in the form of unity gain negative feedback, copying the voltage V1 at its positive input terminal to the output terminal;

[0053] The N-type current mirror circuit 2 mirrors the current generated on the NMOS transistor N5 at the output end of the amplifier to the NMOS transistor N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

[0054] In the second embodiment, the pull-down current generated on the N-type transistor N6 is:

[0055] Where Vout is the output voltage of the RF power amplifier, V T.D1is the threshold voltage of diode D1, V T.D2 is the threshold voltage of diode D2, V T.N1 is the threshold voltage of N-type tube N1, V T.N3 is the threshold voltage of N-type tube N3, V T.N7 is the threshold voltage of N-type tube N7, V T.N5 is the threshold voltage of N5, N2 / N1 is the ratio of the sizes of N2 and N1, K N1 , P2 / P1 is the ratio of the size of the P-type tube P2 and P1 K P , N6 / N5 is the ratio of the size of NMOS tube N6 and N5 K N2 , R is the resistance value of the configurable resistor network, R1 is the resistance value of resistor R1, and R2 is the resistance value of resistor R2.

[0056] It can be seen from formulas (1) and (2) of the first and second embodiments that the pull-down current of the N-type transistor N6 can be adjusted by multiple variables:

[0057] 1. By selecting different switch conduction modes, the resistance value R of the configurable resistor network can be adjusted to generate different pull-down currents.

[0058] 2. By adjusting the ratios of N2 / N1, P2 / P1, and N6 / N5 in each current mirror circuit, different pull-down currents can be generated;

[0059] 3. By adjusting the number of diodes, resistors and N-type transistors in the output swing detection circuit, different pull-down currents can be generated.

[0060] By pulling down the power amplifier bias circuit with pull-down currents of different strengths, an adjustable critical power protection value can be achieved.

[0061] The protection circuit of the radio frequency power amplifier according to the present invention has a configurable critical power protection value, thereby achieving precise adjustment of the critical power protection value and being adaptable to application scenarios of various power supply voltages.

[0062] Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims.

[0063] Any description in the present invention should not be construed as implying that any particular element, step, or function is essential to be included in the scope of the claims. The scope of the patented subject matter is defined solely by the claims.

Claims

1. A protection circuit for a radio frequency power amplifier, comprising: The output swing detection circuit is connected to the output stage of the radio frequency power amplifier for detecting the voltage swing of the output stage of the radio frequency power amplifier, and includes an M connected in series between the output stage of the radio frequency power amplifier and the ground GND. D diodes, M R resistors and M NMOS NMOS tubes, each NMOS tube is connected in the form of a diode; an N-type current mirror circuit 1, for mirroring the current generated by the output swing detection circuit and providing the mirrored current to the P-type current mirror circuit; The P-type current mirror circuit is used to mirror the current generated by the N-type current mirror circuit 1 and generate a control voltage V1 at a node 1 between the P-type current mirror circuit and the configurable resistor network; The configurable resistor network is connected to the P-type current mirror circuit via node 1 to receive the current generated by the P-type current mirror circuit, and includes a plurality of resistors and a plurality of switches for respectively controlling the plurality of resistors. The amplifier has its positive input connected to node 1 and has a control voltage V1 as its input voltage, its output is directly connected to its negative input and is configured in the form of unity gain negative feedback to copy the control voltage V1 at its positive input to its output. An N-type current mirror circuit 2 is connected to the output end of the amplifier and is used to mirror the current generated at the output end of the amplifier, and the mirrored current is connected to the bias circuit of the RF power amplifier as a pull-down current to shut down the bias circuit of the RF power amplifier.

2. The protection circuit according to claim 1, in, M D 、M R and M NMOS are integers greater than or equal to 1.

3. The protection circuit according to claim 1, in, The amplifier comprises an operational amplifier with an output buffer stage.

4. The protection circuit according to claim 1, wherein: The N-type current mirror circuit 1 , the N-type current mirror circuit 2 , and the P-type current mirror circuit include cascode current mirrors or low-voltage cascode current mirrors.

5. The protection circuit according to claim 1, wherein: When the voltage swing at the output end of the RF power amplifier exceeds the threshold voltage of the output swing detection circuit, a current is generated in the N-type current mirror circuit 1 .

6. The protection circuit according to claim 1, in, The N-type current mirror circuit 1 includes NMOS transistors N1 and N2, the P-type current mirror circuit includes PMOS transistors P1 and P2, and the N-type current mirror circuit 2 includes NMOS transistors N5 and N6. The ratio of the sizes of the NMOS transistors N2 and N1 is K. N1 , the size ratio of PMOS tube P2 and P1 is K P , the size ratio of NMOS tube N6 and N5 is K N2 ; The sources of the NMOS transistor N1 and the NMOS transistor N2 of the N-type current mirror circuit 1 are both connected to the ground GND. The N-type current mirror circuit 1 mirrors the current on the NMOS transistor N1 to the NMOS transistor N2, and provides the mirrored current to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the drain of the NMOS transistor N2. The sources of the PMOS transistors P1 and P2 of the P-type current mirror circuit are both connected to the power supply voltage VDD, and the drain of the PMOS transistor P2 is connected to the configurable resistor network. The P-type current mirror circuit mirrors the current on the PMOS transistor P1 to the PMOS transistor P2 and generates a control voltage V1 at a node 1 between the drain of the PMOS transistor P2 and the configurable resistor network. The NMOS transistor N5 of the N-type current mirror circuit 2 is connected to the output end of the amplifier via the resistor R2. The N-type current mirror circuit 2 is used to mirror the current generated on the NMOS transistor N5 at the output end of the amplifier to the NMOS transistor N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

7. The protection circuit according to claim 6, wherein: The output swing detection circuit includes a diode D1, a resistor R1, and NMOS transistors N1 and N3 connected in series between the output stage of the RF power amplifier and the ground GND, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor 3 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier; The N-type current mirror circuit 1 also includes an NMOS transistor N4. The current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistor N4, wherein the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2, the gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3, and the drain of the NMOS transistor N4 is connected to the drain and gate of the PMOS transistor P1.

8. The protection circuit according to claim 6, wherein: The output swing detection circuit includes diodes D1 and D2, a resistor R1, and NMOS transistors N1, N3, and N7 connected in series between the output stage of the RF power amplifier and the ground GND, wherein the drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3, the drain and gate of the NMOS transistor N3 are commonly connected to the source of the NMOS transistor N7, the drain and gate of the NMOS transistor N7 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D2, the anode of the diode D2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier; The N-type current mirror circuit 1 also includes NMOS transistors N4 and N8. The current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistors N4 and N8, wherein the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2, the gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3, the drain of the NMOS transistor N4 is connected to the source of the NMOS transistor N8, the gate of the NMOS transistor N8 is connected to the gate of the NMOS transistor N7, and the drain of the NMOS transistor N8 is connected to the drain and gate of the PMOS transistor P1.

9. The protection circuit according to any one of claims 6 to 8, in, The configurable resistor network includes resistors R3, R4 to Rn and switches 3, 4 to n. Among them, the switch 3 and the resistors R3, R4 to Rn are connected in series between the node 1 and the ground. The first end of each of switches 3, 4, to n is connected to node 1, the second end of switch 3 is connected to the first end of resistor R3, the second end of switch 4 is connected to the second end of resistor R3 and the first end of resistor R4, and the second end of switch n is connected to the second end of resistor Rn-1 and the first end of resistor Rn, and the second end of resistor Rn is connected to ground.

10. The protection circuit according to any one of claims 6 to 8, in, The configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between node 1 and ground, The third resistance unit includes a resistor R3 and a switch 3 connected in series, the fourth resistance unit includes a resistor R4 and a switch 4 connected in series, and the nth resistance unit includes a resistor Rn and a switch n connected in series.

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