Method for implementing timer processing in RDMA, system, chip, and storage medium
By adopting the shared time wheel group and event queue mechanism to manage timers in RDMA, the problems of large resource occupation and complex design in the existing technology are solved, more efficient timer management is achieved, chip power consumption, performance and area are saved, and flexibility is improved.
Patent Information
- Application Number
- PCT/CN2024/104676
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-26
- Filing Date
- 2024-07-10
- Publication Date
- 2025-10-02
AI Technical Summary
In RDMA, existing technologies have problems with timer management, such as excessive resource usage, complex design, and insufficient flexibility. Especially when supporting virtualization, the linked list management method leads to waste of power performance area (PPA) and functional interference.
A shared time wheel group is used to manage the timer. By configuring the shared time wheel group and linked list on the chip, the idle nodes are used to store the timeout time nodes. When resources are insufficient, the host is notified through the event queue, and the host manages the timeout time nodes.
This reduces the resource requirements of the RDMA engine, saves the chip's power performance area (PPA), simplifies the design, expands the range of supported timeout values, and improves architectural flexibility.
Smart Images

Figure CN2024104676_02102025_PF_FP_ABST
Abstract
Description
Method, system, chip and storage medium for implementing timer processing in RDMA
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to a Chinese patent application filed with the Patent Office of China on March 26, 2024, with application number 202410355510.4 and invention name “Method, system, chip and storage medium for implementing timer processing in RDMA”. The entire contents of the patent application are incorporated into this application by reference. Technical Field
[0003] The present application relates to the field of data storage technology, and in particular to a method, system, chip, and storage medium for implementing timer processing in RDMA. Background Art
[0004] In Remote Direct Memory Access (RDMA) applications, each Queue Pair (QP) within each function is assigned a time node, which is used to wake up the RDMA device for corresponding transmission and reception processing. In some examples, the RDMA engine can provide two types of time nodes for each QP: an Acknowledge (Ack) timer and a Receiver Not Ready (Rnr) timer.
[0005] Typically, the timing function of these time nodes is implemented using time wheels. For example, using the ACK timer, in one application scenario, the RDMA engine provides multiple time wheels (e.g., four), each capable of representing durations of 2ms / 32ms / 512ms / 8s. Each time wheel contains 16 ticks, each representing durations of 128us / 2ms / 32ms / 512ms. Because the RDMA engine supports a large number of QPs, typically in the M (mega) range, the RDMA engine must provide a maximum of 1M ACK-type time nodes. The RDMA engine manages time nodes using a linked list, providing a linked list for each time wheel tick. When a time wheel tick times out, the RDMA engine reads all time nodes in the linked list corresponding to that tick for timeout determination. In extreme cases, 1M time nodes may be generated and linked into the linked list corresponding to the same tick on the same time wheel. Due to power performance area (PPA) considerations, the chip usually does not provide large resources to store these 1M linked list nodes. Therefore, the linked list nodes that cannot be stored on the chip will overflow into the host's DDR memory. That is, the RDMA engine provides the same linked list on and off the chip to manage all time nodes of a time wheel scale.
[0006] There are two approaches in the related art. The first is to share four time wheels. However, this approach has the disadvantage that when the RDMA engine needs to support virtualization, since the nodes in the linked list corresponding to a time wheel tick may belong to different functions, it is impossible to provide a single linked list off-chip to store the time nodes of different functions. When there is insufficient free space within the chip, the timing nodes need to be linked to the host's linked list, which can easily cause function interference. Another approach is to provide a set of time wheels for each function. In this way, each time wheel tick of each function has an independent linked list to manage its own time nodes, which means that the time nodes of different functions will not be linked into the same linked list.
[0007] As shown in Figure 1, a schematic diagram of the principle of supporting virtualized management of multiple function time nodes provided in the related art is shown. As can be seen, a set of time wheel groups (a total of 4 time wheels) needs to manage 64 linked lists, which occupies a large PPA. When the RDMA engine supports virtualization, the RDMA engine provides a set of time wheels for each function. Since the number of functions supported during virtualization is large, usually at the K level, the RDMA engine implements a total of n*4 time wheels to implement and manage n*4*64 linked lists on the chip, and also needs to manage the off-chip portion of the linked lists. Therefore, the RDMA engine consumes a lot of resources for timers, which affects PPA.
[0008] Furthermore, the timing wheel's linked list, split into two parts, on-chip and off-chip, complicates the overall design. Furthermore, the timing wheel implemented by the RDMA engine only provides a maximum timeout of 8 seconds. If the RDMA engine timeout exceeds 8 seconds, such as when supporting long-distance RDMA engines requiring a longer timeout, the RDMA engine must add additional timing wheels to achieve this. This increases the power performance area (PPA) but also makes the overall architecture less flexible.
[0009] Summary of the Invention
[0010] According to various embodiments of the present application, a method, system, chip, and storage medium for implementing timer processing in RDMA are provided.
[0011] As one aspect of the present application, a method for implementing timer processing in RDMA is provided, which is applied to an RDMA engine and includes at least the following steps:
[0012] Receive an RDMA message generated by a host, generate a corresponding timeout time node for the message, and determine a corresponding time wheel in a shared time wheel group and a timeout time scale corresponding to the timeout time in the time wheel for the timeout time node when the timeout time does not exceed a preset threshold;
[0013] Determine whether there is an idle node in the storage unit corresponding to the shared time wheel group;
[0014] When there is an idle node in the storage unit, apply for an idle node to store the node content of the timeout time node, and link it to the linked list corresponding to the determined timeout time scale, and the RDMA engine performs timeout judgment;
[0015] When the timeout period exceeds a preset threshold, or there is no idle node in the storage unit, the timeout period node is notified to the host in the form of an event queue, and the host manages the timeout period.
[0016] The method further includes configuring a shared time wheel group in the RDMA engine, wherein the time wheel group includes a predetermined first number of time wheels of different categories, each time wheel corresponds to a predetermined second number of scale values, and each scale value is associated with a linked list.
[0017] Wherein, when there is an idle node in the storage unit, applying for an idle node to store the node content of the timeout time node and linking it to the linked list corresponding to the determined timeout time scale further includes:
[0018] When there is an idle node in the storage unit, apply for the idle node and obtain an idle storage address;
[0019] Writing the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address;
[0020] An association is established between the determined timeout time scale and the idle storage address in a linked list corresponding to the timeout time scale.
[0021] The RDMA engine performs timeout judgment, which further includes:
[0022] When the time wheel scale expires, traverse the corresponding linked list and take out all the timeout time nodes in the linked list;
[0023] The extracted timeout time node is sent to the RDMA engine for timeout judgment, and the task in the corresponding timeout time node is executed.
[0024] Wherein, when there is no idle node in the storage unit, the timeout time node is notified to the host in the form of an event queue, and the host manages the timeout, further comprising:
[0025] When the timeout period exceeds a preset threshold or there is no idle node in the storage unit, the Function ID and QPN information of the RDMA corresponding to the timeout period node are notified to the host through the event queue corresponding to the Function.
[0026] Accordingly, another aspect of the present application further provides a system for implementing timer processing in RDMA, which at least includes:
[0027] RDMA message receiving processing is used to receive the RDMA message generated by the host, generate a corresponding timeout time node for the message, and determine the corresponding time wheel in the shared time wheel group and the timeout time scale corresponding to the time wheel when the timeout time does not exceed the preset threshold for the timeout time node.
[0028] A condition judgment unit, used to judge whether there is an idle node in the storage unit corresponding to the shared time wheel group;
[0029] A first processing unit is configured to apply for an idle node to store the node content of the timeout node when there is an idle node in the storage unit, and link the node content to the linked list corresponding to the determined timeout time scale, so that the RDMA engine performs timeout judgment;
[0030] The second processing unit is used to inform the host of the timeout time node in the form of an event queue when the timeout time exceeds a preset threshold or there is no idle node in the storage unit, and the host manages the timeout time.
[0031] Which further includes:
[0032] The configuration unit is used to configure a shared time wheel group in the RDMA engine, wherein the time wheel group includes a predetermined first number of time wheels of different categories, each time wheel corresponds to a predetermined second number of scale values, and each scale value is associated with a linked list.
[0033] The first processing unit further includes:
[0034] An idle node application unit, configured to apply for an idle node when an idle node exists in the storage unit and obtain an idle storage address;
[0035] A writing unit, configured to write the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address;
[0036] a linking unit, configured to establish an association between the determined timeout time scale and the idle storage address in a linked list corresponding to the timeout time scale;
[0037] A traversal processing unit, configured to traverse the corresponding linked list and extract all timeout time nodes from the linked list when the time wheel scale expires;
[0038] The first timeout processing unit is used to send the extracted timeout time node to the RDMA engine for timeout judgment and execute the task in the corresponding timeout time node.
[0039] The second processing unit further includes:
[0040] The notification unit is used to notify the host of the Function ID and QPN information of the RDMA corresponding to the timeout node through the event queue corresponding to the Function when the timeout time exceeds a preset threshold or there is no idle node in the storage unit.
[0041] Correspondingly, another aspect of the present application provides a chip, which is deployed with the aforementioned system.
[0042] Correspondingly, another aspect of the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the aforementioned method when executed by a processor. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, without paying any creative labor, obtaining other drawings based on these drawings still falls within the scope of the present application.
[0044] FIG1 is a schematic diagram showing the principle of supporting virtual management of multiple Function time nodes provided in the prior art;
[0045] FIG2 is a schematic diagram of the main flow of an embodiment of a method for implementing timer processing in RDMA provided by the present application;
[0046] FIG3 is a schematic diagram of the application environment involved in the application;
[0047] FIG4 is a schematic diagram showing the principle of time node virtualization management in the method provided by this application;
[0048] FIG5 is a schematic structural diagram of an embodiment of a system for implementing timer processing in RDMA provided by the present application;
[0049] FIG6 is a schematic structural diagram of the first processing unit in FIG5 ;
[0050] FIG7 is a schematic diagram of the structure of the second processing unit in FIG5. DETAILED DESCRIPTION
[0051] In order to make the objectives, technical solutions and advantages of this application clearer, this application will be described in further detail below with reference to the accompanying drawings.
[0052] As shown in FIG1 , a schematic diagram of the main flow of an embodiment of a method for implementing timer processing in RDMA provided by the present application is shown. In combination with FIG2 to FIG4 , in this embodiment, the method is applied to an RDMA communication system. Generally, as shown in FIG2 , in an RDMA communication system, at least a local host, a local external storage space (DDR), a local RDMA engine, a local PCIe device, and a remote PCIe device, a remote RDMA engine, a remote host, and a remote external storage space (DDR) are included at the remote end. Among them, the local PCIe device and the remote PCIe device can be, for example, a network adapter, a storage controller, an accelerator card, a hardware encryption card, etc.
[0053] Specifically, as shown in FIG1 , in an embodiment of the present application, the method for implementing timer processing in RDMA is applied to local RDMA. Specifically, the method further includes the following steps:
[0054] Step S10: Receive an RDMA message generated by the host, generate a corresponding timeout time node for the message, and determine whether the timeout time exceeds a set timeout time threshold; if the timeout time does not exceed the preset threshold, determine a corresponding time wheel in the shared time wheel group and a timeout time scale corresponding to the timeout time in the time wheel for the timeout time node;
[0055] It is understood that in the embodiments of the present application, the following steps need to be included in advance:
[0056] A shared time wheel group is configured in the RDMA engine, and the time wheel group includes a predetermined first number of time wheels of different categories, each time wheel corresponds to a predetermined second number of scale values, and each scale value corresponds to a linked list; as shown in Figure 4, in an embodiment of the present application, the RDMA engine only implements one time wheel group, and internally provides time nodes equivalent to the number of typical online flows. Specifically, in one example, the first number is 4, and the second category is 16. Therefore, in the example of Figure 4, the RDMA engine implements a total of 4 time wheels, implements and manages 4*64 on-chip linked lists, and the linked lists do not need to have an off-chip part. In the specific example, a storage unit is used to store and manage the linked lists of the shared time wheel group.
[0057] In an example, assuming that the timeout period is 2s and the set timeout threshold is 8s, since 2s is less than 8s and does not exceed the threshold, the corresponding time wheel is selected according to the timeout period of 2s (assuming that the four time wheels in the corresponding time wheel group are 16s (time wheel 0), 16*16s (time wheel 1), 256*16s (time wheel 2), and 256*16*16s (time wheel 3)), then time wheel 0 is selected. Assuming that the current scale of time wheel 0 is scale 5, the timeout time scale is 5+2=7, that is, scale 7 in time wheel 0 is the timeout time scale.
[0058] Step S11, judging the timeout time and the free space of the current shared time wheel group, and judging whether there is an idle node in the storage unit corresponding to the shared time wheel group;
[0059] Step S12: If the result of the judgment is that there is an idle node in the storage unit, an idle node is requested to store the node content of the timeout node, and the node content is linked to the linked list corresponding to the determined timeout time scale, and the RDMA engine performs timeout judgment;
[0060] In a specific example, the step S12 further includes:
[0061] When there is an idle node in the storage unit, apply for the idle node and obtain an idle storage address;
[0062] Writing the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address;
[0063] Establishing an association between the determined timeout time scale and the idle storage address in the linked list corresponding to the determined timeout time scale; in a specific example, a linked list or a bitmap can be used to manage the idle nodes, each time scale corresponds to a linked list, and the linked list is managed by the head and tail pointers of each linked list;
[0064] When the time wheel scale expires, traverse the corresponding linked list and take out all the timeout time nodes in the linked list;
[0065] The extracted timeout time node is sent to the RDMA engine for timeout judgment, and the task in the corresponding timeout time node is executed.
[0066] Step S13: When the judgment result is that the timeout time exceeds a preset threshold, or there is no idle node in the storage unit, the timeout time node is notified to the host in the form of an event queue, and the host manages the timeout.
[0067] In a specific example, the step S13 further includes:
[0068] When the timeout period exceeds a preset threshold or there is no idle node in the storage unit, the Function ID and QPN information of the RDMA corresponding to the timeout period node are notified to the host through the event queue corresponding to the Function.
[0069] In a specific example, the host side will use its system timer to provide a timing function for each received time node;
[0070] When the system timer arrives, the host notifies the RDMA engine through the doorbell to perform a timeout judgment on the corresponding time node and execute the task in the corresponding time node.
[0071] As shown in Figure 4, a specific example will be used for illustration. In this embodiment, the RDMA engine implements only one time wheel group, internally providing a number of time nodes corresponding to the number of typical online flows. When time node resources are exhausted or the timer timeout value exceeds the configured value, the RDMA engine notifies the host driver through each function's event queue. The driver then uses the system-provided timer to implement the timing function. When the system timer times out, the host driver notifies the RDMA engine through the doorbell, which the RDMA engine uses for timeout determination. The RDMA engine implements a total of four time wheels, implementing and managing 4 x 64 on-chip linked lists, eliminating the need for an off-chip component for the linked lists.
[0072] The process of using the timer in the RDMA engine in this solution is as follows:
[0073] Step 1: The RDMA engine sends a message and needs to monitor whether the message is completed within a certain time. Therefore, a timer is started in its timer management module. The timer management module determines the time wheel and the scale within the time wheel according to the timer timeout value.
[0074] Step 2: The timer management module allocates time nodes from the shared time node resources.
[0075] Step 3: The timer management module links the time node into the corresponding time wheel scale linked list.
[0076] Step 4: When the time wheel scale expires, the timer management module will traverse the corresponding linked list to take out all the time nodes and send them to the RDMA engine for timeout judgment. For the time nodes that have timed out, the tasks carried in the time nodes will be executed.
[0077] Step 5: When the shared time node resources are insufficient or the timer timeout value exceeds a predetermined threshold, the time node is notified to the host side (such as the host driver) through the event queue of the Function corresponding to the time node.
[0078] Step 6: The host driver uses the timer provided by the system to provide a timing function for the RDMA engine.
[0079] Step 7: When the system timer times out, the host driver notifies the RDMA engine through the doorbell for timeout judgment.
[0080] It can be understood that by implementing the method provided in this application, the RDMA engine virtualization timer is realized through a combination of software and hardware, and only the time nodes of typical online flows are retained on the chip. In most scenarios, since the demand for time nodes is not large, no driver intervention is required. When the on-chip time nodes are insufficient or the timer timeout value is very large, the host is notified through the event queue, and the host driver uses the timer provided by the system to implement the timing function.
[0081] This technical solution allows the RDMA engine to support virtualization without adding additional resources to implement timers, saving the chip's PPA and simplifying the chip design. In addition, since timers with relatively large timeouts are directly sent to the host driver and implemented by the system timer, the RDMA engine can support a wider range of timeout values.
[0082] FIG5 is a schematic diagram showing the structure of an embodiment of a system for implementing timer processing in RDMA provided by the present application, which is implemented in the application environment shown in FIG3 . In conjunction with FIG6 and FIG7 , in this embodiment, the system 1 at least includes:
[0083] An RDMA message receiving and processing unit 10 is configured to receive an RDMA message generated by a host, generate a corresponding timeout time node for the message, and determine a corresponding time wheel in a shared time wheel group and a timeout time scale corresponding to the timeout time in the time wheel for the timeout time node when the timeout time does not exceed a preset threshold;
[0084] A condition judgment unit 11 is used to judge whether there is an idle node in the storage unit corresponding to the shared time wheel group;
[0085] The first processing unit 12 is configured to apply for an idle node to store the node content of the timeout node when there is an idle node in the storage unit, and link the node content to the linked list corresponding to the determined timeout time scale, so that the RDMA engine performs timeout judgment;
[0086] The second processing unit 13 is configured to notify the host of the timeout time node in the form of an event queue when the timeout time exceeds a preset threshold or there is no idle node in the storage unit, so that the host manages the timeout time;
[0087] a configuration unit 14 configured to configure a shared time wheel group in the RDMA engine, the time wheel group including a predetermined first number of time wheels of different categories, each time wheel corresponding to a predetermined second number of tick values, each tick value being associated with a linked list;
[0088] As shown in FIG6 , in a specific example, the first processing unit 12 further includes:
[0089] The idle node application unit 120 is used to apply for an idle node when there is an idle node in the storage unit and obtain an idle storage address;
[0090] The writing unit 121 is configured to write the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address;
[0091] A linking unit 122, configured to establish an association between the determined timeout time scale and the free storage address in a linked list corresponding to the timeout time scale;
[0092] The traversal processing unit 123 is used to traverse the corresponding linked list and extract all timeout time nodes in the linked list when the time wheel scale expires;
[0093] The first timeout processing unit 124 is configured to send the retrieved timeout time node to the RDMA engine for timeout determination, and execute the task in the corresponding timeout time node.
[0094] As shown in FIG7 , in a specific example, the second processing unit 13 further includes:
[0095] The notification unit 130 is used to notify the host of the Function ID and QPN information of the RDMA corresponding to the timeout node through the event queue corresponding to the Function when the timeout time exceeds a preset threshold or there is no idle node in the storage unit.
[0096] Accordingly, another aspect of the present application further provides a chip that deploys the system described in Figures 5 to 87. For more details, please refer to and combine the description of Figures 5 to 7, which will not be repeated here.
[0097] Accordingly, another aspect of the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the computer program implements the steps of the method described in Figures 2 to 4 . For more details, please refer to and combine the above description of Figures 2 to 4 , which will not be repeated here.
[0098] The implementation of the embodiments of the present application has the following beneficial effects:
[0099] This application provides a method, system, chip, and storage medium for implementing timer processing in RDMA. The RDMA engine virtualizes the timer through a combination of software and hardware. Only the time nodes of typical online flows are retained on-chip. In most scenarios, driver intervention is not required due to low demand for time nodes. When insufficient on-chip time nodes occur or the timer timeout value is large, the host is notified through an event queue, and the host driver uses the system-provided timer to implement the timing function.
[0100] This technical solution allows the RDMA engine to support virtualization without adding additional resources to implement timers, saving the chip's PPA and simplifying the chip design. In addition, since timers with relatively large timeouts are directly sent to the host driver and implemented by the system timer, the RDMA engine can support a wider range of timeout values, thereby improving the flexibility of the architecture.
[0101] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.
[0102] The present application is described with reference to the flow chart and / or block diagram of the method, device (system), and computer program product according to the embodiment of the present application. It should be understood that each flow process and / or box in the flow chart and / or block diagram and the combination of the flow process and / or box in the flow chart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processing machine or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one flow chart flow or multiple flows and / or one box or multiple boxes of the block diagram.
[0103] The above disclosure is only a preferred embodiment of the present application, and certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.
Claims
1. A method for implementing timer processing in RDMA, applied to an RDMA engine, characterized in that: At least the following steps are included: Receive an RDMA message generated by a host, generate a corresponding timeout time node for the message, and determine a corresponding time wheel in a shared time wheel group and a timeout time scale corresponding to the timeout time in the time wheel for the timeout time node when the timeout time does not exceed a preset threshold; Determine whether there is an idle node in the storage unit corresponding to the shared time wheel group; When there is an idle node in the storage unit, apply for an idle node to store the node content of the timeout time node, and link it to the linked list corresponding to the determined timeout time scale, and the RDMA engine performs timeout judgment; When the timeout period exceeds a preset threshold, or there is no idle node in the storage unit, the timeout period node is notified to the host in the form of an event queue.
2. The method according to claim 1, wherein Further including: A shared time wheel group is configured in the RDMA engine. The time wheel group includes a predetermined first number of time wheels of different categories. Each time wheel corresponds to a predetermined second number of scale values. Each scale value is associated with a linked list.
3. The method according to claim 2, wherein When there is an idle node in the storage unit, applying for an idle node to store the node content of the timeout time node and linking it to the linked list corresponding to the determined timeout time scale further includes: When there is an idle node in the storage unit, apply for the idle node and obtain an idle storage address; Writing the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address; An association is established between the determined timeout time scale and the idle storage address in a linked list corresponding to the timeout time scale.
4. The method according to claim 3, wherein Each time scale corresponds to a linked list, and the head and tail pointers of each linked list are used to manage the linked list.
5. The method according to claim 3 or 4, wherein: The RDMA engine performs timeout determination, further including: When the time wheel scale expires, traverse the corresponding linked list and take out all the timeout time nodes in the linked list; The extracted timeout time node is sent to the RDMA engine for timeout judgment, and the task in the corresponding timeout time node is executed.
6. The method according to claim 5, wherein When the timeout period exceeds a preset threshold or there is no idle node in the storage unit, the timeout period node is notified to the host in the form of an event queue, and the host manages the timeout period, further comprising: When the timeout period exceeds a preset threshold or there is no idle node in the storage unit, the Function ID and QPN information of the RDMA corresponding to the timeout period node are notified to the host through the event queue corresponding to the Function.
7. The method according to claim 6, wherein The timeout period is determined by a system timer.
8. A system for implementing timer processing in RDMA, characterized in that: At least: RDMA message reception processing is used to receive RDMA messages generated by the host, generate a corresponding timeout time node for the message, and when the timeout time does not exceed a preset threshold, determine the corresponding time wheel in the shared time wheel group and the timeout time scale corresponding to the timeout time in the time wheel for the timeout time node; A condition judgment unit, used to judge whether there is an idle node in the storage unit corresponding to the shared time wheel group; A first processing unit is configured to apply for an idle node to store the node content of the timeout node when there is an idle node in the storage unit, and link the node content to the linked list corresponding to the determined timeout time scale, so that the RDMA engine performs timeout judgment; The second processing unit is configured to notify the host of the timeout node in the form of an event queue when the timeout time exceeds a preset threshold or there is no idle node in the storage unit.
9. The system according to claim 8, wherein Further including: The configuration unit is used to configure a shared time wheel group in the RDMA engine, wherein the time wheel group includes a predetermined first number of time wheels of different categories, each time wheel corresponds to a predetermined second number of scale values, and each scale value is associated with a linked list.
10. The system according to claim 9, wherein: The first processing unit further comprises: An idle node application unit, configured to apply for an idle node when an idle node exists in the storage unit and obtain an idle storage address; A writing unit, configured to write the Function ID and QPN of the RDMA message into the storage space corresponding to the idle storage address; The linking unit is used to establish an association between the determined timeout time scale and the idle storage address in the linked list corresponding to the timeout time scale.
11. The system according to claim 10, wherein: Each time scale corresponds to a linked list, and the head and tail pointers of each linked list are used to manage the linked list.
12. The system according to claim 10 or 11, characterized in that The first processing unit further comprises: A traversal processing unit, configured to traverse the corresponding linked list and extract all timeout time nodes from the linked list when the time wheel scale expires; The first timeout processing unit is used to send the extracted timeout time node to the RDMA engine for timeout judgment and execute the task in the corresponding timeout time node.
13. The system according to claim 8, wherein The second processing unit further comprises: The notification unit is used to notify the host of the Function ID and QPN information of the RDMA corresponding to the timeout node through the event queue corresponding to the Function when the timeout time exceeds a preset threshold or there is no idle node in the storage unit.
14. The system according to claim 13, wherein: The timeout period is determined by a system timer.
15. A chip, characterized in that: It is deployed with a system as claimed in any one of claims 8 to 14.
16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.
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