Fan control circuit, method, apparatus and device, and medium

Abstract

The present application relates to the technical field of power electronics. Disclosed are a fan control circuit, method, apparatus and device, and a non-volatile readable storage medium, which are used for realizing the control of a fan module. The fan control circuit is provided to address the problem in conventional solutions of high fault proneness of a CPLD causing fan control failures and further leading to node overheat. A BMC and a CPLD are reused to separately realize independent control of a fan module, and switching of the control right for the fan module is controlled by means of a selection switching module. The BMC and the CPLD are in communication connection with each other, so as to detect the operating state of each other; and an abnormal operating state of either side can be detected by the other side, and the control right for the fan module is then switched to ensure continuous control of the fan module, thereby preventing failures in controlling the fan module due to high damage proneness of the CPLD, and thus ensuring the heat dissipation effect of a server and a storage device.

Description

Fan control circuit, method, device, equipment and medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on March 29, 2024, with application number 202410382920.8, and application name “A fan control circuit, method, device, equipment and medium”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of power electronics technology, and in particular to a fan control circuit, method, device, equipment, and non-volatile readable storage medium. Background Art

[0004] With the continuous increase in user data services, performance requirements for devices such as servers and storage devices are also increasing. However, this performance increase is often accompanied by an increase in overall device power consumption. Therefore, ensuring device heat dissipation after this increase in power consumption is particularly critical. To achieve this, a common approach is to integrate fan modules into nodes. These fan modules dissipate heat from heat-generating components within the node, such as the central processing unit (CPU), integrated southbridge (Platform Controller Hub, PCH), memory, hard drives, add-in cards, and power supplies. Therefore, the fan module control scheme directly affects the device's heat dissipation capabilities.

[0005] In related technologies, the fan module control scheme in servers and storage devices is as follows: the baseboard management controller (BMC) obtains the real-time temperature of each temperature detection point through the inter-integrated circuit (IIC or I2C) bus; and outputs a pulse width modulation (PWM) signal with a specific duty cycle according to the fan speed table to control the fan module.

[0006] In addition, to ensure that the fan can still work when the BMC is initialized, restarted, or the firmware is upgraded, a complex programmable logic device (CPLD) is set between the BMC and the fan module. When in the above abnormal scenarios, the CPLD outputs a PWM signal with a specific duty cycle to the fan module to ensure that the fan can work all the time. When in normal working conditions, the CPLD only needs to transparently transmit the PWM signal output by the BMC to the fan module to ensure the BMC's control over the fan module.

[0007] However, as a programmable device, CPLDs have a higher probability of failure than hardware devices. A CPLD failure prevents the PWM signal from reaching the fan module, potentially causing the fan to stop rotating and the node temperature to rise continuously, leading to abnormal node system freezing and even device damage. Summary of the Invention

[0008] The purpose of this application is to provide a fan control circuit, method, device, equipment and non-volatile readable storage medium, which are used to ensure that the fan works all the time while solving the risk of fan stall caused by CPLD.

[0009] To solve the above technical problems, the present application provides a fan control circuit, comprising: a baseboard management controller, a complex programmable logic device, and a selection switching module;

[0010] The control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are communicatively connected;

[0011] The baseboard management controller / complex programmable logic device is configured to: output a control signal to the selection switching module; detect whether the operation status of the complex programmable logic device / baseboard management controller is normal, and output a corresponding selection signal to the selection switching module based on the operation status detection result;

[0012] The output end of the selection switching module is connected to the fan module and is configured to control the control signal selection output by the baseboard management controller / complex programmable logic device according to the selection signal.

[0013] As an optional implementation, the fan control circuit further includes: a gating control module;

[0014] The selection control module is arranged between the baseboard management controller, the first general input and output terminal of the complex programmable logic device and the selection control terminal of the selection switching module, and is configured to control whether to switch the selection state of the selection switching module according to the selection signal output by the baseboard management controller and the complex programmable logic device.

[0015] As an optional implementation, the gating control module is an XOR gate or an XOR gate;

[0016] The first general input and output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the XOR gate / XOR gate, and the output terminals of the XOR gate / XOR gate are connected to the selection control terminal of the selection switching module.

[0017] As an optional implementation, the fan control circuit further includes: an isolation module;

[0018] The isolation module is arranged between the first universal input / output terminal of the baseboard management controller and the selection control terminal of the selection switching module, and between the first universal input / output terminal of the complex programmable logic device and the selection control terminal of the selection switching module.

[0019] As an optional implementation, the isolation module includes: N-level field effect transistors and a pull-up circuit; wherein N is a positive integer;

[0020] When N is equal to 1, the gate of the field effect transistor is connected to the first general input and output terminal of the baseboard management controller / complex programmable logic device, the source is grounded, and the drain is correspondingly connected to the selection control terminal of the selection switching module and is connected to the pull-up circuit;

[0021] When N is greater than 1, the gate of the first-stage field-effect transistor is connected to the first universal input / output terminal of the substrate management controller / complex programmable logic device; the source of each stage of the field-effect transistor is grounded, and the drain is connected to the pull-up circuit; the drain of the previous stage field-effect transistor is connected to the gate of the next stage field-effect transistor, and the drain of the last stage field-effect transistor is correspondingly connected to the selection control terminal of the selection switching module.

[0022] As an optional implementation, when the selection control module is an XNOR gate, the isolation module is further provided with a pull-up circuit at the connection end with the baseboard management controller or the complex programmable logic device.

[0023] As an optional implementation, the second general purpose input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the output terminal of the strobe control module;

[0024] The baseboard management controller and the complex programmable logic device are further configured to determine the current gating state of the selection switching module and output a corresponding gating signal to the selection switching module in combination with the operation state detection result.

[0025] As an optional embodiment, the baseboard management controller is configured to receive a dog feeding signal sent by the complex programmable logic device; when the dog feeding signal indicates that the complex programmable logic device is in an abnormal operating state, send a selection signal for obtaining control of the fan module to the selection switching module;

[0026] The complex programmable logic device is configured to receive a dog feeding signal sent by a baseboard management controller; when the dog feeding signal is used to indicate that the baseboard management controller is in an abnormal operating state, the complex programmable logic device sends a selection signal for obtaining control of the fan module to the selection switching module.

[0027] As an optional implementation, the baseboard management controller is configured to obtain control of the fan module when the complex programmable logic device and the baseboard management controller are in normal working conditions; and output a pulse width modulation signal for adjusting the power of the fan module.

[0028] To solve the above technical problems, the present application further provides a fan control method, which is applied to a fan control circuit. The fan control circuit includes: a baseboard management controller, a complex programmable logic device, and a selection switching module; wherein the control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are in communication connection; and the output terminal of the selection switching module is connected to the fan module;

[0029] Methods include:

[0030] The control substrate management controller and the complex programmable logic device send preset signals to each other;

[0031] The control baseboard management controller and the complex programmable logic device respectively detect whether the other party's operating status is normal by whether the preset signal is received;

[0032] According to the operating status detection results of the baseboard management controller and the complex programmable logic device, the gating of the switching module is controlled.

[0033] As an optional implementation manner, according to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes:

[0034] When the baseboard management controller and the complex programmable logic device are both in normal operation and the complex programmable logic device is selected and the switching module is selected to enable the complex programmable logic device, the enabling state of the switching module is switched;

[0035] When only the baseboard management controller is in a normal operating state and the switching module is selected to enable the complex programmable logic device, the enabling state of the switching module is switched;

[0036] When only the operation state of the complex programmable logic device is normal and the selection switching module turns on the baseboard management controller, the selection switching module is controlled to turn on the control signal output by the complex programmable logic device.

[0037] As an optional embodiment, the fan control circuit further includes: an XENOR gate; the switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the XENOR gate, and the output terminal of the XENOR gate is connected to the selection control terminal of the selection switching module;

[0038] The selection control terminal of the selection switching module selects the baseboard management controller when receiving a low level, and selects the complex programmable logic device when receiving a high level;

[0039] Based on the operating status detection results of the baseboard management controller and the complex programmable logic device, the control selection switching module includes:

[0040] The first general input and output terminal of the baseboard management controller is configured to output a high level by default; when it is detected that the operating state of the complex programmable logic device is abnormal and the switching module is currently selected to select the complex programmable logic device, the first general input and output terminal of the baseboard management controller is configured to output a low level;

[0041] Configure the first general input and output terminal of the complex programmable logic device: the default output is high level; when it is detected that the operating status of the baseboard management controller is normal and the current switching module is selected to enable the complex programmable logic device, the output is low level; when it is detected that the operating status of the baseboard management controller is abnormal and the current switching module is selected to enable the baseboard management controller, the output is high level.

[0042] As an optional implementation manner, according to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes:

[0043] When the baseboard management controller and the complex programmable logic device are both in normal operation, the control selection switching module selects the control signal output by the baseboard management controller;

[0044] When only the baseboard management controller is in a normal operating state, the control selection switching module is controlled to select the control signal output by the baseboard management controller;

[0045] When only the operation state of the complex programmable logic device is normal, the control selection switching module selects the control signal output by the complex programmable logic device.

[0046] As an optional implementation, the fan control circuit further includes: an XENOR gate;

[0047] The switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the exclusive OR gate, and the output terminal of the exclusive OR gate is connected to the selection control terminal of the selection switching module;

[0048] The selection control terminal of the selection switching module selects the baseboard management controller when receiving a low level, and selects the complex programmable logic device when receiving a high level;

[0049] Based on the operating status detection results of the baseboard management controller and the complex programmable logic device, the control selection switching module includes:

[0050] The first general input and output terminal of the baseboard management controller is configured to output a high level by default; when an abnormal operating state of the complex programmable logic device is detected, the output is a low level;

[0051] The first general input and output terminal of the complex programmable logic device is configured to output a high level by default; when it is detected that the operating state of the baseboard management controller is abnormal, the output is a high level; when it is detected that the operating state of the baseboard management controller is normal, the output is a low level.

[0052] As an optional implementation, the fan control circuit further includes: an XOR gate;

[0053] The switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the exclusive OR gate, and the output terminal of the exclusive OR gate is connected to the selection control terminal of the selection switching module;

[0054] The selection control terminal of the selection switching module selects the baseboard management controller when receiving a low level, and selects the complex programmable logic device when receiving a high level;

[0055] Based on the operating status detection results of the baseboard management controller and the complex programmable logic device, the control selection switching module includes:

[0056] The first general input and output terminal of the baseboard management controller is configured to output a low level by default; when an abnormal operating state of the complex programmable logic device is detected, the output is a low level;

[0057] The first general input and output terminal of the complex programmable logic device is configured to output a high level by default; when it is detected that the operating state of the baseboard management controller is abnormal, the output is a high level; when it is detected that the operating state of the baseboard management controller is normal, the output is a low level.

[0058] As an optional implementation, the preset signal is a dog feeding signal that changes between high and low levels according to a fixed frequency.

[0059] As an optional implementation, controlling the baseboard management controller and the complex programmable logic device to detect whether the other's operating status is normal by respectively receiving a preset signal includes:

[0060] When the baseboard management controller / complex programmable logic device receives the watchdog feeding signal, the watchdog count is cleared;

[0061] When the baseboard management controller / complex programmable logic device continues to fail to receive the watchdog signal, the watchdog count overflows, triggering an interrupt and determining that the other party's operating status is abnormal.

[0062] To solve the above technical problems, the present application further provides a fan control device, which is applied to a fan control circuit. The fan control circuit includes: a baseboard management controller, a complex programmable logic device, and a selection switching module; wherein the control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are in communication connection; and the output terminal of the selection switching module is connected to the fan module;

[0063] The device includes:

[0064] A status communication module is configured to control the baseboard management controller and the complex programmable logic device to send preset signals to each other;

[0065] The status detection module is configured to control the baseboard management controller and the complex programmable logic device to detect whether the operation status of the other party is normal by respectively detecting whether the preset signal is received;

[0066] The switching control module is configured to control the gating of the selection switching module according to the operating status detection results of the baseboard management controller and the complex programmable logic device.

[0067] To solve the above technical problems, the present application further provides a fan control device, comprising:

[0068] a memory configured to store a computer program;

[0069] The processor is configured to implement the steps of the fan control method described above when executing the computer program.

[0070] To solve the above technical problems, the present application also provides a computer non-volatile readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the fan control method described above are implemented.

[0071] The present application provides a fan control circuit. In the scenario where servers and storage devices control fan modules, since both BMC and CPLD devices are currently available and can control fan modules, this circuit controls the fan module by independently outputting PWM signals through the BMC and CPLD. In addition, in this circuit, the switching module is used to control the control signals output by the BMC and CPLD and the fan module, thereby realizing the switching control of the control right of the fan module. The BMC and CPLD are connected in communication and can detect whether the operating status of each other is normal. When either the BMC or the CPLD fails, the other control module can control the switching module to transfer the control right of the fan module to itself, thereby ensuring the control of the fan module when either the CPLD or the BMC fails. In addition, this solution also supports other extended control requirements. For example, when both the BMC and the CPLD are normal, the BMC with better control effect controls the fan module. When the BMC is initialized, restarted, or the firmware is upgraded, the CPLD controls the fan module to ensure the full-time control requirements of the fan. Moreover, the fan control of this solution can be implemented by the existing BMC and CPLD, without adding additional complex control devices, so that this solution better meets the implementation needs of actual application scenarios.

[0072] The fan control method, device, and computer non-volatile readable storage medium provided in this application correspond to the above-mentioned circuit and have the same effects as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0074] FIG1 is a structural diagram of a fan control circuit provided by the present application;

[0075] FIG2 is a pin diagram of a selection switching module provided by the present application;

[0076] FIG3 is a structural diagram of another fan control circuit provided by the present application;

[0077] FIG4 is a flow chart of a fan control method provided by the present application;

[0078] FIG5 is a structural diagram of a fan control device provided by the present application;

[0079] FIG6 is a structural diagram of a fan control device provided in this application. DETAILED DESCRIPTION

[0080] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0081] The core of this application is to provide a fan control circuit, method, device, equipment and non-volatile readable storage medium.

[0082] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0083] In related technologies, in order to achieve heat dissipation of the device, a solution of building a fan module into the device node is currently commonly adopted. The fan module is configured to dissipate heat for heat-generating components such as the central processing unit (CPU), integrated south bridge (Platform Controller Hub, PCH), memory, hard disk, external card, power supply, etc. in the node.

[0084] To reduce the average power consumption of the fan module and adapt to different cooling requirements in actual applications, the fan module needs to be specifically controlled to adjust its output power. In current servers and storage devices, fan control is typically implemented using a baseboard management controller (BMC). The BMC obtains the real-time temperature of each temperature detection point through an inter-integrated circuit (IIC or I2C). The BMC then outputs a pulse width modulation (PWM) signal with a specific duty cycle against a fan speed table. This signal is then sent to a complex programmable logic device (CPLD), which then transmits it to the fan module for control.

[0085] It should be noted that the BMC primarily controls the fan module, as it can achieve more precise control by collecting temperature data. The CPLD is configured to output a PWM signal with a specific duty cycle to the fan module when fan control is unavailable due to BMC initialization, reboot, or firmware upgrades, ensuring full fan operation.

[0086] However, this solution also presents a problem: CPLDs, as programmable devices, have a higher probability of failure than hardware devices. A CPLD failure prevents the PWM signals output by the BMC or CPLD from reaching the fan module, potentially causing the fan to stop rotating, leading to a continuous increase in node temperature, potentially causing the node system to freeze or even damage the device. Therefore, preventing fan anomalies caused by device failures and ensuring continuous fan operation is a pressing issue.

[0087] To solve the above problems, the present application provides a fan control circuit, as shown in FIG1 , comprising:

[0088] Baseboard management controller 11, complex programmable logic device 12 and selection switching module 13;

[0089] The control signal output terminals of the baseboard management controller 11 and the complex programmable logic device 12 are respectively connected to different input terminals of the selection switching module 13; the first general-purpose input / output (GPIO) terminals of the baseboard management controller 11 and the complex programmable logic device 12 are connected to the selection control terminal of the selection switching module 13; and the baseboard management controller 11 and the complex programmable logic device 12 are communicatively connected with each other;

[0090] The baseboard management controller 11 / complex programmable logic device 12 is configured to: output a control signal to the selection switching module 13; detect whether the operation status of the complex programmable logic device 12 / baseboard management controller 11 is normal, and output a corresponding selection signal to the selection switching module 13 based on the operation status detection result;

[0091] The output end of the selection switching module 13 is connected to the fan module 14 and is configured to control the gating of the control signal output by the BMC 11 / CPLD 12 according to the gating signal.

[0092] Among them, the purpose of the communication connection between BMC and CPLD is to realize the mutual operation status detection between the two. Optionally, in this application, the BMC and CPLD can realize the mutual state detection by sending dog-feeding signals: BMC and CPLD send pre-agreed dog-feeding signals to each other; if the received dog-feeding signal is normal, it means that the other party's operation state is normal; on the contrary, if the received dog-feeding signal is abnormal or no dog-feeding signal is received at all, it means that the other party's operation state is abnormal, and a fault may occur, or the system may be in the initialization, restart, or firmware upgrade state; at this time, it is necessary to control the data selection of the switching module to transfer the control right of the fan module to itself.

[0093] It should be noted that this application does not limit the implementation method of the selection switching module. Simply put, it can be implemented using a selection device with data gating function, such as a data selector, multiplexer / demultiplexer, etc. As shown in Figure 2, it is a port diagram of a 4-bit 2-to-1 high-speed FET (Field-Effect Transistor) multiplexer / demultiplexer SN (used to characterize the product series) 74CBT (QuickSwitch Bus Switch) LV (Low Voltage) 3257, which can be used as the above-mentioned selection switching module.

[0094] In this circuit, only one set of 2-to-1 ports is required. For example, ports IN_1B1, IN_1B2, and OUT_1A can be used to implement the aforementioned selector switch module. Furthermore, in the aforementioned circuit structure, the selector switch module's select control terminal corresponds to terminal S in Figure 2. It's easy to understand that the enable terminal OE_L is also involved in the SN74CBTLV3257's use. Alternatively, the SN74CBTLV3257 port selection logic is shown in Table 1 below.

[0095] Table 1 SN74CBTLV3257 port selection logic truth table

[0096] It should also be noted that, in this circuit structure, the BMC and CPLD are communicatively connected to each other, allowing each to detect whether the other is operating normally. Therefore, if either the BMC or the CPLD experiences a fault, the other can detect it and then output a corresponding selection signal to the selection switching module via the first general-purpose input / output terminal, thereby controlling the selection switching module to transfer control to itself.

[0097] Based on the above configuration, the BMC and CPLD independently detect their operating status and use the detection results to control the gating of the selection switching module. In other words, the selection switching module only needs to implement the data gating function, without having to detect the operating status of the BMC and CPLD, or determine how to perform gating control based on their operating status. This greatly simplifies the implementation of the selection switching module, allowing it to be simply implemented by a data selector.

[0098] Optionally, in addition to the control logic for switching control rights when an abnormal operating state occurs, this circuit structure also supports other expansions of the switching logic for fan control rights. For example, since the BMC can output PWM signals with different duty cycles by collecting the temperature in the node to adaptively adjust the power of the fan module, when both the BMC and the CPLD are working normally, the BMC can be configured to obtain the control rights of the fan module in this scenario to ensure better control effects. Based on this, other switching logics can be expanded for switching the control rights of the fan module according to actual needs, and this application does not impose any restrictions on this.

[0099] In addition, it is easy to understand that in this circuit, the BMC and CPLD used for fan module control in actual server and storage device scenarios are used as two independent control devices to realize the control of the fan module. The purpose is to reuse the existing control devices and achieve better fan module control effect without adding additional control devices. Based on this, if this effect is not considered, other control devices can also be used to replace the above-mentioned BMC or CPLD in actual applications, and the embodiments of this application do not limit this; similarly, the fan module as a controlled device can also be replaced with other controlled devices in other application scenarios; that is, the fan control circuit provided by this application, which discloses a circuit structure in which the dual control devices control the controlled device based on the control signal switching, can also be applied to the control of controlled devices other than the fan module in other scenarios, and bring the same technical effects.

[0100] Based on the above, it can be seen that the fan control circuit provided by the present application can be used to output PWM signals to realize the control of the fan module by two original devices BMC and CPLD in the heat dissipation application scenario of servers and storage devices, respectively realizing independent control of the fan module; and the control of the fan module by BMC and CPLD is switched by the selection switching module; there is a communication connection between BMC and CPLD, and they can detect each other's operating status by sending and receiving specific signals based on a pre-agreed agreement; when either party is unable to control the fan module normally due to an abnormal operating state, it can be detected by the other party, and the other party controls the selection switching module to realize the switching of the control right of the fan module to ensure continuous control of the fan module, and will not cause the control of the fan module to fail due to the easy damage of CPLD, further ensuring the heat dissipation effect of the server and storage device. At the same time, this circuit also supports the fan module control currently in servers and storage devices. If the BMC is working normally, the fan module will be controlled by BMC first to ensure better control effect.

[0101] As an optional implementation, regarding how to accurately switch control rights when either the BMC or the CPLD fails, and how to ensure that the control rights are switched without conflict when both the BMC and the CPLD are normal, the embodiment of the present application provides a specific implementation scheme. The fan circuit further includes: a gating control module;

[0102] The selection control module is arranged between the baseboard management controller, the first general input and output terminal of the complex programmable logic device and the selection control terminal of the selection switching module, and is configured to control whether to switch the selection state of the selection switching module according to the selection signal output by the baseboard management controller and the complex programmable logic device.

[0103] Optionally, as can be seen from the above, the selection switching module is configured to implement 2-choose-1 channel gating. In practical applications, the control of gating two channels separately can generally be achieved through high and low level signals, such as the port gating logic shown in Table 1 above. In this case, that is, the gating control module provided in the embodiment of the present application is configured to convert the gating signal output by the BMC and / or CPLD into a switching signal specifically at a high level or a low level, thereby implementing switching control of the channel gating of the selection switching module, thereby avoiding the problem of multiple signals being simultaneously output to the selection control terminal of the selection switching module and interfering with each other.

[0104] Optionally, for the gating control module in the above embodiment, the embodiment of the present application also provides a possible implementation scheme: the gating control module can be implemented by a logic gate circuit.

[0105] Optionally, in combination with the above-mentioned gate switching logic requirements, an XOR gate or an XOR gate in the logic gate circuit may be selected to be configured to implement the gate control module.

[0106] Accordingly, the first general input and output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the XOR gate / XOR gate, and the output terminals of the XOR gate / XOR gate are connected to the selection control terminal of the selection switching module.

[0107] Optionally, using the multiplexer / demultiplexer SN74CBTLV3257 as the selection switching module and the XNOR gate as the gating control module, a possible fan module control right switching control logic is described in conjunction with the example in FIG3 :

[0108] As shown in Table 1 above, the port selection logic shows that when the switching module is enabled, the switching control terminal (S terminal) inputs a low level to select the B1 terminal, that is, to select the BMC, and the S terminal inputs a high level to select the B2 terminal, that is, to select the CPLD.

[0109] Based on this, and considering several possible application scenarios, the following GPIO1 output level configuration can be performed on the BMC and CPLD:

[0110] Scenario 1: The first few minutes after a node is powered on by a power supply unit (PSU).

[0111] When the node is powered on by a PSU, the BMC and CPLD start up. The BMC initialization and thread startup process is estimated to take about a minute, while the CPLD takes only a few milliseconds from power-on to pin configuration. Therefore, in scenario 1, the CPLD is operating normally while the BMC is still in the initialization state.

[0112] At this point, the control logic in the above embodiment indicates that the CPLD must take over control of the fan module to ensure proper cooling of the entire system. Therefore, the CPLD can be configured to output a high level, and the BMC can default to a high level output. The XOR gate's truth logic indicates that a double "1" input to the XOR gate outputs a "1," meaning two high-level input signals result in a high-level output. When the S terminal receives a high-level signal, A = B2, effectively selecting IN_1B2, and the CPLD gains control of the fan module.

[0113] It should be noted that the above-mentioned "BMC outputs high level by default" configuration means that the BMC is configured to be high level when the GPIO configuration is performed after the BMC is powered on and the firmware is loaded.

[0114] Scenario 2: The node is powered on by a PSU and the BMC has started normally.

[0115] This is the scenario corresponding to when both the BMC and the CPLD are operating normally. As can be seen from the control logic of the above embodiment, the BMC needs to take over the control of the fan module to ensure a better control effect.

[0116] Therefore, the CPLD can be configured to output a low level when it detects that the BMC is operating normally, while the BMC maintains the default high output level. The XNOR gate's truth logic indicates that the gate should output a low level at this time. When the S terminal receives a low-level signal, A = B1, which means that IN_1B1 is selected, and the BMC gains control of the fan module.

[0117] Scenario 3: BMC failure, restart, or online upgrade;

[0118] This is the scenario where the CPLD detects that the BMC is in an abnormal operating state. As can be seen from the control logic of the above embodiment, the CPLD needs to take over the control of the fan module to ensure normal control of the fan module.

[0119] Therefore, the CPLD can be configured to output a high level when a BMC abnormality is detected. Since the BMC outputs a high level by default, the XNOR gate's truth logic indicates that the gate should output a high level at this time. When the S terminal receives a high-level signal, A = B2, which means that IN_1B2 is selected, and the CPLD gains control of the fan module.

[0120] Scenario 4: CPLD failure;

[0121] This is the scenario where the BMC detects that the CPLD is in an abnormal operating state. As can be seen from the control logic of the above embodiment, the BMC needs to take over the control of the fan module to ensure normal control of the fan module.

[0122] Therefore, the BMC can be configured to output a low level when it detects a CPLD abnormality. The CPLD outputs a high level by default. The XNOR gate's truth logic indicates that the gate should output a low level at this time. When the S terminal receives a low-level signal, A = B1, which means that IN_1B1 is selected, and the BMC gains control of the fan module.

[0123] Similarly, when the XOR gate is selected as the above-mentioned selection control module, the level output configuration of the first general input and output terminal (GPIO1) of the BMC and CPLD is similar to the above example. The embodiment of the present application will not be described here, and will be explained in detail in the subsequent fan control circuit embodiment.

[0124] As can be seen from the foregoing, the embodiments of the present application utilize logic gate circuits such as XOR and XOR gates as the gating control module. This allows the gating signals originally output by the BMC and CPLD to be combined into one, adapting to the needs of selecting a single control selection terminal of the switching module, avoiding mutual interference, and achieving a more stable gating control effect. Furthermore, the gating control module implemented using XOR and XOR gates is simple to implement, occupies a small circuit area, and has virtually no adverse impact on the implementation of the fan control circuit.

[0125] As an optional implementation, the embodiment of the present application also provides another optional implementation, wherein the above-mentioned fan control circuit further includes: an isolation module;

[0126] The isolation module is arranged between the first universal input / output terminal of the baseboard management controller and the selection control terminal of the selection switching module, and between the first universal input / output terminal of the complex programmable logic device and the selection control terminal of the selection switching module.

[0127] It should be noted that the isolation module is configured to achieve level isolation between the BMC, CPLD, and the selection switching module to further ensure the stability and safety of the circuit. When a gating control module is added to the circuit as in the above embodiment, the isolation module can be placed between the BMC, CPLD, and the gating control module. As shown in Figure 3, there are two isolation modules, one each placed between the BMC, CPLD, and the two input ports of the XNOR gate.

[0128] Optionally, the above does not limit the specific implementation of the isolation module, and any existing isolation device or circuit with a level isolation function can be used for implementation. The embodiment of the present application provides a possible implementation scheme for the specific implementation of the isolation module, and the isolation module includes: N-level field effect transistors (MOS transistors) and a pull-up circuit; where N is a positive integer;

[0129] When N is equal to 1, the gate of the field effect transistor is connected to the first general input and output terminal of the baseboard management controller / complex programmable logic device, the source is grounded, and the drain is correspondingly connected to the selection control terminal of the selection switching module and is connected to the pull-up circuit;

[0130] When N is greater than 1, the gate of the first-stage field-effect transistor is connected to the first universal input / output terminal of the substrate management controller / complex programmable logic device; the source of each stage of the field-effect transistor is grounded, and the drain is connected to the pull-up circuit; the drain of the previous stage field-effect transistor is connected to the gate of the next stage field-effect transistor, and the drain of the last stage field-effect transistor is correspondingly connected to the selection control terminal of the selection switching module.

[0131] That is, the embodiment of the present application implements a level isolation function through an N-level MOS (Metal-Oxide-Semiconductor Field-Effect Transistor) structure. In conjunction with the circuit shown in Figure 3, when N = 2, the isolation module consists of two MOS transistors, one located between the CPLD and the XNOR gate (Q1, Q2), and the other between the BMC and the XNOR gate (Q3, Q4).

[0132] It should be noted that based on the N-level MOS structure provided in the embodiment of the present application; when N is an odd number, the isolation module will invert the level logic at both ends, that is, the high level input into the isolation module will become a low level when output from the isolation module; when N is an even number, the isolation module will not affect the level logic at both ends, that is, the high level input into the isolation module will still be a high level when output from the isolation module.

[0133] As shown in Figure 3, taking the isolation module composed of Q1 and Q2 as an example for illustration: When the GPIO1 terminal of the CPLD outputs a high level, the gate-source voltage of Q1 is greater than the conduction voltage (Vgs > Vth), Q1 conducts, and the gate of Q2 is equivalently pulled low to the ground; at this time, the gate-source voltage of Q2 is less than the conduction voltage (Vgs < Vth), Q2 turns off, and the level at the drain is pulled high to a high level by the pull-up circuit; that is, when the 2-stage MOS structure inputs a high level, a high level is output.

[0134] Similarly, when the GPIO1 terminal of the CPLD outputs a low level, the gate-source voltage of Q1 is less than the conduction voltage (Vgs < Vth), Q1 turns off, and the gate of Q2 is pulled high by the pull-up circuit; at this time, the gate-source voltage of Q2 is greater than the conduction voltage (Vgs > Vth), Q2 conducts, and the drain is grounded, and the level is pulled low; that is, when the 2-stage MOS structure inputs a low level, a low level is output.

[0135] Therefore, based on the above N-stage MOS structure isolation module in the embodiments of the present application, an optional implementation solution is further provided: When N is greater than 1, N is an even number. To avoid unnecessary level logic changes caused by the isolation module, thereby increasing the design difficulty of the gating switching logic between the BMC and the CPLD.

[0136] In addition, when the gating control module is an exclusive-NOR gate, based on the level configuration logic in the four scenarios provided in the above embodiments, it is required that the BMC and the CPLD default to output a high level. To ensure this default high-level output configuration, the embodiments of the present application further provide an optional solution, and the above isolation module is also provided with a pull-up circuit at the connection terminal with the BMC or the CPLD.

[0137] Based on the isolation circuit provided in the embodiments of the present application, level isolation can be achieved between the CPLD, the BMC, and the selection switching module, so as to further ensure the safety and reliability of the fan control circuit. In addition, this solution also provides an optional implementation solution for the isolation module, an optional 2-stage MOS structure, which while achieving the level isolation function, does not affect the level logic, and is convenient for technicians to design and configure the level output logic of the GPIO1 terminals of the CPLD and the BMC.

[0138] As an optional implementation manner, in addition to the above embodiments providing specific levels output by the BMC and the CPLD for different application scenarios, the embodiments of the present application further provide another implementation solution for the gating switching logic:

[0139] Among them, the requirements for controlling the fan module in each scenario remain unchanged, but when controlling the selection switching module, the CPLD or the BMC first obtains the current gating state of the selection switching module additionally, and then decides whether to switch the control right.

[0140] For example, when the CPLD detects a BMC failure, the above embodiment requires the CPLD to directly control the selection switching module to enable the CPLD itself; however, for the embodiment of the present application, after the CPLD detects a BMC failure, the current enabling state of the selection switching module is obtained. If the current control right is in the hands of the BMC, the enabling state of the selection switching module is "switched"; otherwise, no operation is required.

[0141] That is, the control focus of the selection switching module in the above embodiment is on "controlling the selection of BMC or CPLD in different scenarios", while the control focus of the embodiment of the present application is on "determining whether the selection state needs to be switched based on control requirements in different scenarios". The advantage of the embodiment of the present application is that it avoids invalid operations on the selection switching module when there is no need to change the control right, thereby further improving the reliability of the selection control.

[0142] In addition to the above-mentioned embodiment of a fan control circuit, the present invention also provides a fan control method applied to the above-mentioned fan control circuit, as shown in FIG4 . The method includes:

[0143] S11: Control the substrate management controller and the complex programmable logic device to send preset signals to each other;

[0144] S12: The control substrate management controller and the complex programmable logic device respectively detect whether the operation status of the other party is normal by receiving the preset signal;

[0145] S13: According to the operating status detection results of the baseboard management controller and the complex programmable logic device, control the gating of the selection switching module.

[0146] Among them, steps S11 and S12 are steps in which the BMC and CPLD mutually detect whether their operating status is normal. As can be seen from the embodiment of the circuit portion above, the operating status detection between the BMC and CPLD can rely on the communication connection between the two to send a specific signal (i.e., the preset signal in step S11 above) to each other, and determine whether the other party's operating status is normal based on whether the specific signal is received.

[0147] Optionally, based on the setting of the above-mentioned preset signal, the embodiment of the present application also provides an optional implementation scheme: the preset signal is a dog feeding signal that changes between high and low levels according to a fixed frequency.

[0148] In other words, the BMC and CPLD use a watchdog to monitor each other's status. A signal with a fixed frequency of high and low level changes is pre-agreed between the two as a watchdog feed signal. When the watchdog receives the feed signal, the watchdog count is reset to zero. If the feed signal is not received for a period of time, the watchdog count overflows, triggering an interrupt. At this point, the other party's operating status is considered abnormal.

[0149] In addition, for step S13, which corresponds to the part of the above circuit embodiment that configures the output level logic of the GPIO1 terminal of the CPLD and the BMC, the embodiment of the present application optionally provides two gating control logics:

[0150] 1. Determine whether it is necessary to switch control of the fan module based on the different needs of the fan module controller in different scenarios;

[0151] At this time, a corresponding implementation scheme of step S13 includes:

[0152] S131-A: When the baseboard management controller and the complex programmable logic device are both operating normally and the selection switching module selects the complex programmable logic device, switching the selection switching module to select the switching state;

[0153] S132-A: When only the baseboard management controller is in normal operation and the switching module is selected to enable the complex programmable logic device, the enabling state of the switching module is switched;

[0154] S133-A: When only the operation status of the complex programmable logic device is normal and the selection switching module enables the baseboard management controller, the selection switching module is controlled to enable the control signal output by the complex programmable logic device.

[0155] At this time, taking the circuit shown in FIG3 as an example, the selection control module is an exclusive-OR gate, the output end of the exclusive-OR gate is connected to the second general-purpose input and output end (GPIO2) of the BMC and the CPLD, and the isolation module is a two-level MOS structure (i.e., N = even number, the isolation module does not affect the level logic of the two ends); the selection logic of the switching module is as shown in Table 1 above, and the BMC is selected when a low level is received, and the CPLD is selected when a high level is received.

[0156] At this time, the BMC and CPLD GPIO1 terminal level configuration logic scheme for implementing the control logic of step S13 above is:

[0157] The first general input and output terminal of the baseboard management controller is configured to output a high level by default; when it is detected that the operating state of the complex programmable logic device is abnormal and the switching module is currently selected to select the complex programmable logic device, the first general input and output terminal of the baseboard management controller is configured to output a low level;

[0158] Configure the first general input and output terminal of the complex programmable logic device: the default output is high level; when it is detected that the operating status of the baseboard management controller is normal and the current switching module is selected to enable the complex programmable logic device, the output is low level; when it is detected that the operating status of the baseboard management controller is abnormal and the current switching module is selected to enable the baseboard management controller, the output is high level.

[0159] 2. Select the switch module to transfer the control of the fan module to the CPLD or BMC according to different control scenarios;

[0160] At this time, a corresponding implementation scheme of step S13 includes:

[0161] S131-B: When the operating states of the baseboard management controller and the complex programmable logic device are both normal, the control selection switching module selects the control signal output by the baseboard management controller;

[0162] S132-B: When only the baseboard management controller is in a normal operating state, the control selection switching module selects the control signal output by the baseboard management controller;

[0163] S133-B: When only the operation status of the complex programmable logic device is normal, the control selection switching module selects the control signal output by the complex programmable logic device.

[0164] At this time, taking the circuit shown in FIG3 as an example, the selection control module is an exclusive-OR gate, the output end of the exclusive-OR gate is connected to the second general-purpose input and output end (GPIO2) of the BMC and the CPLD, and the isolation module is a two-level MOS structure (i.e., N = even number, the isolation module does not affect the level logic of the two ends); the selection logic of the switching module is as shown in Table 1 above, and the BMC is selected when a low level is received, and the CPLD is selected when a high level is received.

[0165] At this time, the BMC and CPLD GPIO1 terminal level configuration logic scheme for implementing the control logic of step S13 above is:

[0166] The first general input and output terminal of the baseboard management controller is configured to output a high level by default; when an abnormal operating state of the complex programmable logic device is detected, the output is a low level;

[0167] The first general input and output terminal of the complex programmable logic device is configured to output a high level by default; when it is detected that the operating state of the baseboard management controller is abnormal, the output is a high level; when it is detected that the operating state of the baseboard management controller is normal, the output is a low level.

[0168] Similarly, when the selection control module is an XOR gate, the switching signal output ends of the baseboard management controller and the complex programmable logic device are respectively connected to the two input ends of the XOR gate, and the output end of the XOR gate is connected to the selection control end of the selection switching module.

[0169] If the switching module's gating logic is as shown in Table 1 above, the BMC is enabled when a low level is received, and the CPLD is enabled when a high level is received. Then the GPIO1 terminal level configuration logic scheme of the BMC and CPLD that implements the control logic of step S13 above is:

[0170] The first general input and output terminal of the baseboard management controller is configured to output a low level by default; when an abnormal operating state of the complex programmable logic device is detected, the output is a low level;

[0171] The first general input and output terminal of the complex programmable logic device is configured to output a high level by default; when it is detected that the operating state of the baseboard management controller is abnormal, the output is a high level; when it is detected that the operating state of the baseboard management controller is normal, the output is a low level.

[0172] Based on the above embodiments, when the isolation module adopts an even-numbered MOS structure to not affect the level logic at both ends, and the selection logic of the switching module is as shown in Table 1 above, the configuration of the output level logic of the GPIO1 end of the BMC and CPLD can be shown in Table 2 below.

[0173] Table 2 BMC and CPLD GPIO1 output level configuration table

[0174] Note that in Table 2, "None" indicates that the current BMC or CPLD cannot output the required specific level and can only output the default level signal. Also, in Table 2, only scenario 4 uses the BMC as the fault detector and controller (or switcher) of fan control. In all other scenarios, the CPLD determines whether to switch fan control.

[0175] In summary, the present application provides a method applied to the above-mentioned fan control circuit, which can bring the same technical effects as the above-mentioned fan control circuit: reuse of the existing BMC and CPLD can realize the control of the fan module; when either the BMC and CPLD operate abnormally, it can be detected by the other party, and the control of the fan module is switched to itself by controlling the switching module to ensure normal control of the fan module; in addition, it also supports the expansion of control requirements, for example, when the BMC and CPLD are operating normally, in order to achieve better control effect, the control of the fan module is handed over to the BMC. The fan module control implemented based on this method can achieve better fan control effect without adding additional logic control devices. The control of the fan module will not fail due to the easy damage of the CPLD, further ensuring the heat dissipation effect of the server and storage device.

[0176] In the above embodiment, a fan control method is described in detail. This application also provides a corresponding embodiment of a fan control device. It should be noted that this application describes the embodiments of the device from two perspectives: one is based on the functional module perspective, and the other is based on the hardware perspective.

[0177] From the perspective of functional modules, as shown in FIG5 , an embodiment of the present application provides a fan control device, including:

[0178] The status communication module 21 is configured to control the baseboard management controller and the complex programmable logic device to send preset signals to each other;

[0179] The status detection module 22 is configured to control the baseboard management controller and the complex programmable logic device to detect whether the other party's operating status is normal by respectively receiving a preset signal;

[0180] The switching control module 23 is configured to control the gating of the selection switching module according to the detection results of the operating status of the baseboard management controller and the complex programmable logic device.

[0181] Since the embodiments of the apparatus part correspond to the embodiments of the method part, please refer to the description of the embodiments of the method part for the embodiments of the apparatus part, and will not be repeated here.

[0182] FIG6 is a structural diagram of a fan control device provided by an embodiment of the present application. As shown in FIG6 , a fan control device includes: a memory 30 configured to store a computer program;

[0183] The processor 31 is configured to implement the steps of a fan control method in the above embodiment when executing a computer program.

[0184] The fan control device provided in the embodiments of the present application may include but is not limited to a mobile terminal, a personal computer, a workstation, etc.

[0185] Among them, the processor 31 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 31 can be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 31 may also include a main processor and a coprocessor. The main processor is a processor configured to process data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor configured to process data in the standby state. In some optional embodiments, the processor 31 may be integrated with a graphics processing unit (GPU), and the GPU is configured to be responsible for rendering and drawing the content to be displayed on the display screen. In some optional embodiments, the processor 31 may also include an artificial intelligence (AI) processor, which is configured to process computing operations related to machine learning.

[0186] The memory 30 may include one or more computer non-volatile readable storage media, which may be non-transitory. The memory 30 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In an embodiment of the present application, the memory 30 is at least configured to store the following computer program 301, wherein, after the computer program is loaded and executed by the processor 31, it can implement the relevant steps of a fan control method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 30 may also include an operating system 302 and data 303, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 302 may include Windows, Unix, Linux, etc. The data 303 may include but is not limited to a fan control method, etc.

[0187] In some optional embodiments, a fan control device may further include a display screen 32 , an input / output interface 33 , a communication interface 34 , a power supply 35 , and a communication bus 36 .

[0188] Those skilled in the art will appreciate that the structure shown in FIG. 6 does not limit a fan control device and may include more or fewer components than shown in the figure.

[0189] A fan control device provided by an embodiment of the present application includes a memory and a processor. When the processor executes a program stored in the memory, it can implement the following method: a fan control method.

[0190] Finally, the present application also provides an embodiment corresponding to a non-volatile computer-readable storage medium, wherein a computer program is stored on the non-volatile computer-readable storage medium, and when the computer program is executed by a processor, the steps described in the above method embodiment are implemented.

[0191] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer non-volatile readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a non-volatile storage medium and executes all or part of the steps of the method described in each embodiment of the present application. The aforementioned non-volatile storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, etc. Various non-volatile storage media that can store program code.

[0192] The above is a detailed introduction to a fan control circuit, method, device, equipment and non-volatile readable storage medium provided by the present application. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of this application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of this application.

[0193] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

Claims

1. A fan control circuit, characterized in that: include: Baseboard management controller, complex programmable logic device and selection switch module; The control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are in communication connection with each other; The baseboard management controller / the complex programmable logic device is configured to: output a control signal to the selection switching module; detect whether the operation status of the complex programmable logic device / the baseboard management controller is normal, and output a corresponding selection signal to the selection switching module according to the operation status detection result; The output end of the selection switching module is connected to the fan module and is configured to control the gating of the control signal output by the baseboard management controller / the complex programmable logic device according to the gating signal.

2. The fan control circuit according to claim 1, wherein: Also includes: Strobe control module; The selection control module is arranged between the baseboard management controller, the first general input and output terminal of the complex programmable logic device and the selection control terminal of the selection switching module, and is configured to control whether to switch the selection state of the selection switching module according to the selection signal output by the baseboard management controller and the complex programmable logic device.

3. The fan control circuit according to claim 2, wherein: The gate control module is an XOR gate or an XOR gate; The first general input and output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the XOR gate / XOR gate, and the output terminals of the XOR gate / XOR gate are connected to the selection control terminal of the selection switching module.

4. The fan control circuit according to claim 3, wherein: Also includes: Isolation module; The isolation module is provided between the first universal input / output terminal of the baseboard management controller and the selection control terminal of the selection switching module, and between the first universal input / output terminal of the complex programmable logic device and the selection control terminal of the selection switching module.

5. The fan control circuit according to claim 4, wherein: The isolation module includes: N-level field effect transistors and pull-up circuits; wherein N is a positive integer; When N is equal to 1, the gate of the field effect transistor is connected to the first general input and output terminal of the baseboard management controller / the complex programmable logic device, the source is grounded, and the drain is correspondingly connected to the selection control terminal of the selection switching module and is connected to the pull-up circuit; When N is greater than 1, the gate of the first-stage field-effect transistor is connected to the first universal input / output terminal of the baseboard management controller / the complex programmable logic device; the source of the field-effect transistor at each stage is grounded, and the drain is connected to the pull-up circuit; the drain of the field-effect transistor at the previous stage is connected to the gate of the field-effect transistor at the next stage, and the drain of the field-effect transistor at the last stage is correspondingly connected to the selection control terminal of the selection switching module.

6. The fan control circuit according to claim 5, wherein: When the strobe control module is the XNOR gate, the isolation module is further provided with a pull-up circuit at the connection end with the baseboard management controller or the complex programmable logic device.

7. The fan control circuit according to claim 2, wherein: The second general purpose input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the output terminal of the gating control module; The baseboard management controller and the complex programmable logic device are further configured to determine a current gating state of the selection switching module and output a corresponding gating signal to the selection switching module in combination with the operation state detection result.

8. The fan control circuit according to claim 1, wherein: The baseboard management controller is configured to receive a dog feeding signal sent by the complex programmable logic device; when the dog feeding signal indicates that the complex programmable logic device is in an abnormal operating state, send the selection signal for obtaining control of the fan module to the selection switching module; The complex programmable logic device is configured to receive the dog feeding signal sent by the baseboard management controller; when the dog feeding signal is used to indicate that the operating status of the baseboard management controller is abnormal, the selection signal for obtaining control of the fan module is sent to the selection switching module.

9. The fan control circuit according to claim 1, wherein: The baseboard management controller is configured to obtain control rights of the fan module when the complex programmable logic device and the baseboard management controller are both in normal working states; Output a pulse width modulation signal for adjusting the power of the fan module.

10. A fan control method, characterized in that: Applicable to a fan control circuit, the fan control circuit includes: a baseboard management controller, a complex programmable logic device, and a selection switching module; wherein the control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are in communication connection; and the output terminal of the selection switching module is connected to the fan module; Methods include: Controlling the baseboard management controller and the complex programmable logic device to send preset signals to each other; Controlling the baseboard management controller and the complex programmable logic device to detect whether the other party's operating status is normal by respectively detecting whether the preset signal is received; The selection switching module is controlled to be enabled according to the operating status detection results of the baseboard management controller and the complex programmable logic device.

11. The fan control method according to claim 10, wherein: According to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes: When the operating states of the baseboard management controller and the complex programmable logic device are both normal and the selection switching module has gated on the complex programmable logic device, switching the gate state of the selection switching module; When only the baseboard management controller is in a normal operating state and the selection switching module selects the complex programmable logic device, switching the selection switching module's selection state; When only the operation status of the complex programmable logic device is normal and the selection switching module enables the baseboard management controller, the selection switching module is controlled to enable the control signal output by the complex programmable logic device.

12. The fan control method according to claim 11, wherein: The fan control circuit further includes: an XENOR gate; the switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the XENOR gate, and the output terminal of the XENOR gate is connected to the selection control terminal of the selection switching module; The selection control terminal of the selection switching module gates the baseboard management controller when receiving a low level, and gates the complex programmable logic device when receiving a high level; According to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes: The first general input / output terminal of the baseboard management controller is configured to output a high level by default; and output a low level when it is detected that the operating state of the complex programmable logic device is abnormal and the selection switching module currently selects the complex programmable logic device; The first general input and output terminal of the complex programmable logic device is configured to: output a high level by default; output a low level when it is detected that the operating status of the baseboard management controller is normal and the current selection switching module has selected the complex programmable logic device; output a high level when it is detected that the operating status of the baseboard management controller is abnormal and the current selection switching module has selected the baseboard management controller.

13. The fan control method according to claim 10, wherein: According to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes: When the operating states of the baseboard management controller and the complex programmable logic device are both normal, controlling the selection switching module to select the control signal output by the baseboard management controller; When only the baseboard management controller is in a normal operating state, controlling the selection switching module to select the control signal output by the baseboard management controller; When only the operation state of the complex programmable logic device is normal, the selection switching module is controlled to select the control signal output by the complex programmable logic device.

14. The fan control method according to claim 13, wherein: The fan control circuit further includes: an XNOR gate; The switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the XEN-OR gate, and the output terminal of the XEN-OR gate is connected to the selection control terminal of the selection switching module; The selection control terminal of the selection switching module gates the baseboard management controller when receiving a low level, and gates the complex programmable logic device when receiving a high level; According to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes: Configuring the first general input / output terminal of the baseboard management controller to output a high level by default; and output a low level when it is detected that the operating state of the complex programmable logic device is abnormal; The first general input and output terminal of the complex programmable logic device is configured to: output a high level by default; output a high level when it is detected that the operating state of the baseboard management controller is abnormal; output a low level when it is detected that the operating state of the baseboard management controller is normal.

15. The fan control method according to claim 13, wherein: The fan control circuit further includes: an XOR gate; The switching signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to the two input terminals of the XOR gate, and the output terminal of the XOR gate is connected to the selection control terminal of the selection switching module; The selection control terminal of the selection switching module gates the baseboard management controller when receiving a low level, and gates the complex programmable logic device when receiving a high level; According to the operating status detection results of the baseboard management controller and the complex programmable logic device, controlling the gating of the selection switching module includes: The first general input / output terminal of the baseboard management controller is configured to output a low level by default; when it is detected that the operating state of the complex programmable logic device is abnormal, the first general input / output terminal outputs a low level; The first general input and output terminal of the complex programmable logic device is configured to: output a high level by default; output a high level when it is detected that the operating state of the baseboard management controller is abnormal; output a low level when it is detected that the operating state of the baseboard management controller is normal.

16. The fan control method according to any one of claims 10 to 15, characterized in that: The preset signal is a dog feeding signal that changes between high and low levels according to a fixed frequency.

17. The fan control method according to claim 16, wherein: The controlling the baseboard management controller and the complex programmable logic device to detect whether the operation status of the other party is normal by respectively detecting whether the preset signal is received includes: When the baseboard management controller / the complex programmable logic device receives the watchdog feeding signal, the watchdog count is reset to zero; When the baseboard management controller / the complex programmable logic device continues not to receive the watchdog feeding signal, the watchdog count overflows, triggering an interrupt, and determining that the other party's operating status is abnormal.

18. A fan control device, characterized in that: Applicable to a fan control circuit, the fan control circuit includes: a baseboard management controller, a complex programmable logic device, and a selection switching module; wherein the control signal output terminals of the baseboard management controller and the complex programmable logic device are respectively connected to different input terminals of the selection switching module; the first general input and output terminals of the baseboard management controller and the complex programmable logic device are connected to the selection control terminal of the selection switching module; the baseboard management controller and the complex programmable logic device are in communication connection; and the output terminal of the selection switching module is connected to the fan module; The device includes: a status communication module, configured to control the baseboard management controller and the complex programmable logic device to send preset signals to each other; a status detection module configured to control the baseboard management controller and the complex programmable logic device to detect whether the other party's operating status is normal by respectively detecting whether the preset signal is received; The switching control module is configured to control the gating of the selection switching module according to the detection results of the operating states of the baseboard management controller and the complex programmable logic device.

19. A fan control device, characterized in that: include: a memory configured to store a computer program; A processor is configured to implement the steps of the fan control method according to any one of claims 10 to 17 when executing the computer program.

20. A computer-readable non-volatile storage medium, characterized in that: The computer non-volatile readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the fan control method according to any one of claims 10 to 17 are implemented.

Images