Micro-battery

Abstract

A micro-battery comprising: - a structured support comprising a substrate including micro-pillars disposed on one face of the substrate, each micro-pillar having a free surface, and nano-wires disposed on the free surface of at least a portion of the micro-pillars; - a first current collector disposed on the structured support and a second current collector; - a first electrode disposed on the first current collector, and a second electrode, the first and second electrodes being disposed between the first and second current collectors; and - an electrolyte disposed between the first and second electrodes.

Description

[0001] DESCRIPTION

[0002] TITLE: Micro-battery

[0003] Technical field

[0004] The present invention relates to a micro-battery, an electronic system comprising said micro-battery, and a method of manufacturing said micro-battery.

[0005] State of the prior art

[0006] Miniaturized batteries, also called micro-batteries or integrated batteries, are electronic components with a reduced physical size.

[0007] Such miniaturization is essential in the current development of electronic devices, in particular those known as embedded, portable or smart, such as for example integrated circuits, implantable or portable medical devices, smartphones, tablets, smartwatches, navigation systems, laptops, sensors, in particular embedded, connected objects, in particular of the loT type (for Internet of Things in English), and practically any equipment requiring compact integrated circuits and increasingly smaller electronic devices.

[0008] The current development of miniaturized batteries faces various problems.

[0009] First of all, due to their small size, micro-batteries generally have a reduced energy density.

[0010] It is therefore essential to find solutions to increase energy density (i.e. the amount of energy that a micro-battery can provide in a given space) in order to maintain high electrical performance in a small format, and to do so sustainably.

[0011] Furthermore, with the reduction in their dimensions, mechanical and thermal constraints can have a greater impact on the reliability and longevity of microbatteries.

[0012] There is therefore a need to develop more reliable and safer microbatteries, including those free from the risk of short circuits, explosions, or leaks, especially when used in implantable medical devices or other critical applications. Furthermore, manufacturing miniaturized batteries with high precision and high electrical performance can be difficult and expensive.

[0013] Microbattery manufacturing processes must therefore be adapted to avoid defects and guarantee consistent performance, while maintaining reduced costs.

[0014] The invention aims to further improve micro-batteries, in particular by improving their electrical performance, their reliability and their manufacturing.

[0015] Statement of the invention

[0016] Micro-battery

[0017] The invention thus relates, according to a first of its aspects, to a micro-battery comprising:

[0018] - an architectural support comprising:

[0019] . a substrate,

[0020] . micro-pillars arranged on one face of the substrate, each micro-pillar having a free surface, and

[0021] . nanowires arranged on the free surface of at least part of the micro-pillars,

[0022] - a first current collector arranged on the architectural support, and a second current collector,

[0023] - a first electrode disposed on the first current collector, and a second electrode, the first and second electrodes being disposed between the first and second current collectors, and

[0024] - an electrolyte disposed between the first and second electrodes.

[0025] The term “architectural support” means a support comprising a structure on its surface, for example the presence of micro-structures and / or nano-structures, such as for example micro-pillars and / or nano-wires, in comparison with a support without a structure on its surface, generally called a “planar or two-dimensional (2D) support”.

[0026] The use of the architectural support is particularly advantageous insofar as the latter develops a large surface area compared to a flat support (2D).

[0027] In the present application, the architectural support is a so-called four-dimensional (4D) architectural support insofar as it comprises both micro-pillars and nano-wires.

[0028] The face of the substrate can be free of nanowires.

[0029] This characteristic according to which said face of the substrate can be devoid of nano-wires can make it possible to simplify the manufacturing process of the support, in particular by eliminating a lithography step, and without significantly reducing the surface area developed by the support.

[0030] Indeed, the presence of nanowires on the face of the substrate only contributes marginally to the surface area developed by the support, in comparison with the nanowires arranged on the free surface of at least part of the micro-pillars.

[0031] Furthermore, when the support has nanowires on the face of the substrate, these nanowires present a risk of breakage, in particular when the support is used for the manufacture of a micro-energy storage device.

[0032] For example, the deposition of resin on the nanowires arranged on the face of the substrate during a lithography step can lead to damage or even breakage of these nanowires.

[0033] This may cause short circuits within the said micro energy storage device in which the medium is or will be integrated.

[0034] The characteristic according to which said face of the substrate can be devoid of nanowires can thus make it possible to limit, or even eliminate, this risk of short circuit, and thus improve the safety and reliability of said micro-energy storage device in which the support is or will be integrated.

[0035] The nanowires can be arranged on the free surface of each of the micro-pillars.

[0036] The nanowires can be arranged over the entire free surface of at least part of the micro-pillars, in particular over the entire free surface of each of the micro-pillars.

[0037] Alternatively, the nanowires are arranged only on a portion of the free surface of at least a portion of the micro-pillars, in particular only on a portion of the free surface of each of the micro-pillars.

[0038] Each micro-pillar may have an upper face and one or more side faces.

[0039] The side face(s) are preferably substantially perpendicular to the face of the substrate.

[0040] The upper face is preferably substantially parallel to the face of the substrate.

[0041] In an exemplary embodiment, the nanowires are arranged only on the lateral face(s) of at least part of the micro-pillars, in particular only on the lateral face(s) of each of the micro-pillars.

[0042] This therefore means that, in this embodiment, the upper faces of the micro-pillars are devoid of nano-wires. This can simplify the support manufacturing process, in particular by eliminating a lithography step, and without significantly reducing the surface area developed by the support.

[0043] Indeed, the presence of nanowires on the upper faces of the micro-pillars only contributes marginally to the surface area developed by the support, compared to the nanowires arranged on the lateral faces of the micro-pillars.

[0044] Furthermore, when the support has nanowires on the upper faces of the micro-pillars, these nanowires present a risk of breakage, in particular when the support is used for the manufacture of a micro-energy storage device.

[0045] For example, the deposition of resin on the nanowires arranged on the upper faces of the micro-pillars during a lithography step can lead to damage, or even breakage, of these nanowires.

[0046] This may cause short circuits within the said micro energy storage device in which the medium is or will be integrated.

[0047] The characteristic according to which the nanowires can be arranged only on the lateral face(s) of at least part of the micro-pillars, in particular only on the lateral face(s) of each of the micro-pillars, can thus make it possible to limit, or even eliminate, this risk of short circuit, and thus improve the safety and reliability of said micro-energy storage device in which the support is or will be integrated.

[0048] In an exemplary embodiment, each micro-pillar is solid, in particular over all or part of its height.

[0049] In an exemplary embodiment, each micro-pillar is hollow, in particular over all or part of its height. The presence of such micro-pillars can make it possible to further increase the surface area developed by the support.

[0050] Each micro-pillar may have a proximal end connected to the face of the substrate and a distal end.

[0051] In an exemplary embodiment, each micro-pillar is hollow over part of its height, in particular at its distal end.

[0052] In an exemplary embodiment, each micro-pillar comprises a first solid part which is connected to the face of the substrate and which continues with a second hollow part. The presence of such micro-pillars can make it possible to further increase the surface area developed by the support.

[0053] Preferably, each micro-pillar has an elongated shape. Preferably, each micro-pillar extends from the face of the substrate, in particular in a rectilinear manner, in particular in a manner substantially perpendicular to the face of the substrate.

[0054] Each micro-pillar may have a cylindrical, conical, truncated cone or any other shape, preferably cylindrical.

[0055] The term "cylindrical shape" refers to any type of cylinder such as a right circular cylinder, a square cylinder, or a rectangular cylinder.

[0056] In an exemplary embodiment, each micro-pillar comprises a first cylindrical part which is connected to the face of the substrate and which continues with a second conical or truncated conical part.

[0057] Each micro-pillar may have a circular, elliptical or polygonal cross-section, for example triangular, square, rectangular, pentagonal, hexagonal, cross-shaped, star-shaped, etc.

[0058] In an exemplary embodiment, each micro-pillar has a circular cross-section, for example with a diameter of between 2 pm and 6 pm, in particular between 3 pm and 5 pm.

[0059] In an exemplary embodiment, each micro-pillar has a triangular, square or rectangular cross-section, for example with sides each having a length of between 2 pm and 6 pm, in particular between 3 pm and 5 pm.

[0060] In a preferred embodiment, each micro-pillar has a square-shaped cross-section, for example with sides each having a length of between 2 μm and 6 μm, in particular between 3 μm and 5 μm. A square-shaped cross-section can make it possible to maximize the lateral surface area developed by the micro-pillars, and thus maximize the surface area developed by the support.

[0061] In a preferred embodiment, each micro-pillar has a cylindrical shape and has a square or rectangular cross-section, preferably square, with, for example, sides each having a length of between 2 pm and 6 pm, in particular between 3 pm and 5 pm.

[0062] In this preferred embodiment, each micro-pillar has a top face and four side faces.

[0063] In this embodiment, the nanowires are arranged only on the lateral faces of at least a portion of the micropillars, in particular of each of the micropillars. Thus, in this preferred embodiment, the upper faces of the micropillars are devoid of nanowires. Each micropillar may have a cross-section whose surface area is between 2 μm 2 and 40 pm 2 , preferably between 4 pm 2 and 36 pm 2, and more preferably between 9 pm 2 and 25 pm 2 .

[0064] Each micro-pillar may have a length greater than or equal to 10 pm, preferably greater than or equal to 20 pm, more preferably greater than or equal to 30 pm, and even more preferably greater than or equal to 40 pm.

[0065] The terms "length" and "height" are equivalent.

[0066] Each micro-pillar may have a length less than or equal to 400 pm, preferably less than or equal to 350 pm, more preferably less than or equal to 300 pm, and even more preferably less than or equal to 250 pm.

[0067] Each micro-pillar may have a length ranging from 10 pm to 400 pm, preferably ranging from 20 pm to 350 pm, more preferably ranging from 30 pm to 300 pm, and even more preferably ranging from 40 pm to 250 pm.

[0068] In an exemplary embodiment, each micro-pillar has a length greater than 200 pm, preferably greater than 200 pm and less than or equal to 350 pm, more preferably greater than 200 pm and less than or equal to 300 pm, even more preferably greater than 200 pm and less than or equal to 250 pm.

[0069] The micro-pillars can be arranged on the face of the substrate in rows, in particular each rectilinear, in particular parallel to each other.

[0070] In an exemplary embodiment, each row of micro-pillars comprises a space between two adjacent micro-pillars whose length is between 2 pm and 6 pm, in particular between 3 pm and 5 pm.

[0071] In an exemplary embodiment, two adjacent rows of micro-pillars are separated by a distance of between 0 pm and 6 pm, in particular between 0 pm and 5 pm, or even between 1 and 5 pm.

[0072] In an exemplary embodiment, two adjacent rows of micro-pillars are arranged in a staggered pattern.

[0073] In a preferred embodiment, the substrate and the micro-pillars are formed as a single piece.

[0074] This feature has the following advantages:

[0075] - provides improved mechanical resistance due to better cohesion of the support,

[0076] - avoids the risk of cracking or detachment of the micro-pillars. Indeed, the micro-pillars are “hollowed” into the substrate and are thus laterally protected (see figures 1 and 2) significantly increases the reliability and lifespan of a device comprising such an architectural support simplifies the manufacturing process and contributes to improving its reproducibility on an industrial scale.

[0077] For example, micro-pillars are obtained by a deep reactive ion etching technique (also called DRIE for Deep Reactive Ion Etching in English) of a wafer, for example made of silicon.

[0078] The substrate and the micro-pillars may comprise, or even be made of, a material suitable for microfabrication techniques, particularly for microelectronics.

[0079] The substrate and the micro-pillars may comprise, or even be made of, a semiconductor material or an insulating material, in particular a dielectric.

[0080] The substrate and micro-pillars may comprise, or even be made of, a ceramic material.

[0081] The substrate and the micro-pillars comprise, or are made of, silicon (Si), silica (SiC>2), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC), silicon nitride (SisN4) and / or indium phosphide (InP), preferably silicon (Si).

[0082] Each nanowire can contain a metal oxide or a mixture of metal oxides.

[0083] For example, each nanowire comprises silica (SiO2), zinc oxide (ZnO), titanium dioxide (TiO2), indium oxide (I n2O3), gallium oxide (Ga2Os), bismuth oxide (Bi20s) and / or tin dioxide (SnO2), preferably silica (SiO2), zinc oxide (ZnO) and / or titanium dioxide (TiO2), more preferably silica (SiO2) and / or zinc oxide (ZnO), and even more preferably silica (SiO2).

[0084] Each nanowire may further comprise a metal or metal alloy, preferably capable of being deposited by an atomic layer deposition technique (also known as an ALD technique for Atomic Layer Deposition in English).

[0085] For example, each nanowire comprises platinum (Pt), gold (Au), silver (Ag), aluminum (Al) and / or gallium (Ga), preferably platinum (Pt), gold (Au) and / or silver (Ag), and more preferably platinum (Pt).

[0086] Preferably, each nanowire comprises silica (SiO2), and in particular platinum (Pt).

[0087] In an exemplary embodiment, each nanowire is made of silica (SiO2) and platinum (Pt). Each nanowire may have a proximal end, a distal end, and a body connecting the proximal end to the distal end.

[0088] The body can be full.

[0089] The body may have an elongated shape, particularly a cylindrical shape.

[0090] The body may have a curved shape.

[0091] The body may have a circular or elliptical cross-section, preferably circular.

[0092] The proximal end can be connected to the free surface of a micro-pillar.

[0093] The distal end may have a convex shape, including a spherical shape, for example a sphere, half-sphere, or portion-sphere shape.

[0094] The body may comprise, or even consist of, a metal oxide or a mixture of metal oxides, preferably capable of being deposited by a chemical vapor deposition technique (also called CVD technique for Chemical Vapor Deposition in English), preferably by a low-pressure chemical vapor deposition technique (also called LPCVD technique for Low Pressure Chemical Vapor Deposition in English) or by an atomic layer deposition technique (also called ALD technique for Atomic Layer Deposition in English).

[0095] For example, the body comprises, or is even made up of, silica (SiO2), zinc oxide (ZnO), titanium dioxide (TiC>2), indium oxide (I n2C>3), gallium oxide (Ga2Os), bismuth oxide (Bi2Os) and / or tin dioxide (SnC>2), preferably silica (SiC>2), zinc oxide (ZnO) and / or titanium dioxide (TiO2), more preferably silica (SiO2) and / or zinc oxide (ZnO), and even more preferably silica (SiO2).

[0096] In a preferred embodiment, the body comprises, or is even made of, silica (SiO2).

[0097] The proximal end may comprise, or even consist of, a metal oxide or a mixture of metal oxides.

[0098] For example, the proximal end comprises, or is made of, silica (SiO2), zinc oxide (ZnO), titanium dioxide (TiO2), indium oxide (I n2O3), gallium oxide (Ga2Os), bismuth oxide (Bi2Os) and / or tin dioxide (SnO2), preferably silica (SiO2), zinc oxide (ZnO) and / or titanium dioxide (TiO2), more preferably silica (SiO2) and / or zinc oxide (ZnO), and even more preferably silica (SiO2).

[0099] In a preferred embodiment, the proximal end comprises, or is made of, silica (SiO2). The distal end may comprise, or be made of, a metal or a metal alloy, preferably capable of being deposited by an atomic layer deposition technique (also called ALD technique for Atomic Layer Deposition in English).

[0100] For example, the distal end comprises, or is made of, platinum (Pt), gold (Au), silver (Ag), aluminum (Al) and / or gallium (Ga), preferably platinum (Pt), gold (Au) and / or silver (Ag), and more preferably platinum (Pt).

[0101] In a preferred embodiment, the distal end comprises, or is made of, platinum (Pt).

[0102] Each nanowire may have a length greater than or equal to 100 nm, preferably greater than or equal to 200 nm, more preferably greater than or equal to 300 nm, even more preferably greater than or equal to 400 nm, and in particular greater than or equal to 500 nm.

[0103] In an exemplary embodiment, each nanowire has a length greater than or equal to 1 pm.

[0104] Each nanowire may have a length less than or equal to 10 pm, preferably less than or equal to 9 pm, more preferably less than or equal to 8 pm, even more preferably less than or equal to 7 pm, and in particular less than or equal to 6 pm.

[0105] In an exemplary embodiment, each nanowire has a length less than or equal to 5 pm.

[0106] Each nanowire may have a length ranging from 100 nm to 10 pm, preferably ranging from 200 nm to 9 pm, more preferably ranging from 300 nm to 8 pm, even more preferably ranging from 400 nm to 7 pm, and in particular ranging from 500 nm to 6 pm.

[0107] In an exemplary embodiment, each nanowire has a length ranging from 1 pm to 5 pm.

[0108] Each nanowire may have a cross-section whose largest dimension is greater than or equal to 20 nm, preferably greater than or equal to 30 nm, more preferably greater than or equal to 40 nm, and even more preferably greater than or equal to 50 nm.

[0109] Each nanowire may have a cross-section whose largest dimension is less than or equal to 250 nm, preferably less than or equal to 240 nm, more preferably less than or equal to 230 nm, even more preferably less than or equal to 220 nm, and in particular less than or equal to 210 nm. Each nanowire may have a cross-section whose largest dimension is between 20 nm and 250 nm, preferably between 30 nm and 240 nm, more preferably between 40 nm and 230 nm, and even more preferably between 50 nm and 220 nm.

[0110] In an exemplary embodiment, each nanowire has a cross-section whose largest dimension is between 20 nm and 200 nm, and preferably between 30 nm and 190 nm.

[0111] The density of nanowires can be between 10 million nanowires / mm 2 and 50 million nanowires / mm 2 , preferably between 10 million nanowires / mm 2 and 40 million nanowires / mm 2 , more preferably between 10 million nano-wires / mm 2 and 30 million nanowires / mm 2 , and even more preferably between 10 million nanowires / mm 2 and 25 million nanowires / mm 2 .

[0112] Such a density of nanowires is particularly advantageous insofar as it can allow particularly high gains to be obtained in terms of surface area developed by the support.

[0113] Each nanowire can be oriented randomly.

[0114] Nanowires can be entangled.

[0115] Each nanowire may comprise a first part which is connected to the free surface of a micro-pillar and which is rectilinear and orthogonal to said free surface, this first part continuing with a second part which is curved.

[0116] The face of the substrate may have a square or rectangular shape, with in particular sides each having a length of between 50 pm and 20 mm, preferably between 100 pm and 2.5 mm.

[0117] The face of the substrate may have a surface area of ​​between 2500 pm 2 and 400 mm 2 , preferably between 10000 pm 2 and 6.25 mm 2 .

[0118] Such surface values ​​correspond to the face of the substrate without micro-pillars and nano-wires.

[0119] The first current collector can cover the architectural support.

[0120] The first current collector may be arranged on the nanowires and micropillars of the architectural support, in particular may surround or cover each nanowire and each micropillar, in particular may surround or cover the proximal end, the distal end and the body of each nanowire and the free surface of each micropillar.

[0121] The first electrode may surround or cover the first current collector.

[0122] The electrolyte may surround or cover the first electrode.

[0123] The second electrode may surround or cover the electrolyte. The second current collector may surround or cover the second electrode.

[0124] The first current collector may be in direct contact with the architectural support, in particular in direct contact with the nanowires and micropillars of the architectural support, in particular in direct contact with the proximal end, the distal end and the body of each nanowire and in direct contact with the free surface of each micropillar.

[0125] The first electrode may be in direct contact with the first current collector.

[0126] The second electrode may be in direct contact with the second current collector.

[0127] The electrolyte may be in direct contact with at least one of the first and second electrodes, in particular with the first electrode and with the second electrode.

[0128] In an example of implementation,

[0129] - the first current collector is arranged on the architectural support,

[0130] - the first electrode is arranged on the first current collector, the electrolyte is arranged on the first electrode, the second electrode is arranged on the electrolyte, and

[0131] - the second current collector is arranged on the second electrode.

[0132] In an example of implementation,

[0133] - the first current collector covers the architectural support,

[0134] - the first electrode covers or surrounds the first current collector, the electrolyte covers or surrounds the first electrode, the second electrode covers or surrounds the electrolyte, and

[0135] - the second current collector covers or surrounds the second electrode.

[0136] The first current collector, the second current collector, the first electrode, the second electrode and the electrolyte can each be deposited by a chemical vapor deposition (CVD) technique, more preferably by an atomic layer deposition (ALD) technique.

[0137] The first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each be in the form of a thin layer, having in particular a thickness ranging from 1 nm to 800 nm, preferably ranging from 3 nm to 800 nm, more preferably from 5 to 500 nm. The first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each be in the form of a thin layer, having in particular a thickness ranging from 1 nm to 250 nm, and preferably ranging from 2 nm to 225 nm.

[0138] The first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have a thickness less than or equal to 250 nm, and preferably less than or equal to 225 nm.

[0139] The first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have a thickness greater than or equal to 1 nm, and preferably greater than or equal to 2 nm.

[0140] The first current collector and the second current collector can each be made of an electronically conductive material, in particular metallic.

[0141] For example, the electronically conductive material is a material that can be deposited using a chemical vapor deposition (CVD) technique, more preferably using an atomic layer deposition (ALD) technique.

[0142] For example, the electronically conductive material comprises, or is even made of, a metal, in particular a transition metal, or a metal alloy, in particular of transition metals.

[0143] For example, the electronically conductive material comprises, or is even made up of, platinum (Pt), gold (Au), silver (Ag), copper (Cu) or one of their mixtures, preferably platinum (Pt).

[0144] Preferably, the first current collector and the second current collector are each electronically conductive, in particular metallic.

[0145] The first current collector and the second current collector may each have a thickness ranging from 10 to 50 nm, preferably ranging from 15 nm to 45 nm, and more preferably ranging from 20 nm to 40 nm.

[0146] The first current collector and the second current collector may comprise, or even be made of, the same material.

[0147] The first current collector and the second current collector can have the same thickness.

[0148] One of the first and second electrodes may be a positive electrode and the other electrode may be a negative electrode. In an exemplary embodiment, the first electrode is a positive electrode and the second electrode is a negative electrode.

[0149] In another exemplary embodiment, the first electrode is a negative electrode and the second electrode is a positive electrode.

[0150] The positive electrode may include, or even be made of, an electroactive material containing lithium, and in particular manganese.

[0151] The positive electrode may comprise, or even be made of, an electroactive material having a crystallographic structure of the olivine, spinel or lamellar type.

[0152] The positive electrode may comprise, or even be made of, an electroactive material having a potential ranging from 3 V to 5.2 V, in particular ranging from 4.4 V to 5 V, relative to a negative lithium electrode.

[0153] These potential values ​​make it possible to obtain a micro-battery with a high energy density.

[0154] The positive electrode may comprise, or even be made of, an electroactive material chosen from:

[0155] - lithium-cobalt oxides, for example ÜC0O2; lithium-manganese oxides, for example LiMnC>2; lithium-nickel oxides, for example LiNiC>2;

[0156] - lithium iron phosphates, for example LiFePCU;

[0157] - cobalt-lithium phosphates, for example UC0PO4; nickel-lithium phosphates, for example LiNiPCU;

[0158] - manganese-lithium phosphates, for example LiMnPCU;

[0159] - manganese-iron-lithium phosphates, for example LiMn0.66Feo.34P04 or LiMno.eFeo.4P04;

[0160] - lithium-nickel-manganese-cobalt (NMC) oxides, e.g., LiNiMnCoC>2; lithium-nickel-cobalt-aluminium (NCA) oxides, e.g., LiNiCoAIC>2; lithium-manganese oxides (LMO), e.g., LiM^CU; lithium-nickel-manganese oxides (LMNO), e.g., LiNio.sMni.sCU; and

[0161] - one of their blends.

[0162] Preferably, the positive electrode comprises, or is made of, an electroactive material chosen from: lithium-manganese oxides (LMO), for example LiMn2O4; lithium-nickel-manganese oxides (LMNO), for example LiNio.sMni.sC; and one of their mixtures.

[0163] More preferably, the positive electrode comprises, or is even made of, an electroactive material chosen from lithium-nickel-manganese oxides (LMNO), for example LiNio,5Mni,504.

[0164] The positive electrode, especially the first electrode, may have a thickness ranging from 5 nm to 500 nm, especially from 100 nm to 250 nm.

[0165] The negative electrode may comprise, or even be made of, an electroactive material chosen from:

[0166] - titanium dioxide (TiO2), for example in anatase or rutile form, in particular doped, for example with silver (TiO2-Ag);

[0167] - graphite;

[0168] - graphene, particularly doped, for example with silver;

[0169] - carbon;

[0170] - lithium (Li);

[0171] - silicon (Si);

[0172] - silicon carbide (SiC);

[0173] - niobium oxide (Nb20s);

[0174] - tin and its alloys, for example SiSn or SnC;

[0175] - lithium titanate (Li4Ti50i 2); and

[0176] - one of their blends.

[0177] Preferably, the negative electrode comprises, or is even made of, an electroactive material which is titanium dioxide (TiC^), for example in anatase or rutile form, in particular doped, for example with silver (TiC Ag).

[0178] Titanium dioxide (TiC^) as a negative electrode exhibits high chemical and thermal stability, which can lead to long microbattery life and good capacity retention over charge and discharge cycles.

[0179] Furthermore, because TiO2 is chemically stable, the microbattery may have a much lower risk of overheating or dangerous reactions, such as ignition or explosion, compared to other negative electrode materials. Using TiC>2 as the negative electrode may allow the microbattery to operate at slightly higher voltages, thus providing higher energy density.

[0180] Finally, TiC>2 can offer good behavior at high charge and discharge rates, due to its electronic conductivity and good diffusion of lithium ions.

[0181] The use of doped titanium dioxide, for example with silver (TiCL-Ag), as a negative electrode can lead to improved electronic conductivity and specific capacity compared to the use of undoped titanium dioxide. This can notably allow for improved charge and discharge rate, highly reversible charge and discharge characteristics, and potentially increased longevity of the microbattery.

[0182] The negative electrode, especially the second electrode, can have a thickness ranging from 3 nm to 800 nm, especially from 50 nm to 150 nm.

[0183] For example, the electroactive material of the positive electrode and the electroactive material of the negative electrode are materials that can be deposited by a chemical vapor deposition (CVD) technique, more preferably by an atomic layer deposition (ALD) technique.

[0184] The first electrode and the second electrode may each have a thickness ranging from 5 nm to 500 nm, including 100 nm to 250 nm.

[0185] The first electrode and the second electrode may have the same thickness, especially when the first electrode and the second electrode have identical capacities.

[0186] The first electrode and the second electrode may have different thicknesses, especially when the first electrode and the second electrode have different capacitances. This can compensate for the difference in capacitance between the first electrode and the second electrode.

[0187] The electrolyte is preferably solid.

[0188] The use of a solid electrolyte can result in a microbattery with better safety and higher energy density than microbatteries using conventional liquid electrolytes.

[0189] The electrolyte is preferably conductive of lithium cations (Li + ).

[0190] The electrolyte may contain lithium, phosphorus, oxygen, and in particular nitrogen. The electrolyte may contain, or even consist of, lithium orthophosphate (Ü3PO4) and / or lithium phosphorus oxynitride (UPON).

[0191] Preferably, the electrolyte comprises, or even consists of, lithium orthophosphate (U3PO4).

[0192] The electrolyte can have a thickness ranging from 3 nm to 800 nm, including 50 nm to 150 nm.

[0193] The micro-battery may comprise at least one contact orifice passing through the second current collector, the second electrode, the electrolyte and the first electrode so as to expose a contact area, in particular predefined, of the first current collector.

[0194] The contact orifice may allow electrical contact to be made with the first current collector at said contact area.

[0195] The contact orifice can extend along an axis substantially perpendicular to the face of the substrate of the architectural support (i.e. along an axis substantially parallel to the extension axis of the micro-pillars).

[0196] The contact port may include a first portion passing through the second current collector, a second portion passing through the second electrode, a third portion passing through the electrolyte, and a fourth portion passing through the first electrode.

[0197] The contact area is preferably located at an area of ​​the substrate face that does not have micro-pillars.

[0198] This can eliminate the risk of micro-pillar breakage when the contact area is located on the micro-pillars.

[0199] The micro-battery may comprise at least one protective layer, in particular thermal, arranged between the architectural support and the first current collector.

[0200] The protective layer can be placed on the architectural support.

[0201] The first current collector can be arranged on the protective layer.

[0202] The protective layer can cover the architectural support.

[0203] In particular, the protective layer may be arranged on the nanowires and micropillars of the architectural support, in particular may surround or cover each nanowire and each micropillar, in particular may surround or cover the proximal end, the distal end and the body of each nanowire and the free surface of each micropillar.

[0204] The first current collector may cover or surround the protective layer.

[0205] The protective layer may be in direct contact with the architectural support and with the first current collector. The protective layer may be deposited by a chemical vapor deposition (CVD) technique, more preferably by an atomic layer deposition (ALD) technique.

[0206] The protective layer may have a thickness ranging from 10 nm to 80 nm, preferably ranging from 20 nm to 70 nm, more preferably ranging from 30 nm to 60 nm, and even more preferably ranging from 35 nm to 55 nm.

[0207] The protective layer may include, or even be made of, an insulating material.

[0208] For example, the insulating material is a material that can be deposited using a chemical vapor deposition (CVD) technique, more preferably using an atomic layer deposition (ALD) technique.

[0209] The insulating material is preferably a ceramic material.

[0210] The insulating material may include, or even consist of, a metal oxide or a mixture of metal oxides.

[0211] For example, the insulating material contains, or is even made of, alumina (AI2O3).

[0212] The protective layer can protect the architectural support against high temperatures, in particular greater than or equal to 400°C, preferably greater than or equal to 500°C, more preferably greater than or equal to 600°C, and even more preferably greater than or equal to 700°C.

[0213] Such temperature values ​​may be necessary, for example, to form a layer of a mixed metal oxide (eg LiNi0.5Mni,5O4) on the structured support by ALD from several layers of different materials (eg MnC>2, NiO and LiOH), in particular deposited sequentially. Such heat treatments are crystallization annealing.

[0214] However, exposing the architectural support to such temperature values ​​may, for example, alter the structure and / or composition of the architectural support.

[0215] For example, exposure of the architectural support to such temperature values ​​can cause the diffusion of platinum (Pt) from the nanowires into the silicon (Si) of the micro-pillars and / or the substrate, thus forming a non-conductive SiPt alloy.

[0216] Thus, when the architectural support is exposed to such temperature values, the structure and / or composition of the architectural support can be preserved thanks to the presence of the protective layer. The micro-battery is preferably an all-solid-state micro-battery.

[0217] The micro-battery is preferably a lithium-ion (Li-ion) micro-battery.

[0218] Electronic system including a micro-battery

[0219] The invention also relates, according to another of its aspects, to an electronic system comprising a micro-battery as defined above.

[0220] The electronic system may include at least one data reception system, in particular wireless.

[0221] The electronic system may include at least one data transmission system, in particular wireless.

[0222] The electronic system may include at least one data processing system, such as for example a microcontroller or microprocessor.

[0223] The electronic system may include at least one data storage system.

[0224] The electronic system may include at least one data sensor.

[0225] Preferably, the electronic system is energy self-sufficient.

[0226] Preferably, the electronic system operates in real time.

[0227] Preferably, the electronic system is embedded, portable and / or intelligent.

[0228] For example, the electronic system is chosen from an integrated circuit (also called an electronic chip or microchip in English), an implantable or portable medical device, a smartphone, a tablet, a connected watch, a navigation system, a laptop, a sensor, in particular an embedded one, a connected object, in particular of the loT type (for Internet of Things in English), etc.

[0229] Manufacturing process of a micro-battery

[0230] The invention also relates, according to another of its aspects, to a method for manufacturing a micro-battery as defined above, comprising at least the following steps: a) providing an architectural support comprising:

[0231] - a substrate,

[0232] - micro-pillars arranged on one face of the substrate, each micro-pillar having a free surface, and

[0233] - nanowires arranged on the free surface of at least a portion of the micro-pillars, b) deposition of a first current collector in the form of a thin layer on the architectural support, c) deposition of a first electrode in the form of a thin layer on the first current collector, d) deposition of an electrolyte in the form of a thin layer on the first electrode, e) deposition of a second electrode in the form of a thin layer on the electrolyte, and f) deposition of a second current collector in the form of a thin layer on the second electrode.

[0234] The architectural support, the first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have one or more of the features described above.

[0235] Preferably, step b) is implemented so as to cover the architectural support.

[0236] Preferably, step c) is carried out so as to cover or surround the first current collector.

[0237] Preferably, step d) is carried out so as to cover or surround the first electrode.

[0238] Preferably, step e) is carried out in such a way as to cover or surround the electrolyte.

[0239] Preferably, step f) is carried out so as to cover or surround the second current collector.

[0240] The architectural support, the first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have a thickness less than or equal to 250 nm, and preferably less than or equal to 225 nm.

[0241] The architectural support, the first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have a thickness greater than or equal to 1 nm, and preferably greater than or equal to 2 nm.

[0242] The architectural support, the first current collector, the second current collector, the first electrode, the second electrode and the electrolyte may each have a thickness ranging from 1 nm to 250 nm, and preferably ranging from 2 nm to 225 nm.

[0243] The first current collector and the second current collector may each have a thickness ranging from 10 to 50 nm, preferably from 15 nm to 45 nm, and more preferably from 20 nm to 40 nm. The first electrode and the second electrode may each have a thickness ranging from 5 nm to 500 nm, in particular from 50 nm to 250 nm.

[0244] The electrolyte can have a thickness ranging from 3 nm to 800 nm, including 50 nm to 150 nm.

[0245] The first current collector and the second current collector can each be made of an electronically conductive material, in particular metallic.

[0246] For example, the electronically conductive material comprises, or is even made of, a metal, in particular a transition metal, or a metal alloy, in particular of transition metals.

[0247] For example, the electronically conductive material contains, or is made of, platinum (Pt), gold (Au), silver (Ag), copper (Cu) or a mixture thereof.

[0248] Preferably, the electronically conductive material comprises, or is made of, platinum (Pt).

[0249] Preferably, the first current collector and the second current collector are each electronically conductive, in particular metallic.

[0250] At least one of steps b), c), d), e) and f), in particular each of steps b), c), d), e) and f), may be implemented by a thin-film deposition technique, preferably by a chemical vapor deposition (CVD) technique, more preferably by an atomic layer deposition (ALD) technique, for example at a temperature ranging from 150°C to 550°C, preferably ranging from 200°C to 500°C, and more preferably ranging from 250°C to 450°C.

[0251] For example, the atomic layer deposition (ALD) technique is implemented using a “PICOSUN® R-200 Advanced” reactor.

[0252] The use of the atomic layer deposition (ALD) technique is advantageous in that it can allow the deposition of thin layers with perfect control of the thickness deposited.

[0253] Indeed, the thickness of the layer deposited by ALD increases linearly with the number of cycles, and given that each cycle deposits a fixed quantity of material in a perfectly predictable and reproducible manner, the thickness of the layer deposited is thus perfectly controlled by the number of cycles carried out.

[0254] The use of the atomic layer deposition (ALD) technique is also advantageous in that it can allow the deposition of thin layers with perfect uniformity, even on large surfaces and surfaces with complex topography such as the surface of the architectural support.

[0255] This makes it possible to obtain thin layers whose thickness is extremely uniform across the entire structured support.

[0256] Controlling the thickness and uniformity of the layers deposited on the architectural support, particularly in steps b), c), d), e) and f), is essential for controlling the electrical performance of the micro-battery.

[0257] At least one of steps b) and f), in particular each of steps b) and f), may be implemented by an atomic layer deposition (ALD) technique, for example at a temperature of between 150°C and 550°C, preferably between 200°C and 500°C, more preferably between 200°C and 450°C, even more preferably between 200°C and 400°C, and in particular between 250°C and 350°C, using: at least one gas, preferably ozone (O3), and at least one precursor of an electronically conductive material, in particular a metal, preferably a precursor of a metal, in particular a transition metal.

[0258] For example, the precursor is chosen from a platinum (Pt), gold (Au), silver (Ag) and / or copper (Cu) precursor, preferably a platinum (Pt) precursor.

[0259] The precursor may be chosen from an organometallic complex comprising platinum (Pt), gold (Au), silver (Ag) and / or copper (Cu), preferably platinum (Pt)-

[0260] The precursor is preferably solid or liquid at room temperature.

[0261] The precursor can be chosen from:

[0262] - trimethyl(methylcyclopentadienyl)platinum(IV) (MeCpPtMes),

[0263] - dimethyl(cyclooctadiene)platinum(ll) (Me2PtCOD),

[0264] - dimethylgold(lll)acetylacetonate (Me2Au(acac)), dimethylgold(lll)trimethylphosphine, silver(l) hexafluoroacetylacetonate (Ag(hfac)), a silver complex with p-diketonate ligands, copper(ll) hexafluoroacetylacetonate vaporized with hydrogen formate or water,

[0265] - a copper complex with hexafluoroacetylacetone (hfac) and 1,5-cyclooctadiene (cod) ((hfac)Cu(1,5-cod)), and

[0266] - one of their mixtures. Trimethyl(methylcyclopentadienyl)platinum(IV) (MeCpPtMes) and dimethyl(cyclooctadiene)platinum(ll) (Me2PtC0D) are examples of precursors used to form platinum (Pt) thin films by ALD.

[0267] Dimethylgold(III)acetylacetonate (Me2Au(acac)) and dimethylgold(III)trimethylphosphine are examples of precursors used to form gold (Au) thin films by ALD.

[0268] Silver(l) hexafluoroacetylacetonate (Ag(hfac)) and silver complex with p-diketonate ligands are examples of precursors used to form silver (Ar) thin films by ALD.

[0269] Copper(ll) hexafluoroacetylacetonate vaporized with hydrogen formate or water, and the copper complex with hexafluoroacetylacetone (hfac) and 1,5-cyclooctadiene (cod) ((hfac)Cu(1,5-cod)) are examples of precursors used to form thin copper (Cu) films by ALD.

[0270] Preferably, the precursor is chosen from:

[0271] - trimethyl(methylcyclopentadienyl)platinum(IV) (MeCpPtMes),

[0272] - dimethyl(cyclooctadiene)platinum(ll) (Me2PtCOD), and

[0273] - one of their blends.

[0274] More preferably, the precursor is trimethyl(methylcyclopentadienyl)platinum(IV) (MeCpPtMes).

[0275] In a preferred embodiment in which the first current collector and the second current collector comprise, or are made of, platinum (Pt), steps b) and f) are each carried out by ALD, for example at a temperature of approximately 300°C, using ozone (Os) as the gas and trimethyl(methylcyclopentadienyl)platinum(IV) (MeCpPtMes) as the precursor.

[0276] The first electrode can be a positive electrode.

[0277] Preferably, the positive electrode comprises, or is made of, an electroactive material chosen from: lithium-manganese oxides (LMO), for example LiMnsCU; lithium-nickel-manganese oxides (LMNO), for example LiNio.sMni.sCU; and

[0278] - one of their blends.

[0279] More preferably, the positive electrode comprises, or is even made of, an electroactive material chosen from lithium-nickel-manganese oxides (LMNO), for example UNio.sMm.sO^ Step c) can be carried out by ALD using one or more precursors allowing the formation of the first electrode.

[0280] For example, step c) can be carried out using at least one precursor comprising lithium (Li), such as for example lithium tert-butoxide (LiOtBu), and at least one precursor comprising manganese (Mn), such as for example Mn(thd)s, and in particular at least one precursor comprising nickel (Ni), such as for example Ni(Cp)2.

[0281] In a preferred embodiment in which the first electrode comprises, or even consists of, a lithium-nickel-manganese oxide (LMNO), such as for example LiNio.sMm.sO^, step c) comprises several sub-steps: c1) deposition of a thin layer of MnC>2 by ALD; c2) deposition of a thin layer of NiO by ALD; c3) deposition of a thin layer of LiOH by ALD;

[0282] - c4) crystallization annealing to form a layer of LiNio,5Mni,504.

[0283] Preferably, substep c2) is implemented after substep c1).

[0284] Preferably, substep c3) is implemented after substep c2).

[0285] Preferably, substep c4) is implemented after substep c3).

[0286] Sub-step c1) can be carried out in the presence of a precursor comprising manganese (Mn), such as for example Mn(thd)s, and in the presence of ozone (O3), for example at a temperature ranging from 185°C to 205°C, preferably ranging from 190°C to 200°C.

[0287] Sub-step c2) can be carried out in the presence of a precursor comprising nickel (Ni), such as for example Ni(Cp)2, and in the presence of ozone (O3), for example at a temperature ranging from 185°C to 205°C, preferably ranging from 190°C to 200°C.

[0288] Sub-step c3) can be carried out in the presence of a precursor comprising lithium (Li), such as for example lithium tert-butoxide (LiOtBu), and in the presence of water (H2O), for example at a temperature ranging from 215°C to 235°C, preferably ranging from 220°C to 230°C.

[0289] Sub-step c4) may be set at a temperature ranging from 650°C to 750°C, preferably from 680°C to 720°C, more preferably from 690°C to 710°C, even more preferably from 695°C to 705°C, for example in air, for example for a duration of between 60 min and 180 min, preferably between 100 min and 140 min, more preferably between 110 min and 130 min, even more preferably between 115 min and 125 min.

[0290] The second electrode may be a negative electrode. The negative electrode may comprise, or even consist of, an electroactive material chosen from:

[0291] - titanium dioxide (TiC^), for example in anatase or rutile form, in particular doped, for example with silver (TiCL-Ag);

[0292] - graphite;

[0293] - graphene, particularly doped, for example with silver;

[0294] - carbon;

[0295] - lithium (Li);

[0296] - silicon (Si);

[0297] - silicon carbide (SiC);

[0298] - niobium oxide (Nb2O5);

[0299] - tin and its alloys, for example SiSn or SnC;

[0300] - lithium titanate (Li4Ti50i 2); and

[0301] - one of their blends.

[0302] Preferably, the negative electrode comprises, or is even made of, an electroactive material which is titanium dioxide (TiC>2), for example in anatase or rutile form, in particular doped, for example with silver (TiCL-Ag).

[0303] Step e) may be implemented by an atomic layer deposition (ALD) technique, for example at a temperature of between 150°C and 550°C, preferably between 200°C and 500°C, more preferably between 200°C and 450°C, even more preferably between 200°C and 400°C, using:

[0304] - at least one oxidizing agent, and at least one precursor of a negative electrode electroactive material.

[0305] The oxidizing agent may be selected from water (H2O), ethanol (C2H5OH), hydrogen peroxide (H2O2), ozone (O3), and a mixture thereof.

[0306] Preferably, the oxidizing agent is water (H2O).

[0307] For example, the precursor is chosen from a titanium dioxide (TiO2) precursor.

[0308] For example, the precursor is chosen from a precursor comprising titanium (Ti).

[0309] The precursor is preferably solid or liquid at room temperature.

[0310] The precursor can be chosen from:

[0311] - titanium tetraisopropoxide (TTIP),

[0312] - titanium tetraethoxide (TEOT), - titanium tetrachloride (TiCk), and

[0313] - one of their blends.

[0314] Titanium tetraisopropoxide (TTIP), titanium tetraethoxide (TEOT), and titanium tetrachloride are examples of precursors used to form thin films of titanium dioxide (TiC>2) by ALD.

[0315] In a preferred embodiment in which the second electrode comprises, or even consists of, titanium dioxide (TiC^), step e) is carried out by ALD, for example at a temperature of approximately 350°C, using water (H2O) as an oxidizing agent and titanium tetrachloride (TiCk) as a precursor.

[0316] The electrolyte is preferably solid.

[0317] The electrolyte may contain, or even consist of, lithium orthophosphate (Ü3PO4) and / or lithium phosphorus oxynitride (LiPON).

[0318] Preferably, the electrolyte comprises, or even consists of, lithium orthophosphate (U3PO4).

[0319] Step d) can be carried out by ALD, for example at a temperature between 200°C and 400°C, preferably between 250°C and 350°C, more preferably between 275°C and 325°C, even more preferably between 290°C and 310°C, using one or more precursors allowing the formation of the electrolyte.

[0320] For example, step d) can be carried out using at least one precursor comprising lithium, such as for example lithium tert-butoxide (LiOtBu), and at least one precursor comprising phosphate, such as for example trimethyl phosphate (TMP).

[0321] The precursor comprising lithium, such as for example lithium tert-butoxide (LiOtBu), can be heated to a temperature ranging from 165°C to 205°C, preferably ranging from 175°C to 195°C, and more preferably ranging from 180°C to 190°C.

[0322] The precursor comprising phosphate, such as for example trimethyl phosphate (TMP), can be heated to a temperature ranging from 75°C to 115°C, preferably ranging from 85°C to 105°C, and more preferably ranging from 90°C to 100°C.

[0323] In a preferred embodiment in which the electrolyte comprises, or even consists of, lithium orthophosphate (U3PO4), step d) is carried out by ALD, for example at a temperature of approximately 300°C, using as precursors lithium tert-butoxide (LiOtBu), in particular heated to a temperature of approximately 185°C, and trimethyl phosphate (TMP), in particular heated to a temperature of approximately 95°C. The method may comprise a step g) of forming at least one contact orifice passing through the second current collector, the second electrode, the electrolyte and the first electrode so as to expose a contact zone, in particular predefined, of the first current collector.

[0324] The contact orifice may allow electrical contact to be made with the first current collector at said contact area.

[0325] The contact orifice can extend along an axis substantially perpendicular to the face of the substrate of the architectural support (i.e. along an axis substantially parallel to the extension axis of the micro-pillars).

[0326] Step g) can be implemented sequentially.

[0327] Step g) may comprise a sub-step g1) of etching the second current collector on a portion corresponding to said contact zone of the first current collector.

[0328] Step g) may comprise a sub-step g2) of etching the second electrode on a portion corresponding to said contact zone of the first current collector.

[0329] Step g) may include a sub-step g3) of etching the electrolyte on a portion corresponding to said contact zone of the first current collector.

[0330] Step g) may include a sub-step g4) of etching the first electrode on a portion corresponding to said contact zone of the first current collector.

[0331] Preferably, substep g2) is implemented after substep g1).

[0332] Preferably, substep g3) is implemented after substep g2).

[0333] Preferably, substep g4) is implemented after substep g3).

[0334] The contact port may include a first portion passing through the second current collector, a second portion passing through the second electrode, a third portion passing through the electrolyte, and a fourth portion passing through the first electrode.

[0335] Substep g1) may allow the formation of the first part of the contact orifice.

[0336] Substep g2) may allow the formation of the second part of the contact orifice.

[0337] Substep g3) may allow the formation of the third part of the contact orifice.

[0338] Sub-step g4) may allow the formation of the fourth part of the contact orifice. At least one of the sub-steps g1), g2), g3) and g4), in particular each of the sub-steps g1), g2), g3) and g4, may be carried out by a reactive ion beam etching technique (or RIBE for Reactive Ion Beam Etching) or by a reactive ion etching technique (or RIE for Reactive Ion Etching in English).

[0339] For example, the reactive ion beam etching technique is implemented using a "Meyer Burger lonSys 500" device.

[0340] For example, the reactive ion beam etching technique is implemented at a speed between 5 nm / min and 15 nm / min, preferably between 8 nm / min and 12 nm / min, more preferably between 9 nm / min and 11 nm / min, and in particular at an angle of 0°.

[0341] For example, the reactive ion etching technique is implemented using an “Oxford Plasmalab 80+” device.

[0342] Step g) may be preceded by a lithography step, in particular photolithography.

[0343] In particular, the lithography step can be carried out after step f) and before step g).

[0344] The lithography step can be implemented using a resin, in particular a positive one, for example the “AZ10XT” resin.

[0345] The lithography step can be implemented using a resin thickness of between 5 pm and 15 pm, preferably between 8 pm and 12 pm, and more preferably between 9 pm and 11 pm.

[0346] Step g) may be followed by a step of removing the resin used during the lithography step.

[0347] The resin removal step can be implemented by immersing the microbattery in a solvent, in particular an organic solvent, for example an “SVC14” solvent, in particular heated, for example to a temperature between 65°C and 95°C, in particular for a period of one hour, then by rinsing the microbattery with one or more solvents, in particular organic solvents, for example with acetone then with isopropyl alcohol (IPA).

[0348] The method may include a step of depositing a protective layer, in particular thermal, in the form of a thin layer on the architectural support.

[0349] Preferably, this step of depositing the protective layer is carried out after step a) and before step b). Preferably, this step of depositing the protective layer is carried out by a chemical vapor deposition (or CVD) technique.

[0350] More preferably, this step of depositing the protective layer is implemented by an atomic layer deposition (ALD) technique, for example at a temperature between 200°C and 400°C, preferably between 250°C and 350°C, more preferably between 275°C and 325°C, even more preferably between 290°C and 310°C.

[0351] This step of depositing the protective layer can be implemented using a precursor comprising aluminum and an oxidizing agent.

[0352] The oxidizing agent may be selected from water (H2O), ethanol (C2H5OH), hydrogen peroxide (H2O2), ozone (O3), and a mixture thereof.

[0353] Preferably, the oxidizing agent is water (H2O).

[0354] The precursor containing aluminum can be trimethylaluminum (TMA).

[0355] In a preferred embodiment in which the protective layer comprises, or even consists of, alumina (AI2O3), the step of depositing the protective layer is carried out by ALD, for example at a temperature of approximately 300°C, using a precursor comprising aluminum, such as for example trimethylaluminum (TMA), and water as an oxidizing agent.

[0356] Preferably, step b) is implemented after step a).

[0357] Preferably, step c) is implemented after step b).

[0358] Preferably, step d) is carried out after step c).

[0359] Preferably, step e) is carried out after step d).

[0360] Preferably, step f) is carried out after step e).

[0361] Preferably, step g) is carried out after step f).

[0362] Brief description of the figures

[0363] Figure 1 A) illustrates a silicon substrate intended for the production of the architectural support according to the invention.

[0364] Figure 1 B) represents the step of deposition and exposure under UV of a photosensitive resin on the flat silicon substrate, allowing the subsequent definition of the micropillars by etching the substrate.

[0365] Figure 1 C) represents the successive steps of etching silicon by Bosch process, followed by the removal of the photosensitive resin by oxygen plasma cleaning (O2), resulting in a substrate comprising a plurality of micro-pillars extending from one face of said substrate. Figure 1 D) represents an image obtained by scanning electron microscopy (SEM) showing a perspective view of a set of substantially parallel micro-pillars formed on the substrate by an etching technique (e.g. DRIE). This image shows the regular spatial distribution of the micro-pillars down to the base of the substrate.

[0366] Figure 2 A) illustrates the step of covering the architectural substrate: by a thin layer of silicon oxide (SiO2) obtained by low pressure chemical vapor deposition (LPCVD) or by atomic layer deposition (ALD) then, by a layer of platinum (Pt) deposited by ALD, covering the face of the substrate and the micro-pillars.

[0367] Figure 2 B) represents a photolithography step consisting of coating the surface of the device with a photosensitive resin, followed by exposure under UV radiation. This step protects the 3D structure.

[0368] Figure 2 C) represents the platinum etching step by reactive ion etching (RIBE), in order to eliminate the platinum layer present on the surface of the substrate while retaining this layer on the surface of the micro-pillars.

[0369] Figure 2 D) illustrates the growth step of SiO2 nanowires using a vapor-liquid-solid (VLS) growth mechanism on the surface of platinum-coated micropillars, leading to a significant increase in the specific surface area of ​​said micropillars.

[0370] Figure 3 A) represents a scanning electron microscopy (SEM) image of a set of substantially parallel micro-pillars, made on a substrate. These micro-pillars, with a high aspect ratio, are arranged in a regular and periodic manner. Each micro-pillar appears covered, on its lateral surface, with nanowires extending radially from the surface. The image makes it possible to visualize the homogeneity of the structuring at the microscopic scale, as well as the good distribution of the nanowires over the entire network of micro-pillars.

[0371] Figure 3 B) shows a SEM image (at a higher magnification than Figure 3 A) in close-up view of several micro-pillars from the same structure as that illustrated in Figure 3 A). This detailed view highlights the density and uniformity of the nanowire deposition on the lateral surface of the micro-pillars. The nanowires are oriented in a generally radial manner with respect to the longitudinal axis of the micro-pillars, and form a three-dimensional structure coating considerably increasing the specific surface area. This configuration is particularly suitable for electrochemical devices, such as micro-batteries or micro-supercapacitors.

[0372] Figure 4 A) and B) shows the structure of a micro-battery according to an embodiment of the invention, obtained by successive atomic layer deposition (ALD) on the architectural support, of an insulator (AI2O3), a first platinum current collector (Pt), a first electrode (LMNO), an electrolyte (U3PO4), a second electrode (TiO2), and a second platinum current collector. The images obtained by SEM show that the micro-pillars are conformally covered by the different layers.

[0373] Figure 5 illustrates a photolithography step consisting of coating the surface of the device with a photosensitive resin, followed by exposure under UV radiation. This step makes it possible to define the areas (patterns) where the second current collector, the second electrode, the electrolyte and the first electrode must subsequently be etched, in particular in order to open accesses to the first current collector and to achieve separation between adjacent components.

[0374] Figure 6 illustrates the selective etching step by RIBE (Reactive Ion Beam Etching) of the second platinum current collector then of the second titanium electrode (TiC>2), of the electrolyte (UPO4) and of the first electrode (LMNO) following the patterns defined in the previous step. This step is followed by cleaning of the resin.

Claims

CLAIMS 1. Micro-battery comprising: - an architectural support comprising: . a substrate, . micro-pillars arranged on one face of the substrate, each micro-pillar having a free surface, and . nanowires arranged on the free surface of at least part of the micro-pillars, - a first current collector arranged on the architectural support, and a second current collector, - a first electrode disposed on the first current collector, and a second electrode, the first and second electrodes being disposed between the first and second current collectors, and - a solid electrolyte disposed between the first and second electrodes.

2. Micro-battery according to claim 1, each micro-pillar having a cylindrical shape and comprising a cross-section of square or rectangular shape, preferably square, with in particular sides each having a length of between 2 pm and 6 pm, in particular between 3 pm and 5 pm.

3. Micro-battery according to claim 1 or 2, each micro-pillar having a length ranging from 10 pm to 400 pm, preferably ranging from 20 pm to 350 pm, more preferably ranging from 30 pm to 300 pm, even more preferably ranging from 40 pm to 250 pm.

4. Micro-battery according to any one of the preceding claims, the substrate and the micro-pillars being formed in one piece.

5. Micro-battery according to any one of the preceding claims, the substrate and the micro-pillars comprising, or even being made of, a semiconductor material or an insulating material, in particular dielectric.

6. Micro-battery according to any one of the preceding claims, each nano-wire having a length ranging from 100 nm to 10 pm, preferably ranging from 200 nm to 9 pm, more preferably ranging from 300 nm to 8 pm, even more preferably ranging from 400 nm to 7 pm, and in particular ranging from 500 nm to 6 pm.

7. Micro-battery according to any one of the preceding claims, each nano-wire having a cross-section whose largest dimension is between 20 nm and 200 nm, and preferably between 30 nm and 190 nm.

8. Micro-battery according to any one of the preceding claims, each nano-wire comprising a metal oxide or a mixture of metal oxides, and in particular a metal or a metal alloy.

9. Micro-battery according to any one of the preceding claims, the first current collector, the second current collector, the first electrode, the second electrode and the electrolyte each being in the form of a thin layer, having in particular a thickness ranging from 1 nm to 800 nm, and preferably ranging from 3 nm to 800 nm.

10. Micro-battery according to claim 9, the first current collector and the second current collector each having a thickness ranging from 10 to 50 nm, preferably ranging from 15 nm to 45 nm, and more preferably ranging from 20 nm to 40 nm.

11. Micro-battery according to claim 9 or 10, the first electrode having a thickness ranging from 5 nm to 500 nm, in particular from 100 nm to 250 nm.

12. Micro-battery according to any one of claims 9 to 11, the electrolyte having a thickness ranging from 3 nm to 800 nm, in particular from 50 nm to 150 nm.

13. Micro-battery according to any one of claims 9 to 12, the second electrode having a thickness ranging from 3 nm to 800 nm, in particular from 50 nm to 150 nm.

14. Micro-battery according to any one of the preceding claims, the first current collector and the second current collector each being made of an electronically conductive material, in particular metallic.

15. Micro-battery according to claim 14, the electronically conductive material comprising, or even being made of, a metal, in particular a transition metal, or a metal alloy, in particular of transition metals.

16. Micro-battery according to claim 14 or 15, the electronically conductive material comprising, or even consisting of, platinum (Pt), gold (Au), silver (Ag), copper (Cu) or one of their mixtures, preferably platinum (Pt).

17. Micro-battery according to any one of the preceding claims, the first electrode being a positive electrode and the second electrode being a negative electrode.

18. Micro-battery according to any one of the preceding claims, the first electrode comprising, or even being made of, an electroactive material chosen from: - lithium manganese oxides (LMO), for example LiMn2O4; - lithium-nickel-manganese oxides (LMNO), for example LiNio.sMni.sOt; and - one of their blends.

19. Micro-battery according to any one of the preceding claims, the second electrode comprising, or even being made of, an electroactive material chosen from: - titanium dioxide (TiCh), for example in anatase or rutile form, in particular doped, for example with silver (TiO2-Ag); - graphite; - graphene, particularly doped, for example with silver; - carbon; - lithium (Li); - silicon (Si); - silicon carbide (SiC); - niobium oxide (Nb20s); - tin and its alloys, for example SiSn or SnC; - lithium titanate (Li4TisOi2); and - one of their blends.

20. Micro-battery according to any one of the preceding claims, the solid electrolyte comprising, or even consisting of, lithium orthophosphate (U3PO4) and / or lithium phosphorus oxynitride (LiPON).

21. Micro-battery according to any one of the preceding claims, the micro-battery comprising at least one protective layer, in particular thermal, arranged between the architectural support and the first current collector.

22. Micro-battery according to any one of the preceding claims, the micro-battery comprising at least one contact orifice passing through the second current collector, the second electrode, the electrolyte and the first electrode so as to expose a contact zone, in particular predefined, of the first current collector.

23. Micro-battery according to any one of the preceding claims, the micro-battery being a lithium-ion micro-battery, preferably all solid.

24. Electronic system comprising a micro-battery according to any one of claims 1 to 23.

25. Electronic system according to claim 24, the electronic system being on-board, portable and / or intelligent.

26. Method of manufacturing a micro-battery according to any one of the claims 1 to 23, comprising at least the following steps: a) provision of an architectural support comprising: - a substrate, - micro-pillars arranged on one face of the substrate, each micro-pillar having a free surface, and - nanowires arranged on the free surface of at least a portion of the micro-pillars, b) deposition of a first current collector in the form of a thin layer on the architectural support, c) deposition of a first electrode in the form of a thin layer on the first current collector, d) deposition of an electrolyte in the form of a thin layer on the first electrode, e) deposition of a second electrode in the form of a thin layer on the electrolyte, and f) deposition of a second current collector in the form of a thin layer on the second electrode.

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