Signal transmission circuit control system, I / O module provided with same, control method, and control program

Abstract

Provided are a signal transmission circuit control system, an I / O module provided with the same, a control method, and a control program which each reduce noise radiated to the outside due to leakage magnetic flux generated from a pattern transformer. A control system (1) for a signal transmission circuit (100) comprises a multilayer substrate which includes a plurality of layers and a plurality of pattern transformers (10) which are provided to the multilayer substrate, and controls the signal transmission circuit for transmitting an insulation signal. The control system further comprises a control unit (5) that, on the basis of a combination of pattern transformers to be operated or at least one pulse signal of a first pattern transformer, which is one of pattern transformers to be operated, controls pulse signals of the pattern transformers to be operated.

Description

Signal transmission circuit control system, I / O module equipped with the same, control method, and control program

[0001] The present disclosure relates to a control system for a signal transmission circuit, an I / O module including the same, a control method, and a control program.

[0002] Circuit boards that control electronic devices often incorporate transformers, which are electronic components that act as transformers to supply power. Mounting transformers on a circuit board increases costs depending on the number of transformers mounted. For this reason, circuit board designs sometimes incorporate a pattern transformer, which has the same functionality as a transformer by forming a winding pattern on the circuit board, instead of mounting a transformer.

[0003] Patent Document 1 discloses a coil device in which coil patterns (pattern transformers) are formed on both the front and back surfaces of a circuit board, and adjacent coil patterns in the vertical and horizontal directions have opposite winding patterns.

[0004] Japanese Unexamined Patent Publication No. 8-181018

[0005] When multiple pattern transformers are formed on a circuit board and these pattern transformers are operated, the leakage magnetic flux (noise) generated by each pattern transformer and leaking to the outside interferes with each other. The leakage magnetic flux generated by the pattern transformers increases in proportion to the number of pattern transformers in operation.

[0006] In this way, if the leakage magnetic flux generated from each pattern transformer increases in proportion to the increase in the number of pattern transformers, signal transmission on the circuit board may not be performed properly, and electronic devices equipped with the circuit board may not be able to operate normally.

[0007] Depending on the control content of an electronic device equipped with a circuit board, when operating multiple pattern transformers, the pattern transformers to be operated may not be uniquely determined. In this case, for example, when pattern transformers located close to each other have the same magnetic flux direction, depending on the combination of pattern transformers to be operated, the total amount of leakage magnetic flux generated from each pattern transformer may increase.

[0008] Due to their shape, pattern transformers, unlike electronic transformers, cannot use noise suppression components such as ferrite cores. Therefore, the challenge is to establish a method for reducing the leakage magnetic flux generated by pattern transformers.

[0009] The present disclosure has been made in consideration of the above circumstances, and aims to provide a control system for a signal transmission circuit that reduces noise radiated to the outside due to leakage magnetic flux generated from a pattern transformer, an I / O module equipped with the same, a control method, and a control program.

[0010] A control system for a signal transmission circuit according to one aspect of some embodiments of the present disclosure includes a multilayer substrate including a plurality of layers and a plurality of pattern transformers provided on the multilayer substrate, and controls the signal transmission circuit for transmitting an isolated signal. The control system includes a control unit that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one pulse signal of a first pattern transformer that is one of the pattern transformers to be operated.

[0011] An I / O module according to an aspect of some embodiments of the present disclosure includes a control system for the signal transmission circuit.

[0012] A control method for a signal transmission circuit according to one aspect of some embodiments of the present disclosure is a control method for controlling a signal transmission circuit for transmitting an isolated signal, the signal transmission circuit comprising a multilayer substrate including a plurality of layers and a plurality of pattern transformers provided on the multilayer substrate, the control method being executed by a computer that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one pulse signal of a first pattern transformer that is one of the pattern transformers to be operated.

[0013] A control program for a signal transmission circuit according to an aspect of some embodiments of the present disclosure causes a computer to execute the above-described method for controlling a signal transmission circuit.

[0014] According to the present disclosure, it is possible to reduce noise radiated to the outside due to leakage magnetic flux generated from the pattern transformer.

[0015] 7 is a configuration diagram of a signal transmission circuit according to an embodiment of the present disclosure; FIG. 8 is a schematic diagram showing the configuration of a pattern transformer according to an embodiment of the present disclosure; FIG. 9 is a plan view of a multilayer substrate on which a plurality of pattern transformers (16 Ch) according to an embodiment of the present disclosure are formed; FIG. 10 is a diagram illustrating the phase polarity of a pulse signal of a pattern transformer of each Ch when all of the pattern transformers according to an embodiment of the present disclosure are operated; FIG. 11 is a waveform diagram of a pulse signal of some of the pattern transformers corresponding to FIG. 4; FIG. 12 is a schematic diagram showing magnetic flux generated by some of the pattern transformers corresponding to FIG. 4; FIG. 13 is a diagram illustrating whether a plurality of pattern transformers are operated and the phase polarity of a pulse signal of a pattern transformer of each Ch according to an embodiment of the present disclosure; FIG. 14 is a waveform diagram of a pulse signal of some of the pattern transformers corresponding to FIG. 7; FIG. 15 is a schematic diagram showing magnetic flux generated by each pattern transformer corresponding to FIG. 7; FIG. 16 is a plan view of a multilayer substrate on which a dummy pattern transformer according to an embodiment of the present disclosure is formed, and a diagram illustrating the phase polarity of a pulse signal of the dummy pattern transformer corresponding to the phase polarity of the pulse signal of the pattern transformer of each Ch; FIG. 17 is a plan view of a multilayer substrate on which a plurality of pattern transformers (8 Ch) according to an embodiment of the present disclosure are formed; FIG. 18 is a diagram illustrating a case where a phase difference is provided in the pulse signal of each pattern transformer according to an embodiment of the present disclosure.

[0016] Hereinafter, an embodiment of a control system for a signal transmission circuit, an I / O module including the same, a control method, and a control program according to the present disclosure will be described with reference to the drawings.

[0017] In the following, for the sake of convenience, the positional relationship of each component described using the expressions "upper" and "lower" with respect to the plane of the paper indicates the vertically upper side and the vertically lower side, respectively. In this embodiment, for components that can obtain similar effects in the vertical direction and the horizontal direction, the vertical direction on the plane of the paper is not necessarily limited to the vertically upper and lower directions, but may correspond to, for example, the horizontal direction perpendicular to the vertical direction.

[0018] The configuration of a signal transmission circuit 100 according to an embodiment of the present disclosure will be described below with reference to Fig. 1. The signal transmission circuit 100 is a circuit for transmitting isolated signals. Fig. 1 is a configuration diagram of the signal transmission circuit according to an embodiment of the present disclosure.

[0019] As shown in FIG. 1, the control system 1 is composed of a control unit 5 and a signal transmission circuit 100. The signal transmission circuit 100 includes a pattern transformer 10 and one or more FETs 40 and 50 serving as semiconductor switching elements. The pattern transformer 10 functions in the same manner as a normal transformer. The detailed configuration of the pattern transformer 10 will be described later. The FETs 40 and 50 are two N-type MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). The source (S) terminal of the FET 40 is connected to the source (S) terminal of the FET 50.

[0020] The one or more semiconductor switching elements included in the signal transmission circuit 100 may not be MOSFETs but may be JFETs (Junction Field-Effect Transistors), transistors, etc. The one or more semiconductor switching elements included in the signal transmission circuit 100 are not limited to two semiconductor switching elements, and may be one semiconductor switching element, or three or more semiconductor switching elements.

[0021] The input side of the signal transmission circuit 100 is provided with a control unit 5 and a buffer 30 (buffer amplifier) ​​that output pulse signals. A pulse signal that alternates between +3.3 V and 0 V, generated by the control unit 5, is input to the positive input terminal of the buffer 30. A pulse signal that alternates between 0 V and −3.3 V, for example, is input to the negative input terminal of the buffer 30. As a result, an AC voltage with a pulse waveform totaling 6.6 V is applied between the positive and negative input terminals of the buffer 30. The control unit 5 is, for example, an element or device having a signal generation function, such as an FPGA (Field-Programmable Gate Array). A known method is used to generate the pulse signal, and a description thereof will be omitted.

[0022] The positive output terminal of the buffer 30 is connected to a resistor R １ One end of the resistor R １ The other end of the capacitor C １ The negative output terminal of the buffer 30 is connected to one end of a resistor R ２ One end of the resistor R ２ The other end of the capacitor C ２ is connected to one end of the resistor R １ and resistance R ２ is designed to have a resistance value to prevent overload.

[0023] Capacitor C １ The other end of the capacitor C is connected to the positive terminal of the primary winding 11 of the pattern transformer 10. ２ The other end of the capacitor C is connected to the negative terminal of the primary winding 11 of the pattern transformer 10. １ and capacitor C ２ Therefore, an AC voltage from which the DC component has been removed is applied to the primary winding 11 of the pattern transformer 10.

[0024] The positive terminal of the secondary winding 12 of the pattern transformer 10 is connected to a coil L １ One end of the coil L is connected to １ The other end of the capacitor C ３ is connected to one end of the capacitor C３ The other end is connected to the negative terminal of the secondary winding 12 of the pattern transformer 10 .

[0025] In this way, the coil L is connected to one end of the secondary side of the pattern transformer 10. １ One end of the coil L １ The other end of the first capacitor (capacitor C ３ ) is connected to one end of the first capacitor (capacitor C ３ The other end of the second capacitor (capacitor C) is connected to the other end of the secondary side of the pattern transformer 10. One end of the primary side of the pattern transformer 10 is connected to a second capacitor (capacitor C １ ) is connected to the other end of the primary side of the pattern transformer 10, and a third capacitor (capacitor C ２ ) is connected.

[0026] Here, coil L １ and the first capacitor (capacitor C ３ ) is designed to form a resonant circuit that resonates the AC signal output from the secondary side of the pattern transformer 10. １ Inductance and capacitor C ３ The capacitance of is parameter-designed to form a resonant circuit whose resonant frequency is close to the frequency of the AC signal output from the secondary side of pattern transformer 10. The resonance of such a resonant circuit can compensate for the voltage drop on the secondary side due to loss in pattern transformer 10.

[0027] The second capacitor (capacitor C １ ) and a third capacitor (capacitor C ２ ) is configured to resonate in combination with the inductance of the primary winding of the pattern transformer 10. That is, the pattern transformer 10 is configured so that RLC resonance occurs on both the primary and secondary sides.

[0028] The second capacitor (capacitor C １ ) and a third capacitor (capacitor C ２ ) is the coil L １ and the first capacitor (capacitor C ３The parameters are designed to have a capacitance that acts to increase the half-width of the resonant circuit formed by the element. In this case, since the half-width of the resonant circuit is increased, even if there is a slight difference between the resonant frequency of the resonant circuit and the frequency of the AC signal due to the element parameters, it is possible to suppress a reduction in the resonance effect.

[0029] Capacitor C ３ One end of the diode D １ The anode terminal of the diode D １ The cathode terminal of the capacitor C ４ is connected to one end of the capacitor C ４ The other end of the capacitor C ３ These constitute a first rectifier circuit that rectifies a half-wave component of the AC voltage that is the secondary side voltage of the pattern transformer 10.

[0030] Capacitor C ３ The other end of the capacitor C ５ is connected to one end of the capacitor C ５ The other end of the diode D ２ The anode terminal of the diode D ２ The cathode terminal of the diode D １ These constitute a second rectifier circuit that rectifies a half-wave component of the AC voltage that is the secondary side voltage of the pattern transformer 10.

[0031] Capacitor C ４ The other end of the capacitor C ５ One end of the capacitor C is connected to the negative terminal of the secondary winding 12 of the pattern transformer 10. ４ and capacitor C ５ The charging voltage is a DC voltage that has been full-wave rectified by the first rectifier circuit and the second rectifier circuit.

[0032] Capacitor C ４ At one end of ３ One end of the resistor R ３ The other end of the capacitor C ５ The other end of the resistor R ３ is the capacitor C ４ and capacitor C ５The parameters are designed to have a resistance value suitable for discharging the charging voltage.

[0033] Resistance R ３ One end of the resistor R ４ One end of the resistor R ６ is connected to one end of the resistor R ４ The other end of the resistor R is connected to the gate (G) terminal of the FET 40. ６ The other end of the resistor R is connected to the gate (G) terminal of the FET 50. ３ The other end of the resistor R ５ is connected to one end of the resistor R ５ The other end of the transistor is connected to the source (S) terminal of the FET 40 and the source (S) terminal of the FET 50 .

[0034] The drain (D) terminal of the FET 40 is connected to the positive output terminal of the signal transmission circuit 100. The drain (D) terminal of the FET 50 is connected to the negative output terminal of the signal transmission circuit 100. The FETs 40 and 50 perform switching operations because the voltage between their respective gate (G) and source (S) terminals changes in accordance with the secondary voltage of the pattern transformer 10.

[0035] In this way, one or more semiconductor switching elements (e.g., FETs 40, 50) provided on the secondary side of pattern transformer 10 are configured to be turned on and off by the secondary side voltage of pattern transformer 10 and output contact output signals. In the above configuration, FETs 40, 50, whose source (S) terminals are connected to each other, are advantageous in that they can output non-polar contact output signals. In other words, such signal transmission circuit 100, as an I / O module, outputs contact output signals without any restrictions on the positive and negative sides, so that solenoid valves that operate on AC voltage can also be turned on and off.

[0036] The signal transmission circuit 100 may include a plurality of the above-described components excluding the control unit 5. In this case, the control unit 5 can output pulse signals for operating the plurality of pattern transformers to the respective buffers. Here, the control unit 5 controls the component amount of each pulse signal for operating the plurality of pattern transformers depending on whether each pattern transformer is operating. Examples of the component amount of a pulse signal include the period, frequency, amplitude, phase, pulse width, and duty ratio.

[0037] The control unit 5 may be capable of bidirectional communication with an external storage unit (not shown) that stores a table in which combinations of whether or not the pattern transformers provided in each of the multiple signal transmission circuits are operated correspond to the component amounts of the pulse signals corresponding to each of the multiple pattern transformers to be operated. The control unit 5 may, for example, transmit information including the number of pattern transformers to be operated and the channels of the pattern transformers to be operated to the storage unit, and compare this information with the table stored in the storage unit to determine the component amounts of the pulse signals of the pattern transformers to be operated, and control the component amounts of the pulse signals to generate pulse signals corresponding to each of the pattern transformers to be operated.

[0038] The storage unit is not limited to one provided outside the signal transmission circuit, but may be a storage element (memory chip) provided in the signal transmission circuit. The storage element is, for example, a non-volatile memory such as a ROM or a flash memory.

[0039] The control unit 5 may include a calculation unit (not shown) that performs calculation processing. The calculation unit calculates the component amounts of the pulse signal corresponding to each of the plurality of pattern transformers to be operated, depending on the combination of whether the pattern transformers included in each of the plurality of signal transmission circuits are operating. Then, the control unit 5 may control the component amounts of the pulse signal so as to generate a pulse signal corresponding to each of the pattern transformers to be operated, based on the calculation results calculated by the calculation unit.

[0040] The above-described configuration is merely an example, and may be modified as appropriate as long as the control unit can control the component amounts of the pulse signals corresponding to the plurality of pattern transformers to be operated in accordance with the combination of the pattern transformers to be operated. The control unit 5 may use these configurations to control the pulse signals of the pattern transformers, which will be described later.

[0041] FIG. 2 is a schematic diagram showing the configuration of a pattern transformer according to an embodiment of the present disclosure. As shown in FIG. 2, the pattern transformer 10 is provided on a multilayer substrate 20 including multiple layers. The multiple layers of the multilayer substrate 20 include a first pattern layer 21, a second pattern layer 22, a third pattern layer 23, and a fourth pattern layer 24. Printed pattern wiring is formed on these layers. The second pattern layer 22 is formed on one surface of the first pattern layer 21. The third pattern layer 23 is formed on one surface of the second pattern layer 22. The fourth pattern layer 24 is formed on one surface of the third pattern layer 23.

[0042] 2, the one surface side is the lower side in the vertical direction (layer direction) in the figure, and the other surface side is the upper side in the vertical direction. One surface side of the first pattern layer 21 and the other surface side of the second pattern layer 22 face each other. One surface side of the second pattern layer 22 and the other surface side of the third pattern layer 23 face each other. One surface side of the third pattern layer 23 and the other surface side of the fourth pattern layer 24 face each other. In this way, multiple layers are arranged in the layer direction.

[0043] The multiple layers of the multilayer substrate 20 include a first insulating layer 27 (core layer) provided between the first pattern layer 21 and the second pattern layer 22, a second insulating layer 28 (prepreg layer) provided between the second pattern layer 22 and the third pattern layer 23, and a third insulating layer 29 (core layer) provided between the third pattern layer 23 and the fourth pattern layer 24. These layers are insulating layers having insulating properties.

[0044] The first insulating layer 27 and the third insulating layer 29 are each provided with a connection portion 60 that connects adjacent printed pattern wirings in the layer direction. The connection portion 60 includes a first connection portion 60 (60A, 60C) provided in the first planar region and a second connection portion 60 (60B, 60D) provided in the second planar region. On the other hand, the second insulating layer 28 (prepreg layer) is not provided with a connection portion 60.

[0045] The connection portion 60 is formed, for example, by injecting a conductive material into each through-hole provided to penetrate the first insulating layer 27 and the third insulating layer 29. The connection portion 60 may be a conductor provided to penetrate the first insulating layer 27 and the third insulating layer 29.

[0046] The first pattern layer 21, the second pattern layer 22, the third pattern layer 23, and the fourth pattern layer 24 are designed to have a thickness of, for example, 0.018 mm. The prepreg layers are preferably thicker than the core layers. For example, the first insulating layer 27 and the third insulating layer 29 may have a thickness of 0.1 mm, while the second insulating layer 28 may have a thickness of 0.3 mm. In this case, the printed pattern wirings can be easily connected to each other by the connecting portion 60 while ensuring the insulation between the primary winding 11 and the secondary winding 12.

[0047] 2, the multilayer substrate 20 may further include a fifth pattern layer 25, a sixth pattern layer 26, a fourth insulating layer (prepreg layer), and a fifth insulating layer (core layer) in addition to the four pattern layers and three insulating layers described above. For example, the thickness of the fourth insulating layer (prepreg layer) is 0.6 mm, and the thickness of the fifth insulating layer (core layer) is 0.1 mm.

[0048] 2, the pattern transformer 10 has a primary winding 11 including a winding-shaped printed pattern wiring provided in each of a first planar area and a second planar area of ​​a multilayer substrate 20, and a secondary winding 12 provided at a layer direction position different from that of the primary winding 11 and including a winding-shaped printed pattern wiring provided in each of the first planar area and the second planar area of ​​the multilayer substrate 20. The primary winding 11 and the secondary winding 12 are configured to be electromagnetically coupled.

[0049] The first planar area and the second planar area are areas that each include the connection portion 60. The first planar area and the second planar area are different planar areas, and preferably do not overlap each other. "Provided in the first planar area" means that the first planar area is provided so as to overlap at least a portion with the first planar area. The same applies to "Provided in the second planar area." In other words, the winding-shaped printed pattern wiring of the primary winding 11 and the printed pattern wiring of the secondary winding 12 may be misaligned in plan view, as long as they partially overlap.

[0050] 2, the printed pattern wiring of the primary winding 11 is formed on a first pattern layer 21 and a second pattern layer 22. The printed pattern wiring of the primary winding 11 includes a first winding portion 11A, a second winding portion 11B, a third winding portion 11C, and a fourth winding portion 11D.

[0051] The first winding portion 11A is wound inward in a clockwise direction around a first connecting portion 60 (60A) provided on the first insulating layer 27, starting from the positive electrode end, in the first planar region of the first pattern layer 21, and extends to be connected to the first connecting portion 60 (60A). The second winding portion 11B is connected to the first winding portion 11A via the first connecting portion 60 (60A) in the first planar region of the second pattern layer 22, and is wound outward in a clockwise direction around the first connecting portion 60 (60A) in the second pattern layer 22, starting from the first connecting portion 60 (60A).

[0052] The third winding portion 11C is connected to the negative electrode end of the second winding portion 11B in the second planar region of the second pattern layer 22, and is wound counterclockwise inward from the negative electrode end of the second winding portion 11B around the second connection portion 60 (60B) and extends to be connected to the second connection portion 60 (60B). The fourth winding portion 11D is connected to the third winding portion 11C via the second connection portion 60 (60B) in the second planar region of the first pattern layer 21, and is wound counterclockwise outward from the second connection portion 60 (60B) in the first pattern layer 21 and is connected to the negative electrode end.

[0053] 2, the printed pattern wiring of the secondary winding 12 is formed on the fourth pattern layer 24 and the third pattern layer 23. The printed pattern wiring of the secondary winding 12 includes a fifth winding portion 12A, a sixth winding portion 12B, a seventh winding portion 12C, and an eighth winding portion 12D.

[0054] The fifth winding portion 12A is wound inward in a clockwise direction around the second connecting portion 60 (60D) provided on the third insulating layer 29, starting from the end on the positive electrode side, in the second planar region of the fourth pattern layer 24, and extends to be connected to the second connecting portion 60 (60D). The sixth winding portion 12B is connected to the fifth winding portion 12A via the second connecting portion 60 (60D) in the second planar region of the third pattern layer 23, and is wound outward in a clockwise direction around the second connecting portion 60 (60D) in the third pattern layer 23, starting from the second connecting portion 60 (60D).

[0055] The seventh winding portion 12C is connected to the negative electrode end of the sixth winding portion 12B in the first planar region of the third pattern layer 23, and is wound counterclockwise inward from the negative electrode end of the sixth winding portion 12B around the first connecting portion 60 (60C) and extends to be connected to the first connecting portion 60 (60C). The eighth winding portion 12D is connected to the seventh winding portion 12C via the first connecting portion 60 (60C) in the first planar region of the fourth pattern layer 24, and is wound counterclockwise outward from the first connecting portion 60 (60C) in the fourth pattern layer 24 and is connected to the negative electrode end.

[0056] A plurality of the pattern transformers 10 may be formed on the multilayer substrate 20. The operations of the plurality of pattern transformers 10 are all controlled by the control unit.

[0057] Fig. 3 is a plan view of a multilayer substrate on which multiple pattern transformers are formed according to an embodiment of the present disclosure. As shown in Fig. 3, 16 pattern transformers 10 are formed on a multilayer substrate 20. The multiple pattern transformers 10 are formed in parallel in the left-right direction of the page, from a 1-ch pattern transformer 10a at the left end of Fig. 3 to a 16-ch pattern transformer 10p at the right end of Fig. 3. In the plan view of Fig. 3, the upper side of the page corresponds to the first planar region in Fig. 2, and the lower side of the page corresponds to the second planar region.

[0058] The pattern transformers 10 formed on the multilayer substrate 20 are formed such that the pattern transformers for odd-numbered channels and the pattern transformers for even-numbered channels are offset from each other in the vertical direction of the drawing. More specifically, the pattern transformers are formed so that the spiral portion on the first planar region side of the pattern transformer for odd-numbered channels and the spiral portion on the second planar region side of the pattern transformer for even-numbered channels are parallel to each other in the horizontal direction of the drawing.

[0059] In this way, the spiral portion on the first planar area side of the pattern transformer for odd-numbered Ch and the spiral portion on the second planar area side of the pattern transformer for odd-numbered Ch are arranged adjacent to each other, so when pattern transformers located close to each other are operated, the leakage magnetic flux generated in each spiral portion depending on the operating state of each pattern transformer interferes with each other.

[0060] 4 is a diagram illustrating the phase polarity of the pulse signal of the pattern transformer of each channel when all the pattern transformers 10 of 16 channels are operated. When all the pattern transformers 10 of 16 channels are operated, the pulse signal of each of the pattern transformers 10 is set to either a positive phase or a negative phase by the control unit.

[0061] For example, for the pulse signals of the odd-numbered channel pattern transformers, the control unit first sets the phase polarity of the pulse signal of the channel pattern transformer 10a for Channel 1 to positive phase. Next, the control unit sets the phase polarity of the pulse signal of the channel pattern transformer 10c for Channel 3 to negative phase, which is the opposite phase polarity to the phase polarity of the pulse signal of the channel pattern transformer 10a for Channel 1. Then, the control unit sets the phase polarity of the pulse signal of the channel pattern transformer 10e for Channel 5 to positive phase, which is the opposite phase polarity to the phase polarity of the pulse signal of the channel pattern transformer 10c for Channel 3. In this way, the control unit alternately sets the phase polarity of each pulse signal of the odd-numbered channel pattern transformers between positive phase and negative phase.

[0062] Furthermore, the phase polarity of each pulse signal of the odd-numbered channels of the pattern transformer 10g of Channel 7 to the pattern transformer 10o of Channel 15 is set alternately to positive and negative phase by the control unit.

[0063] For the pulse signals of the pattern transformers for the even-numbered channels, the phase polarity of the pulse signal of pattern transformer 10b for Ch2 is set to positive by the control unit, just as with the pulse signals of pattern transformers for the odd-numbered channels. Next, the phase polarity of the pulse signal of pattern transformer 10d for Ch4 is set to negative, which is the opposite phase polarity to the phase polarity of the pulse signal of pattern transformer 10b for Ch2, by the control unit. Then, the phase polarity of the pulse signal of pattern transformer 10f for Ch6 is set to positive, which is the opposite phase polarity to the phase polarity of the pulse signal of pattern transformer 10d for Ch4, by the control unit. In this way, the phase polarity of each pulse signal of the pattern transformers for the even-numbered channels is set alternately between positive and negative phase.

[0064] Furthermore, the phase polarity of each pulse signal of the even-numbered channels of the pattern transformer 10h for 8Ch to the pattern transformer 10p for 16Ch is set alternately to positive and negative phase by the control unit.

[0065] Fig. 5 is a waveform diagram of pulse signals of some pattern transformers corresponding to Fig. 4. Fig. 6 is a schematic diagram showing magnetic fluxes generated by some pattern transformers corresponding to Fig. 4. Figs. 5 and 6 explain, as an example, pattern transformers and pulse signals of 1Ch to 5Ch. As in Fig. 2, in Fig. 6, the lower side of the paper is the first planar area side, and the upper side of the paper is the second planar area side.

[0066] First, as shown in Figure 5, when the pattern transformers for all channels are operated, the pulse signals of the pattern transformers for Channel 1, Channel 2, and Channel 5 are set by the control unit to have the same phase polarity. The pulse signals of the pattern transformers for Channel 3 and Channel 4 are set by the control unit to have the same phase polarity. The pulse signals of the pattern transformers for Channel 1 and Channel 3 are then set to have mutually inverted phase polarities.

[0067] In this way, when all 16 channel pattern transformers are operated, where n is an arbitrary number, the pulse signal of the (2n-1) channel pattern transformer and the pulse signal of the 2n channel pattern transformer have the same phase polarity. The pulse signal of the n channel pattern transformer and the pulse signal of the (n+2) channel pattern transformer are set to have mutually inverted phase polarities.

[0068] When each pattern transformer is operated based on each pulse signal, magnetic flux is generated in the pattern transformer, creating magnetic flux lines as shown in Fig. 6. Here, each pattern transformer is formed so that the spiral portion on the first planar region side of the pattern transformer for odd-numbered channels and the spiral portion on the second planar region side of the pattern transformer for even-numbered channels are parallel to each other in the left-right direction of the page (the dashed lines in Fig. 6).

[0069] At this time, the magnetic flux (magnetic flux lines) generated in the spiral portion on the second planar area side of pattern transformer 10a for Ch 1 and the magnetic flux (magnetic flux lines) generated in the spiral portion on the first planar area side of pattern transformer 10b for Ch 2 are in opposite directions. Similarly, the magnetic flux generated in the pattern transformer for Ch (2n-1) and the magnetic flux generated in the pattern transformer for Ch 2n are also in opposite directions.

[0070] In this way, the magnetic fluxes generated in adjacent pattern transformers are in opposite directions and act to cancel each other out, thereby suppressing radio wave radiation caused by leakage magnetic flux generated from the pattern transformers.

[0071] (Embodiment 2) In the first embodiment, the control of each pulse signal when all pattern transformers are operated was described. In the present embodiment, however, the control of each pulse signal when multiple pattern transformers (signal transmission circuits) to be operated are selectively set will be described. Fig. 7 is a diagram illustrating the operation or non-operation of multiple pattern transformers and the phase polarity of the pulse signal of the pattern transformer of each Ch. Fig. 8 is a waveform diagram of pulse signals of some pattern transformers corresponding to Fig. 7. Fig. 9 is a schematic diagram showing magnetic flux generated by each pattern transformer corresponding to Fig. 7. Figs. 8 and 9 illustrate, as examples, pattern transformers and pulse signals for Ch 1 to Ch 5. As in Fig. 2, in Fig. 9, the lower side of the paper is the first planar region side, and the upper side of the paper is the second planar region side.

[0072] 7 shows whether multiple pattern transformers are operating and the phase polarity of the pulse signal of the pattern transformer for each channel. For example, the control unit turns off the pattern transformers for channels 2, 8, and 11, and operates the other pattern transformers.

[0073] In this case, the phase polarity of each pulse signal of the odd-numbered channel pattern transformers is alternately set to positive and negative phase by the control unit, except for the pulse signal of the inactive channel pattern transformer 11. Similarly, the phase polarity of each pulse signal of the even-numbered channel pattern transformers is alternately set to positive and negative phase by the control unit, except for the pulse signals of the inactive channel pattern transformers 2 and 8.

[0074] In this way, when there are pattern transformers that are not to be operated, the control unit excludes the pulse signals of the pattern transformers that are not to be operated from the control targets for both odd-numbered and even-numbered channels, and controls each pulse signal of the pattern transformers that are to be operated so that the phase polarity of the pulse signals is alternately positive and negative. In other words, the control unit controls the phase polarity of the pulse signals of the pattern transformers of each channel according to the combination of pattern transformers that are to be operated.

[0075] Fig. 8 is a waveform diagram of pulse signals of some of the pattern transformers corresponding to Fig. 7. The pulse signals of each of the pattern transformers for Ch 1 to Ch 5 are controlled by the control unit as shown in Fig. 7. The control unit operates the pattern transformer for Ch 1 with a positive phase pulse signal. It does not operate the pattern transformer for Ch 2, and operates the pattern transformer for Ch 3 with a negative phase pulse signal. It also operates the pattern transformers for Ch 4 and Ch 5 with positive phase pulse signals.

[0076] This embodiment differs from the first embodiment in that the phase polarity of the pulse signal of the pattern transformer of Ch4 is controlled to be in positive phase by the control unit in response to the fact that the pattern transformer of Ch2 is not operated.

[0077] 9 is a schematic diagram showing the magnetic flux generated by each pattern transformer corresponding to FIG. 7 . When the transformer patterns of all channels are operated, the magnetic flux generated in the pattern transformer 10a of Channel 1 cancels out with the magnetic flux generated in the pattern transformer 10b of Channel 2. In this embodiment, the pattern transformer 10b of Channel 2 is not operated, so the magnetic flux generated in the pattern transformer 10a of Channel 1 cancels out with the magnetic flux generated in the pattern transformer 10c of Channel 3, which is the pattern transformer that is operated and is located closest to the pattern transformer 10a of Channel 1. The phase polarity of the pulse signal of the pattern transformer 10a of Channel 1 is positive, and the phase polarity of the pulse signal of the pattern transformer 10c of Channel 3 is negative, so the magnetic flux generated in the pattern transformer 10a of Channel 1 and the pattern transformer 10c of Channel 3 are opposite in direction.

[0078] In this way, when there are pattern transformers that are not to be operated, the control unit controls the phase polarity of each pulse signal so that the phase polarity of the pulse signal of a predetermined pattern transformer to be operated differs from the phase polarity of the pulse signal of the pattern transformer that is located closest to the pattern transformer to be operated among the pattern transformers to be operated.

[0079] In this embodiment, the phase polarity of the pulse signal of pattern transformer 10d for Ch4 is positive, which is the same as the phase polarity of the pulse signal of pattern transformer 10e for Ch5. That is, the magnetic flux generated in the spiral portion on the second planar area side of pattern transformer 10d for Ch4 and the magnetic flux generated in the spiral portion on the first planar area side of pattern transformer 10e for Ch5 are opposite in direction to each other. As a result, the magnetic flux generated in pattern transformer 10d for Ch4 cancels out the magnetic flux generated by pattern transformer 10e for Ch5.

[0080] In this way, the control unit controls the pulse signals of each pattern transformer so that the magnetic flux generated in each pattern transformer cancels out the magnetic flux generated in the pattern transformer located nearby. This allows the magnetic fluxes of pattern transformers located nearby to cancel out each other, more effectively reducing noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers.

[0081] (Embodiment 3) In this embodiment, the control of each pulse signal when multiple pattern transformers to be operated are selectively set has been described. In this embodiment, however, the control of operating a dummy transformer pattern when multiple pattern transformers (signal transmission circuits) to be operated are odd numbered will be described. A dummy pattern transformer (hereinafter referred to as a "D pattern transformer") is a pattern transformer that is not used in the operation of the signal transmission circuit, but is operated to reduce noise radiated to the outside due to leakage flux generated from the pattern transformer when other pattern transformers are operated. The configuration of the D pattern transformer is similar to that of the other pattern transformers.

[0082] 10A shows a plan view of a multilayer substrate on which a D-pattern transformer is formed. FIG. 10B shows an example of the phase polarity of the pulse signal of the D-pattern transformer corresponding to the phase polarity of the pulse signal of the pattern transformer for each channel. When a D-pattern transformer 10q is formed on a multilayer substrate as shown in FIG. 10A, the D-pattern transformer 10q is formed as the pattern transformer for channel 17, next to the pattern transformer 10p for channel 16. By forming the D-pattern transformer 10q in this position, it can operate to reduce noise radiated to the outside due to leakage magnetic flux generated from a pattern transformer operating near the D-pattern transformer 10q, just like the other pattern transformers.

[0083] For example, if the phase polarity of the pulse signal of each pattern transformer of Ch 1 to 16 is as shown in Figure 10(b), and the number of pattern transformers to be operated among the pattern transformers of Ch 1 to 16 is odd, the phase polarity of the pulse signal of the pattern transformer of each Ch is set by the control unit so that the pattern transformers formed close to each other reduce noise radiated to the outside due to leakage flux generated from the pattern transformers.

[0084] However, because the number of pattern transformers to be operated is odd, when pattern transformers formed nearby are paired, there is no pattern transformer that can be paired with 16Ch pattern transformer 10p, and it is not possible to reduce the noise radiated to the outside due to leakage magnetic flux generated from 16Ch pattern transformer 10p.

[0085] Therefore, in such a case, the control unit sets the phase polarity of the pulse signal of D pattern transformer 10q based on the phase polarity of the pulse signals of each pattern transformer of the other channels to cancel out the leakage magnetic flux generated from pattern transformer 10p of Ch16, and operates D pattern transformer 10q. In this embodiment, the phase polarity of the pulse signal of D pattern transformer 10q is set to the opposite phase. D pattern transformer 10q is operated to cancel out the leakage magnetic flux generated from the pattern transformer closest to D pattern transformer 10q, and the phase polarity of the pulse signal of D pattern transformer 10q may be set to correspond to a pattern transformer other than pattern transformer 10p of Ch16.

[0086] In this way, by the control unit setting the pulse signal of D-pattern transformer 10q to the opposite phase and operating D-pattern transformer 10q, the magnetic flux leaking from 16Ch pattern transformer 10p can be canceled out by the leakage magnetic flux generated by D-pattern transformer 10q. As a result, even when an odd number of pattern transformers are operated, operating D-pattern transformer 10q can reduce noise radiated to the outside due to the leakage magnetic flux generated from the pattern transformers.

[0087] (Embodiment 4) In embodiments 1 to 3, the control for reducing noise radiated from pattern transformers by controlling the phase polarity of the pulse signal of each pattern transformer was described. In this embodiment, however, the control for reducing noise radiated from pattern transformers by shifting the phase of the pulse signal of the pattern transformer to be operated will be described.

[0088] Fig. 11 is a plan view of a multilayer substrate on which a plurality of pattern transformers are formed. Fig. 12 is a diagram illustrating a case where a phase difference is provided in the pulse signals of each pattern transformer. As shown in Fig. 11, the pattern transformer of this embodiment has 8 channels, and each pattern transformer and its winding portion are formed so that they are positioned equally in the vertical direction of the page and parallel to each other in the horizontal direction of the page. As shown in Fig. 12, the control unit controls the phase of each pulse signal to provide a phase difference so that the rising timing of the pulse signal of the pattern transformer of each channel does not overlap with the pulse signals of the pattern transformers of other channels.

[0089] When determining the phase difference between each pulse signal, the control unit determines the phase difference between each pulse signal based on the number of pattern transformers to be operated. For example, when eight pattern transformers for 1Ch to 8Ch are operated, the pulse signals of the pattern transformers for 1Ch to 8Ch are controlled so that a phase difference is set between the pulse signals of the pattern transformers for 2Ch to 8Ch, with the pulse signal of the pattern transformer for 1Ch (first pattern transformer) as the reference.

[0090] The phase difference provided to each pulse signal is determined based on the channel, for example, and when an 8-channel pattern transformer is operated, the phase is delayed by 2π*1 / 8 [rad]. Here, the number of channels is not limited to 8 channels, and may be more than 8 channels. If the number of pattern transformers to be operated is n, the phase difference may be 2π*1 / n [rad].

[0091] For example, the control unit controls the pulse signal of the pattern transformer 10a' of Ch2 so that the rising timing of the pulse signal of the pattern transformer 10b' of Ch2 is delayed by 2π*1 / 8 [rad] relative to the rising timing of the pulse signal of the pattern transformer 10a' of Ch1.

[0092] Next, the control unit controls the pulse signal of the pattern transformer 10c' of Ch3 so that the rising timing of the pulse signal of the pattern transformer 10c' of Ch3 is delayed by 2π*1 / 8 [rad] relative to the rising timing of the pulse signal of the pattern transformer 10b' of Ch2.

[0093] In this way, the control unit controls the pulse signals of the pattern transformers on Ch 4 and onwards to be delayed by 2π*1 / 8 [rad] relative to the pulse signal of the pattern transformer on the previous Ch. As a result, the rising timing of each pulse signal of the pattern transformers on Ch 1 to Ch 8 will no longer be the same.

[0094] In this way, by the control unit providing a phase difference between the pulse signals of each pattern transformer, the rising timing of the pulse signals of each pattern transformer 10a' to 10h' does not overlap, and it is possible to suppress the rising edge of the pulse signal from increasing. This suppresses the rising edge of each pulse signal from increasing, and it is possible to reduce noise radiated to the outside due to leakage magnetic flux generated from the pattern transformer. The method of this embodiment is merely an example, and the method of calculating and controlling the phase difference of each pulse signal may be changed as appropriate.

[0095] This embodiment provides the following advantages. In the control system 1 that controls the signal transmission circuit 100 of this embodiment, the control unit 5, which controls the pulse signals of the multiple pattern transformers 10 (10a to 10p), controls the pulse signals of the pattern transformers 10 to be operated based on the combination of the pattern transformers 10a to 10p to be operated or at least one of the pulse signals of the first pattern transformer 10a', which is one of the pattern transformers to be operated. When multiple pattern transformers 10 are operated, leakage magnetic flux generated from the pattern transformers 10 may cause noise to be radiated to the outside. In such a case, the control unit 5 controls the pulse signals of the pattern transformers to be operated based on the combination of the pattern transformers 10a to 10p to be operated or at least one of the pulse signals of the first pattern transformer 10a', which is one of the pattern transformers to be operated. This makes it possible to reduce noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers, even when the pattern transformers are operated.

[0096] The control unit 5 may control the phase polarity of the pulse signals of the pattern transformers 10a to 10p to be operated based on the relative positions of the pattern transformers 10a to 10p to be operated. For example, the control unit 5 knows the pattern of each of the pattern transformers 10a to 10p, and in order to reduce leakage magnetic flux generated from a certain pattern transformer, the control unit 5 controls the phase polarity of the pulse signals of other pattern transformers located near the same pattern transformer, thereby generating leakage magnetic flux in opposite directions in the pattern transformers, thereby canceling out the leakage magnetic flux generated from the pattern transformers.

[0097] Multilayer substrate 20 may also be formed with D-pattern transformer 10q, which is not used in the operation of the signal transmission circuit but is operated to reduce leakage magnetic flux generated from the pattern transformers when other pattern transformers 10a to 10p are operated. In this case, when control unit 5 operates an odd number of pattern transformers 10a to 10p, by operating D-pattern transformer 10q, leakage magnetic flux between pattern transformers 10a to 10p and one of the pattern transformers can be canceled out, thereby more reliably reducing noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers.

[0098] The control unit 5 may control each pulse signal so as to change the phase of the pulse signals of the pattern transformers 10b' to 10h' other than the first pattern transformer 10a' by a predetermined amount relative to the pulse signal of the first pattern transformer 10a'. In this case, the control unit 5 provides a phase difference between the pulse signals of the pattern transformers 10a' to 10h', thereby preventing the rising timing of the pulse signals of the pattern transformers 10a' to 10h' from overlapping, and preventing the rising edges of the pulse signals from increasing. This prevents the rising edges of the pulse signals from increasing, and reduces noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers.

[0099] Although the present disclosure has been described above using embodiments, the technical scope of the present disclosure is not limited to the scope described in the above embodiments. Various modifications or improvements can be made to the above embodiments without departing from the gist of the present disclosure, and forms incorporating such modifications or improvements are also included in the technical scope of the present disclosure. The above embodiments may also be combined as appropriate.

[0100] (Additional Notes) The control system for the signal transmission circuit, the I / O module including the same, the control method for the control system, and the control program for the control system described in the above-described embodiments may be understood, for example, as follows: A control system (1) for a signal transmission circuit (100) according to a first aspect of the present disclosure is a control system that includes a multilayer substrate (20) including multiple layers and multiple pattern transformers (10) provided on the multilayer substrate, and controls the signal transmission circuit for transmitting isolated signals, and includes a control unit (5) that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or on at least one pulse signal of a first pattern transformer (10a') that is one of the pattern transformers to be operated.

[0101] According to the control system for a signal transmission circuit disclosed herein, a control unit that controls the pulse signals of multiple pattern transformers controls the pulse signals of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one of the pulse signals of a first pattern transformer that is one of the pattern transformers to be operated. For example, when multiple pattern transformers are operated, leakage magnetic flux generated from the pattern transformers becomes noise radiated to the outside. Therefore, when the pattern transformers are operated with pulse signals of the same phase, the noise radiated to the outside from the pattern transformers increases. Therefore, the control unit controls the pulse signals of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one of the pulse signals of a first pattern transformer that is one of the pattern transformers to be operated. This makes it possible to reduce noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers, even when the pattern transformers are operated.

[0102] In the control system for a signal transmission circuit according to the second aspect of the present disclosure, in the first aspect, when operating multiple pattern transformers, the control unit controls the phase polarity of the pulse signal of the pattern transformers to be operated based on the positional relationship of the pattern transformers to be operated.

[0103] In the control system for a signal transmission circuit according to the present disclosure, when multiple pattern transformers are operated, the control unit controls the phase polarity of the pulse signals of the pattern transformers to be operated. This makes it possible to control the phase polarity of each pulse signal so that leakage magnetic flux generated by pattern transformers located close to each other cancels out each other, thereby more effectively reducing noise radiated to the outside due to leakage magnetic flux generated by the pattern transformers.

[0104] In the control system for a signal transmission circuit according to a third aspect of the present disclosure, in the first or second aspect, the multilayer substrate is provided with a dummy pattern transformer for reducing noise emitted when the plurality of pattern transformers are in operation, and the control unit operates the dummy pattern transformer when the number of pattern transformers to be operated is odd, and controls the phase polarity of the pulse signal of the dummy pattern transformer according to the combination of the pattern transformers to be operated.

[0105] According to the signal transmission circuit control system disclosed herein, the multilayer substrate is provided with dummy pattern transformers for reducing noise emitted when multiple pattern transformers are in operation, and the control unit operates the dummy pattern transformers when an odd number of pattern transformers are in operation and controls the phase polarity of the pulse signal of the dummy pattern transformers according to the combination of the pattern transformers to be operated. This makes it possible to create a pair of pattern transformers with opposite phases by operating the dummy transformer patterns, even when an odd number of pattern transformers are in operation. Therefore, the pattern transformers can always cancel out leakage magnetic flux generated from one of the pattern transformers, thereby more reliably reducing noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers.

[0106] In the control system for a signal transmission circuit according to a fourth aspect of the present disclosure, in the first aspect, when operating a plurality of the pattern transformers, the control unit controls each pulse signal so as to change the phase of the pulse signal of the pattern transformers other than the first pattern transformer by a predetermined amount relative to the pulse signal of the first pattern transformer.

[0107] In the control system for a signal transmission circuit according to the present disclosure, when operating multiple pattern transformers, the control unit changes the phase of the pulse signal of each pattern transformer by a predetermined amount relative to the pulse signal of a first pattern transformer, for example, by providing a phase difference in the timing of the rising edges of the pulse signals of the other pattern transformers, thereby suppressing an increase in the rising edges of the pulse signals of the other pattern transformers. This makes it possible to reduce noise radiated to the outside due to leakage magnetic flux generated from the pattern transformers when each pulse signal rises.

[0108] An I / O module according to a fifth aspect of the present disclosure includes the control system for the signal transmission circuit according to any one of the first to fourth aspects.

[0109] A control method for a signal transmission circuit according to a sixth aspect of the present disclosure is a control method for controlling a signal transmission circuit for transmitting an isolated signal, the signal transmission circuit comprising a multilayer substrate including a plurality of layers and a plurality of pattern transformers provided on the multilayer substrate, and is executed by a computer that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one pulse signal of a first pattern transformer that is one of the pattern transformers to be operated.

[0110] A control program for a signal transmission circuit according to a seventh aspect of the present disclosure causes a computer to execute the control method for a signal transmission circuit according to the sixth aspect.

[0111] 1 Control system 5 Control unit 10 (10a to 10p, 10a' to 10h') Pattern transformer 10q D pattern transformer (dummy pattern transformer) 11 Primary side winding 11A to 11D First winding section to fourth winding section 12 Secondary side winding 12A to 12D Fifth winding section to eighth winding section 20 Multilayer substrate 21 to 26 First pattern layer to sixth pattern layer 27 to 29 First insulating layer to third insulating layer 30 Buffer 40, 50 FET 60 (60A to 60D) Connection section (first connection section, second connection section) 100 Signal transmission circuit

Claims

1. A control system for controlling a signal transmission circuit for transmitting isolated signals, comprising a multilayer substrate including multiple layers and multiple pattern transformers provided on the multilayer substrate, the control system for the signal transmission circuit comprising a control unit that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one pulse signal of a first pattern transformer that is one of the pattern transformers to be operated.

2. A control system for a signal transmission circuit as described in claim 1, wherein the control unit controls the phase polarity of the pulse signal of the pattern transformer to be operated based on the positional relationship of the pattern transformer to be operated when operating multiple pattern transformers.

3. A signal transmission circuit control system as described in claim 1 or 2, wherein the multilayer substrate is provided with dummy pattern transformers for reducing noise emitted when the plurality of pattern transformers are in operation, and the control unit operates the dummy pattern transformers when the number of pattern transformers to be operated is odd, and controls the phase polarity of the pulse signal of the dummy pattern transformers according to the combination of the pattern transformers to be operated.

4. A control system for a signal transmission circuit as described in claim 1, wherein when operating a plurality of the pattern transformers, the control unit controls each pulse signal so as to change the phase of the pulse signal of the pattern transformers other than the first pattern transformer by a predetermined amount relative to the pulse signal of the first pattern transformer.

5. An I / O module comprising the control system for the signal transmission circuit according to claim 1.

6. A control method for a signal transmission circuit for transmitting isolated signals, comprising a multilayer substrate including multiple layers and multiple pattern transformers provided on the multilayer substrate, wherein the control method is executed by a computer that controls each pulse signal of the pattern transformers to be operated based on a combination of the pattern transformers to be operated or at least one pulse signal of a first pattern transformer that is one of the pattern transformers to be operated.

7. A control program for a signal transmission circuit that causes a computer to execute the control method for a signal transmission circuit according to claim 6.

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