Boiling enhancement coating having less thermal expansion mismatch and methods for making same

A ceramic-based BEC with matching thermal expansion and minimal interfaces addresses thermal resistance and mechanical failure, improving cooling efficiency in immersion cooling systems.

WO2025217511A1PCT designated stage Publication Date: 2025-10-16MTS IP HLDG LTD +2
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Patent Information

Application Number
PCT/US2025/024268
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-04-11
Filing Date
2025-04-11
Publication Date
2025-10-16

AI Technical Summary

Technical Problem

Conventional boiling enhancement coatings (BECs) increase thermal resistance and are susceptible to mechanical failure due to thermal expansion mismatch with heat-generating components like processor dies, especially when temperature differences and dimensions are significant.

Method used

The BEC is made of a ceramic-based material with a similar coefficient of thermal expansion to the processor die, directly attached with minimal thermal interfaces, and features a structured surface for nucleation sites to promote boiling, optionally with a thermally conductive layer or vapor chamber.

Benefits of technology

This configuration reduces thermal resistance and mitigates structural damage, enhancing cooling efficiency and reliability in two-phase immersion cooling systems.

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Abstract

A boiling enhancement coating (BEC) is disclosed having less thermal expansion mismatch with an underlying heat-generating component, such as a processor die. The BEC may comprise a ceramic-based material that has a coefficient of thermal expansion closer to the coefficient of thermal expansion of the heat-generating component, such as a glass or glass- like material (e.g., silica, soda lime glass, borosilicate glass, fiberglass composite, or tempered glass), silicon, silicon carbide, and / or the like. This allows the BEC to be either directly attached to the heat-generating component or coupled to the heat-generating component via a layer of thermal interface material. The BEC further includes a structured surface providing nucleation sites to promote boiling of a coolant liquid in a two-phase immersion cooling system. The BEC may be further coated with a thermally conductive layer and / or include a vapor chamber to increase heat spreading and / or cooling performance.
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Description

BOI LI NG ENHANCEMENT COATING HAVING LESS THERMAL EXPANSION MISMATCH AND METHODS FOR MAKING SAMECROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application claims the priority benefit, under 35 U.S.C. 119(e), of U.S. Application No. 63 / 632,874, filed April 11, 2024 and entitled, “CERAMIC-BASED BOILING ENHANCEMENT COATING AND METHODS FOR MAKING SAME,” which is incorporated herein by reference in its entirety.BACKGROUND

[0002] Two-phase immersion cooling is a liquid cooling technique that utilizes a liquid-to-gas phase transition to remove heat from a heat-generating component, such as a processor or, more generally, an electronic device of a computing system. This is typically accomplished using a tank to submerge the heat-generating component in a pool of coolant liquid where the coolant liquid is a dielectric with a relatively low boiling point (e.g., 50°C). During operation, the coolant liquid in direct contact with the heat-generating component vaporizes (i.e., boils), producing coolant vapor that rises upwards within the tank. The coolant vapor thereafter transfers heat to a heat exchanger disposed above the coolant liquid, thus causing the coolant vapor to condense back to a liquid and thereafter fall into the pool of coolant liquid below. A two-phase immersion cooling system may be used to cool high density computing systems, such as an array of servers in a data center.SUMMARY

[0003] The cooling rate of a heat-generating component, such as a processor, in a two-phase immersion cooling system may be increased by providing nucleation sites for bubbles of coolant vapor to form. This is typically accomplished by attaching a boiling enhancement coating (BEC) (also sometimes referred to as a “boiling plate”) to a processor lid (also referred to as a “heat spreader” or an “integrated heat spreader”), which encloses a processor die. However, the addition of a BEC in this manner also increases the thermal resistance between the heat-generating portion of a processor, e.g., the processor die, and the surfaces of the BEC where heat is dissipated to the coolant liquid, thus limiting the cooling rate.

[0004] To address the foregoing limitations, BECs may be directly attached to the heatgenerating component (e.g., the processor die). By directly attaching a BEC to a processor die, the number of thermal interfaces between the processor die and the BEC may be reduced (e.g., down to a single interface), thus reducing the thermal resistance and, hence, increasing thecooling rate. These BECs include, for example, a metallic mesh, a metallic wool, particles, an adhesive, or some combination thereof. Further details of these BECs may be found in U.S. Application No. 18 / 460,091, filed on September 1, 2023 and entitled, “DIRECT TO CHIP APPLICATION OF BOILING ENHANCEMENT COATING,” which is incorporated by reference herein in its entirety.[0005| As a further improvement, a BEC may be formed as a prefabricated structure, such as a substrate with a structured surface that provides nucleation, to provide greater ease of assembly, a lower cost of manufacture, and greater scalability for mass production. Despite the potential benefits of a prefabricated structure, however, a prefabricated structure coupled to a heat-generating component may be more susceptible to adverse thermal effects during operation, such as mechanical failure caused by thermal expansion mismatch.(0006 J For example, a processor die principally made of silicon typically has a coefficient of thermal expansion of about 2.5* 10'6K'1and a BEC made of copper typically has a coefficient of thermal expansion of about 17* 10'6K’1, which is nearly seven times greater than silicon. When the temperature difference across the processor die and the BEC is large (e.g., greater than 50 K) and / or the processor die and the BEC have relatively large dimensions (e.g., a width and / or depth greater than 1 cm), the thermal expansion that would arise between the processor die and the BEC may result in structural damage (e.g., delamination, fracture) and / or pump out of any intervening materials disposed between the processor die and the BEC (e.g., a thermal interface material).[(>007) These adverse thermal effects may be further exacerbated by temperature nonuniformities across the processor die, such as hotspots. Herein, a hotspot may generally be a region of the processor die that has a higher temperature than another region of the processor die. For example, the arithmetic logic unit (ALU) of a central processing unit (CPU) may generate more heat compared to the memory of the CPU, thus creating a hotspot where the ALU is located.

[0008] The present disclosure is thus directed to various inventive implementations of a BEC that, when compared to conventional BECs, exhibits appreciably less thermal expansion mismatch with the heat-generating component, which reduces or, in some instances, eliminates undesirable thermal stresses when the BEC and the heat-generating component are heated to an elevated temperature, e.g., during operation. This may be accomplished, in part, by the BECbeing made of a material having a coefficient of thermal expansion similar to the coefficient of thermal expansion of the heat-generating component.

[0009] In some implementations, the BEC may be made of a ceramic-based material. Herein, a “ceramic-based” material generally includes ceramics and materials with mechanical and / or thermal properties similar to ceramics including, but not limited to, a glass or glass-like material (e.g., silica, soda lime glass, borosilicate glass, fiberglass composite, or tempered glass), a metalloid (e.g., silicon, germanium, or the like), a carbide (e.g., silicon carbide), and any combinations of the foregoing. Moreover, the ceramic-based material may have a noncrystalline microstructure (e.g., an amorphous microstructure), a polycrystalline microstructure, or a crystalline microstructure. The ceramic-based material may constitute all or substantially all of the BEC or a lesser amount. For example, the ceramic-based material may be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, 100% by weight of the BEC. More generally, the ceramic-based material may range from about 1% to about 100% by weight of the BEC, including all sub-ranges and values in between.

[0010] The BEC may be thermally coupled to a heat-generating component (e.g., a processor die) with few thermal interfaces or, in some instances, a single thermal interface between the BEC and the heat-generating component. For example, the BEC may be directly attached to the heat-generating component, e.g., via a cold weld. In another example, the BEC may be coupled to the heat-generating component with a layer of thermal interface material disposed between the heat-generating component and the BEC.

[0001] In one aspect, the BEC may be a substrate with a structured surface that provides nucleation sites to promote boiling of a coolant liquid in a two-phase immersion cooling system. The structured surface may be formed, for example, by femtosecond laser etching, electrical discharge machining, or the like.

[0012] In another aspect, the BEC may exhibit a relatively low thermal conductivity compared to conventional BECs made of metals. The substrate may be relatively thin (e.g., less than about 1 mm thickness) to reduce the thermal resistance between the structured surface and the heatgenerating component and thus compensate for the relatively low thermal conductivity. In some implementations, the BECs disclosed herein may be made of a material having a relatively low thermal conductivity to promote secondary pool boiling effects. By forming the BEC from a less thermally conductive material, a larger temperature gradient may arise between the portion of the BEC near the heat-generating component and the portion of the BECnear the coolant liquid. This, in turn, may delay when the BEC reaches the critical heat flux by reducing the wall superheat.

[0013] The relatively low thermal conductivity of the BEC may limit in-plane heat spreading. In some implementations, the in-plane thermal conductivity of the BEC may nevertheless be increased through structural modification and / or by the addition of more thermally conductive materials. In one example, a thermally conductive layer may be disposed on the structured surface of the BEC. In some implementations, the thermally conductive layer may comprise graphene and / or carbon nanotubes. In another example, the BEC may incorporate a vapor chamber (e.g., a wicked vapor chamber, a wickless vapor chamber).[0014| In one example implementation, a system includes: a two-phase immersion cooling system, including: a tank defining a tank volume configured to contain a coolant liquid; and a computing system disposed within the tank volume and configured for submersion in the coolant liquid, the computing system including: a processor, including: a processor die having a surface; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating including a ceramic-based material.

[0015] The system may further include the coolant liquid disposed in the tank volume of the tank. The processor die may have a first coefficient of thermal expansion, the ceramic-based material may have a second coefficient of thermal expansion, and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 5* 10’6K'1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 3.5 x lO'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about MO'6K'1. The processor die may include silicon and the first coefficient of thermal expansion may correspond to a coefficient of thermal expansion of the silicon. The processor die may include silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K'1and the ceramic-based material may include glass having a second coefficient of thermal expansion equal to about 6>< 10'6K'1. The processor die may include silicon having a first coefficient of thermal expansion equal to about 2.5x l0'6K'1and the ceramic-based material may include silicon having a second coefficient of thermal expansion substantially similar to the first coefficient of thermal expansion.[0016} The processor die may have an area less than or equal to about 1000 mm2and the boiling enhancement coating may have dimensions equal to or larger than the processor die. The processor die may have an area less than or equal to about 500 mm2. The processor die may have an area less than or equal to about 100 mm2. The ceramic-based material may include glass. The glass may include at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass. The ceramic-based material may include at least one of silicon or silicon carbide. The boiling enhancement coating may have a thickness less than or equal to about 1 mm. The thickness may be less than or equal to about 200 pm. The structured surface may have a root mean square roughness less than or equal to about 50 pm. The root mean square roughness may be less than or equal to about 20 pm. The structured surface may include a first array of linear grooves. The structured surface further may include a second array of linear grooves rotationally offset with respect to the first array of linear grooves to form a cross-hatch pattern.[0017| The system may further include a thermal interface material disposed between and thermally coupling the processor die and the boiling enhancement coating. The thermal interface material may include at least one of zinc oxide, alumina, gallium, indium, gold, graphene, or carbon nanotubes. The thermal interface material may include at least one of a thermal grease, an epoxy, a phase change material, a foil, a thermal pad, a plated material, or a liquid metal. The thermal interface material may have a thickness less than or equal to about 300 pm. The boiling enhancement coating may be directly disposed onto the surface of the processor die.

[0018] The system may further include a thermally conductive layer, disposed directly on the structured surface of the boiling enhancement coating, to spread heat generated by the processor die across the structured surface. The thermally conductive layer may have an inplane thermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100. The ceramic-based material may have a first coefficient of thermal expansion, the thermally conductive layer may have a second coefficient of thermal expansion, and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 6* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 1 x 10'6K’1. The thermally conductive layer may include at least one of graphene or carbon nanotubes.[0019) The boiling enhancement coating may include a vapor chamber, disposed between the structured surface and the surface of the processor die, to facilitate transfer of heat generated by the processor die during operation to the structured surface. The vapor chamber may include a wick. The vapor chamber may not include a wick.[0020| In another example implementation, a system includes a two-phase immersion cooling system, including: a tank defining a tank volume configured to contain a coolant liquid; and a computing system disposed within the tank volume and configured for submersion in the coolant liquid, the computing system including: a processor, including: a processor die having a surface, the processor die including a first material having a first coefficient of thermal expansion; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating including a second material having a second coefficient of thermal expansion, wherein the first coefficient of thermal expansion and the second coefficient of thermal expansion are substantially similar.

[0021] A difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 5* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 3.5* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 1 x 10'6K’1.[0O22[ Inanother example implementation, a method for operating a computing system immersed in a coolant liquid of a two-phase immersion cooling system includes: operating the computing system; in response to operating the computing system, generating, by a processor die of the computing system, heat; transferring the heat from a surface of the processor die to a structured surface of a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating including a ceramic-based material; and transferring the heat from the structured surface to the coolant liquid, thereby causing the coolant liquid to boil and generate a plurality of bubbles of coolant vapor.

[0023] The coolant liquid may have a liquid-vapor phase transition temperature equal to about 50°C. The processor die may have a first coefficient of thermal expansion, the ceramic-based material may have a second coefficient of thermal expansion, and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less thanor equal to about 5* 10'6K'1. The processor die may include silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K'1and the ceramic-based material may include glass having a second coefficient of thermal expansion equal to about 6* 10'6K’1.

[0024] Operating the computing system may include: operating the processor die at a first temperature ranging from about 80°C to about 120°C thereby causing a second temperature at the structured surface to increase to a liquid-vapor phase transition temperature of the coolant liquid. Transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating occurs as a heat flux and variations in the heat flux across the surface of the processor die may be less than or equal to about 10%. Transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating occurs as a heat flux and variations in the heat flux across the surface of the processor die may be greater than or equal to about 90%. The ceramic-based material may include glass. The glass may include at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass. The ceramic-based material may include at least one of silicon or silicon carbide. The boiling enhancement coating may have a thickness less than or equal to about 1 mm. The structured surface may have a root mean square roughness less than or equal to about 50 pm.

[0025] Transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating may include transferring the heat from the surface of the processor die directly to the boiling enhancement coating. Transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating may include: transferring the heat from the surface of the processor die to thermal interface material disposed between and thermally coupled to the processor die and the boiling enhancement coating; and transferring the heat from the thermal interface material to the structured surface of the boiling enhancement coating. Transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating may include transferring the heat from the surface of the processor die directly to a vapor chamber of the boiling enhancement coating disposed between the surface of the processor die and the structured surface of the boiling enhancement coating. The vapor chamber may include a wick. The vapor chamber may not include a wick. Transferring the heat from the structured surface to the coolant liquid may include: transferring the heat from the structured surface to a thermally conductive layer disposed directly on the structured surface; and transferring the heat from the thermally conductive layer to the coolant liquid. The thermally conductive layer may have an in-planethermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100.10026] In another example implementation, a processor configured for immersion in a coolant liquid of a two-phase immersion cooling system includes: a processor die having a surface; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating including a ceramic-based material.

[0027] The processor die may have a first coefficient of thermal expansion, the ceramic-based material may have a second coefficient of thermal expansion, and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 5* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 3.5* 10'6K’ h The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about l >< 10'6K'1. The processor die may include silicon and the first coefficient of thermal expansion may correspond to a coefficient of thermal expansion of the silicon. The processor die may include silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K'1and the ceramic-based material may include glass having a second coefficient of thermal expansion equal to about 6* 10'6K'1. The processor die may include silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K'1and the ceramic-based material may include silicon having a second coefficient of thermal expansion substantially similar to the first coefficient of thermal expansion.

[0028] The processor die may be configured to operate at a temperature ranging from about 80°C to about 120°C and the structured surface of the boiling enhancement coating may be configured to operate at a temperature of about 50°C. The processor die is configured to generate heat that is transferred to the boiling enhancement coating through the surface of the processor die as a heat flux and variations in the heat flux across the surface of the processor die may be less than or equal to about 10%. The processor die is configured to generate heat that is transferred to the boiling enhancement coating through the surface of the processor die as a heat flux and variations in the heat flux across the surface of the processor die may be greater than or equal to about 90%.|(IO29| The processor die may have an area less than or equal to about 1000 mm2and the boiling enhancement coating may have dimensions equal to or larger than the processor die. The processor die may have an area less than or equal to about 500 mm2. The processor die may have an area less than or equal to about 100 mm2. The ceramic-based material may include glass. The glass may include at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass. The ceramic-based material may include at least one of silicon or silicon carbide. The boiling enhancement coating may have a thickness less than or equal to about 1 mm. The thickness may be less than or equal to about 200 pm. The structured surface may have a root mean square roughness less than or equal to about 50 pm. The root mean square roughness may be less than or equal to about 20 pm. The structured surface may include a first array of linear grooves. The structured surface further may include a second array of linear grooves rotationally offset with respect to the first array of linear grooves to form a cross-hatch pattern.[0030| The processor may further include a thermal interface material disposed between and thermally coupling the processor die and the boiling enhancement coating. The thermal interface material may include at least one of zinc oxide, alumina, gallium, indium, gold, graphene, or carbon nanotubes. The thermal interface material may include at least one of a thermal grease, an epoxy, a phase change material, a foil, a thermal pad, a plated material, or a liquid metal. The thermal interface material may have a thickness less than or equal to about 300 pm. The boiling enhancement coating may be directly disposed onto the surface of the processor die. The boiling enhancement coating may be coupled to the processor die via a cold weld.10031 J The processor may further include a thermally conductive layer, disposed directly on the structured surface of the boiling enhancement coating, to spread heat generated by the processor die across the structured surface. The thermally conductive layer may have an inplane thermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100. The ceramic-based material may have a first coefficient of thermal expansion, the thermally conductive layer may have a second coefficient of thermal expansion, and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 6* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 1 x 10'6K’1. The thermally conductive layer may include at least one of graphene or carbon nanotubes.|0032| The boiling enhancement coating may include a vapor chamber, disposed between the structured surface and the surface of the processor die, to facilitate transfer of heat generated by the processor die during operation to the structured surface. The vapor chamber may include a wick. The vapor chamber may not include a wick.[0033| In another example implementation, a system includes a two-phase immersion cooling system, including: a tank defining a tank volume configured to contain a coolant liquid; and a computing system disposed within the tank volume and configured for submersion in the coolant liquid, the computing system including: a processor, including: a processor die having a surface, the processor die including a first material having a first coefficient of thermal expansion; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating including a second material having a second coefficient of thermal expansion, wherein the first coefficient of thermal expansion and the second coefficient of thermal expansion are substantially similar.

[0034] A difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 5* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 3.5* 10'6K’1. The difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion may be less than or equal to about 1 x 10'6K’1.

[0035] In another example implementation, a method for assembling a processor configured for immersion in a coolant liquid of a two-phase immersion cooling system includes: patterning, via a femtosecond laser etching system, a ceramic-based substrate to form a structured surface that promotes boiling of the coolant liquid; and attaching the ceramic-based substrate to a processor die of the processor to provide a boiling enhancement coating.|0036| Attaching the ceramic-based substrate to the processor die may include cold welding the ceramic-based substrate to the processor die. The method may further include, before attaching the ceramic-based substrate to the processor die: performing, by a testing apparatus, one or more tests on the processor die using one of an air-cooled heat sink or a cold plate. The method may further include: installing the processor into a two-phase immersion cooling system. The ceramic-based substrate may include at least one of glass, silicon, or silicon carbide.

[0037] It should be appreciated that all combinations of the foregoing concepts and additional concepts discussed in greater detail below (provided such concepts are not mutually inconsistent) are contemplated as being part of the inventive subject matter disclosed herein. In particular, all combinations of claimed subject matter appearing at the end of this disclosure are contemplated as being part of the inventive subject matter disclosed herein. It should also be appreciated that terminology explicitly employed herein that also may appear in any disclosure incorporated by reference should be accorded a meaning most consistent with the particular concepts disclosed herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The skilled artisan will understand that the drawings primarily are for illustrative purposes and are not intended to limit the scope of the inventive subject matter described herein. The drawings are not necessarily to scale; in some instances, various aspects of the inventive subject matter disclosed herein may be shown exaggerated or enlarged in the drawings to facilitate an understanding of different features. In the drawings, like reference characters generally refer to like features (e.g., functionally similar and / or structurally similar elements).

[0039] FIG. 1 A shows an example processor with a lid and a printed circuit board (PCB).

[0040] FIG. IB shows a cross-sectional view of a computing system with the processor of FIG. 1A.

[0041] FIG. 2A shows an example two-phase immersion cooling system with a computing system submerged in coolant liquid.

[0042] FIG. 2B shows a cross-sectional view of the computing system of FIG. 2A with a processor and an example boiling enhancement coating (BEC).

[0043] FIG. 3 shows a cross-sectional view of an example BEC mounted to a processor via a thermal interface material.

[0044] FIG. 4 shows a cross-sectional view of an example BEC mounted directly to a processor without a thermal interface material.

[0045] FIG. 5 shows a cross-sectional view of an example BEC having a thermally conductive layer disposed on a structured surface of the BEC.

[0046] FIG. 6 shows a cross-sectional view of an example BEC with a wicked vapor chamber.

[0047] FIG. 7 shows a cross-sectional view of an example BEC with a wickless vapor chamber.DETAILED DESCRIPTION

[0048] Following below are more detailed descriptions of various concepts related to, and implementations of, a boiling enhancement coating (BEC) having less thermal expansion mismatch with a heat-generating component (e.g., a processor die) and providing nucleation sites to promote boiling of a coolant liquid in a two-phase immersion cooling system. The present disclosure is also directed to processors and computing systems incorporating the BEC and methods for making the BEC and assembling a computing system with the BEC. It should be appreciated that various concepts introduced above and discussed in greater detail below may be implemented in multiple ways. Examples of specific implementations and applications are provided primarily for illustrative purposes so as to enable those skilled in the art to practice the implementations and alternatives apparent to those skilled in the art.

[0049] The figures and example implementations described below are not meant to limit the scope of the present implementations to a single embodiment. Other implementations are possible by way of interchange of some or all of the described or illustrated elements. Moreover, where certain elements of the disclosed example implementations may be partially or fully implemented using known components, in some instances only those portions of such known components that are necessary for an understanding of the present implementations are described, and detailed descriptions of other portions of such known components are omitted so as not to obscure the present implementations.

[0050] In the discussion below, various examples of a processor with a BEC are provided, wherein a given example or set of examples showcases a ceramic-based substrate with a structured surface, a thermal interface material, a thermally conductive layer, and a vapor chamber (e.g., a wicked vapor chamber, a wickless vapor chamber). It should be appreciated that one or more features discussed in connection with a given example of a processor or a BEC may be employed in other examples of processors and BECs, respectively, according to the present disclosure, such that the various features disclosed herein may be readily combined in a given processor or BEC according to the present disclosure (provided that respective features are not mutually inconsistent).

[0051] Certain dimensions and features of the BEC, the processor, and / or the computing system are described herein using the terms “approximately,” “about,” “substantially,” and / or “similar.” As used herein, the terms “approximately,” “about,” “substantially,” and / or“similar” indicates that each of the described dimensions or features is not a strict boundary or parameter and does not exclude functionally similar variations therefrom. Unless context or the description indicates otherwise, the use of the terms “approximately,” “about,” “substantially,” and / or “similar” in connection with a numerical parameter indicates that the numerical parameter includes variations that, using mathematical and industrial principles accepted in the art (e.g., rounding, measurement or other systematic errors, manufacturing tolerances, etc.), would not vary the least significant digit.1. An Example of a Conventional Computing System with a Processor Die

[0052] A conventional processor typically includes a processor die (also referred to as a “processor chip”) mounted to a substrate (e.g., a printed circuit board (PCB)) and a lid (also referred to as a “heat spreader” or “integrated heat spreader”) to enclose and protect the processor die as well as dissipate heat generated by the processor die during operation. The lid is typically mounted onto a PCB supporting the processor die and thermally coupled to the processor die via a layer of thermal interface material. Thus, the lid and the thermal interface material provide a thermal pathway to conduct heat away from the processor die.

[0053] As an illustrative example, FIGS. 1A and IB show a computing system 8 with a processor 10. As shown, the processor 10 includes a printed circuit board (PCB) 14 and a processor die 16 mounted to the PCB 14 via a ball grid array 20. An underfill material 22 is typically included to bond the processor die 16 to the PCB 14 and protect the electrical connections formed by the ball grid array 20. A thermal interface material 18 is applied to a surface of the processor die 16 opposite to the ball grid array 20. A lid 12 is mounted to the PCB 14 such that a portion of the lid 12 is in physical contact with the thermal interface material 18, thus thermally coupling the lid 12 to the processor die 16. The lid 12 is typically mounted to the PCB 14 via an adhesive or a solder joint. The PCB 14 provides an electrical interface to couple the processor 10 to another PCB, such as a motherboard or, more generally, a PCB assembly (PCBA). For example, FIG. IB shows the computing system 8 may include a PCBA 26 electrically coupled to the PCB 14 with another ball grid array 24.

[0054] The design of the processor 10 provides a way to dissipate heat using conventional cooling systems, such as an air-cooled heatsink, which is typically coupled to the lid 12 via another layer of thermal interface material. However, this design is considerably less effective for cooling in a two-phase immersion cooling system. In a two-phase immersion cooling system, the computing system 8 is submerged entirely in a coolant liquid. As heat transferoccurs from the processor die 16 to the lid 12, the temperature of the lid 12 increases. If the temperature of the surface 13 exceeds the liquid-vapor phase transition temperature of the coolant liquid, the coolant liquid that directly contacts the surface 13 may vaporize (e.g., by forming a bubble) so long as a nucleation site to facilitate bubble formation is present on the surface 13. In this manner, the coolant liquid may dissipate heat from the lid 12 by absorbing the heat to vaporize the coolant liquid.

[0055] However, conventional lids 12 are often relatively smooth and thus provide few, if any, nucleation sites to facilitate boiling of the coolant liquid. As a result, a BEC is typically coupled to the lid 12 of a conventional processor 10 to provide nucleation sites that promote boiling of the coolant liquid. However, the addition of a BEC typically adds multiple thermal interfaces especially if the BEC is coupled to the lid 12 via another layer of thermal interface material. The multiple thermal interfaces increase the thermal resistance between the processor die 16 and the BEC, thus reducing cooling performance.

[0056] Here, the foregoing limitations with cooling performance are addressed, in part, by removing the lid 12 from the processor 10 and providing a BEC that is directly coupled to the processor die 16 or includes a single layer of thermal interface material disposed between the BEC and the processor die 16. In this manner, the number of thermal interfaces separating the processor die 16 and the BEC and, hence, the thermal resistance may be appreciably reduced. The BEC may have a structured surface that provides nucleation sites to promote boiling of the coolant liquid. The BEC may further be made of a material with a similar or same coefficient of thermal expansion as the processor die 16 to reduce or, in some instances, mitigate thermal expansion mismatch between the processor die 16 and the BEC during operation.

[0057] It should be appreciated that the BECs disclosed herein may be applied to various processors including, but not limited to, a central processing unit (CPU), a graphics processing unit (GPU), a data processing unit (DPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), and the like.2. An Example Boiling Enhancement Coating (BEC) with Low Thermal Expansion Mismatch

[0058] FIGS. 2A and 2B show an example computing system 100 installed in a two-phase immersion cooling system 200. As shown, the system 200 includes a tank 211 defining a tank volume 212 to contain coolant liquid 220. The computing system 100 is shown submerged in the coolant liquid 220. The system 200 further includes a cooling distribution unit 213 with acondenser coil 214 that carries a secondary coolant. The condenser coil 214 is partially disposed in the tank volume 212 above the coolant liquid 220.

[0059] During operation, the computing system 100 generates heat, which may be dissipated to the coolant liquid 220. When the coolant liquid 220 is sufficiently heated, the coolant liquid 220 vaporizes producing coolant vapor 221, which rises above into a gas space 224 within the tank volume 212 containing a mixture 223 of air and coolant vapor. As the coolant vapor 221 physically contacts the condenser coil 214, heat from the coolant vapor 221 is transferred to the secondary coolant carried by the condenser coil 214, thus causing the coolant vapor 221 to condense to liquid droplets 222 that falls back into the coolant liquid 220 below. The secondary coolant is circulated to the cooling distribution unit 213 where the heat is thereafter dissipated from the secondary coolant.(0060 J FIG. 2B shows the computing system 100 may include a processor 110, which includes the processor die 16 mounted to the PCB 14 via the ball grid array 20 and the underfill material 22 as before. The PCB 14 may be further mounted to the PCB A 26 via the ball grid array 24. Here, however, the lid may be removed from the processor 110 and a BEC 120 may be mounted directly to a surface of the processor die 16. The BEC 120 may include a structured surface (not shown) that provides nucleation sites to promote boiling of the coolant liquid.

[0061] During operation, heat generated by the processor die 16 may transfer to the BEC 120 via heat conduction. The heat transferred to the BEC 120, in turn, may convectively heat and boil coolant liquid that physically contacts the structured surface, thus generating the coolant vapor 221. Thus, the thermal pathway between the processor die 16 and the BEC 120 may be appreciably less thermally resistive compared to conventional BECs, which are typically mounted to a lid of a processor.

[0062] Following below are several examples of a BEC 120 that may be incorporated into the processor 110 of the computing system 100.2.1 An Example BEC with a Thermal Interface Material[00631 FIG. 3 shows an example BEC 120a with a substrate 130a mounted to the processor die 16 via a thermal interface material 140. As shown, the thermal interface material 140 may be applied to a surface 17 of the processor die 16 to attach the BEC 120a to the processor die 16. The surface 17 may correspond to the surface normally used to thermally couple a processor die to a lid. The substrate 130a may further include a structured surface 132 that provides numerous nucleation sites to promote boiling of the coolant liquid. As shown, the structuredsurface 132 may be disposed opposite to a surface 134 of the substrate 130a that bonds to the thermal interface material 140.

[0064] The substrate 130a may be made of a material having a coefficient of thermal expansion (CTE) similar to or the same as the CTE of the processor die 16. This reduces or, in some instances, prevents any adverse effects that may arise due to any thermal expansion mismatch between the BEC 120a and the processor die 16. For example, the processor die 16 may be made of a semiconductor (referred to as a “semiconductor die 16”) having a first CTE and the substrate 130a may have a second CTE. In some implementations, the difference between the first and second CTEs may be less than or equal to about 5><10'6K’1, including all sub-ranges and values in between. In other words, the difference between the first and second CTEs may range from about 0 K'1to about 5* 10'6K’1, including all sub-ranges and values in between. In some implementations, the difference between the first and second CTEs may be less than or equal to about 3.5 * 1 O'6K'1, including all sub-ranges and values in between. In other words, the difference between the first and second CTEs may range from about 0 K'1to about 3.5 x 10'6K’ including all sub-ranges and values in between. In some implementations, the difference between the first and second CTEs may be less than or equal to about 1 x 10'6K’1, including all sub-ranges and values in between. In other words, the difference between the first and second CTEs may range from about 0 K'1to about FlO'6K’1, including all sub-ranges and values in between. It should be appreciated that the foregoing ranges may cover instances where the first CTE is greater than the second CTE and instances where the first CTE is less than the second CTE. In some implementations, the foregoing ranges may correspond to a case where the processor die 16 is made of silicon, which has a coefficient of thermal expansion of about 2.5x 10'6K'1. Thus, if the difference in CTE between the processor die 16 and the BEC 120a is about l x 10'6K_1, the CTE of the BEC 120a may range from about 1.5 x lO'6K'1to about 3.5x 10'6K'1.

[0065] In some implementations, the first and second CTEs may be substantially similar or the same. This may be accomplished, for example, by fabricating the substrate 130a from the same material as the processor die 16 (e.g., silicon). For example, a ratio of the difference between the first and second CTEs divided by the first CTE represented as a percentage may range from about 0% to about 20%, including all sub-ranges and values in between. In another example, a ratio of the difference between the first and second CTEs divided by the first CTE represented as a percentage may range from about 0% to about 10%, including all sub-ranges and values in between. In yet another example, a ratio of the difference between the first and second CTEsdivided by the first CTE represented as a percentage may range from about 0% to about 5%, including all sub-ranges and values in between.

[0066] In one illustrative example, the processor die 16 may be made of silicon, which has a coefficient of thermal expansion of about 2.5* 10'6K’1, as described above. The substrate 130 may be made of a glass material having a CTE of about 6><10'6K'1. In another illustrative example, the processor die 16 and the substrate 130 may have substantially the same or the same CTE. For instance, both the processor die 16 and the substrate 130 may be made of silicon having a CTE of about 2.5 * 10'6K'1.

[0067] The term “about,” when used to describe the CTE of the processor die 16 and the BEC 120a, is intended to cover variations in CTE that may arise during manufacture due to variabilities in material composition and / or morphology. For example, “about 1 * 10'6K'1” may correspond to the following ranges: O.95* I O'6K'1to 1.05* 10'6K'1(+ / - 5% variation), 0.96* 10'6K'1to 1.04* IO'6K'1(+ / - 4% variation), 0.97* IO'6K'1to 1.03* IO'6K'1(+ / - 3% variation), 0.98* IO'6K'1to 1.02* IO'6K'1(+ / - 2% variation), 0.99* IO'6K'1to 1.01 * IO'6K'1(+ / - 1% variation), including all values and sub-ranges in between.

[0068] It should be appreciated that while it may be preferable for the CTE of the BEC 120a to be the same or similar as the CTE of the processor die 16, other factors can influence the extent any thermal expansion mismatch between the BEC 120a and the processor die 16 affects the structural integrity of the processor 110. These factors include, but are not limited to, the size and / or dimensions of the processor die 16 and / or the BEC 120a, the operating temperature of the processor die 16 and / or the BEC 120a, and the heating distribution of the processor die 16 (e.g., uniform or non-uniform heating of the BEC 120a).

[0069] One factor that may influence the effects of thermal expansion mismatch is the dimensions and the geometry of the processor die 16 and / or the BEC 120a. The BEC 120a may be dimensioned to be at least as large as the dimensions of the processor die 16 to ensure the surface 17 is fully covered by the BEC 120a. Accordingly, in some implementations, the BEC 120a may have the same dimensions as the surface 17 of the processor die 16. In some implementations, the BEC 120a may have larger dimensions than the surface 17 of the processor die 16 resulting in a portion of the BEC 120a extending past the edges of the processor die 16 thus creating an overhang.

[0070] The processor die 16 and / or the BEC 120a may come in a variety of sizes. In some implementations, the processor die 16 and / or the BEC 120a may have an area less than or equalto about 1000 mm2, including all sub-ranges and values in between. In some implementations, the processor die 16 and / or the BEC 120a may have an area less than or equal to about 500 mm2, including all sub-ranges and values in between. In some implementations, the processor die 16 and / or the BEC 120a may have an area less than or equal to about 100 mm2, including all sub-ranges and values in between. Similarly, the in-plane dimensions of the processor die 16 and / or the BEC 120a may also vary. In some implementations, the processor die 16 and / or the BEC 120a may have at least one in-plane dimension less than or equal to about 100 mm, including all sub-ranges and values in between. In some implementations, the processor die 16 and / or the BEC 120a may have at least one in-plane dimension less than or equal to about 50 mm, including all sub-ranges and values in between. In some implementations, the processor die 16 and / or the BEC 120a may have at least one in-plane dimension less than or equal to about 10 mm, including all sub-ranges and values in between.

[0071] The substrate 130a may be relatively thin to reduce its thermal resistance and, thus, the temperature difference along the thickness, ZBEC, of the substrate 130a particularly if the ceramic-based material used to form the substrate 130a has a relatively low thermal conductivity. As shown in FIG. 3, the thickness, feec, is taken to be the distance between the surface 134 of the substrate 130a that is bonded to the thermal interface material 140 and the largest peak along the structured surface 132. In some implementations, the thickness of the substrate 130a, ZBEC, may be less than or equal to about 1 mm, including all sub-ranges and values in between. In some implementations, the thickness of the substrate 130a, ZBEC, may be less than or equal to about 200 pm, including all sub-ranges and values in between.

[0072] The term “about,” when used to describe the dimensions of the processor die 16 and / or the BEC 120a, is intended to cover manufacturing tolerances. For example, “about 100 mm” may correspond to the following dimensional ranges: 99 mm to 101 mm (+ / - 1% tolerance), 99.2 mm to 100.8 mm (+ / - 0.8% tolerance), 99.4 mm to 100.6 mm (+ / - 0.6% tolerance), 99.6 mm to 100.4 mm (+ / - 0.4% tolerance), 99.8 mm to 100.2 mm (+ / - 0.2% tolerance), including all values and sub-ranges in between.

[0073] Another factor that may influence the effects of thermal expansion mismatch is the operating temperature of the processor die 16 and / or the BEC 120a. The operating temperature of the processor die 16 and the BEC 120a may generally depend on the liquid-vapor phase transition temperature of the coolant liquid and the power consumption of the processor 110. In some implementations, the liquid-vapor phase transition temperature of the coolant liquid may be equal to about 50°C. This, in turn, may result in the processor die 16 operating at atemperature ranging from about 80°C to about 120°C, including all sub-ranges and values in between. The structured surface 132 of the BEC 120a may operate at a temperature of about 50°C. Thus, the temperature difference between the processor die 16 (e.g., at the surface 17) and the structured surface 132 may range from about 30°C to about 70°C, including all subranges and values in between.[(>074) The term “about,” when used to describe the operating temperature of the processor die 16 and the BEC 120a, is intended to cover variations in temperature that may arise due, for example, to non-uniform heating and / or temperature gradients across various portions of the processor die 16 and the BEC 120a. For example, “about 50 °C” may correspond to the following ranges: 47.5 °C to 52.5 °C (+ / - 5% variation), 48 °C to 52 °C (+ / - 4% variation), 48.5 °C to 51.5 °C (+ / - 3% variation), 49 °C to 51 °C (+ / - 2% variation), 49.5 °C to 50.5 °C (+ / - 1% variation), including all values and sub-ranges in between.

[0075] Yet another factor that may influence the effects of thermal expansion mismatch is the spatial variation in heating across the plane of the processor die 16. The processor die 16 may generally include various parts perform different functions. For example, a CPU typically includes an arithmetic logical unit (ALU) to perform calculations, a control unit (CU) to direct operation of the CPU, and a memory unit (MU) to store information. Each of these parts may generate a different amount of heat during operation. This, in turn, means the heat transferred to the BEC 120a may also vary spatially with some regions being heated more than others. Said another way, the heat flux from the processor die 16 to the BEC 120a may vary spatially.

[0076] Here, variations in heat flux are defined as the difference between the heat flux at any point on the processor die 16 and the maximum heat flux across the processor die 16 divided by the maximum heat flux. In some implementations, the variations in heating may nevertheless be relatively uniform. For example, the heat flux from the processor die 16 to the BEC 120a may vary less than or equal to about 20%, including all sub-ranges and values in between. In some implementations, the heat flux from the processor die 16 to the BEC 120a may vary less than or equal to about 10%, including all sub-ranges and values in between. In some implementations, the variations in heating may be non-uniform. For example, the heat flux from the processor die 16 to the BEC 120a may vary greater than or equal to about 80%, including all sub-ranges and values in between. In some implementations, the heat flux from the processor die 16 to the BEC 120a may vary greater than or equal to about 90%, including all sub-ranges and values in between. It should be appreciated that the foregoing limitations for uniform and non-uniform heating are non-limiting examples. More generally, the heat fluxfrom the processor die 16 to the BEC 120a may vary from about 0% to about 100%, including all sub-ranges and values in between.

[0077] The term “about,” when used to describe spatial variations in the heat flux between the processor die 16 and the BEC 120a, is intended to cover fluctuations that may arise during operation especially when the load of the processor varies. For example, “about 20%” may correspond to the following ranges: 19% to 21% (+ / - 5% variation), 19.2% to 20.8% (+ / - 4% variation), 19.4% to 20.6% (+ / - 3% variation), 19.6% to 20.4% (+ / - 2% variation), 19.8% to 20.2% (+ / - 1% variation), including all values and sub-ranges in between.

[0078] It should be appreciated that the BECs 120a and / or the processor die 16 may exhibit any combination of the foregoing parameters disclosed (e.g., the CTE, the dimensions or size, the operating temperature, the heating distribution).

[0079] In some implementations, the BEC 120a and, in particular, the substrate 130a may be made of a ceramic-based material. The ceramic-based material generally includes ceramics and materials with mechanical and / or thermal properties similar to ceramics including, but not limited to, a glass or glass-like material (e.g., silica, soda lime glass, borosilicate glass, fiberglass composite, or tempered glass), a metalloid (e.g., silicon, germanium, or the like), a carbide (e.g., silicon carbide), and any combinations of the foregoing. Moreover, the ceramicbased material may have a non-crystalline microstructure (e.g., an amorphous microstructure), a polycrystalline microstructure, or a crystalline microstructure. The ceramic-based material may constitute all or substantially all of the BEC 120a or a lesser amount. For example, the ceramic-based material may be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, 100% by weight of the BEC 120a. More generally, the ceramic-based material may range from about 1% to about 100% by weight of the BEC 120a, including all sub-ranges and values in between.

[0080] In some implementations, the BEC 120a may be made of a material having a relatively low thermal conductivity (e.g., lower than a metal, such as copper). For example, the thermal conductivity of a glass material may be about 1 Wnr'K’1. Although the lower thermal conductivity may give rise to a relatively larger temperature gradient between portions of the BEC 120a near the processor die 16 and portions of the BEC 120a near the coolant liquid 220, this may be beneficial under certain conditions by promoting secondary pool boiling effects. A large temperature gradient may delay when the BEC 120a reaches the critical heat flux, which is the heat flux at which the effectiveness of transferring heat via boiling appreciably decreases.Instead, the wall superheat may decrease near the critical heat flux when the temperature gradient is large.

[0081] It should be appreciated, however, that the BEC 120a is not limited to materials that have a relatively low thermal conductivity. More generally, the BEC 120a may be made of a material having a thermal conductivity ranging from about 0.1 WITT' K- 1to about 150 Wm_1K' including all sub-ranges and values in between.

[0082] The term “about,” when used to describe the thermal conductivity of the BEC 120a, is intended to cover variations that may arise due to material composition, morphology, and / or quality. For example, “about 1 WITT' K- 1” may correspond to the following ranges: 0.95 Wm’ to 1.05 Wrrr'K-1(+ / - 5% variation), 0.96 Wrrr'K'1to 1.04 Wrrr'K'1(+ / - 4% variation), 0.97 Wm-'K to 1.03 Wm^K’1(+ / - 3% variation), 0.98 Wm^K’1to 1.02 Wm^K’1(+ / - 2% variation), 0.99 Wni'T'1to 1.01 Wni'T'1(+ / - 1% variation), including all values and subranges in between.

[0083] The structured surface 132 may be characterized, in part, by its root mean square (RMS) roughness. In some implementations, the RMS roughness of the structured surface 132 may be less than or equal to about 50 pm, including all sub-ranges and values in between. In some implementations, the RMS roughness of the structured surface 132 may be less than or equal to about 20 pm, including all sub-ranges and values in between.

[0084] The term “about,” when used to describe the RMS surface roughness of the structured surface 132 of the BEC 120a, is intended to cover manufacturing tolerances. For example, “about 50 pm” may correspond to the following dimensional ranges: 49.5 pm to 50.5 pm (+ / - 1% tolerance), 49.6 pm to 50.4 pm (+ / - 0.8% tolerance), 49.7 pm to 50.3 pm (+ / - 0.6% tolerance), 49.8 pm to 50.2 pm (+ / - 0.4% tolerance), 49.9 pm to 50.1 pm (+ / - 0.2% tolerance), including all values and sub-ranges in between.

[0085] In some implementations, the structured surface 132 may cover at least a portion or, in some instances, all of the plane of the BEC 120a. The structured surface 132 may further be formed to have a pattern that extends across the plane of the substrate 130a. For example, the structured surface 132 may be formed as an array of linear grooves. The linear grooves may be evenly spaced apart from one another. In another example, the structured surface 132 may include two arrays of linear grooves that are rotationally offset from one another. In some implementations, the two arrays maybe rotationally offset by 90 degrees, thus forming a cross-hatch pattern. More generally, the two arrays may be rotationally offset by an angle that ranges from about 1 degree to about 90 degrees, including all sub-ranges and values in between.

[0086] The thermal interface material 140 disposed between the substrate 130a and the processor die 16 may facilitate attachment and thermal coupling between the BEC 120a and the processor die 16. Generally, the thermal interface material 140 may be relatively thin to reduce its contribution to the thermal resistance between the processor die 16 and the structured surface 132 of the BEC 120a while providing sufficient coverage of any surface imperfections along the surface 17 and / or the surface 134. A relatively thin layer of the thermal interface material 140 may also reduce the likelihood of pump out during operation where a portion of the thermal interface material 140 is lost from the edges of the processor 110 when the substrate 130a of the BEC 120a and the processor die 16 thermally expand and / or contract at different rates. In some implementations, the thermal interface material 140 may have a thickness, triM, that is less than or equal to about 300 pm, including all sub-ranges and values in between.

[0087] The thermal interface material 140 may be made of various types of materials including, but not limited to, a thermal grease, an epoxy, a phase change material, a foil, a thermal pad, a plated material, and a liquid metal. The materials may include, but are not limited to, zinc oxide, alumina, gallium, indium, gold, graphene, and carbon nanotubes.2.2 An Example BEC without a Thermal Interface Material

[0088] FIG. 4 shows another example BEC 120b with a substrate 130a directly disposed onto the surface 17 of the processor die 16. In other words, the BEC 120b does not include any intermediate material layer (e.g., a thermal interface material) between the substrate 130a and the processor die 16. Rather, the surface 134 of the substrate 130a directly contacts the surface 17 of the processor die 16. The BEC 120b may include one or more of the same features as the BEC 120a described in Section 2.1. For brevity, repeated discussions of these features may not be provided below.

[0089] In some implementations, the substrate 130a of the BEC 120b may be attached to the processor die 16 via a cold weld. This may be accomplished, for example, by forming the substrate 130a from a material that has a common elemental constituent with the processor die 16. For example, the processor die 16 may be principally made of silicon and the substrate 130a may also be made of silicon. Further, the surface 134 and the surface 17 may be sufficiently flat. During assembly, the substrate 130a may be pressed against the processor die16 with sufficient force to bring the surface 134 into substantial contact with the surface 17 such that a cold weld is formed.2.3 An Example BEC with a Thermally Conductive Layer

[0090] FIG. 5 shows another example BEC 120c that includes a thermally conductive layer 150 disposed on the structured surface 132 of the substrate 130a. The thermally conductive layer 150 may increase the in-plane thermal conductivity along the portion of the BEC 120c that directly contacts the coolant liquid, thus increasing in-plane heat spreading. For example, heat generated by the processor die 16 may conduct towards the BEC 120c and, in particular, the structured surface 132 along an axis 101. Once the heat is transferred to the thermally conductive layer 150, the heat may spread in-plane (e.g., along an axis 102). An increase in heat spreading may alleviate hotspots on the processor die 16 and provide a larger surface from which heat is transferred to the coolant liquid (e.g., by boiling the coolant liquid). The BEC 120c may include one or more of the same features as the BECs 120a and 120b described in Sections 2.1 and 2.2. For brevity, repeated discussions of these features may not be provided below.[00911 The thermally conductive layer 150 may be made of a material that provides an appreciably large in-plane thermal conductivity. For example, the in-plane thermal conductivity of the thermally conductive layer 150 may be greater than the in-plane thermal conductivity of the substrate 130a by a factor of at least about 100.

[0092] For example, the substrate 130a may be made of a glass material having a thermal conductivity of about 1 Wni'T'1and the thermally conductive layer 150 may be made of graphene or carbon nanotubes, which have a thermal conductivity greater than 1000 Wm^K’1. In some implementations, graphene and carbon nanotubes may exhibit an anisotropic thermal conductivity with the largest thermal conductivity corresponding to an in-plane sheet direction or an axial direction of a tube, respectively. Accordingly, the graphene and / or carbon nanotubes may be arranged such that the largest thermal conductivity is aligned to the in-plane direction of the BEC 120c. The thermally conductive layer 150 may be applied to the structured surface 132 in several ways including, but not limited to, vapor deposition (e.g., chemical vapor deposition, physical vapor deposition) and electrodeposition.

[0093] The thermally conductive layer 150 may further be made of a material that has a CTE similar to or, in some instances, the same as the CTE of the substrate 130a. For example, the substrate 130a may be made of a ceramic-based material with a first CTE and the thermallyconductive layer 150 may have a second CTE. The difference between the first and second CTEs may be less than or equal to about 6* 10'6K’1, including all sub-ranges and values in between. In some implementations, the difference between the first and second CTEs may be less than or equal to about 3.5><10'6K’1, including all sub-ranges and values in between. In some implementations, the difference between the first and second CTEs may be less than or equal to about CIO'6K’1, including all sub-ranges and values in between. In some implementations, the first and second CTEs may be substantially the same or the same.

[0094] In some implementations, the thermally conductive layer 150 may conform to the structured surface 132 as shown in FIG. 5. In other words, the thermally conductive layer 150 may retain the structural features of the structured surface 132 that provide nucleation sites to promote boiling of the coolant liquid. The thermally conductive layer 150 may have a thickness, to, less than or equal to about 1 pm, including all sub-ranges and values in between. In some implementations, the thermally conductive layer 150 may have a thickness, to, less than or equal to about 200 nm, including all sub-ranges and values in between.2.4 An Example BEC with a Vapor Chamber

[0095] In some implementations, the BECs disclosed herein may incorporate a vapor chamber to facilitate efficient in-plane heat spreading and / or heat transfer from the processor die 16 to the structured surface of the BEC.

[0096] In one example, FIG. 6 shows a BEC 120d with a wicked vapor chamber 160a. As shown, the BEC 120d includes a substrate 130b mounted to the processor die 16 via a thermal interface material 140. The substrate 130b includes a cavity 162 with a wick 164 disposed along the interior surfaces of the substrate 130b defining the cavity 162. The wick 164 may be saturated with a working fluid 171. The BEC 120d may include one or more of the same features as the BECs 120a-120c described in Sections 2.1-2.3. For brevity, repeated discussions of these features may not be provided below.

[0097] During operation, a portion 165 of the wick 164 disposed near the processor die 16 may be heated by the processor die 16 during operation such that the working fluid 171 at the portion 165 undergoes a liquid-to-vapor phase transition resulting in the generation of vapor 170. As the vapor 170 is generated, the working fluid 171 at the portion 165 may be replenished by the working fluid 171 from other portions of the wick 164 (e.g., via capillary action). The vapor 170 may flow to a portion 166 of the wick 164 near the structured surface 132 of the substrate 130b. The vapor 170 may transfer heat to the structured surface 132 and condense back to aliquid where it is then transported back towards the portion 165 via the wick 164 (see arrows in FIG. 6). The heat from the vapor 170 may heat the structured surface 132, thus boiling the coolant liquid and generating the coolant vapor 221.

[0098] In some implementations, the substrate 130b may be divided into two components to facilitate assembly. For example, the substrate 130b may include base portion that is mounted to the processor die 16 and a cover portion that includes the structured surface 132 and the sides of the substrate 130b forming the cavity 162 shown in FIG. 6. The wick 164 may be saturated with the working fluid 171 and disposed in the cavity 162 of the cover portion prior to being attached to the base portion. The cover portion may be attached to the base portion via, for example, an adhesive.]0099] The substrate 130b may be made of a ceramic-based material as described above with respect to the substrate 130a. The wick 164 may be formed, for example, from sintered copper. The working fluid may be a fluid that has a liquid-to-vapor phase transition temperature greater than or equal to the phase transition temperature of the coolant liquid 220 in the two-phase immersion cooling system.

[0100] In another example, FIG. 7 shows a BEC 120e with a wickless vapor chamber 160b. As shown, BEC 120e may again include the substrate 130b with the cavity 162. In this example, the cavity 162 does not include any wick. Instead, the working fluid 171 may accumulate on one side of the cavity 162 (e.g., near the processor die 16). When heated, the working fluid 171 may undergo a liquid-to-phase transition, thus creating vapor 170. As the vapor 170 flows towards another side of the cavity 162 near the structured surface 132, the vapor 170 may condense back to a liquid and fall back towards the working fluid 171 as droplets 173.[010.1] In some implementations, the substrate 130b may again be divided into two components to facilitate assembly. For example, the substrate 130b may include base portion that is mounted to the processor die 16 and includes the sides of the substrate 130b forming the cavity 162 and a cover portion that includes the structured surface 132. During assembly, a predetermined volume of the working fluid 171 may be deposited into the cavity 162 before the cover portion is attached to the base portion and sealing the cavity 162.2.5 Example Methods of Manufacture and Assembly

[0102] The BECs 120 disclosed herein may be a prefabricated structure that is incorporated into a processor before it is installed into a two-phase immersion cooling system. In one example, the BEC 120 may be a substrate with a structured surface described above. The BEC120 may be prepared from a commercially available ceramic substrate (e.g., glass substrates, a silicon wafer). The ceramic substrate may be modified by etching a surface of the substrate to form the structured surface. Various etching methods may be used including, but not limited to, femtosecond laser etching, laser etching, sandblasting, chemical etching, sanding, and electrical discharge machining. Once the structured surface is formed, the BEC 120 may be attached to a processor die in various ways as described in the foregoing sections, which include, but is not limited to, using a thermal interface material as an adhesive, and a cold weld.

[0103] In some implementations, a thermally conductive layer 150 may be added onto the structured surface 132 before or after the BEC 120 is attached to processor die 16 (see Section 2.3). In some implementations, the BEC 120 may be assembled in a manner that forms a vapor chamber (see Section 2.4).

[0104] In some implementations, the BEC 120 may be added to the processor 110 after the computing system 100 has undergone validation testing. For example, a processor may be first mounted onto a PCBA to form a computing system. The processor may be an unmodified off- the-shelf processor. It should be appreciated that the PCBA may support multiple processors, which may be subsequently modified by adding the BECs disclosed herein. Accordingly, the computing system is assembled to include the various hardware components that are ultimately installed in the two-phase immersion cooling system. In some implementations, the processor may be mounted to the PCBA by soldering respective electrical connections of the processor to the PCBA.

[0105] After assembly of the computing system, the computing system may then be mounted to a testing apparatus. The testing apparatus may generally provide various hardware to support operation of the computing system. For example, the testing apparatus may include a computer chassis to support the computing system, a power supply to provide electrical power to the computing system, a display screen to display information to a user regarding the tests (e.g., the progress of the tests, the test results), and a user input device (e.g., a keyboard, a mouse) to facilitate user interaction with the computing system.

[0106] The testing apparatus may also include a cooling system to cool each processor of the computing system. Because the processors remain unmodified, conventional cooling systems that don’t require a coolant liquid to physically contact the processor, such as a cold plate or an air-cooled heat sink (e.g., a heat sink with a fan to provide forced convection, a heat sink cooled via natural convection), may be used. This makes testing appreciably simpler, cheaper,and faster compared to cooling systems that include a coolant liquid to directly cool the processor, such as an immersion cooling system, since coolant liquid is expensive and difficult to maintain.

[0107] One or more tests may be performed on the computing system using the testing apparatus. The tests performed may include, but are not limited to, a power on test, a performance test (e.g., to assess the speed / time to perform certain processes), a memory test (e.g., to assess the read / write performance of memory in the computing system), and a functional test. For example, the power on test may verify the PCBA turns on when an appropriate power input is provided. The power on test may also verify any software (e.g., a Basic Input / Output System (BIOS), an operation system (OS)) stored in memory on a memory device of the PCBA (e.g., a hard drive) is properly booted and operates as desired. In another example, the functional test may evaluate whether the power usage and operating temperature are within a desired design tolerance when performing certain processes. The functional test may also provide correction factors for power usage, operating temperature, and / or performance variation, which may be used by the computing system after the test(s) are performed to correlate the results of the test with system performance during operation. It should be appreciated that the test performed may vary depending on the processor and / or the computing system being tested. For example, a CPU and a GPU may undergo different tests. In another example, a PCBA for a GPU server and a PCBA with network cards may undergo different tests.

[0108] After testing is complete, the computing system may be removed from the testing apparatus. Thereafter, the computing system may be mounted to a sample holder and a BEC 120 may be applied to the processor die of the processor. This may be accomplished, for example, by removing the lid of the processor to expose the processor die and clean the processor die (e.g., to remove any residual thermal interface material). Modifications to the processor(s) do not affect the validation of the computing system. Once the desired BEC is applied to the processor die, the computing system may then be installed into a two-phase immersion cooling system.3. Conclusion

[0109] All parameters, dimensions, materials, and configurations described herein are meant to be example and the actual parameters, dimensions, materials, and / or configurations will depend upon the specific application or applications for which the inventive teachings is / areused. It is to be understood that the foregoing embodiments are presented primarily by way of example and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described and claimed. Inventive embodiments of the present disclosure are directed to each individual feature, system, article, material, kit, and / or method described herein.[01101 Inaddition, any combination of two or more such features, systems, articles, materials, kits, and / or methods, if such features, systems, articles, materials, kits, and / or methods are not mutually inconsistent, is included within the inventive scope of the present disclosure. Other substitutions, modifications, changes, and omissions may be made in the design, operating conditions and arrangement of respective elements of the example implementations without departing from the scope of the present disclosure. The use of a numerical range does not preclude equivalents that fall outside the range that fulfill the same function, in the same way, to produce the same result.[0111 [ Also, various inventive concepts may be embodied as one or more methods, of which an example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.

[0112] All publications, patent applications, patents, and other references mentioned herein are incorporated by reference in their entirety.

[0113] All definitions, as defined and used herein, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and / or ordinary meanings of the defined terms.[011.4] The indefinite articles “a” and “an,” as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean “at least one.”

[0115] The phrase “and / or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases. Multiple elements listed with “and / or” should be construed in the same fashion, i.e., “one or more” of the elements so conjoined. Other elements may optionally be present other than the elements specifically identified by the “and / or” clause, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, a reference to “A and / or B”, when used inconjunction with open-ended language such as “comprising” can refer, in one embodiment, to A only (optionally including elements other than B); in another embodiment, to B only (optionally including elements other than A); in yet another embodiment, to both A and B (optionally including other elements); etc.[0116| As used herein in the specification and in the claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating items in a list, “or” or “and / or” shall be interpreted as being inclusive, i.e., the inclusion of at least one, but also including more than one, of a number or list of elements, and, optionally, additional unlisted items. Only terms clearly indicated to the contrary, such as “only one of’ or “exactly one of,” or, when used in the claims, “consisting of,” will refer to the inclusion of exactly one element of a number or list of elements. In general, the term “or” as used herein shall only be interpreted as indicating exclusive alternatives (i.e., “one or the other but not both”) when preceded by terms of exclusivity, such as “either,” “one of,” “only one of,” or “exactly one of.” “Consisting essentially of,” when used in the claims, shall have its ordinary meaning as used in the field of patent law.(0117) As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase “at least one” refers, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, “at least one of A and B” (or, equivalently, “at least one of A or B,” or, equivalently “at least one of A and / or B”) can refer, in one embodiment, to at least one, optionally including more than one, A, with no B present (and optionally including elements other than B); in another embodiment, to at least one, optionally including more than one, B, with no A present (and optionally including elements other than A); in yet another embodiment, to at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc.[01.18] In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “composed of,” and the like are to be understood to be open-ended, i.e., to mean including butnot limited to. Only the transitional phrases “consisting of’ and “consisting essentially of’ shall be closed or semi-closed transitional phrases, respectively, as set forth in the United States Patent Office Manual of Patent Examining Procedures, Section 2111.03.

Claims

CLAIMS1. A system, comprising: a two-phase immersion cooling system, comprising: a tank defining a tank volume configured to contain a coolant liquid; and a computing system disposed within the tank volume and configured for submersion in the coolant liquid, the computing system comprising: a processor, comprising: a processor die having a surface; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating comprising a ceramic-based material.

2. The system of claim 1, further comprising: the coolant liquid disposed in the tank volume of the tank.

3. The system of claim 1, wherein: the processor die has a first coefficient of thermal expansion; the ceramic-based material has a second coefficient of thermal expansion; and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 5* 10'6K’1.

4. The system of claim 3, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 3.5x l0’6K’1.

5. The system of claim 4, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about l x IO’6K’1.

6. The system of claim 3, wherein: the processor die comprises silicon; and the first coefficient of thermal expansion corresponds to a coefficient of thermal expansion of the silicon.

7. The system of claim 1, wherein: the processor die comprises silicon having a first coefficient of thermal expansion equal to about 2.5xl0'6K’1; and the ceramic-based material comprises glass having a second coefficient of thermal expansion equal to about 6* 10'6K'1.

8. The system of claim 1, wherein: the processor die comprises silicon having a first coefficient of thermal expansion equal to about 2.5xl0'6K’1; and the ceramic-based material comprises silicon having a second coefficient of thermal expansion substantially similar to the first coefficient of thermal expansion.

9. The system as in any of claims 1-8, wherein: the processor die has an area less than or equal to about 1000 mm2; and the boiling enhancement coating has dimensions equal to or larger than the processor die.

10. The system of claim 9, wherein the processor die has an area less than or equal to about 500 mm2.

11. The system of claim 10, wherein the processor die has an area less than or equal to about 100 mm2.

12. The system of claim 1, wherein the ceramic-based material comprises glass.

13. The system of claim 12, wherein the glass comprises at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass.

14. The system of claim 1, wherein the ceramic-based material comprises at least one of silicon or silicon carbide.

15. The system of claim 1, wherein the boiling enhancement coating has a thickness less than or equal to about 1 mm.

16. The system of claim 15, wherein the thickness is less than or equal to about 200 pm.

17. The system of claim 1, wherein the structured surface has a root mean square roughness less than or equal to about 50 pm.

18. The system of claim 17, wherein the root mean square roughness is less than or equal to about 20 pm.

19. The system of claim 1, wherein the structured surface comprises a first array of linear grooves.

20. The system of claim 19, wherein the structured surface further comprises a second array of linear grooves rotationally offset with respect to the first array of linear grooves to form a cross-hatch pattern.

21. The system of claim 1, further comprising: a thermal interface material disposed between and thermally coupling the processor die and the boiling enhancement coating.

22. The system of claim 21, wherein the thermal interface material comprises at least one of zinc oxide, alumina, gallium, indium, gold, graphene, or carbon nanotubes.

23. The system of claim 21, wherein the thermal interface material comprises at least one of a thermal grease, an epoxy, a phase change material, a foil, a thermal pad, a plated material, or a liquid metal.

24. The system of claim 21, wherein the thermal interface material has a thickness less than or equal to about 300 pm.

25. The system of claim 1, wherein the boiling enhancement coating is directly disposed onto the surface of the processor die.

26. The system of claim 1, further comprising:a thermally conductive layer, disposed directly on the structured surface of the boiling enhancement coating, to spread heat generated by the processor die across the structured surface.

27. The system of claim 26, wherein the thermally conductive layer has an in-plane thermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100.

28. The system of claim 26, wherein: the ceramic-based material has a first coefficient of thermal expansion; the thermally conductive layer has a second coefficient of thermal expansion; and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 6* 10'6K’1.

29. The system of claim 28, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about l x IO’6K’1.

30. The system of claim 26, wherein the thermally conductive layer comprises at least one of graphene or carbon nanotubes.

31. The system of claim 1, wherein the boiling enhancement coating includes a vapor chamber, disposed between the structured surface and the surface of the processor die, to facilitate transfer of heat generated by the processor die during operation to the structured surface.

32. The system of claim 31, wherein the vapor chamber comprises a wick.

33. The system of claim 31, wherein the vapor chamber does not comprise a wick.

34. A system, comprising: a two-phase immersion cooling system, comprising: a tank defining a tank volume configured to contain a coolant liquid; anda computing system disposed within the tank volume and configured for submersion in the coolant liquid, the computing system comprising: a processor, comprising: a processor die having a surface, the processor die comprising a first material having a first coefficient of thermal expansion; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating comprising a second material having a second coefficient of thermal expansion, wherein the first coefficient of thermal expansion and the second coefficient of thermal expansion are substantially similar.

35. The system of claim 34, wherein a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 5x l0-6K’1.

36. The system of claim 35, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 3.5x IO’6K’1.

37. The system of claim 36, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about l x IO’6K'1.

38. A method for operating a computing system immersed in a coolant liquid of a two- phase immersion cooling system, the method comprising: operating the computing system; in response to operating the computing system, generating, by a processor die of the computing system, heat; transferring the heat from a surface of the processor die to a structured surface of a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating comprising a ceramic-based material; and transferring the heat from the structured surface to the coolant liquid, thereby causing the coolant liquid to boil and generate a plurality of bubbles of coolant vapor.

39. The method of claim 38, wherein the coolant liquid has a liquid-vapor phase transition temperature equal to about 50°C.

40. The method of claim 38, wherein: the processor die has a first coefficient of thermal expansion; the ceramic-based material has a second coefficient of thermal expansion; and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 5* 10'6K'1.

41. The method of claim 38, wherein: the processor die comprises silicon having a first coefficient of thermal expansion equal to about 2.5xl0'6K’1; and the ceramic-based material comprises glass having a second coefficient of thermal expansion equal to about 6* 10'6K’1.

42. The method of claim 38, wherein operating the computing system comprises: operating the processor die at a first temperature ranging from about 80°C to about120°C thereby causing a second temperature at the structured surface to increase to a liquidvapor phase transition temperature of the coolant liquid.

43. The method of claim 38, wherein: transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating occurs as a heat flux; and variations in the heat flux across the surface of the processor die are less than or equal to about 10%.

44. The method of claim 38, wherein: transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating occurs as a heat flux; and variations in the heat flux across the surface of the processor die are greater than or equal to about 90%.

45. The method of claim 38, wherein the ceramic-based material comprises glass.

46. The method of claim 45, wherein the glass comprises at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass.

47. The method of claim 38, wherein the ceramic-based material comprises at least one of silicon or silicon carbide.

48. The method of claim 38, wherein the boiling enhancement coating has a thickness less than or equal to about 1 mm.

49. The method of claim 38, wherein the structured surface has a root mean square roughness less than or equal to about 50 pm.

50. The method of claim 38, wherein transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating comprises: transferring the heat from the surface of the processor die directly to the boiling enhancement coating.

51. The method of claim 38, wherein transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating comprises: transferring the heat from the surface of the processor die to thermal interface material disposed between and thermally coupled to the processor die and the boiling enhancement coating; and transferring the heat from the thermal interface material to the structured surface of the boiling enhancement coating.

52. The method of claim 38, wherein transferring the heat from the surface of the processor die to the structured surface of the boiling enhancement coating comprises: transferring the heat from the surface of the processor die directly to a vapor chamber of the boiling enhancement coating disposed between the surface of the processor die and the structured surface of the boiling enhancement coating.

53. The method of claim 52, wherein the vapor chamber comprises a wick.

54. The method of claim 52, wherein the vapor chamber does not comprise a wick.

55. The method of claim 38, wherein transferring the heat from the structured surface to the coolant liquid comprises: transferring the heat from the structured surface to a thermally conductive layer disposed directly on the structured surface; and transferring the heat from the thermally conductive layer to the coolant liquid.

56. The method of claim 55, wherein the thermally conductive layer has an in-plane thermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100.

57. A processor configured for immersion in a coolant liquid of a two-phase immersion cooling system, the processor comprising: a processor die having a surface; and a boiling enhancement coating disposed on the surface of the processor die, the boiling enhancement coating having a structured surface to promote boiling of the coolant liquid, the boiling enhancement coating comprising a ceramic-based material.

58. The processor of claim 57, wherein: the processor die has a first coefficient of thermal expansion; the ceramic-based material has a second coefficient of thermal expansion; and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 5* 10'6K’1.

59. The processor of claim 58, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 3.5* 10'6K’1.

60. The processor of claim 59, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about l x IO’6K'1.

61. The processor of claim 58, wherein: the processor die comprises silicon; andthe first coefficient of thermal expansion corresponds to a coefficient of thermal expansion of the silicon.

62. The processor of claim 57, wherein: the processor die comprises silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K’1; and the ceramic-based material comprises glass having a second coefficient of thermal expansion equal to about 6* 10'6K'1.

63. The processor of claim 57, wherein: the processor die comprises silicon having a first coefficient of thermal expansion equal to about 2.5* 10'6K’1; and the ceramic-based material comprises silicon having a second coefficient of thermal expansion substantially similar to the first coefficient of thermal expansion.

64. The processor as in any of claims 57-63, wherein: the processor die has an area less than or equal to about 1000 mm2; and the boiling enhancement coating has dimensions equal to or larger than the processor die.

65. The processor of claim 64, wherein the processor die has an area less than or equal to about 500 mm2.

66. The processor of claim 65, wherein the processor die has an area less than or equal to about 100 mm2.

67. The processor as in any of claims 57-63, wherein: the processor die is configured to operate at a temperature ranging from about 80°C to about 120°C; and the structured surface of the boiling enhancement coating is configured to operate at a temperature of about 50°C.

68. The processor as in any of claims 57-63, wherein:the processor die is configured to generate heat that is transferred to the boiling enhancement coating through the surface of the processor die as a heat flux; and variations in the heat flux across the surface of the processor die are less than or equal to about 10%.

69. The processor as in any of claims 57-63, wherein: the processor die is configured to generate heat that is transferred to the boiling enhancement coating through the surface of the processor die as a heat flux; and variations in the heat flux across the surface of the processor die are greater than or equal to about 90%.

70. The processor of claim 57, wherein the ceramic-based material comprises glass.

71. The processor of claim 70, wherein the glass comprises at least one of silica, a soda lime glass, a borosilicate glass, a fiberglass composite, or a tempered glass.

72. The processor of claim 57, wherein the ceramic-based material comprises at least one of silicon or silicon carbide.

73. The processor of claim 57, wherein the boiling enhancement coating has a thickness less than or equal to about 1 mm.

74. The processor of claim 73, wherein the thickness is less than or equal to about 200 pm.

75. The processor of claim 57, wherein the structured surface has a root mean square roughness less than or equal to about 50 pm.

76. The processor of claim 75, wherein the root mean square roughness is less than or equal to about 20 pm.

77. The processor of claim 57, wherein the structured surface comprises a first array of linear grooves.

78. The processor of claim 77, wherein the structured surface further comprises a second array of linear grooves rotationally offset with respect to the first array of linear grooves to form a cross-hatch pattern.

79. The processor of claim 57, further comprising: a thermal interface material disposed between and thermally coupling the processor die and the boiling enhancement coating.

80. The processor of claim 79, wherein the thermal interface material comprises at least one of zinc oxide, alumina, gallium, indium, gold, graphene, or carbon nanotubes.

81. The processor of claim 79, wherein the thermal interface material comprises at least one of a thermal grease, an epoxy, a phase change material, a foil, a thermal pad, a plated material, or a liquid metal.

82. The processor of claim 79, wherein the thermal interface material has a thickness less than or equal to about 300 pm.

83. The processor of claim 57, wherein the boiling enhancement coating is directly disposed onto the surface of the processor die.

84. The processor of claim 83, wherein the boiling enhancement coating is coupled to the processor die via a cold weld.

85. The processor of claim 57, further comprising: a thermally conductive layer, disposed directly on the structured surface of the boiling enhancement coating, to spread heat generated by the processor die across the structured surface.

86. The processor of claim 85, wherein the thermally conductive layer has an in-plane thermal conductivity greater than a thermal conductivity of the ceramic-based material by a factor of at least about 100.

87. The processor of claim 85, wherein:the ceramic-based material has a first coefficient of thermal expansion; the thermally conductive layer has a second coefficient of thermal expansion; and a difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about 6* 10'6K'1.

88. The processor of claim 87, wherein the difference between the first coefficient of thermal expansion and the second coefficient of thermal expansion is less than or equal to about l x IO’6K'1.

89. The processor of claim 85, wherein the thermally conductive layer comprises at least one of graphene or carbon nanotubes.

90. The processor of claim 57, wherein the boiling enhancement coating includes a vapor chamber, disposed between the structured surface and the surface of the processor die, to facilitate transfer of heat generated by the processor die during operation to the structured surface.

91. The processor of claim 90, wherein the vapor chamber comprises a wick.

92. The processor of claim 90, wherein the vapor chamber does not comprise a wick.

93. A method for assembling a processor configured for immersion in a coolant liquid of a two-phase immersion cooling system, the method comprising: patterning, via a femtosecond laser etching system, a ceramic-based substrate to form a structured surface that promotes boiling of the coolant liquid; and attaching the ceramic-based substrate to a processor die of the processor to provide a boiling enhancement coating.

94. The method of claim 93, wherein attaching the ceramic-based substrate to the processor die comprises: cold welding the ceramic-based substrate to the processor die.

95. The method of claim 93, further comprising, before attaching the ceramic-based substrate to the processor die:performing, by a testing apparatus, one or more tests on the processor die using one of an air-cooled heat sink or a cold plate.

96. The method of claim 93, further comprising: installing the processor into a two-phase immersion cooling system.

97. The method of claim 93, wherein the ceramic-based substrate comprises at least one of glass, silicon, or silicon carbide.

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