Antenna module

Abstract

[Problem] To reduce transmission loss between an electronic component and an antenna pattern in an antenna module in which the electronic component and the antenna pattern are packaged. [Solution] An antenna module 100 comprises a multilayer substrate 10 and an electronic component 30 embedded in the multilayer substrate 10. The multilayer substrate 10 includes an insulating layer 12 in which the electronic component 30 is embedded, and an internal conductor layer 72 and an antenna layer 78. The internal conductor layer 72 includes a signal pattern S1 facing a main surface 31 of the electronic component 30 via the insulating layer 12. The antenna layer 78 includes an antenna pattern ANT1 connected to the signal pattern S1. The signal pattern S1 has a surface A1 positioned on the side facing the main surface 31 of the electronic component 30, and a surface A2 positioned on the opposite side to the surface A1. The surface A1 has a smaller surface roughness than the surface A2.

Description

Antenna Module

[0001] The present disclosure relates to an antenna module.

[0002] Patent Document 1 discloses an antenna module in which electronic components such as RFIC and an antenna pattern are packaged.

[0003] Special Publication No. 2022-533763

[0004] In this type of antenna module, it is necessary to reduce transmission loss between the electronic component and the antenna pattern.

[0005] This disclosure describes a technique for reducing transmission loss between an electronic component and an antenna pattern in an antenna module in which the electronic component and the antenna pattern are packaged.

[0006] An antenna module according to one aspect of the present disclosure comprises a multilayer substrate in which a plurality of conductor layers and a plurality of insulating layers are alternately stacked, and an electronic component having a plurality of pad electrodes including signal pads provided on its main surface side, wherein the plurality of insulating layers includes a first insulating layer in which the electronic component is embedded, the plurality of conductor layers including a first internal conductor layer and an antenna layer, the first internal conductor layer including a first signal pattern having one end electrically connected to the signal pad and at least a portion of which faces the main surface of the electronic component via the first insulating layer, the antenna layer including an antenna pattern electrically connected to the other end of the first signal pattern, the surface of the first signal pattern having a first surface located on the side facing the main surface of the electronic component and a second surface located opposite the first surface, and the first surface has a surface roughness smaller than that of the second surface.

[0007] According to the present disclosure, a technique is provided for reducing transmission loss between an electronic component and an antenna pattern in an antenna module in which the electronic component and the antenna pattern are packaged.

[0008] Fig. 1 is a schematic perspective view showing the appearance of an antenna module 100 according to an embodiment of the present disclosure. Fig. 2 is a schematic partial cross-sectional view of the antenna module 100. Figs. 3A to 3K are process diagrams for explaining a manufacturing method of the antenna module 100. Fig. 4 is a schematic partial cross-sectional view of an antenna module according to a modified example.

[0009] Hereinafter, embodiments of the technology according to the present disclosure will be described in detail with reference to the accompanying drawings.

[0010] 1 is a schematic perspective view showing the appearance of an antenna module 100 according to an embodiment of the present disclosure. The antenna module 100 is flat and has four antenna patterns ANT1 to ANT4 arranged on its front surface. A plurality of terminal electrodes are arranged on the rear surface of the antenna module 100.

[0011] 2 is a partial schematic cross-sectional view of the antenna module 100. As shown in FIG. 2, the antenna module 100 includes a multilayer substrate 10 in which a plurality of conductor layers 71-78 and a plurality of insulating layers 11-17 are alternately stacked, and an electronic component 30 embedded in the multilayer substrate 10. Here, the insulating layers 11 and 13-17 are all core insulating layers made of a core material in which a core material is impregnated with a resin, whereas the insulating layer 12 does not contain a core material that would prevent the embedding of the electronic component 30. Furthermore, the insulating layers 13 and 14 may be made of a material with a smaller dielectric tangent than the insulating layer 12.

[0012] One of the outermost conductor layers 71 is covered with a solder resist 21. The other outermost conductor layer 78 is covered with a solder resist 22. The solder resist 21 forms the back surface 101 of the antenna module 100. A plurality of terminal electrodes including a signal terminal 41 and a ground terminal 42 are exposed from openings in the solder resist 21. The signal terminal 41 and the ground terminal 42 are connected to the conductor layer 71. The conductor layer 71 forms a terminal layer, and the surface of the conductor layer 71 exposed from the solder resist 21 may itself be used as a terminal electrode. The plurality of terminal electrodes may be considered to be part of the conductor layer 71. The solder resist 22 forms the front surface 102 of the antenna module 100. All of the conductor layers 72 to 77 form internal conductor layers.

[0013] The electronic component 30 is embedded in the insulating layer 12. The insulating layer 12 is composed of two insulating layers 12A and 12B, and the electronic component 30 is embedded between them. The electronic component 30 may be an RFIC chip. The electronic component 30 has a main surface 31 on which circuit elements such as transistors are formed, a back surface 33 located opposite the main surface 31, a rewiring layer 32 provided on the main surface 31, and multiple pad electrodes provided on the rewiring layer 32. The multiple pad electrodes include signal pads P1 and P2 and a ground pad P3. The electronic component 30 is embedded in the insulating layer 12 so that the main surface 31 faces the back surface 101 and the back surface 33 faces the front surface 102. Signal patterns connected to the signal pads P1 and P2, etc., are provided on the rewiring layer 32, and a ground pattern may be provided in most of the area where no signal patterns are provided. The signal pad P1 is connected through a via conductor V4 to one end of a signal pattern S1 located on the conductor layer 72. The signal pad P2 is connected to a signal terminal 41. The ground pad P3 is connected to a ground terminal 42 through a via conductor V6 and a ground pattern G1 located on the conductor layer 72.

[0014] The other end of signal pattern S1 is connected to one end of signal pattern S2 located on conductor layer 74 via via conductor V1 penetrating insulating layer 12, signal pattern S3 provided on conductor layer 73, and via conductor V5 penetrating insulating layer 13. The other end of signal pattern S2 is connected to antenna pattern ANT1 located on conductor layer 78 via via conductor V2 penetrating insulating layers 14-17. Other antenna patterns ANT2-ANT4 are also formed on conductor layer 78, which constitutes the antenna layer. Via conductor V2 is composed of multiple sections made up of via conductors V21-V24 that respectively penetrate insulating layers 14-17. Via conductor V21-V24 are arranged in positions that overlap each other when viewed from the stacking direction. Via conductor V22 is a cylindrical conductor pattern formed on the inner wall of a through hole penetrating insulating layer 15. The area surrounded by via conductor V22 is filled with insulating resin 50.

[0015] With the above configuration, in the antenna module 100, the main surface 31 and rewiring layer 32 of the electronic component 30 and the radiation surface (A8 described later) of the antenna pattern ANT1 are arranged so as not to face each other in the stacking direction (so as to face opposite directions in the stacking direction). Specifically, the main surface 31 and rewiring layer 32 of the electronic component 30 face the back surface 101 of the antenna module 100, and the radiation surface of the antenna pattern ANT1 faces the front surface 102 of the antenna module 100. This suppresses interference between the antenna patterns ANT1 to ANT4 and the signal pads P1 and P2 of the electronic component 30, making it possible to obtain stable antenna characteristics.

[0016] The ground pattern G1 is connected to the ground pattern G2 provided on the conductor layer 73 through a via conductor V3 that penetrates the insulating layer 12. Most of the electronic component 30 overlaps with the ground pattern G2 when viewed in the stacking direction. The ground pattern G2 is connected to the ground pattern G4 located on the conductor layer 74 through a via conductor V7 that penetrates the insulating layer 13. The ground pattern G4 is connected to the ground pattern G3 located on the conductor layer 75 through a via conductor V8 that penetrates the insulating layer 14. Most of the signal pattern S2 is sandwiched between the ground patterns G2 and G3.

[0017] 2 , the surface of the conductor layer 72 including the signal pattern S1 has a surface A1 that contacts the insulating layer 12 and faces the main surface 31 of the electronic component 30, and a surface A2 that contacts the insulating layer 11 and faces the opposite side of surface A1. The surface of the conductor layer 74 including the signal pattern S2 has a surface A3 that contacts the insulating layer 13 and faces the ground pattern G2, and a surface A4 that contacts the insulating layer 14 and faces the ground pattern G3. The surface of the conductor layer 73 including the signal pattern S3 has a surface A5 that contacts the insulating layer 12 and faces the electronic component 30, and a surface A6 that contacts the insulating layer 13 and faces the opposite side of surface A5. The surface of the conductor layer 78 including the antenna pattern ANT1 has a surface A7 that contacts the insulating layer 17 and faces the via conductor V2, and a surface A8 that contacts the solder resist 22 and faces the opposite side of surface A7.

[0018] The surface A1 of the conductor layer 72 may have a smaller surface roughness than the surface A2 of the conductor layer 72. This reduces transmission loss of RF signals flowing through the signal pattern S1. Because a portion of the signal pattern S1 covers the main surface 31 of the electronic component 30 via the insulating layer 12, the impedance on the surface A1 side is lower than the impedance on the surface A2 side due to the ground potential of the electronic component 30 itself or the ground potential of the ground pattern provided on the rewiring layer 32. As a result, the density of the current flowing through the surface layer of the signal pattern S1 is higher on the surface A1 side than on the surface A2 side due to the skin effect. Therefore, if the surface roughness of the surface A1 is smaller than that of the surface A2, transmission loss of RF signals flowing near the surface A1 of the signal pattern S1 is reduced. On the other hand, the surface A2 side, where the current density is lower, has a larger surface roughness, thereby improving adhesion to the insulating layer 11.

[0019] The insulating layer 13 may be thinner than the insulating layer 14. In this case, the surface A3 of the conductor layer 74 may have a smaller surface roughness than the surface A4 of the conductor layer 74. This reduces the transmission loss of the RF signal flowing through the signal pattern S2. This is because, when the insulating layer 13 is thinner than the insulating layer 14, the distance T13 between the surface A3 of the signal pattern S2 and the ground pattern G2 is shorter than the distance T14 between the surface A4 of the signal pattern S2 and the ground pattern G3, and therefore the impedance on the surface A3 side is lower than the impedance on the surface A4 side. On the other hand, the surface A4 has a larger surface roughness, which enhances adhesion to the insulating layer 14. Furthermore, if a material with a smaller dielectric loss tangent than the insulating layer 12 is used as the material for the insulating layers 13 and 14, the transmission loss of the RF signal flowing through the signal pattern S2 is further reduced.

[0020] The surface A5 of the conductor layer 73 may have a smaller surface roughness than the surface A6 of the conductor layer 73. This reduces the transmission loss of the RF signal flowing through the signal pattern S3. This is because the surface A5 of the signal pattern S3 faces the electronic component 30, and the impedance on the surface A5 side is lower than the impedance on the surface A6 side due to the ground potential of the electronic component 30 itself. On the other hand, the surface A6 has a larger surface roughness, which improves adhesion to the insulating layer 13.

[0021] The surface A8 of the conductor layer 78 may have a smaller surface roughness than the surface A7 of the conductor layer 78. This reduces the transmission loss of the RF signal passing through the antenna pattern ANT1. This is because the RF signal radiated from the antenna pattern ANT1 is concentrated on the surface A8 side. On the other hand, the surface A7 has a larger surface roughness, which improves adhesion to the insulating layer 17.

[0022] 3A to 3K are process diagrams for explaining a manufacturing method of the antenna module 100. FIG.

[0023] First, as shown in FIG. 3A , a through hole 51 is formed in an insulating layer 15, and then a conductive material such as Cu is formed over the entire surface, including the inner surface of the through hole 51. As a result, a conductor layer 75 is formed on the upper surface of the insulating layer 15, a conductor layer 76 is formed on the lower surface of the insulating layer 15, and a via conductor V22 is formed on the inner surface of the through hole 51. Next, as shown in FIG. 3B , the space surrounded by the via conductor V22 is filled with insulating resin 50, electroplating is performed, and the conductor layers 75 and 76 are patterned. As a result, a ground pattern G3 is formed on the conductor layer 75. Next, as shown in FIG. 3C , insulating layers 14 and 16 are formed to cover the conductor layers 75 and 76, respectively. Then, via conductors V21 and V23 are formed penetrating the insulating layers 14 and 16, respectively, and the conductor layers 74 and 77 located on the surfaces of the insulating layers 14 and 16, respectively, are patterned. As a result, a signal pattern S2 and a ground pattern G4 are formed on the conductor layer 74.

[0024] Here, in order to make the surface roughness of surface A3 of conductor layer 74 smaller than the surface roughness of surface A4 of conductor layer 74, conductor layer 74 may be formed by previously laminating copper foil having a small surface roughness of surface A3 and a large surface roughness of surface A4 onto insulating layer 14. In this case, after the copper foil constituting conductor layer 74 is laminated onto insulating layer 14, surface A3 of conductor layer 74 may be etched as necessary to adjust the surface roughness of surface A3 of conductor layer 74.

[0025] 3D , insulating layers 13 and 17 are formed to cover conductor layers 74 and 77, respectively. Via conductors V5 and V24 are then formed to penetrate insulating layers 13 and 17, respectively, and conductor layers 73 and 78 located on the surfaces of insulating layers 13 and 17, respectively, are patterned. As a result, a signal pattern S3 and a ground pattern G2 are formed on conductor layer 73, and an antenna pattern ANT1 is formed on conductor layer 78. The conductor layer 78 is covered with solder resist 22.

[0026] Here, to make the surface roughness of surface A5 of conductor layer 73 smaller than the surface roughness of surface A6 of conductor layer 73, conductor layer 73 may be formed by laminating copper foil having a small surface roughness of surface A5 and a large surface roughness of surface A6 on insulating layer 13 in advance. In this case, after laminating the copper foil constituting conductor layer 73 on insulating layer 13, surface A5 of conductor layer 73 may be etched as needed to adjust the surface roughness of surface A5 of conductor layer 73. Similarly, to make the surface roughness of surface A8 of conductor layer 78 smaller than the surface roughness of surface A7 of conductor layer 78, conductor layer 78 may be formed by laminating copper foil having a small surface roughness of surface A8 and a large surface roughness of surface A7 on insulating layer 17 in advance. In this case, after laminating the copper foil constituting conductor layer 78 on insulating layer 17, surface A8 of conductor layer 78 may be etched as needed to adjust the surface roughness of surface A8 of conductor layer 78.

[0027] Next, as shown in Fig. 3E, an insulating layer 12A is formed to cover the conductor layer 73, and then an electronic component 30 is mounted on the surface of the insulating layer 12A. Next, as shown in Fig. 3F, an insulating layer 12B and a conductor layer 72 are formed on the surface of the insulating layer 12A so as to embed the electronic component 30. Here, in order to make the surface roughness of the surface A1 of the conductor layer 72 smaller than the surface roughness of the surface A2 of the conductor layer 72, the insulating layer 12B with copper foil that constitutes the conductor layer 72 may be laminated on the surface of the insulating layer 12A, and then the surface A2 of the conductor layer 72 may be etched to roughen the surface of the conductor layer 72.

[0028] 3G, the conductor layer 72 formed on the surface of the insulating layer 12B is patterned, and the patterned conductor layer 72 is used as a mask to form via holes 61 and 62 in the insulating layers 12A and 12B. The via hole 61 penetrates the insulating layers 12A and 12B, and the conductor layer 73 is exposed at its bottom. The via hole 62 is positioned so as to overlap the electronic component 30, and a pad electrode is exposed at its bottom.

[0029] Next, as shown in FIG. 3H, the via holes 61 and 62 are filled with a conductive material, and the conductor layer 72 is patterned. This forms via conductors V1 and V3, and a signal pattern S1 and a ground pattern G1 are formed in the conductor layer 72. Next, as shown in FIG. 3I, an insulating layer 11 is formed to cover the conductor layer 72. Then, via conductors that penetrate the insulating layer 11 are formed, and the conductor layer 71 located on the surface of the insulating layer 11 is patterned. Next, as shown in FIG. 3J, the conductor layer 71 is covered with a solder resist 21, and then an opening 63 is formed in the solder resist 21 as shown in FIG. 3K. Then, by forming terminal electrodes in the openings 63, the structure shown in FIG. 2 can be obtained.

[0030] As described above, in the antenna module 100 according to this embodiment, the surface roughness of the signal patterns S1-S3 and the antenna pattern ANT1 through which RF signals flow is reduced on the side where the current density is high. For example, the surface roughness of the signal pattern S1 and the signal pattern S2 electrically connected to S1 through the via conductor V1 is reduced on the side where the current density is high, relative to the ground pattern of the electronic component 30 (specifically, the ground pattern formed in the rewiring layer 32). This reduces the transmission loss of the RF signal. Meanwhile, the surface roughness of the signal patterns S1-S3 and the antenna pattern ANT1 through which RF signals flow is reduced on the side where the current density is low, ensuring adhesion to the insulating layer. Moreover, because the signal pattern S2 is shielded by the upper and lower ground patterns G2 and G3, crosstalk between the antenna patterns ANT1-ANT4 via the signal pattern S2 is also reduced.

[0031] FIG. 4 is a schematic partial cross-sectional view of an antenna module according to a modified example.

[0032] The antenna module according to the modified example shown in FIG. 4 differs from the structure shown in FIG. 2 in that the insulating layer 14 is thinner than the insulating layer 13. In this case, the surface A4 of the conductor layer 74 may have a smaller surface roughness than the surface A3 of the conductor layer 74. This reduces the transmission loss of the RF signal passing through the signal pattern S2. This is because, when the insulating layer 14 is thinner than the insulating layer 13, the distance T14 between the surface A4 of the signal pattern S2 and the ground pattern G2 is shorter than the distance T13 between the surface A3 of the signal pattern S2 and the ground pattern G3, resulting in a lower impedance on the surface A4 side than the impedance on the surface A3 side. On the other hand, the surface roughness of the surface A3 is greater, thereby enhancing adhesion to the insulating layer 13.

[0033] The above describes embodiments of the technology according to the present disclosure, but the technology according to the present disclosure is not limited to the above embodiments, and various modifications are possible within the scope of the gist of the technology, and it goes without saying that these modifications are also included within the scope of the technology according to the present disclosure.

[0034] The technology according to the present disclosure includes, but is not limited to, the following configuration examples.

[0035] According to one aspect of the present disclosure, there is provided an antenna module comprising: a multilayer substrate having a plurality of conductor layers and a plurality of insulating layers alternately stacked; and an electronic component having a plurality of pad electrodes including a signal pad provided on a main surface side thereof, the plurality of insulating layers including a first insulating layer in which the electronic component is embedded, the plurality of conductor layers including a first internal conductor layer and an antenna layer, the first internal conductor layer including a first signal pattern having one end electrically connected to the signal pad and at least a portion facing the main surface of the electronic component via the first insulating layer, the antenna layer including an antenna pattern electrically connected to the other end of the first signal pattern, the first signal pattern having a first surface facing the main surface of the electronic component and a second surface opposite the first surface, the first surface having a surface roughness smaller than that of the second surface, thereby enabling to reduce transmission loss between the electronic component and the antenna pattern while ensuring adhesion between the conductor layer and the insulating layer.

[0036] In the antenna module, the plurality of conductor layers may further include a second internal conductor layer, and the second internal conductor layer may include a second signal pattern having one end electrically connected to the other end of the first signal pattern through a first via conductor that penetrates the first insulating layer and the other end electrically connected to the antenna pattern through a second via conductor, thereby enabling the antenna pattern to be disposed on the back surface side of the electronic component.

[0037] In the antenna module described above, the antenna pattern has a seventh surface located on the side contacting the second via conductor and an eighth surface located opposite the seventh surface. The back surface located opposite the main surface of the electronic component and the seventh surface of the antenna pattern may face each other, and the main surface of the electronic component and the eighth surface of the antenna pattern may face opposite each other. This suppresses interference between the antenna pattern and the signal pads of the electronic component, thereby enabling stable antenna characteristics to be obtained. In this case, the eighth surface may have a smaller surface roughness than the seventh surface. This reduces transmission loss of RF signals flowing through the antenna pattern.

[0038] In the antenna module, the plurality of conductor layers may further include a third internal conductor layer located between the second internal conductor layer and the first insulating layer and a fourth internal conductor layer located between the second internal conductor layer and the antenna layer, the plurality of insulating layers may further include a second insulating layer located between the second internal conductor layer and the third internal conductor layer and a third insulating layer located between the second internal conductor layer and the fourth internal conductor layer, the third internal conductor layer may include a first ground pattern overlapping the second signal pattern in a plan view, the fourth internal conductor layer may include a second ground pattern overlapping the second signal pattern in a plan view, the plurality of pad electrodes may further include ground pads, and the first ground pattern, the second ground pattern, and the ground pads may be electrically connected to each other, thereby shielding the second signal pattern by being sandwiched between the first ground pattern and the second ground pattern.

[0039] In the above antenna module, the second insulating layer may be thinner than the third insulating layer, and the surface of the second signal pattern may have a third surface in contact with the second insulating layer and a fourth surface in contact with the third insulating layer, where the third surface may have a surface roughness less than that of the fourth surface. This reduces transmission loss of the RF signal flowing through the second signal pattern. Alternatively, the third insulating layer may be thinner than the second insulating layer, and the surface of the second signal pattern may have a third surface in contact with the second insulating layer and a fourth surface in contact with the third insulating layer, where the fourth surface may have a surface roughness less than that of the third surface. This reduces transmission loss of the RF signal flowing through the second signal pattern.

[0040] In the antenna module, the second and third insulating layers may be made of a material having a smaller dielectric tangent than the first insulating layer, thereby further reducing the transmission loss of the RF signal flowing through the second signal pattern.

[0041] In the antenna module, the third internal conductor layer further includes a third signal pattern, the third signal pattern being connected to the other end of the first signal pattern through the first via conductor and to one end of the second signal pattern through the third via conductor, the third signal pattern having a fifth surface facing the first insulating layer and a sixth surface opposite the fifth surface, the fifth surface having a surface roughness smaller than that of the sixth surface, thereby reducing transmission loss of an RF signal flowing through the third signal pattern.

[0042] This application claims the benefit of Japanese Patent Application No. 2024-067207, filed on April 18, 2024, the entire disclosure of which is incorporated herein by reference.

[0043] 10 Multilayer substrate 11 to 17, 12A, 12B Insulating layer 21, 22 Solder resist 30 Electronic component 31 Main surface 32 Rewiring layer 33 Back surface 41 Signal terminal 42 Ground terminal 50 Insulating resin 51 Through hole 61, 62 Via hole 63 Opening 71 to 78 Conductive layer 100 Antenna module 101 Back surface of antenna module 102 Front surface of antenna module A1 to A8 Front surface of conductive layer ANT1 to ANT4 Antenna pattern G1 to G4 Ground pattern P1, P2 Signal pad P3 Ground pad S1 to S3 Signal pattern V1 to V8, V21 to V24 Via conductor

Claims

1. An antenna module comprising: a multilayer substrate in which a plurality of conductor layers and a plurality of insulating layers are alternately stacked; and an electronic component having a plurality of pad electrodes including signal pads provided on its main surface side, wherein the plurality of insulating layers includes a first insulating layer in which the electronic component is embedded, the plurality of conductor layers including a first internal conductor layer and an antenna layer, the first internal conductor layer including a first signal pattern having one end electrically connected to the signal pad and at least a portion of which faces the main surface of the electronic component via the first insulating layer, the antenna layer including an antenna pattern electrically connected to the other end of the first signal pattern, the surface of the first signal pattern having a first surface located on the side facing the main surface of the electronic component and a second surface located opposite the first surface, and the first surface having a smaller surface roughness than the second surface.

2. The antenna module according to claim 1, wherein the plurality of conductor layers further include a second internal conductor layer, and the second internal conductor layer includes a second signal pattern having one end electrically connected to the other end of the first signal pattern through a first via conductor that penetrates the first insulating layer, and the other end electrically connected to the antenna pattern through a second via conductor.

3. The antenna module described in claim 2, wherein the antenna pattern has a seventh surface located on the side in contact with the second via conductor and an eighth surface located opposite the seventh surface, the back surface located opposite the main surface of the electronic component and the seventh surface of the antenna pattern face each other, and the main surface of the electronic component and the eighth surface of the antenna pattern face in opposite directions.

4. The antenna module according to claim 3, wherein the eighth surface has a surface roughness less than that of the seventh surface.

5. The antenna module according to any one of claims 2 to 4, wherein the plurality of conductor layers further include a third internal conductor layer located between the second internal conductor layer and the first insulating layer, and a fourth internal conductor layer located between the second internal conductor layer and the antenna layer, the plurality of insulating layers further include a second insulating layer located between the second internal conductor layer and the third internal conductor layer, and a third insulating layer located between the second internal conductor layer and the fourth internal conductor layer, the third internal conductor layer includes a first ground pattern that overlaps with the second signal pattern in a planar view, the fourth internal conductor layer includes a second ground pattern that overlaps with the second signal pattern in a planar view, the plurality of pad electrodes further include ground pads, and the first ground pattern, the second ground pattern, and the ground pads are electrically connected to each other.

6. The antenna module according to claim 5, wherein the second insulating layer is thinner than the third insulating layer, the surface of the second signal pattern has a third surface in contact with the second insulating layer and a fourth surface in contact with the third insulating layer, and the third surface has a smaller surface roughness than the fourth surface.

7. The antenna module according to claim 5, wherein the third insulating layer is thinner than the second insulating layer, the surface of the second signal pattern has a third surface in contact with the second insulating layer and a fourth surface in contact with the third insulating layer, and the fourth surface has a surface roughness smaller than that of the third surface.

8. The antenna module according to claim 5, wherein the second and third insulating layers are made of a material having a smaller dielectric tangent than the first insulating layer.

9. The antenna module described in claim 5, wherein the third internal conductor layer further includes a third signal pattern, the third signal pattern being connected to the other end of the first signal pattern through the first via conductor and to the one end of the second signal pattern through a third via conductor, the surface of the third signal pattern having a fifth surface located on the side facing the first insulating layer and a sixth surface located on the opposite side to the fifth surface, and the fifth surface having a surface roughness smaller than that of the sixth surface.

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