Power supply circuit and power supply chip

Abstract

Provided in the present invention are a power supply circuit and a power supply chip. The power supply circuit comprises a logic sub-circuit and a driving sub-circuit, the driving sub-circuit being used for driving a power transistor, and the logic sub-circuit and the driving sub-circuit being connected in series to share at least part of a current. In such configuration, by means of a series power supply mode, part of the current required by the logic circuit and the current required by the driving circuit are shared, so that an inherent circuit loss in a chip is greatly reduced, thereby implementing optimization in the aspect of circuit structure to reduce the power consumption of the chip itself. Moreover, in some of the embodiments of the present invention, a specified design is made for new conditions that may occur in the series connection mode, thereby further improving the reliability and practicability of the present invention.

Description

Power supply circuit and power chip Technical Field

[0001] This invention relates to the field of power chip technology, and in particular to a power circuit and a power chip. Background Technology

[0002] Switching power supply chips are mainly used to transform power, such as boost, buck, or buck-boost. The internal power transistors are generally power transistors or power MOSFETs. For buck switching power supplies, the MOSFETs integrated inside the chip are divided into PMOS and NMOS power transistors, corresponding to two different driving circuits. There are various technical solutions to improve the conversion efficiency of power supply chips, and reducing the power consumption of the chip itself is the mainstream technical solution at present.

[0003] Currently, the common optimization approach is to improve the electrical parameters of certain electrical components through selection, while optimization solutions that modify the circuit structure of power supply chips are relatively rare. In other words, existing technologies lack technical solutions that optimize the chip's power consumption from a circuit structure perspective.

[0004] Summary of the Invention

[0005] The purpose of this invention is to provide a power supply circuit and a power supply chip that optimizes the circuit structure to reduce the chip's own power consumption.

[0006] To address the aforementioned technical problems, the present invention provides a power supply circuit, which includes a logic sub-circuit and a driver sub-circuit, wherein the driver sub-circuit is used to drive a power transistor; the logic sub-circuit and the driver sub-circuit are connected in series and share at least a portion of the current.

[0007] The driving sub-circuit is used to charge the clamping capacitor. The amount of electricity stored in the clamping capacitor is used to quickly charge the parasitic capacitance of the power transistor, thereby achieving the purpose of quickly turning on the power transistor. The logic sub-circuit and the driving sub-circuit reuse at least 90% of the charging current of the clamping capacitor.

[0008] Optionally, the driving sub-circuit includes a first voltage terminal, a second voltage terminal, and a current output terminal. The first voltage terminal is used to connect to the input voltage, and the clamping capacitor is connected between the first voltage terminal and the second voltage terminal.

[0009] When the power transistor is working normally, at least 90% of the charging current flows sequentially through the first voltage terminal, the clamping capacitor, the second voltage terminal, the current output terminal, and the logic sub-circuit.

[0010] Optionally, the driving sub-circuit includes a clamping module; the first voltage terminal, the second voltage terminal, and the current output terminal are all subordinate to the clamping module, and the clamping module includes a first current output unit and a second current output unit, wherein the output terminals of the first current output unit and the second current output unit are connected to form the current output terminal.

[0011] The first current output unit is used to transmit at least 90% of the charging current to the logic sub-circuit when the power transistor is working normally; the second current output unit is used to provide operating current to the logic sub-circuit when the power transistor is not working normally.

[0012] Optionally, the first current output unit is further configured to stop the operation of the second current output unit or reduce the energy consumption of the second current output unit when the power transistor is operating normally.

[0013] Optionally, the first current output unit includes a first Zener diode, a first switching element, and a first constant current source. The cathode of the first Zener diode is connected to the first voltage terminal, the input terminal of the first switching element is connected to the second voltage terminal, the control terminal of the first switching element is connected to the anode of the first Zener diode, the output terminal of the first switching element is configured as the output terminal of the first current output unit, the input terminal of the first constant current source is connected to the control terminal of the first switching element, and the output terminal of the first constant current source is used for grounding.

[0014] When the voltage difference between the control terminal and the input terminal of the first switching element reaches a preset value, the first switching element is turned on; otherwise, it is turned off.

[0015] Optionally, the second current output unit includes a second Zener diode and a second switching element; the cathode of the second Zener diode is connected to the first voltage terminal, the anode of the second Zener diode is connected to the control terminal of the second switching element, the input terminal of the second switching element is connected to the first voltage terminal, and the output terminal of the second switching element is configured as the output terminal of the second current output unit.

[0016] When the voltage difference between the control terminal and the input terminal of the second switching element reaches a preset value, the second switching element is turned on; otherwise, it is turned off.

[0017] The first voltage is greater than the second voltage, wherein the first voltage is the voltage at the output terminal of the first switching element when it is turned on, and the second voltage is the voltage at the output terminal of the second switching element when the first switching element is turned off and the second switching element is turned on.

[0018] Optionally, the clamping module further includes a third current output unit; when the charging current is higher than the normal operating current of the logic sub-circuit, the third current output unit is used to directly output a portion of the charging current to ground, so that the remaining portion of the charging current matches the logic sub-circuit.

[0019] Optionally, the third current output unit includes a third switching element and a control component; the connection terminals of the third switching element are respectively connected to the second voltage terminal and ground.

[0020] The control component is configured to control the switching element to turn on when the third switching element is off and the voltage difference between the first voltage terminal and the second voltage terminal is less than a first voltage difference; and to control the third switching element to turn off when the switching element is on and the voltage difference between the first voltage terminal and the second voltage terminal is greater than a second voltage difference; the first voltage difference and the second voltage difference are set based on the voltage required for the power transistor to operate normally, and the first voltage difference is less than the second voltage difference.

[0021] To address the aforementioned technical problems, the present invention also provides a power chip, which includes the power circuit described above.

[0022] Compared with existing technologies, the power supply circuit and power chip provided by this invention include a logic sub-circuit and a driver sub-circuit, wherein the driver sub-circuit is used to drive a power transistor; the logic sub-circuit and the driver sub-circuit are connected in series to reuse at least a portion of the current. This configuration, through a series power supply mode, reuses the current required by the logic circuit and the current required by the driver circuit, greatly reducing the inherent circuit losses within the chip; it also optimizes the circuit structure and reduces the chip's own power consumption. Some embodiments of this invention have been specifically designed to address new situations that may arise in the series mode, further improving the reliability and practicality of this invention. Attached Figure Description

[0023] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0024] Figure 1 is a schematic diagram of the internal structure of a power chip in the prior art;

[0025] Figure 2 is a schematic diagram of the internal structure of a power chip according to an embodiment of the present invention;

[0026] Figure 3 is a schematic diagram of the internal structure of the clamping module according to an embodiment of the present invention;

[0027] Figure 4 is a schematic diagram of the internal structure of the clamping module according to another embodiment of the present invention.

[0028] in:

[0029] 100 - Power chip; 200 - Power chip;

[0030] 1-Logic sub-circuit; 2-Driver sub-circuit; 3-Power transistor; 4-Driver sub-circuit; 101-Startup and voltage regulation module; 102-Logic function module; 103-Clamping module; 104-Driver module; 203-Clamping module; 1021-Error amplifier; 1022-Compensation unit; 1023-Comparator; 1024-Oscillator; 1025-Overcurrent protection unit; 1026-Latch; 1027-Overtemperature protection unit;

[0031] 2031 - First voltage terminal; 2032 - Second voltage terminal; 2033 - Current output terminal; 2034 - First current output unit; 2035 - Second current output unit; 2036 - Third current output unit; 2037 - Control component. Detailed Implementation

[0032] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.

[0033] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; and the term “at least two” is generally used to mean “two or more”. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature. “One end” and “the other end,” as well as “proximal end” and “distal end,” generally refer to two corresponding parts, including not only endpoints. The terms “installed,” “connected,” and “joined” should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral part; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two elements or an interaction between two elements. Furthermore, as used in this invention, the phrase "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of the other element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0034] The core idea of ​​this invention is to provide a power supply circuit and a power supply chip that optimizes the circuit structure to reduce the chip's own power consumption.

[0035] The following description refers to the accompanying drawings.

[0036] In order to provide the power supply circuit design in this embodiment, the inventors first conducted an in-depth analysis of the prior art.

[0037] Please refer to Figure 1, which shows the power circuit in an existing power chip 100. The power circuit includes a logic sub-circuit 1 and a driver sub-circuit 2. The logic sub-circuit 1 includes a startup and voltage regulation module 101 and a logic function module 102. The driver sub-circuit 2 includes a clamping module 103 and a driver module 104. The logic function module 102 specifically includes an error amplifier 1021, a compensation unit 1022, a comparator 1023, an oscillator 1024, an overcurrent protection unit 1025, a latch 1026, and an overtemperature protection unit 1027. The specific functions of the above units and modules can be understood from their names. The driver sub-circuit 2 is used to drive the power transistor 3.

[0038] The power chip 100 also includes a power transistor 3, a VIN port, a VC port, a SW port, a GND port, and an FB port. The VC and VIN ports are used to connect to the clamping capacitor CC, the SW port is used for output voltage, the FB port is used to obtain the feedback voltage, and the GND port is used for grounding. The VIN port is also used to obtain the input power.

[0039] The existing power chip 100 has its internal logic sub-circuit 1 and driver sub-circuit 2 connected in parallel for power supply. The losses of the two modules constitute the inherent losses of the chip; the chip has large losses.

[0040] The chip's power consumption is relatively high; its output power is relatively low under high voltage conditions because the chip itself consumes more power and generates higher temperatures. As the output power increases, the temperature generated by conversion losses further increases the chip temperature, causing it to overheat and affecting reliability. Therefore, the output power is generally low under high input voltage conditions. To improve efficiency under light load conditions, the switching frequency is typically reduced to decrease the inherent losses in the power transistor drive circuit, thereby improving efficiency. However, reducing the switching frequency increases the system's output voltage ripple and results in poor transient load response, affecting chip performance.

[0041] To improve the conversion efficiency of chip-based power systems under light load conditions, reduce chip temperature, and increase chip output power under high input voltage conditions, it is urgent to further reduce the inherent power consumption of the chips.

[0042] Please refer to Figure 2. This embodiment provides a power chip 200, which includes a power circuit. The power circuit includes a logic sub-circuit 1 and a driver sub-circuit 4. The driver sub-circuit 4 is used to drive the power transistor 3. The logic sub-circuit 1 and the driver sub-circuit 4 are connected in series to multiplex at least a portion of the current.

[0043] In Figure 2, only the clamping module 203 and the clamping module 103 are different; the names, functions, and internal structures of the other modules can be understood according to the content of Figure 1. Furthermore, the connection relationships between the modules in Figure 2 and Figure 1 are also different. In Figure 1, the startup and voltage regulation module 101 draws power from the VIN port; in Figure 2, the startup and voltage regulation module 101 draws power from the current output terminal of the clamping module 203.

[0044] The drain-source breakdown voltage of the MOSFET (i.e., power transistor 3) is relatively high, but the gate-source breakdown voltage is generally below 20V. For high-voltage power supply chips, a dedicated MOSFET driver circuit is required to quickly turn the power transistor on or off. The CISS (input capacitance, parasitic capacitance) or COSS (output capacitance, parasitic capacitance) of the power MOSFET is relatively large. If the power MOSFET needs to be turned on or off quickly, the gate-source of the MOSFET needs to be charged at the moment of turn-on, with the peak current in the hundreds of mA range, to control the gate-source voltage difference of the MOSFET at a preset value. After the power transistor is turned on, only a very low current is needed to maintain the gate-source voltage difference of the MOSFET. When the power MOSFET needs to be turned off, the gate-source of the MOSFET needs to be discharged quickly. Therefore, the power transistor consumes a fixed current in one switching cycle, and the average value of its current consumption is related to the parasitic capacitance of the MOSFET.

[0045] The current mainstream technology involves supplying power to the logic sub-circuits and driver sub-circuits separately within the chip. The drawback is that both circuits incur losses, and these inherent losses affect the chip's conversion efficiency, especially under light load and high input voltage conditions. To improve the conversion efficiency of power supply chips, efforts are made to continuously reduce the inherent power consumption of the internal logic circuits and also to minimize the losses in the power transistor driver circuits. However, when a power supply chip needs to be compatible with wide voltage, high current output, and high power transistor output schemes, there is a minimum limit to the losses in the internal logic circuits or power transistor driver circuits. Below this limit, the chip cannot function properly.

[0046] This embodiment provides an innovative circuit topology that uses a series power supply mode to multiplex the current required by the logic sub-circuit and the driver sub-circuit, greatly reducing the inherent circuit losses within the chip. When the chip's own power consumption is reduced, its performance under high input voltage conditions is significantly improved (the chip's own losses equal the product of the input voltage and the quiescent current; reducing the current greatly reduces power consumption under high input voltage conditions, lowers chip heat generation, and improves the chip's output power and stability under high input voltage conditions). Simultaneously, it also improves the chip's conversion efficiency under light load conditions (under light load conditions, the output power is relatively low, and the chip's own power consumption accounts for a relatively large proportion; therefore, reducing the chip's power consumption has a significant impact on efficiency).

[0047] Specifically, the driving sub-circuit 4 is used to charge the clamping capacitor CC. The amount of electricity stored in the clamping capacitor CC is used to quickly charge the parasitic capacitance of the power transistor 3, thereby achieving the purpose of quickly turning on the power transistor. The logic sub-circuit 1 and the driving sub-circuit 4 reuse at least 90% of the charging current of the clamping capacitor CC.

[0048] The charging current here should be understood as the average current, and 90% should be understood as 90% over a larger time scale, not necessarily a fixed percentage at every instant. Generally, with reasonable parameter selection, the following can be achieved: when the power chip is operating stably, the charging current is exactly equal to the operating current of the startup and voltage regulator module 101. However, under specific operating conditions (e.g., startup conditions), or when the same power chip is used in different circuits, the charging current may be greater than or less than the operating current of the startup and voltage regulator module 101. When it is greater, additional charging current needs to be supplemented in other ways (or, in other words, released in other ways). When it is less, additional operating current needs to be supplemented in other ways.

[0049] This embodiment achieves current reuse, eliminating the current loss of one path, greatly reducing the inherent losses of the chip, improving the output power of the chip under high input voltage conditions and the conversion efficiency under light load conditions, and greatly improving the performance of power supply chips with input voltage of 8-120V.

[0050] The principle of the circuit is as follows:

[0051] The minimum current required for a logic sub-circuit to operate is generally a fixed value. It can operate when the current is greater than or equal to this value. Logic circuits are typically used to detect parameters such as output voltage, current, and operating temperature, and to control the power transistor drive module to ensure normal chip operation. There are no special requirements for the supply voltage; the operating voltage is generally quite low (around 2-3V, much lower than the chip's input voltage). Once the internal power transistor is determined, the current required to drive it is also generally a fixed value. When the current provided by the drive module is greater than or equal to this current, the power transistor can be quickly turned on and off. For buck converter chips, one end of the internal power transistor is connected to the chip's input pin (this voltage range is relatively wide, ranging from 8-120V). As is well known, as long as the gate-source voltage difference of the MOSFET is controlled within a preset value (Vgs, whose absolute value is generally greater than 5V), it can be turned on; when the gate-source voltage difference is 0, it can be turned off. Therefore, the supply voltage of the drive sub-circuit is relatively high, generally lower than VIN or higher than Vgs. The driver sub-circuit operates at high voltage, while the logic driver sub-circuit operates at low voltage. The two sub-circuits can be connected in series (as long as the input voltage is greater than 8V, it can work; assuming the logic sub-circuit operates at 3V, the voltage difference between the clamping module 203 in the driver sub-circuit and VIN is controlled at around 5V; after being connected in series, as long as the input voltage is greater than or equal to 8V, the voltages of the two modules can be established normally, and all modules within the chip can work normally). For high-voltage chips (operating voltage greater than 60V), the application scenarios are generally 12V and above, and there are basically no fields that need to be compatible with 5V input; therefore, the chip using this solution has no problem operating in the 8-120V range.

[0052] Please refer to Figure 2. The driving sub-circuit includes a first voltage terminal 2031, a second voltage terminal 2032, and a current output terminal 2033. The first voltage terminal 2031 is used to connect to the input voltage VIN. The clamping capacitor is connected between the first voltage terminal 2031 and the second voltage terminal 2032.

[0053] When the power transistor is working normally, at least 90% of the charging current flows sequentially through the first voltage terminal 2031, the clamping capacitor CC, the second voltage terminal 2032, the current output terminal 2033, and the logic sub-circuit 1.

[0054] Please refer to Figure 3. The driving sub-circuit includes a clamping module 203. The first voltage terminal, the second voltage terminal, and the current output terminal are all subordinate to the clamping module 203. The clamping module includes a first current output unit 2034 and a second current output unit 2035. The output terminals of the first current output unit 2034 and the second current output unit 2035 are connected to form the current output terminal 2033.

[0055] The first current output unit is used to transfer at least 90% of the charging current to the logic sub-circuit (represented by I1 in Figure 3) when the power transistor is working normally; the second current output unit is used to provide operating current to the logic sub-circuit when the power transistor is not working normally (represented by I2 in Figure 3).

[0056] Preferably, the first current output unit is also used to stop the operation of the second current output unit or reduce the energy consumption of the second current output unit when the power transistor is operating normally.

[0057] In one specific embodiment, the first current output unit includes a first Zener diode DZ1, a first switching element Q1, and a first constant current source S1. The cathode of the first Zener diode DZ1 is connected to the first voltage terminal 2031, the input terminal of the first switching element Q1 is connected to the second voltage terminal 2032, the control terminal of the first switching element Q1 is connected to the output terminal of the first Zener diode, the output terminal of the first switching element Q1 is configured as the output terminal of the first current output unit 2034, the input terminal of the first constant current source S1 is connected to the control terminal of the first switching element Q1, and the output terminal of the first constant current source S1 is used for grounding.

[0058] When the voltage difference between the control terminal and the input terminal of the first switching element Q1 reaches a preset value, the first switching element is turned on; otherwise, it is turned off. For example, when Q1 is a PNP transistor, theoretically, Q1 will only turn on when the voltage difference between point D and point C is greater than 0.7V; at this time, 0.7V is the preset value.

[0059] The second current output unit includes a second Zener diode DZ2, a second switching element Q2, and a second constant current source S2. The cathode of the second Zener diode DZ2 is connected to the first voltage terminal 2031, the anode of the second Zener diode DZ2 is connected to the control terminal of the second switching element Q2, the input terminal of the second switching element Q2 is connected to the first voltage terminal 2031, and the output terminal of the second switching element Q2 is configured as the output terminal of the second current output unit 2035. The second constant current source S2 is connected between the control terminal of the second switching element Q2 and ground. Alternatively, the second constant current source S2 may not be provided.

[0060] When the voltage difference between the control terminal and the input terminal of the second switching element Q2 reaches a preset value, the second switching element Q2 is turned on; otherwise, it is turned off.

[0061] The first voltage is greater than the second voltage, wherein the first voltage is the voltage at the output terminal of the first switching element when it is turned on, and the second voltage is the voltage at the output terminal of the second switching element when the first switching element is turned off and the second switching element is turned on. With this configuration, when the first switching element is turned on, the voltage at the output terminal of the second switching element cannot reach the turn-on voltage of the second switching element; therefore, the second current output unit can be turned off.

[0062] In a preferred embodiment, the first switching element is a PNP transistor and the second switching element is an NPN transistor. In another preferred embodiment, the first switching element is a PMOS transistor and the second switching element is an NMOS transistor. This configuration results in a simple structure and eliminates the need for additional auxiliary components to adjust the voltage at each position.

[0063] To provide a stable voltage and transient current (a large transient current is required when the power transistor is turned on) to the chip driver module, a clamping capacitor CC is added externally to the chip. This ensures that the voltage at pin VC is lower than the voltage at pin VIN by a preset value Vgs. This can be understood as being achieved through DZ1, Q1, and a constant current source S1. The principle is that when the voltage difference between VIN and VC is greater than VDZ1 + VBE, Q1 is turned off (Q1 is a PNP transistor; Q1 is turned on when the voltage at point D is higher than VBE by point C, and turned off when it is lower than VBE). The current I1 is 0, and the CC capacitor is no longer charged. The voltage at the right electrode of CC no longer decreases, and the voltage difference between VC and VIN stabilizes at a fixed value. When the internal power transistor is turned on, the CC capacitor charges the parasitic capacitance at the gate and source of the power transistor, consuming the CC charge. The right electrode of the CC capacitor... The board voltage begins to rise (VIN on the left plate, which remains unchanged by default), at which point Q1 turns on and the I1 current recovers. When the chip is working, the power transistor periodically turns on and off, and the CC capacitor is constantly charging and discharging, so I1 is a stable current. Through reasonable design, it can be ensured that when the current required by the startup and voltage regulation module 101 is exactly equal to I1, the I1 current can ensure the normal operation of the entire logic sub-circuit. The logic sub-circuit no longer needs to draw power from the VIN terminal of the chip, which is equivalent to reducing the inherent power consumption of the chip by half compared to the existing solution.

[0064] Considering that during the initial power-on period or when the chip is repeatedly plugged in and out, the charge of the CC capacitor ensures that the voltage difference between its two ends is VDZ1+VBE. At this time, Q1 is off, the I1 current is 0, the logic sub-circuit cannot work, the power transistor drive circuit will not work without a control signal, and the chip is in a locked state. In order to solve the above problems, a second current output unit composed of DZ2, Q2 and constant current source S2 is added. The principle is as follows: When encountering the aforementioned problems during the initial power-on phase, the I2 current can provide the necessary current for the startup and voltage regulation module 101, ensuring the normal operation of the logic circuit and the normal switching of the chip's power transistors. At this time, the I1 current can be established normally. When DZ2 = DZ1, the voltage at point A equals the voltage at point C. Since Q2 is an NPN transistor and Q1 is a PNP transistor, and transistors Q1 and Q2 operate in the saturation region, the voltage difference between CE is relatively small. Therefore, the voltage at point B is less than the voltage at point E. That is, after I1 is established normally, I2 will basically no longer supply power to the startup and voltage regulation module 101, and the I2 current approaches zero, thus avoiding additional losses.

[0065] Additionally, when using power MOSFETs with low parasitic capacitance (small parasitic capacitance of MOSFETs means a smaller current required to turn the MOSFET on and off, i.e., a reduced I1), the I1 current may be too low to meet the current required for the normal operation of the logic sub-circuit. DZ2, Q2, and the second constant current source S2 can then supplement the current (since Q2 is an NPN transistor, the constant current source S2 can be removed as needed, and Q2 can still operate without adding an additional constant current source). Since the voltage at point B is lower than the voltage at point E, the logic sub-circuit will preferentially use the I1 current, and the I2 current is only used as a compensation current. The entire chip can still reduce the I1 current loss, and it is still a series power supply, reducing the chip's power consumption.

[0066] When the power transistor is turned off by an external voltage, such as by applying a high voltage to the FB pin of the chip, the internal MOSFET of the chip can be turned off. At this time, the I1 current approaches 0, and the I2 current is needed to power the logic module to maintain the normal function of the chip. When the external voltage applied to the FB pin is removed, the chip resumes normal operation, the power transistor operates at the predetermined frequency, and I2 will approach 0. I1 will then power all modules, still in series, reducing the chip's power consumption.

[0067] Please refer to Figure 4. In a preferred embodiment, the clamping module 203 further includes a third current output unit 2036. When the charging current is higher than the current at which the logic sub-circuit is operating normally, the third current output unit is used to directly output a portion of the charging current to ground, so that the remaining portion of the charging current matches the logic sub-circuit.

[0068] In one specific embodiment, the third current output unit 2036 includes a third switching element Q3 and a control component 2037; the connection terminal of the third switching element Q3 is connected to the second voltage terminal and ground, respectively.

[0069] The control component 2037 is configured to: control the third switching element Q3 to turn on when the third switching element Q3 is off and the voltage difference between the first voltage terminal and the second voltage terminal is less than a first voltage difference; and control the third switching element Q3 to turn off when the third switching element Q3 is on and the voltage difference between the first voltage terminal and the second voltage terminal is greater than a second voltage difference. The first voltage difference and the second voltage difference are set based on the voltage required for the power transistor to operate normally, and the first voltage difference is less than the second voltage difference. For example, the first voltage difference corresponds to the minimum voltage of the clamping capacitor allowed when the power transistor is operating normally; the second voltage difference corresponds to the maximum voltage of the clamping capacitor allowed when the power transistor is operating normally.

[0070] The third switching element Q3 can be a PNP transistor, and the third current output unit 2036 can also include a third Zener diode DZ3, which is disposed between the first voltage terminal and the control terminal of the switching element. The specific internal structure of the control component can be configured according to actual needs, and the number of ports and connection relationships of the control component can be configured according to actual needs (for example, as shown in Figure 4), which will not be described in detail here.

[0071] The clamping module 203 shown in Figure 4 can be compatible with more combinations. For some power MOSFETs with large parasitic capacitances, the current required to turn on the power MOSFET will be relatively increased. However, the current consumed by the logic drive module is basically fixed. Since I1 needs to pass through the logic sub-circuit to finally flow to ground, if the current consumed by the logic sub-circuit is less than the loss of the MOSFET drive circuit, the discharge current of CC will be greater than the charging current of I1. As a result, the charge of CC will continuously decrease, and the voltage difference across CC will continuously decrease. When the voltage difference is less than a certain value, the power MOSFET cannot be turned on. To avoid the above situation, DZ3, Q3, and control component 2037 are added. When the voltage of the right plate of CC is detected to be lower than a certain value, Q3 is turned on. The current I3 can charge the clamping capacitor CC. Since the voltage of DZ3 is less than that of DZ1, and Q3 is turned on periodically, the main power consumption of the power chip is still I1. After the chip is working normally, I2 approaches 0, and I3 is a periodic small current. At this time, the charging current of CC can be understood as I1 + I3.

[0072] Please refer to Figure 1. In the existing technical solution, the internal logic circuit and the power transistor driving section are connected in parallel. The current of the chip logic section is IQ1, which is provided by the input power supply. The current of the power transistor driving section is IQ2, which is provided by the input power supply. Therefore, the inherent power consumption of the chip is VIN*(IQ1+IQ2).

[0073] Please refer to Figure 2. Using the series power supply mode of the present invention, the static current IQ3 of the chip is provided by the power transistor driving section IQ3. The power transistor driving section IQ3 is provided by the input power supply. Therefore, the inherent power consumption generated by the chip is VIN*IQ3.

[0074] For example, in actual calculations: IQ1 = 0.5mA, IQ2 = 0.5mA, IQ3 = 0.5mA; under the condition of 100V input and no-load output:

[0075] The inherent loss of the present invention is 100V * 0.5mA = 50mW.

[0076] Traditional solution: 100V*(0.5mA+0.5mA)=100mW.

[0077] Compared to traditional solutions, the chip significantly reduces its inherent power consumption, which can greatly improve the conversion efficiency under light load conditions, reduce chip heat generation, and improve output power and reliability under high input voltage conditions.

[0078] In summary, this embodiment provides a power supply circuit and a power supply chip. The power supply circuit includes a logic sub-circuit and a driver sub-circuit, the driver sub-circuit being used to drive a power transistor; the logic sub-circuit and the driver sub-circuit are connected in series to multiplex at least a portion of the current. This configuration, through a series power supply mode, multiplexes the current required by the logic circuit and the current required by the driver circuit, greatly reducing the inherent circuit losses within the chip; it also optimizes the circuit structure and reduces the chip's own power consumption. Subsequent preferred embodiments incorporate targeted designs to address potential new situations arising from the series mode, further improving the reliability and practicality of the present invention.

[0079] The beneficial effects of this embodiment are as follows: the internal circuit modules of the chip are connected in series for power supply, resulting in a simple circuit structure; the current generated when the internal power transistor drive module and the external clamping capacitor (energy storage, providing transient current) are working is used to provide current to the internal logic circuit modules of the chip, current reuse eliminates one current loss; and the power consumption of the internal power supply of the chip is reduced.

[0080] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.

Claims

1. A power supply circuit, characterized in that, The power supply circuit includes a logic sub-circuit and a driver sub-circuit, the driver sub-circuit being used to drive the power transistor; the logic sub-circuit and the driver sub-circuit are connected in series to multiplex at least a portion of the current. The driving sub-circuit is used to charge the clamping capacitor. The amount of electricity stored in the clamping capacitor is used to quickly charge the parasitic capacitance of the power transistor, thereby achieving the purpose of quickly turning on the power transistor. The logic sub-circuit and the driving sub-circuit reuse at least 90% of the charging current of the clamping capacitor.

2. The power supply circuit according to claim 1, characterized in that, The driving sub-circuit includes a first voltage terminal, a second voltage terminal, and a current output terminal. The first voltage terminal is used to connect to the input voltage, and the clamping capacitor is connected between the first voltage terminal and the second voltage terminal. When the power transistor is working normally, at least 90% of the charging current flows sequentially through the first voltage terminal, the clamping capacitor, the second voltage terminal, the current output terminal, and the logic sub-circuit.

3. The power supply circuit according to claim 2, characterized in that, The driving sub-circuit includes a clamping module; the first voltage terminal, the second voltage terminal, and the current output terminal are all subordinate to the clamping module. The clamping module includes a first current output unit and a second current output unit, and the output terminals of the first current output unit and the second current output unit are connected to form the current output terminal. The first current output unit is used to transfer at least 90% of the charging current to the logic sub-circuit when the power transistor is working normally; The second current output unit is used to provide operating current to the logic sub-circuit when the power transistor is not working properly.

4. The power supply circuit according to claim 3, characterized in that, The first current output unit is also used to stop the operation of the second current output unit or reduce the power consumption of the second current output unit when the power transistor is working normally.

5. The power supply circuit according to claim 3, characterized in that, The first current output unit includes a first Zener diode, a first switching element, and a first constant current source. The cathode of the first Zener diode is connected to the first voltage terminal. The input terminal of the first switching element is connected to the second voltage terminal. The control terminal of the first switching element is connected to the anode of the first Zener diode. The output terminal of the first switching element is configured as the output terminal of the first current output unit. The input terminal of the first constant current source is connected to the control terminal of the first switching element. The output terminal of the first constant current source is used for grounding. When the voltage difference between the control terminal and the input terminal of the first switching element reaches a preset value, the first switch... The first switching element is turned on if the element is turned on, otherwise it is turned off.

6. The power supply circuit according to claim 5, characterized in that, The second current output unit includes a second Zener diode and a second switching element; the cathode of the second Zener diode is connected to the first voltage terminal, the anode of the second Zener diode is connected to the control terminal of the second switching element, the input terminal of the second switching element is connected to the first voltage terminal, and the output terminal of the second switching element is configured as the output terminal of the second current output unit. When the voltage difference between the control terminal and the input terminal of the second switching element reaches a preset value, the second switching element is turned on; otherwise, the second switching element is turned off. The first voltage is greater than the second voltage, wherein the first voltage is the voltage at the output terminal of the first switching element when it is turned on, and the second voltage is the voltage at the output terminal of the second switching element when the first switching element is turned off and the second switching element is turned on.

7. The power supply circuit according to claim 3, characterized in that, The clamping module further includes a third current output unit; when the charging current is higher than the normal operating current of the logic sub-circuit, the third current output unit is used to directly output a portion of the charging current to ground, so that the remaining portion of the charging current matches the logic sub-circuit.

8. The power supply circuit according to claim 7, characterized in that, The third current output unit includes a third switching element and a control component; The connection terminals of the third switching element are respectively connected to the second voltage terminal and ground; The control component is configured to control the third switching element to turn on when the third switching element is off and the voltage difference between the first voltage terminal and the second voltage terminal is less than a first voltage difference; and to control the third switching element to turn off when the third switching element is on and the voltage difference between the first voltage terminal and the second voltage terminal is greater than a second voltage difference; the first voltage difference and the second voltage difference are set based on the voltage required for the power transistor to operate normally, and the first voltage difference is less than the second voltage difference.

9. A power supply chip, characterized in that, The power chip includes the power circuit as described in any one of claims 1 to 8.

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