Resonant hybrid flyback converter, and driver comprising the same

Abstract

The invention relates to a resonant hybrid flyback converter (1). The converter comprises an input capacitor (102) and an output capacitor (111); a high-side, HS, switch (104, Q 1 ) and a low-side, LS, switch (105, Q 2 ); a transformer, comprising a primary winding (106, L r ; 108, L m ) and a secondary winding (109); and a rectifying circuit (110, D). The input capacitor (102), the HS switch (104, Q 1 ) and the LS switch (105, Q 2 ) form a first circuit loop, the LS switch (105, Q 2 ), the primary winding (106, L r ; 108, L m ) and the resonant capacitor (107, C r ) form a second circuit loop; and the rectifying circuit (110, D), the secondary winding (109) and the output capacitor (111) form a third circuit loop. The converter (1) further comprises a first sensing circuit, configured to sense a primary current (304, I HB ) through the primary winding (106, L r ; 108, L m ) and the resonant capacitor (107, C r ); a second sensing circuit, configured to sense a secondary current (307, I SEC ) through the rectifying circuit (110, D) and the secondary winding (109); and a control circuit (103). The control circuit (103) is configured to determine a positive peak value (305, I MAGpos ) for the primary current (304, I HB ) in accordance with a closed-loop control of an average of the secondary current (307, I SEC ) and a setpoint value (I SECref ) for said average; determine a negative peak value (306, I MAGneg ) for the primary current (304, I HB ) in accordance with a current-limited and voltage-limited commutation of the switches (104, Q 1 ; 105, Q 2 ); derive a blanking signal (308) that temporally covers a non-zero secondary current (307, I SEC ) period; and drive the switches (104, Q 1 ; 105, Q 2 ) in turns in accordance with a dead time (t dead ) for the commutation of the switches (104, Q 1 ; 105, Q 2 ), and a hysteretic control of the primary current (304, I HB ) between the positive peak value (305, I MAGpos ) and the negative peak value (306, I MAGneg ). The hysteretic control is inhibited by the blanking signal (308). The use of the blanking signal enables a hysteretic control of resonant hybrid flyback converters irrespective of the particular load condition.

Description

[0001] RESONANT HYBRID FLYBACK CONVERTER, AND DRIVER COMPRISING THE SAME

[0002] Description:

[0003] Technical Field

[0004] The present disclosure relates generally to the field of lighting technology, and in particular to a resonant hybrid flyback converter under hysteretic control.

[0005] Background Art

[0006] Resonant hybrid flyback (or asymmetric duty-cycle flyback) converters may refer to a combination of a flyback converter (wherein a square-wave voltage is applied to a primary-side inductance of a transformer) and a resonant converter (wherein the square-wave voltage is applied to a resonant tank circuit), wherein the resonant tank circuit includes the primary-side inductance.

[0007] Such converters typically comprise a high-side switch and a low-side switch arranged in series (see FIG. i) and driven (i.e., being conductive) alternatingly so as to induce an oscillation-based power transfer via a resonant tank circuit and a galvanic separation.

[0008] Typically, an on-time of the high-side switch is based on the magnetizing current of the transformer (peak current control), and an on-time of the low-side switch is kept fixed.

[0009] The issue with the latter is that a half-bridge current not only includes the magnetizing current but also a reflected secondary (output) current which would trigger the turn-off of the low-side switch early.

[0010] In order to achieve a large output window, the on-time of low-side switch may be dynamically adapted to the current operating point (based on the output voltage), but this can be too slow for fast transients and it would be advantageous to control the low-side switch also based on the magnetizing current of the transformer and to have a hysteretic control. Summary

[0011] It is an object to overcome the above-mentioned and other drawbacks.

[0012] The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

[0013] According to a first aspect, a resonant hybrid flyback converter is provided. The converter comprises an input capacitor and an output capacitor; a high-side, HS, switch and a low-side, LS, switch; a transformer, comprising a primary winding and a secondary winding; and a rectifying circuit. The input capacitor, the HS switch and the LS switch form a first circuit loop, the LS switch, the primary winding and the resonant capacitor form a second circuit loop; and the rectifying circuit, the secondary winding and the output capacitor form a third circuit loop. The converter further comprises a first sensing circuit, configured to sense a primaiy current through the primary winding and the resonant capacitor; a second sensing circuit, configured to sense a secondary current through the rectifying circuit and the secondaiy winding; and a control circuit. The control circuit is configured to determine a positive peak value for the primary current in accordance with a closed- loop control of an average of the secondaiy current and a setpoint value for said average; determine a negative peak value for the primary current in accordance with a current-limited and voltagelimited commutation of the switches; derive a blanking signal that temporally covers a non-zero secondary current period; and drive the switches in turns in accordance with a dead time for the commutation of the switches, and a hysteretic control of the primary current between the positive peak value and the negative peak value. The hysteretic control is inhibited by the blanking signal.

[0014] The first sensing circuit may comprise a first ohmic resistor interposed in the second circuit loop and may be configured to provide a voltage being indicative of the primary current through the primaiy winding and the resonant capacitor.

[0015] The second sensing circuit may comprise a current transformer, a second ohmic resistor and a diode. A primary winding of the current transformer may be interposed in the third circuit loop; a secondaiy winding of the current transformer, the second ohmic resistor and the diode may form a fourth circuit loop; and a voltage across the second ohmic resistor may be indicative of an instantaneous value of the secondary current.

[0016] The second sensing circuit may further comprise a first-order resistor-capacitor, RC, filter; and a voltage across the capacitor of the RC filter may be indicative of the average of the secondary current. The control circuit may further comprise an op-amp comparator, configured to derive the blanking signal in accordance with the voltage across the second ohmic resistor applicable at a non-inverting input of the comparator and a given threshold voltage applicable at an inverting input of the comparator.

[0017] The control circuit may further be configured to derive the blanking signal analytically in accordance with a resonant frequency of the resonant capacitor and of a leakage inductance of the primary winding.

[0018] The blanking signal may further cover a given lead time of the non-zero secondary current period.

[0019] The blanking signal may further cover a given follow-up time of the non-zero secondary current period.

[0020] The non-zero secondary current may comprise a positive current flow towards a load of the converter.

[0021] According to a second aspect, a driver for at least one LED is provided. The driver comprises a resonant hybrid flyback converter of the first aspect.

[0022] The driver may further comprise a power factor correction, PFC, circuit configured to perform AC / DC conversion and PFC.

[0023] Advantageous Effects

[0024] The use of a blanking signal enables a hysteretic control of resonant hybrid flyback converters irrespective of the particular load condition.

[0025] Brief Description of Drawings

[0026] The above-described aspects and implementations will now be explained with reference to the accompanying drawings, in which the same or similar reference numerals designate the same or similar elements.

[0027] The drawings are to be regarded as being schematic representations, and elements illustrated in the drawings are not necessarily shown to scale. Rather, the various elements are represented such that their function and general purpose become apparent to those skilled in the art.

[0028] FIG. 1 illustrates a circuit topology of a resonant hybrid flyback converter in accordance with prior art;

[0029] FIG. 2 illustrates a state chart of a control strategy of the converter of FIG. i in accordance with prior art;

[0030] FIG. 3 illustrates typical waveforms of the converter of FIG. 1 in accordance with prior art;

[0031] FIG. 4 illustrates a state chart of a control strategy of the converter in accordance with the present disclosure;

[0032] FIGs. 5 - 6 illustrate typical waveforms of the converter in accordance with the present disclosure;

[0033] FIG. 7 illustrates an exemplary LED driver including a resonant hybrid flyback converter in accordance with the present disclosure;

[0034] FIG. 8 illustrates a circuit topology of the resonant hybrid flyback converter in accordance with the present disclosure; and

[0035] FIGs. 9 - 11 illustrate typical waveforms of the converter in accordance with the present disclosure at different at different operating points. Detailed Descriptions of Drawings

[0036] In the following description, reference is made to the accompanying drawings, which form part of the disclosure, and which show, by way of illustration, specific aspects of implementations of the present disclosure or specific aspects in which implementations of the present disclosure may be used. It is understood that implementations of the present disclosure may be used in other aspects and comprise structural or logical changes not depicted in the figures. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

[0037] For instance, it is understood that a disclosure in connection with a described method may also hold true for a corresponding apparatus or system configured to perform the method and vice versa. For example, if one or a plurality of specific method steps are described, a corresponding device may include one or a plurality of units, e.g. functional units, to perform the described one or plurality of method steps (e.g. one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps), even if such one or more units are not explicitly described or illustrated in the figures. On the other hand, for example, if a specific apparatus is described based on one or a plurality of units, e.g. functional units, a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g. one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units), even if such one or plurality of steps are not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary implementations and / or aspects described herein may be combined with each other, unless specifically noted otherwise.

[0038] FIG. 1 illustrates a circuit topology of a resonant hybrid flyback converter 1 in accordance with prior art, FIG. 2 illustrates a state chart of a control strategy of the converter of FIG. i, and FIG. 3 illustrates typical waveforms of the converter of FIG. 1.

[0039] The converter 1 may particularly form part of an LED driver (not shown) for at least one LED.

[0040] The converter 1 comprises an input rectifying circuit 101 such as the depicted full-wave rectifier, an input capacitor 102, Cm, a high-side (HS) switch 104, Qi and a low-side (LS) switch 105, Q2forming a first circuit loop.

[0041] The HS switch 104, Qi and the LS switch 105, Q2may respectively comprise a transistor, in particular MOSFETs. It will be appreciated that the HS switch 104, Qi and the LS switch 105, Q2constitute a half-bridge similar to an LLC converter.

[0042] The converter 1 further comprises a transformer 106, 108, 109, comprising a primary winding 106, Lr; 108, Lmand a secondary winding 109; and a resonant capacitor 107, Cr. The resonant inductor 106, Lrrepresents a series inductance being either a leakage inductance of the transformer 106, 108, 10901 the leakage inductance plus an external inductor.

[0043] The LS switch 105, Q2, the primary winding 106, Lr; 108, Lmand the resonant capacitor 107, Crform a second circuit loop.

[0044] A major difference with respect to a flyback topology is the resonant capacitor 107, Crin series with the primary winding 106, Lr; 108, Lmof the transformer 106, 108, 109.

[0045] The converter 1 further comprises a rectifying circuit no, D such as a diode D, and an output capacitor 111, Cout-

[0046] The rectifying circuit no, D, the secondary winding 109 and the output capacitor 111, Coutform a third circuit loop.

[0047] The converter 1 further comprises a first sensing circuit (not shown), configured to sense a primary current 304, IHB through the primary winding 106, Lr; 108, Lmand the resonant capacitor 107, Cr.

[0048] The first sensing circuit may, for instance, comprise a first ohmic resistor interposed in the second circuit loop and may be configured to provide a voltage being indicative of the primary current 304, IHB through the primary winding 106, Lr; 108, Lmand the resonant capacitor 107, Cr.

[0049] The converter 1 further comprises a second sensing circuit (not shown), configured to sense a secondary current 307, ISEC through the rectifying circuit 110, D and the secondary winding 109.

[0050] The converter 1 further comprises a control circuit 103, such as an application-specific integrated circuit (ASIC), a microcontroller, or the like.

[0051] According to prior art, the control circuit 103 is typically configured to determine a positive peak value 305, IMAGPOS for the primary current 304, IHB (i.e., a variable on-time toN_Hs / tmagfor the HS switch 104, Qi) in accordance with a closed-loop control of an average of the secondary current 307, ISEC and a setpoint value IsECref for said average; and to determine a fixed on-time (ti.s o\ in FIG. 2, tdemag in FIG. 3) for the LS switch 105, Q2.

[0052] The control circuit 103 is further configured to drive the switches 104, Q,; 105, Q2in turns (using drive / control signals 301, 302 in accordance with a dead time tdead for the commutation of the switches 104, Q, 105, Q2, a peak control of the primary current 304, IHB in accordance with the positive peak value 305, IMAGPOSand a fixed on-time control of the LS switch 105, Q2.

[0053] So the HS switch 104, Qi is turned on at the beginning of the switching cycle and turned off once the primary current 304, IHB reaches the positive peak value 305, IMAGPOSset by the output current regulator. A voltage 303, VHB at a common terminal of the switches 104, 105 is raised to a level of a DC input voltage.

[0054] Note that at the turn-off point t2(see FIG. 3) of the HS switch 104, Qi, the primary current 304, IHB corresponds to the magnetizing current IMAG.

[0055] After a short dead time {tdead in FIG. 2, td adLs in FIG. 3) the LS switch 105, Q2is turned on for the fixed on-time toN_Ls in FIG. 2, tdemag in FIG. 3)

[0056] This on-time toN_Ls, tdema has to be chosen carefully to make sure that the primary current 304, IHB at the turn-off point t5(see FIG. 3) is big (negative) enough to achieve zero-voltage switching (ZVS) in the half-bridge, but not too big to avoid saturation and excessive losses of the transformer 106, 108, 109 and switches 104, 105.

[0057] It is also important that ISEC = o at this time to achieve zero-current switching (ZCS) of the rectifying circuit no, D.

[0058] The issue here is that the primary current 304, IHB not only includes the magnetizing current IMAG, but also the reflected secondary (output) current 307, ISEC which would trigger the turn-off of the LS switch 105, Q2early.

[0059] In order to achieve a large output window, the on-time tdemag of the LS switch 105, Q2maybe adapted dynamically to the respective operating point (based on the output voltage), but this can be too slow for fast transients and it would be advantageous to control also the LS switch 105, Q2based on the magnetizing current IMAG of the transformer so as to have a hysteretic control. FIG. 4 illustrates a state chart of a control strategy of the converter i in accordance with the present disclosure, and FIGs. 5 - 6 illustrate typical waveforms of the converter 1 in accordance with the present disclosure.

[0060] According to the updated state machine, the on-time toN_Ls / tdemag of the LS switch 105, Q2is controlled by a negative peak value 306, IMAGneg for the primary current 304, IHB on the condition that the rectifying circuit no, D is not conducting, indicated as ISEC = o.

[0061] As such, the control circuit 103 is further configured to determine a negative peak value 306, IMAGneg (see FIG. 5) for the primary current 304, IHB in accordance with a current-limited and voltage-limited commutation of the switches 104, Q , 105, Q2, and the control circuit 103 is further configured to derive a blanking signal 308 that temporally covers a non-zero secondary current 307, ISEC period.

[0062] Current-limited and voltage-limited commutation may mean that the negative peak value 306, IMAGneg for the primary current 304, IHB is set as close to oA as possible to minimize the primary current 304, IHB and the resulting power loss, and is nevertheless set high enough (off oA) to ensure zero-voltage switching (ZVS) of the switches 104, Q , 105, Q2.

[0063] In particular, the non-zero secondary current 307, ISEC may comprise a positive current flow towards a load (such as at least one LED) of the converter 1.

[0064] According to FIG. 5, the blanking signal 308 is on a logic ‘high’ (i.e. , blanking, inhibition) level during non-zero secondary current 307, ISEC periods.

[0065] As shown in the example of FIG. 6, a lower secondary current 307, ISEC may not flow immediately when the LS switch 105, Q2is turned on.

[0066] Accordingly, the blanking signal 308 may further cover a given lead time of the non-zero secondary current 307, ISEC period. In other words, in order to make the system more robust the blanking could already start when / before the LS switch 105, Q2is turned on.

[0067] Additionally or alternatively, the blanking signal 308 may further cover a given follow-up time of the non-zero secondary current 307, ISEC period. This means that also a delay could be added to the end of the blanking pulse (after ISEC = o)

[0068] The control circuit 103 is thus configured to drive the switches 104, Q, 105, Q2in turns in accordance with a dead time tdead for the commutation of the switches 104, Qr, 105, Q2, and a hysteretic control of the primary current 304, IHB between the positive peak value 305, IMAGPOS and the negative peak value 306, IMAGneg- The hysteretic control is inhibited by the blanking signal 308. It will be appreciated that there are multiple options to derive the blanking signal 308. These options will be explained in connection with FIG. 8 below.

[0069] FIG. 7 illustrates an exemplary LED driver including a resonant hybrid flyback converter 1 in accordance with the present disclosure.

[0070] In the depicted implementation, the converter 1 serves as a DC / DC stage.

[0071] In accordance with statutory provisions, the LED driver may further require a power factor correction (PFC) circuit 7 serving as an AC / DC stage between the input rectifying circuit 101 and the input capacitor 102, especially for output powers of 25W and more.

[0072] FIG. 8 illustrates a circuit topology of the resonant hybrid flyback converter 1 in accordance with the present disclosure shown in FIG. 7.

[0073] The circuit topology of FIG. 8 includes a specific second sensing circuit, configured to sense a secondary current 307, ISEC through the rectifying circuit no, D and the secondary winding 109.

[0074] Said second sensing circuit may comprise a current transformer 601, 602, a second ohmic resistor 603, Rshunt and a diode 604. A primary winding 601 of the current transformer 601, 602 may be interposed in the third circuit loop; a secondary winding 602 of the current transformer 601, 602, the second ohmic resistor 603, Rshunt and the diode 604 may form a fourth circuit loop; and a voltage 605, Vshunt across the second ohmic resistor 603, Rsh nt may be indicative of an instantaneous value of the secondary current 307, ISEC-

[0075] The second sensing circuit may further comprise a first-order resistor-capacitor, RC, filter 606, 607; and a voltage 608, Vn nsn across the capacitor 607 of the RC filter 606, 607 may be indicative of the average of the secondary current 307, ISEC-

[0076] Regarding the blanking signal 308, the control circuit 103 may further comprise an op-amp comparator 609, configured to derive the blanking signal 308 in accordance with the voltage 605, Vshunt across the second ohmic resistor 603, Rshunt applicable at a non-inverting input of the comparator 609 and a given threshold voltage applicable at an inverting input of the comparator 609.

[0077] So whenever the instantaneous value of the secondary current 307, ISEC exceeds the given threshold voltage (e.g., oV) the blanking signal 308 is raised to a logic ‘high’ (i.e., blanking, inhibition) level. Alternatively, the conducting time of the rectifying circuit no, D can be calculated on an analytic / theoretical basis because the current follows a sine wave with its period defined by the resonant frequency of the leakage inductance Lrand the resonant capacitor Cr.

[0078] As such, the control circuit 103 may further be configured to derive the blanking signal 308 analytically in accordance with a resonant frequency of the resonant capacitor 107, Crand of a leakage inductance 106, Lrof the primary winding 106, Lr; 108, Lm.

[0079] FIGs. 8 - 10 illustrate typical waveforms of the converter 1 in accordance with the present disclosure at different at different operating points.

[0080] In the typical waveforms shown, the secondary current flows for most of the on-time of the low-side switch, but this is not the case at every operating point. Accordingly, the blanking signal 308 facilitates hysteretic control of the converter 1 under various load conditions.

[0081] FIG. 8 shows a high current / high voltage example (i9OOmA / 39,5V) which benefits from the blanking signal 308.

[0082] FIG. 9 shows a high current / low voltage example (1900mA / 15V) which also benefits from the blanking signal 308.

[0083] FIG. 10 shows a low current / low voltage example (100mA / 15V) which does not benefit from the blanking signal 308. However, the blanking signal 308 does not harm either.

[0084] The present disclosure has been described in conjunction with various implementations as examples. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed matter, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word “comprising” does not exclude other elements or steps and the indefinite article “a” or “an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation. A computer program may be stored / distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems.

Claims

Claims:

1. A resonant hybrid flyback converter (1), comprising- an input capacitor (102, Cm), a resonant capacitor (107, Cr) and an output capacitor (111, Cout);- a high-side, HS, switch (104, Qi) and a low-side, LS, switch (105, Q2);- a transformer, comprising a primary winding (106, Lr; 108, Lm) and a secondary winding (109); and- a rectifiying circuit (110, D); the input capacitor (102, Cin), the HS switch (104, Qi) and the LS switch (105, Q2) forming a first circuit loop; the LS switch (105, Q2), the primary winding (106, Lr; 108, Lm) and the resonant capacitor (107, Cr) forming a second circuit loop; and the rectifiying circuit (110, D), the secondary winding (109) and the output capacitor (111, Cout) forming a third circuit loop; the converter (1) further comprising- a first sensing circuit, configured to sense a primary current (304, IHB) through the primary winding (106, Lr; 108, Lm) and the resonant capacitor (107, Cr);- a second sensing circuit, configured to sense a secondary current (307, ISEC) through the rectifiying circuit (110, D) and the secondary winding (109); and- a control circuit (103), configured to- determine a positive peak value (305, IMAGPOS) for the primary current (304, IHB) in accordance with a closed-loop control of an average of the secondary current (307, ISEC) and a setpoint value (IsECref) for said average;- determine a negative peak value (306, iMAGneg) for the primary current (304, IHB) in accordance with a current-limited and voltage-limited commutation of the switches (104, Qi; 105, Q2);- derive a blanking signal (308) that remains at a logic high level during the entire duration of a non-zero secondary current (307, ISEC) period; and- drive the switches (104, Qx; 105, Q2) in turns in accordance with- a dead time (tdead) for the commutation of the switches (104, Qx; 105, Q2), and- a hysteretic control of the primary current (304, IHB) between the positive peak value (305, IMAGPOS) and the negative peak value (306, IMAGneg), the hysteretic control being inhibited while the blanking signal (308) is at the logic high level.

2. The converter (1) of claim 1, the first sensing circuit comprising a first ohmic resistor interposed in the second circuit loop and configured to provide a voltage being indicative of the primary current (304, IHB) through the primary winding (106, Lr; 108, Lm) and the resonant capacitor (107, Cr).

3. The converter (1) of claim 1 or claim 2, the second sensing circuit comprising a current transformer (601, 602), a second ohmic resistor (603, Rshum) and a diode (604); a primary winding (601) of the current transformer (601, 602) being interposed in the third circuit loop; a secondary winding (602) of the current transformer (601, 602), the second ohmic resistor (603, Rshum) and the diode (604) forming a fourth circuit loop; and a voltage (605, Vshunt) across the second ohmic resistor (603, Rshum) being indicative of an instantaneous value of the secondary current (307, ISEC).

4. The converter (1) of claim 3, the second sensing circuit further comprising a first-order resistor-capacitor, RC, filter (606, 607); and a voltage (608, VILEDSUS) across the capacitor (607) of the RC filter (606, 607) being indicative of the average of the secondary current (307, ISEC).

5. The converter (1) of claim 3 or claim 4, the control circuit (103) further comprising an op-amp comparator (609), configured to derive the blanking signal (308) in accordance with the voltage (605, Vshunt) across the second ohmic resistor (603, Rshu ) applicable at a non-inverting input of the comparator (609) and a given threshold voltage applicable at an inverting input of the comparator (609).

6. The converter (1) of any one of the claims 1 to 4, the control circuit (103) further configured to derive the blanking signal (308) analytically in accordance with a resonant frequency of the resonant capacitor (107, Cr) and of a leakage inductance (106, Lr) of the primary winding (106, Lr; 108, Lm).

7. The converter (1) of any one of the preceding claims, the blanking signal (308) further remains at the logic high level for a given lead time of the nonzero secondary current (307, ISEC) period.

8. The converter (1) of claim 1, the blanking signal (308) further remains at the logic high level for a given follow-up time of the non-zero secondary current (307, ISEC) period.

9. The converter (1) of claim 1, the non-zero secondary current (307, ISEC) comprising a positive current flow towards a load of the converter (1).

10. A driver for at least one LED, comprising a resonant hybrid flyback converter (1) of any one of the preceding claims.

11. The driver of claim 10, further comprising a power factor correction, PFC, circuit (7), configured to perform AC / DC conversion and PFC.

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