Buck / boost converter with buck regulation and boost feedforward

Abstract

The present invention relates to a buck / boost converter which is designed to convert an input voltage into a desired output voltage on the basis of a first switch (T1), a second switch (T2), a third switch (T3), a fourth switch (T4) and an inductor (10), wherein a first PWM modulator (40) is designed to receive a first signal (S1) from a controller (30) in order to generate a first PWM signal (SP1) with a first duty cycle (D1), a second PWM modulator (60) is designed to receive a second signal (S2) from a forward estimator (50) in order to generate a second PWM signal (SP2) with a second duty cycle (D2), the first switch (T1) and the second switch (T2), which are connected in series, are designed to be controlled in a complementary manner in each case on the basis of the first PWM signal (SP1), the third switch (T3) and the fourth switch (T4), which are connected in series, are designed to be controlled in a complementary manner in each case on the basis of the second PWM signal (SP2), the controller (30) is designed to generate the first signal (S1) in such a way that a deviation between an output voltage setpoint value and a current value for the output voltage (UA) is minimised, and the forward estimator (50) is designed to generate a signal value of the second signal (S2) on the basis of a predefined constant function from a value of the input voltage (UE).

Description

[0001] Description

[0002] title

[0003] Downward-upward converter with downhill section control and uphill section pre-control

[0004] State of the art

[0005] The present invention relates to a step-up converter.

[0006] Prior art has shown that so-called cascaded buck-boost converters based on four switches and an inductor are known. These converters are based on a combination of a buck converter and a boost converter and are designed to convert input voltages into desired output voltages, which can be both higher and lower than the respective input voltage.

[0007] In this context, implementations are known in which the respective switches of the buck converter and the respective switches of the boost converter are controlled on the basis of PWM signals with identical duty cycles, which result from regulating the output voltage to a desired target value of the output voltage.

[0008] Furthermore, implementations are known in which the buck-boost converter operates as a pure buck converter when the desired output voltage is lower than the input voltage and as a pure boost converter when the output voltage is higher than the input voltage, while the other section of the buck-boost converter is inactive. Additionally, another mode may be provided in which both sections (i.e., boost and buck converters) are active when the desired output voltage is in a similar range to the input voltage.

[0009] US10355589B2 discloses a switching regulator in which a first switch and a second switch are switched on and off complementarily in accordance with an output voltage. In a buck / boost conversion mode, a third switch and a fourth switch are switched on and off complementarily, while the duty cycle of the third switch is maintained at a fixed value.

[0010] Disclosure of the invention

[0011] According to a first aspect of the present invention, a buck-boost converter is proposed, comprising a first switch, a second switch, a third switch, a fourth switch, which are preferably each designed as semiconductor switches, an inductor, a capacitor, a controller, a first PWM modulator, a forward estimator and a second PWM modulator.

[0012] For this purpose, a series circuit consisting of the first switch and the second switch is set up to be supplied with an input voltage to be converted, whereby the second switch is connected to a reference potential (e.g. a ground potential) of the buck-boost converter.

[0013] A series circuit of the third switch and the fourth switch is connected in parallel to the capacitor to provide an output voltage of the buck-boost converter based on the input voltage across the capacitor, with the third switch being connected to the reference potential.

[0014] The inductor, which is designed, for example, as a coil, is connected between a first node, which lies between the first switch and the second switch, and a second node, which lies between the third switch and the fourth switch.

[0015] The first PWM modulator is configured to receive an initial signal from the controller and, based on this, generate a first PWM signal with a first duty cycle that corresponds to a signal value of the first signal. Preferably, the first duty cycle can be set arbitrarily within a value range of 0 to 1, based on the first signal.

[0016] The second PWM modulator is configured to receive a second signal from the forward estimator and, based on this, to generate a second PWM signal with a second duty cycle that corresponds to a signal value of the second signal. Preferably, the second duty cycle can be set arbitrarily within a value range of 0 to 1 based on the second signal.

[0017] The first switch is configured to be controlled based on the first PWM signal, while the second switch is configured to be controlled based on the first PWM signal in a complementary manner. For this purpose, the first PWM signal is, for example, supplied directly to the first switch, while the first PWM signal is supplied to the second switch, for example, via an intermediate first inverter, in order to achieve the switching of the second switch in a complementary manner to the first.

[0018] The third switch is configured to be controlled based on the second PWM signal, while the fourth switch is configured to be controlled based on the second PWM signal in a manner complementary to the third switch. For this purpose, the second PWM signal is, for example, provided directly to the third switch, while the second PWM signal is provided to the fourth switch, for example, via an interposed third inverter, in order to achieve the switching of the fourth switch in a manner complementary to the third switch.

[0019] It should be noted that the complementary switching of the series-connected switches can also be implemented differently, for example, by placing the inverters before the first and / or third switch if the first and / or second signal are generated using inverted logic. The controller is configured to generate a signal value of the first signal based on the current output voltage and a predefined output voltage setpoint. This signal value then controls the first and second switches, minimizing any deviation between the output voltage setpoint and the current output voltage. The output voltage setpoint is defined, for example, by a buck converter reference voltage whose level corresponds to the output voltage setpoint.For this purpose, the buck converter reference voltage can directly correspond to the output voltage setpoint or a suitable scaling of the output voltage setpoint, if this is required, for example, by the available operating voltage range for the buck-boost converter. Furthermore, it is possible to define the buck converter reference voltage as fixed or to make it variably adjustable, in order to set different output voltages as needed using the buck-boost converter.

[0020] The forward estimator is configured to generate a signal value of the second signal from a value of the input voltage based on a predefined continuous function. In other words, the forward estimator is configured to map a given value of the input voltage, using a function preferably implemented by an analog circuit, to corresponding signal values ​​defined by the function, which represent the second signal.

[0021] It should be noted that it is not fundamentally impossible to implement the forward estimator, at least partially, using a digital circuit, provided that the temporal resolution of the sampling points and the number of quantization stages of an analog-to-digital converter (ADC), on the basis of which the input signal is digitized for further digital processing, are sufficiently high to achieve effects similar to those of a purely analog forward estimator. For example, the number of quantization stages of such an ADC is at least 4, preferably at least 8, and particularly preferably at least 16. For example, the sampling frequency of such an ADC is at least 1 Hz, preferably at least 100 Hz, and particularly preferably at least 100 kHz.

[0022] It is further understood that the continuous function is preferably defined in such a way that the buck-boost converter according to the invention can provide an application-specific control reserve, which can be derived in particular from the output voltage setpoint, an expected input voltage range and an expected output load current range.

[0023] The buck-boost converter according to the invention offers a multitude of advantages, which result in particular from the fact that the control of the third and fourth switches, which are part of a boost converter section of the buck-boost converter, is independent of the regulation of the output voltage by the regulator of a buck converter section of the buck-boost converter, and from the fact that the control of the boost converter section is continuous.

[0024] This allows for improved efficiency of the step-up converter, resulting in lower thermal power loss, which in turn enables, for example, a more compact and / or more cost-effective design of the step-up converter.

[0025] Furthermore, based on the buck-boost converter according to the invention, a continuous transition between a buck-boost mode and / or a boost mode and / or a buck-boost mode can be achieved, which also leads to improved efficiency and, in particular, avoids instabilities at a transition point between the two modes. In other words, this reduces unwanted oscillation between the two modes.

[0026] Furthermore, based on the buck-boost converter according to the invention, it is possible to increase the control bandwidth of the buck-boost converter compared to conventional buck-boost converters, since an undesirable property of conventional boost converters, which results from a zero (right half plane zero) of a transfer function of the conventional converters, is reduced or avoided here.

[0027] The dependent claims describe preferred embodiments of the invention.

[0028] In an advantageous embodiment, the continuous function underlying the forward estimator is configured to ensure that the first duty cycle, based on the controller's regulation, approaches a value of one as closely as possible or reaches a value of one, in order to minimize power loss in the respective switches. Furthermore, it is possible to incorporate information about the first duty cycle into the forward estimator and to consider this information, at least partially, when generating the second signal.

[0029] Furthermore, it is possible that the continuous function underlying the forward estimator is a linear or a non-linear function, whereby the type of continuous function and / or the specific form of the continuous function is not fundamentally restricted, but is preferably determined depending on specific requirements of the downward-upward converter according to the invention.

[0030] In a further advantageous embodiment of the present invention, the controller is based on a first transconductance amplifier and is configured to at least partially adjust the transconductance of the first transconductance amplifier depending on the second duty cycle. This allows a reduction in the control bandwidth resulting from an increase in the second duty cycle to be at least partially compensated. This can be achieved, for example, by feeding the second signal and / or the second PWM signal and / or a representation corresponding to the signals into the controller and / or a control unit separate from the controller, such that the controller and / or the control unit separate from the controller is configured to adjust the transconductance of the first transconductance amplifier in steps and / or continuously depending on the currently present second duty cycle.In a particularly preferred embodiment of the present invention, the controller is a first controller, while the forward estimator comprises a second controller. Furthermore, the buck-boost converter is configured, based on a boost-converter reference voltage, to generate a third PWM signal whose waveform corresponds to the second PWM signal of the second PWM modulator and whose on-signal level (i.e., a level corresponding to a logical on state of the third PWM signal) corresponds to the boost-converter reference voltage, wherein the on-signal level preferably corresponds to the boost-converter reference voltage. This explicitly does not preclude the on-signal level from being a signal level that differs from the boost-converter reference voltage, as long as appropriate scaling of the on-signal level is taken into account before and / or within the second controller, which ensures the relationship to the boost-converter reference voltage.The buck-boost converter is further configured to filter the third PWM signal using a low-pass filter (e.g., an RC low-pass filter) to generate a third signal. This third signal is then fed into the second controller, which is configured to generate the second signal based on the deviation between the third signal and the input voltage. In other words, based on the feedback of the third signal to the second controller described above, the buck-boost converter is configured to compensate for tolerances, particularly component tolerances, within the processing path for generating the second PWM signal (i.e., the forward estimator section of the buck-boost converter). This ensures a particularly stable and / or accurate generation of the second PWM signal, thereby improving the stability and / or accuracy of the entire buck-boost converter.

[0031] Particularly preferably, the boost converter reference voltage is defined as a function of a maximum permissible power dissipation and / or a required control bandwidth of the buck-boost converter. In other words, based on a specific definition of the boost converter reference voltage, a specific operating point of the boost converter section can be determined, thereby influencing the maximum permissible power dissipation and / or a required control bandwidth of the buck-boost converter according to the invention. This definition is preferably made during a design phase of the buck-boost converter according to the invention. However, it is also conceivable to configure the boost converter reference voltage dynamically during an operating phase of the buck-boost converter, for example, depending on changing boundary conditions and / or operating conditions.

[0032] Furthermore, the second controller is advantageously implemented on the basis of a second transconductance amplifier, without thereby restricting the second controller to such a design.

[0033] In a further advantageous embodiment of the present invention, the forward estimator is configured to generate the second signal based on a scaled input voltage, which is achieved by scaling the input voltage, wherein the degree of scaling is determined as a function of a maximum permissible power dissipation and / or a required control bandwidth of the buck-boost converter. The scaling, which determines how strongly a change in the input voltage affects a change in the second signal, can be implemented, for example, as part of the continuous function and / or as a scaling step preceding the continuous function.As described above in connection with the determination of the boost converter reference voltage, a scaling factor underlying the scaling can also preferably be determined during a design phase of the buck-boost converter according to the invention, whereby it is also conceivable to dynamically configure the scaling factor during an operating phase of the buck-boost converter, for example depending on changing boundary conditions and / or operating conditions.

[0034] According to a second aspect of the present invention, a circuit arrangement is proposed which comprises at least one step-down / step-up converter according to one of the preceding claims. The features, combinations of features, and the advantages arising therefrom correspond to those described in connection with the first-mentioned aspect of the invention, such that reference is made to the above explanations to avoid repetition. In an advantageous embodiment of the circuit arrangement according to the invention, the circuit arrangement is a power converter and / or an integrated voltage converter (e.g., for a computer and / or a mobile device and / or a household appliance, etc.) and / or a power supply for a vehicle control unit and / or a converter for a photovoltaic system, without thereby limiting the applications of the circuit arrangement according to the invention to the aforementioned uses.

[0035] Brief description of the drawings

[0036] Exemplary embodiments of the invention are described in detail below with reference to the accompanying drawings. The drawing shows:

[0037] Figure 1 shows a block diagram of an exemplary embodiment of a buck-boost converter according to the invention;

[0038] Figure 2 shows a circuit diagram of an exemplary embodiment of a control signal generation section of a boost converter of a buck-boost converter according to the invention; and

[0039] Figure 3 shows an exemplary embodiment of a circuit arrangement according to the invention in connection with a vehicle.

[0040] Embodiments of the invention

[0041] Figure 1 shows a block diagram of an exemplary embodiment of a buck-boost converter according to the invention, which includes, among other things, a first switch T1, a second switch T2, a third switch T3, a fourth switch T4, an inductor 10, a capacitor 20, a controller 30, a first PWM modulator 40, a forward estimator 50, a second PWM

[0042] The device comprises a modulator 60, a first inverter 11, a second inverter I2, and a third inverter I3. Switches T1, T2, T3, and T4 are each designed as semiconductor switches. The forward estimator 50, the second PWM modulator 60, and the third inverter I3 form a control signal generation section 210 of a boost converter section of the buck-boost converter according to the invention.

[0043] A series circuit consisting of the first switch T1 and the second switch T2 is set up to be supplied with an input voltage UE to be converted, with the second switch T2 being connected to a ground potential M of the buck-boost converter.

[0044] A series circuit consisting of the third switch T3 and the fourth switch T4 is connected in parallel to the capacitor 20 to provide an output voltage UA of the buck-boost converter generated on the basis of the input voltage UE across the capacitor 20, with the third switch T3 being connected to the ground potential M.

[0045] The inductance 10, which is designed as a coil, is connected between a first node 70 and a second node 72.

[0046] The first PWM modulator 40 is configured to receive a first signal S1 from the controller 30, which is implemented on the basis of a first transconductance amplifier 80, and to generate a first PWM signal SP1 with a first duty cycle D1 on the basis of this signal, wherein the first duty cycle D1 corresponds to a signal value of the first signal S1.

[0047] The second PWM modulator 60 is configured to receive a second signal S2 from the forward estimator 50 and to generate a second PWM signal SP2 with a second duty cycle D2 on the basis of this signal, wherein the second duty cycle D2 corresponds to a signal value of the second signal S2.

[0048] The first switch T1 is configured to be controlled based on the first PWM signal SP1, while the second switch T2 is configured to be controlled based on the first PWM signal SP1 in a complementary manner to the first switch T1. For this purpose, the first PWM signal SP1 is provided to the second switch T2 via the first inverter 11. The third switch T3 is configured to be controlled based on an inverted second PWM signal SP2', which is generated from the second PWM signal SP2 by the second inverter I2 and has an inverted second duty cycle D2', which is calculated as follows: D2' = 1 - D2.

[0049] The fourth switch T4 is configured to be controlled based on the inverted second PWM signal SP2', complementary to the third switch T3. For this purpose, the inverted second PWM signal SP2' is supplied to the fourth switch T4 via the third inverter I3.

[0050] Controller 30 is configured to generate a signal value of the first signal S1 based on the current output voltage UA, which is fed back to an input of controller 30, and based on a predefined output voltage setpoint. This signal then controls the first switch T1 and the second switch T2 to minimize the deviation between the output voltage setpoint and the current value of the output voltage UA. The output voltage setpoint is provided via a buck converter reference voltage UREF1, which is applied to another input of controller 30.

[0051] The controller 30 is further configured to adjust a transconductance of the transconductance amplifier as a function of the inverted second duty cycle D2' in order to counteract a reduction in the control bandwidth of the buck-boost converter.

[0052] The forward estimator 50 is set up, a signal value of the second

[0053] Signals S2 are to be generated from a value of the input voltage UE based on a predefined continuous function, where the continuous function is a linear function which is set up to cause the first duty cycle D1, based on the control by the controller 30, to approach or reach a value of one.

[0054] Figure 2 shows a circuit diagram of an exemplary embodiment of a control signal generation part 210 of a boost converter of a buck-boost converter according to the invention, which is provided for controlling the third switch T3 (see Figure 1) and the fourth switch T4 (see Figure 1) of the boost converter.

[0055] It should be noted that the control signal generation part 210 in Figure 2 can replace the simplified control signal generation part 210 in Figure 1, and that the respective function blocks in Figure 2, which are essentially identical to the function blocks in Figure 1, are not described in detail below to avoid repetition, and that mainly differences between Figure 1 and Figure 2 are described.

[0056] Figure 2 shows a voltage divider 140 which is configured to scale an input voltage UE applied to the buck-boost converter to a scaled input voltage UES in order to adapt the input voltage UE to a provided operating voltage range of the buck-boost converter.

[0057] The scaled input voltage UES is applied to a positive input of a second transconductance amplifier 85, which, in conjunction with an RC network 160 (for pole-zero compensation), forms a second controller 35 of the buck-boost converter according to the invention, which is configured to generate a second signal S2.

[0058] An output of the second controller 35 is connected via a buffer 110 to an input of a PWM comparator 120, the buffer being configured to prevent feedback from the PWM comparator 120 to the second controller 35.

[0059] The PWM comparator 120 is set up to compare a sawtooth signal, which is provided by a ramp generator 130, with the second signal S2 of the second controller 35.

[0060] One output of the PWM comparator 120 is connected to an R input of a D flip-flop 100, while a D input of the D flip-flop 100 is configured to receive a one-level signal SL1 (which has a logic "high" level) provided by external logic (not shown here). Additionally, the D flip-flop 100 is configured to be clocked by a clock signal SCLK, which is received via a CLK pin of the D flip-flop 100.

[0061] The ramp generator 130, the PWM comparator 120 and the D flip-flop 100 thus form an example of a second PWM modulator 60 as described in Figure 1, which is configured to generate a second PWM signal SP2 corresponding to the second signal S2, which is provided at a Q output of the D flip-flop 100.

[0062] Corresponding to Figure 1, Figure 2 has a second inverter I2, via which the control signal generation part 210 is set up to provide the inverted second PWM signal SP2' described in Fig. 1 with the inverted second duty cycle D2', which is suitable for controlling the third switch T3 (see Figure 1) and the fourth switch T4 (see Figure 1) and / or for adjusting the transconductance of the first controller 30 (see Figure 1).

[0063] Furthermore, the control signal generation part 210 in Figure 2 has a signal converter 150, which is set up on the basis of a fifth switch T5, a sixth switch T6 and a fourth inverter I4, to convert the second PWM signal SP2 to a corresponding third PWM signal SP3, the input level of which corresponds to a boost converter reference voltage IIREF 2 provided across the fifth switch T5 and the sixth switch T6.

[0064] The signal converter 150 is further configured to provide the third PWM signal SP3 to a downstream low-pass filter 90, which is formed from a low-pass resistor 92 and a low-pass capacitor 94.

[0065] The low-pass filter 90 is set up to average the third PWM signal SP3 in order to generate a third signal S3, which is fed back to a negative input of the second transconductance amplifier 85.

[0066] Figure 3 shows an exemplary embodiment of a circuit arrangement 170 according to the invention in conjunction with a vehicle 200. The circuit arrangement 170 according to the invention, which here is a component of a control unit 190 of the vehicle 200, has a step-down / step-up converter according to the invention, on the basis of which the control unit 190 is configured to convert an input voltage provided by a battery 180 of the vehicle 200 into an output voltage suitable for the control unit 190 and to keep this output voltage stable even when voltage fluctuations occur due to a discharge of the battery and / or a load on the vehicle's electrical system.

Claims

Claims 1. Exhibiting downward-upward converters: - a first switch (T1), - a second switch (T2), - a third switch (T3), - a fourth switch (T4), - an inductor (10), - a capacity (20), - a regulator (30), - a first PWM modulator (40), - a forward estimator (50), and - a second PWM modulator (60), wherein - a series circuit consisting of the first switch (T1) and the second switch (T2) is set up to be supplied with an input voltage (UE) to be converted, wherein the second switch (T2) is connected to a reference potential (M) of the buck-boost converter, - a series circuit of the third switch (T3) and the fourth switch (T4) is connected in parallel to the capacitor (20) to provide an output voltage (UA) of the buck-boost converter generated on the basis of the input voltage (UE) across the capacitor (20), wherein the third switch (T3) is connected to the reference potential (M), - the inductance (10) is connected between a first node (70), which lies between the first switch (T1) and the second switch (T2), and a second node (72), which lies between the third switch (T3) and the fourth switch (T4), - the first PWM modulator (40) is set up to receive a first signal (S1) from the controller (30) and to generate a first PWM signal (SP1) with a first duty cycle (D1) on the basis of this signal, which corresponds to a signal value of the first signal (S1), - the second PWM modulator (60) is set up to receive a second signal (S2) from the forward estimator (50) and to generate a second PWM signal (SP2) with a second duty cycle (D2) on the basis of this signal, which corresponds to a signal value of the second signal (S2), - the first switch (T1) is configured to be controlled based on the first PWM signal (SP1), while the second switch (T2) is configured to be controlled based on the first PWM signal (SP1) in a complementary manner to the first switch (T1), - the third switch (T3) is configured to be controlled based on the second PWM signal (SP2), while the fourth switch (T4) is configured to be controlled based on the second PWM signal (SP2) in a manner complementary to the third switch (T3), - the controller (30) is configured to generate a signal value of the first signal (S1) based on the current output voltage (UA) and a predetermined output voltage setpoint, on the basis of which the first switch (T1) and the second switch (T2) are controlled to minimize the deviation between the output voltage setpoint and the current value for the output voltage (UA), and - the forward estimator (50) is set up to generate a signal value of the second signal (S2) based on a predefined continuous function from a value of the input voltage (UE).

2. Step-down step-up converter according to claim 1, wherein the continuous function underlying the forward estimator (50) is configured to cause the first duty cycle (D1) to approach or reach a value of one based on the control by the controller (30).

3. A step-down / step-up converter according to any of the preceding claims, wherein the continuous function is a linear or a non-linear function.

4. Step-down / step-up converter according to one of the preceding claims, wherein the controller (30) is implemented and configured on the basis of a first transconductance amplifier (80), the transconductance of the first transconductance amplifier (80) being at least partially dependent on the to adjust to the second duty cycle (D2).

5. Step-down step-up converter according to any one of the preceding claims, wherein - the controller is a first controller (30) and the forward estimator (50) has a second controller (35), and - the step-down boost converter is set up based on a step-up reference voltage (LIREF2), - to generate a third PWM signal (SP3) whose signal waveform corresponds to the second signal (S2) of the second PWM modulator (60) and whose on-signal level corresponds to the boost converter reference voltage (LIREF2), - to subject the third PWM signal (SP3) to filtering using a low-pass filter (90) in order to generate a third signal (S3), and - to feed the third signal (S3) into the second controller (35) so that the second controller (35) is set up to generate the second signal (S2) depending on a deviation between the third signal (S3) and the input voltage (UE).

6. Step-down boost converter according to claim 5, wherein the step-up converter reference voltage (LIREF2) is determined as a function of a maximum permissible power loss and / or a required control bandwidth of the step-down boost converter.

7. Step-down boost converter according to one of claims 5 or 6, wherein the second controller (35) is implemented on the basis of a second transconductance amplifier (85).

8. Buck-boost converter according to one of the preceding claims, wherein the forward estimator (50) is configured to generate the second signal (S2) based on a scaled input voltage (UES) which results from a scaling of the input voltage (UE), wherein the level of scaling is determined depending on a maximum permissible power dissipation and / or a required control bandwidth of the buck-boost converter.

9. Circuit arrangement (170) comprising at least one buck-boost converter according to one of the preceding claims.

10. Circuit arrangement (170) according to claim 9, wherein the circuit arrangement (170) - a power converter, and / or - an integrated voltage converter, and / or - a power supply for a vehicle control unit, and / or - a converter for a photovoltaic system.

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