Electric power conversion apparatus

Abstract

An electric power conversion apparatus (100) connected to an AC grid (2) comprises an electric power converter (6) that executes electric power conversion between itself and the AC grid (2), and a control device (5) for controlling the amount of electricity exchanged between the electric power converter (6) and the AC grid (2) in accordance with a plurality of command values. The plurality of command values include an active electric power command value and a reactive electric power command value, which are respective command values for active electric power and reactive electric power exchanged between the AC grid (2) and the electric power converter (6). The control device (5) executes a limitation process for limiting at least one of the active electric power command value and the reactive electric power command value so that the apparent electric power of the electric power converter (6) does not exceed an upper limit value. The limitation process is executed so as to select, on the basis of state information pertaining to connection points, a plurality of limitation operations that differ in terms of computation processes for calculating the post-limitation-process active electric power command value and reactive electric power command value from the pre-limitation-process active electric power command value and reactive electric power command value.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device.

[0002] In recent years, the introduction of renewable energy sources such as solar power generation has progressed as part of efforts to achieve a carbon-free society by 2050. However, it is believed that the increased use of renewable energy will result in the shutdown of thermal power generators, which will exacerbate problems such as a decrease in inertia in the power grid and load leveling. Therefore, demand for system storage batteries, which contribute to grid stabilization by connecting them to the power grid and providing them with the ability to compensate for frequency and voltage fluctuations, is expected to increase in the future. From this perspective, there is a growing need to stabilize the grid by controlling power conversion devices connected to the AC grid.

[0003] For example, Japanese Patent Laid-Open No. 2015-149880 (Patent Document 1) describes control of a power conversion device that converts power so as to exchange power between a power line (AC) and a power storage device (DC) such as a storage battery. In Patent Document 1, one power control amount is selected as a priority power control amount from multiple power control amounts that indicate the magnitude and direction of power in the exchange of power, and the power conversion device is controlled by a command value generated from the power control amount that is the same as the exchange direction of power indicated by the one power control amount (priority power control amount) among the multiple power control amounts.

[0004] This makes it possible to control a power conversion device having multiple functions and to exchange power based on the multiple functions in the direction of exchange of power indicated by a selected power control amount (priority power control amount), thereby making it possible to stabilize the grid by utilizing the multiple functions.

[0005] JP 2015-149880 A

[0006] On the other hand, during actual operation of the power conversion device, there is an upper limit to the amount of electricity (power, current, voltage) that can be output, and it is necessary to appropriately limit the command value of the amount of electricity. In this regard, the control described in Patent Document 1 describes setting a command value of an amount of electricity, such as an active power command value, under a limit that does not exceed a predetermined upper limit value.

[0007] However, in limiting the command value of the amount of electricity by a certain process using a fixed upper limit value as described in Patent Document 1, there is a concern that depending on the operating conditions of the power conversion device, the upper limit value of the command value of the amount of electricity cannot be appropriately set, which may result in the output power from the power conversion device not being fully utilized.

[0008] The present disclosure has been made to solve such problems, and the purpose of the present disclosure is to improve the effect of stabilizing the system by the power output from the power conversion device by optimizing the process of setting the upper limit of the command value of the electric quantity in the power conversion device connected to the AC system (hereinafter also referred to as "limit process").

[0009] In one aspect of the present disclosure, a power conversion device includes a power converter for performing power conversion with an AC system, and a control device. The control device controls an amount of electricity exchanged between the power converter and the AC system according to a plurality of command values. The plurality of command values ​​include an active power command value and a reactive power command value, which are command values ​​for active power and reactive power exchanged between the AC system and the power converter, respectively. The control device includes a first command value limiter unit. The first command value limiter unit generates final active power command values ​​and reactive power command values ​​through a first limit process that limits at least one of the active power command value and the reactive power command value so that the apparent power of the power converter does not exceed an upper limit value. The first command value limiter unit executes the first limit process based on state information of the power converter used to control the active power and reactive power and an interconnection point of the AC system, so as to select from a plurality of limit operations that use different arithmetic processes for calculating the final active power command value and reactive power command value from the active power command value and reactive power command value before the first limit process.

[0010] According to the present disclosure, the calculation process for limiting the active power command value and the reactive power command value can be switched based on the state information of the interconnection point used for controlling the active power and the reactive power. Therefore, by performing limiting process that adjusts the priority of the active power output and the reactive power output, it is possible to maximize the output power that can be effectively used for system stabilization.

[0011] 1 is a schematic diagram illustrating an example of the configuration of a power conversion device according to the present embodiment. FIG. 2 is a circuit diagram illustrating a first example of the configuration of a converter cell shown in FIG. 1. FIG. 3 is a circuit diagram illustrating a second example of the configuration of the converter cell shown in FIG. 1. FIG. 4 is a block diagram illustrating an example of the hardware configuration of a control device shown in FIG. 1. FIG. 5 is a functional block diagram illustrating a control configuration according to a first embodiment for the power converter shown in FIG. 1. FIG. 6 is a functional block diagram illustrating an internal configuration of a DC current command limiter unit shown in FIG. 4. FIG. 7 is a functional block diagram illustrating an internal configuration of an AC power command value limiter unit shown in FIG. 4. FIG. 8 is a circuit diagram illustrating a modified example of the configuration of the power converter shown in FIG. 1. FIG. 9 is a functional block diagram illustrating a control configuration according to a modified example of the first embodiment for the power converter shown in FIG. 1. FIG. 10 is a functional block diagram illustrating a control configuration according to a modified example of the first embodiment for the power converter shown in FIG. 8. FIG. 11 is a functional block diagram illustrating a configuration of an AC power command value limiter unit according to a second embodiment. FIG. 12 is a functional block diagram illustrating a configuration of an AC current command value limiter unit according to the second embodiment. FIG. 10 is a functional block diagram illustrating the configuration of an AC power command value limiter unit according to embodiment 3. FIG. 11 is a functional block diagram illustrating the configuration of an AC current command value limiter unit according to embodiment 3. FIG. 12 is a functional block diagram illustrating the configuration of an AC current command value limiter unit according to embodiment 4. FIG. 13 is a functional block diagram illustrating the configuration of a DC current command limiter unit according to embodiment 5. FIG. 14 is a flowchart illustrating an example of control processing for selecting limit processing according to embodiments 1 to 3. FIG. 15 is a flowchart illustrating another example of control processing for selecting limit processing according to embodiments 1 to 3.

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their description will not be repeated in principle.

[0013] 1 is a schematic diagram illustrating an example of the configuration of a power conversion device 100 according to the present embodiment. Referring to FIG. 1, the power conversion device 100 is connected between an AC system 2 and a DC circuit 4.

[0014] The DC circuit 4 is connected to a DC terminal of the power converter 6. The DC circuit 4 is, for example, a power storage element, and can be configured to include an electric double layer capacitor and / or a storage battery such as a lithium ion battery.

[0015] Alternatively, the DC circuit 4 may be configured to include a DC terminal of another power converter connected to the DC terminal of the power converter 6. In this case, by connecting the two power conversion devices 100 and the other power converter, a BTB (Back To Back) system can be configured to connect AC power systems with different rated frequencies, etc.

[0016] The power conversion device 100 includes a self-excited power converter 6 and a control device 5 for controlling the power converter 6. Typically, the power converter 6 is configured by a modular multilevel converter (MMC) including a plurality of converter cells (simply referred to as "cells" in FIG. 1 ) 1 cascaded to one another. Note that a "converter cell" is also called a "sub module" or a "unit converter."

[0017] The power converter 6 performs power conversion between the DC circuit 4 and the AC system 2. Specifically, the power converter 6 converts DC power output from the DC circuit 4 into AC power and outputs the AC power to the AC system 2 via the transformer 3. Alternatively, the power converter 6 converts AC power from the AC system 2 into DC power and outputs the DC power to the DC circuit 4.

[0018] 1 , the power converter 6 includes a plurality of arms for each phase of the AC system 2. Specifically, the power converter 6 includes a plurality of leg circuits 8u, 8v, 8w connected in parallel with each other between a positive DC terminal (i.e., a high-potential DC terminal) Np and a negative DC terminal (i.e., a low-potential DC terminal) Nn. Note that, hereinafter, the three-phase leg circuits 8u, 8v, 8w are also referred to as "leg circuits 8" when they are collectively referred to or when any one of them is indicated.

[0019] A leg circuit 8 is provided for each of the multiple phases constituting the AC. The leg circuit 8 is connected between the AC system 2 and the DC circuit 4 and performs power conversion between the two circuits. FIG. 1 shows a case where the AC system 2 is a three-phase AC system, and three leg circuits 8u, 8v, and 8w are provided corresponding to the u-phase, v-phase, and w-phase, respectively. Note that if the AC system 2 is a single-phase AC system, two leg circuits are provided. In the configuration example of FIG. 1, the MMC is configured using a so-called double star connection.

[0020] The AC terminals Nu, Nv, and Nw provided in the leg circuits 8u, 8v, and 8w, respectively, are connected to an AC system 2 via a transformer 3. The AC system 2 is, for example, an AC power system including an AC power source. For ease of illustration, FIG. 1 does not show the connection between the AC terminals Nv and Nw and the transformer 3. The DC terminals provided in common to each leg circuit 8 (i.e., a positive DC terminal Np and a negative DC terminal Nn) are connected to the DC circuit 4.

[0021] Instead of using the transformer 3 shown in FIG. 1 , the leg circuits 8u, 8v, and 8w may be connected to the AC system 2 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, and Nw, a primary winding may be provided in each of the leg circuits 8u, 8v, and 8w, and the leg circuits 8u, 8v, and 8w may be AC-connected to the transformer 3 or the interconnection reactor via a secondary winding magnetically coupled to the primary winding. In this case, the primary winding may be replaced by reactors 7a and 7b described below. That is, the leg circuit 8 is electrically connected to the AC system 2 via a connection part provided in each of the leg circuits 8u, 8v, and 8w, such as the AC terminals Nu, Nv, and Nw or the primary winding. In the configuration example shown in FIG. 1 , the connection point between the transformer 3 and the AC system 2 corresponds to an example of an “interconnection point” between the power converter 6 and the AC system 2.

[0022] The leg circuit 8u is divided into a positive arm 13u extending from the positive DC terminal Np to the AC terminal Nu, and a negative arm 14u extending from the negative DC terminal Nn to the AC terminal Nu. The connection point between the positive arm 13u and the negative arm 14u is connected to the transformer 3 as the AC terminal Nu. The leg circuit 8u is further connected to the DC circuit 4 via the positive DC terminal Np and the negative DC terminal Nn. The leg circuit 8v includes a positive arm 13v and a negative arm 14v, and the leg circuit 8w includes a positive arm 13w and a negative arm 14w. Since the leg circuits 8v and 8w have the same configuration as the leg circuit 8u, the leg circuit 8u will be described below as a representative example.

[0023] In leg circuit 8u, positive arm 13u includes a plurality of converter cells 1 cascaded together and reactor 7a. The plurality of converter cells 1 and reactor 7a are connected in series. Negative arm 14u includes a plurality of converter cells 1 cascaded together and reactor 7b. The plurality of converter cells 1 and reactor 7b are connected in series.

[0024] The reactor 7a may be inserted at any position in the positive arm 13u, and the reactor 7b may be inserted at any position in the negative arm 14u. There may be a plurality of reactors 7a and a plurality of reactors 7b. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 7a in the positive arm 13u or only the reactor 7b in the negative arm 14u may be provided.

[0025] The power conversion device 100 further includes an AC voltage detector 10 and an AC current detector 15 provided corresponding to the interconnection point, DC voltage detectors 11a and 11b provided corresponding to the connection point with the DC circuit 4, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure various quantities (current, voltage, power, etc.) used to control the electrical quantities of the power conversion device 100. Signals detected by these detectors are input to the control device 5.

[0026] The AC voltage detector 10 detects three-phase AC voltages Vsysu, Vsysv, and Vsysw (hereinafter also collectively referred to as "AC voltages Vsys") at the interconnection point between the AC system 2 and the power conversion device 100. The AC current detector 15 detects three-phase AC currents Isysu, Isysv, and Isysw (hereinafter also collectively referred to as "AC currents Isys") at the interconnection point between the AC system 2 and the power conversion device 100. The DC voltage detector 11a detects a measured DC voltage Vdcp at the positive-side DC terminal Np connected to the DC circuit 4. The DC voltage detector 11b detects a measured DC voltage Vdcn at the negative-side DC terminal Nn connected to the DC circuit 4.

[0027] The arm current detectors 9a and 9b provided in the u-phase leg circuit 8u detect a measured positive arm current Iup flowing in the positive arm 13u and a measured negative arm current Iun flowing in the negative arm 14u, respectively. The arm current detectors 9a and 9b provided in the v-phase leg circuit 8v detect a measured positive arm current Ivp and a measured negative arm current Ivn, respectively. The arm current detectors 9a and 9b provided in the w-phase leg circuit 8w detect a measured positive arm current Iwp and a measured negative arm current Iwn, respectively.

[0028] The DC current Idc output from the power converter 6 is detected using a DC current detector (not shown). The DC current Idc corresponds to the value of the DC current flowing between the power converter 6 and the DC circuit 4. The DC current Idc can also be calculated using the measured positive arm current values ​​Iup, Ivp, Iwp and the measured negative arm current values ​​Iun, Ivn, Iwn according to the following equation (1): Idc=(Ipu+Ipv+Ipw+Inu+Inv+Inw) / 2 (1)

[0029] (Configuration Example of Converter Cell) Next, a configuration example of the converter cell 1 in FIG. 1 will be described with reference to FIGS. 2A and 2B.

[0030] Fig. 2A is a circuit diagram illustrating a first configuration example of the converter cell 1. The converter cell 1 shown in Fig. 2A has a circuit configuration called a half-bridge configuration, while the converter cell 1 shown in Fig. 2B has a circuit configuration called a full-bridge configuration.

[0031] 2A, the converter cell 1 in a half-bridge configuration includes a series body formed by connecting two switching elements 31p and 31n in series, a capacitor 32 as a power storage element, and a voltage detector 33. The series body and capacitor 32 are connected in parallel. The voltage detector 33 detects a capacitor voltage Vcap, which is the voltage across the capacitor 32.

[0032] 2B , the converter cell 1 in the full-bridge configuration includes a first series body formed by connecting two switching elements 31p1 and 31n1 in series, a second series body formed by connecting two switching elements 31p2 and 31n2 in series, a capacitor 32, and a voltage detector 33. The first series body, the second series body, and the capacitor 32, which is an example of an "energy storage element," are connected in parallel. The voltage detector 33 detects a capacitor voltage Vcap.

[0033] The two switching elements 31p and 31n in Fig. 2A and the four switching elements 31p1, 31n1, 31p2, and 31n2 in Fig. 2B are configured by connecting a free wheel diode in antiparallel to a self-extinguishing semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). A film capacitor or other such capacitor is typically used as the capacitor 32 in Figs. 2A and 2B.

[0034] In the following description, the switching elements 31p, 31n, 31p1, 31n1, 31p2, and 31n2 are also collectively referred to as switching elements 31. Furthermore, the on / off of the semiconductor switching elements in the switching elements 31 is simply referred to as "on / off of the switching elements 31."

[0035] 2A , in the converter cell 1 having a half-bridge configuration, both terminals of the switching element 31n serve as input / output terminals G1 and G2. This converter cell 1 can output the voltage across the capacitor 32 and zero voltage between the input / output terminals G1 and G2 by switching operations of the switching elements 31p and 31n. For example, when the switching element 31p is on and the switching element 31n is off, the voltage across the capacitor 32 is output. On the other hand, when the switching element 31p is off and the switching element 31n is on, zero voltage is output.

[0036] 2B , the converter cell 1 in the full-bridge configuration has the midpoint between the switching elements 31p1 and 31n1 and the midpoint between the switching elements 31p2 and 31n2 as input / output terminals G1 and G2 of the converter cell 1, respectively. This converter cell 1 can output a positive voltage or a zero voltage by turning on the switching element 31n2, turning off the switching element 31p2, and alternately turning on the switching elements 31p1 and 31n1. Also, this converter cell 1 can output a zero voltage or a negative voltage by turning off the switching element 31n2, turning on the switching element 31p2, and alternately turning on the switching elements 31p1 and 31n1.

[0037] In this embodiment, the converter cell 1 may be either a cell with a half-bridge configuration shown in Fig. 2A or a cell with a full-bridge configuration shown in Fig. 2B. Alternatively, a converter cell with a configuration other than those illustrated in Fig. 2A and Fig. 2B, for example, a circuit configuration also called a 1.5 half-bridge configuration in which the switching element 31p2 in Fig. 2B is replaced with only a diode, may be applied to the converter cell 1.

[0038] (Control Device) Next, a description will be given of the configuration and operation of the control device 5. Fig. 3 shows an example of the hardware configuration of the control device 5. Fig. 3 shows an example of the control device 5 configured by a computer.

[0039] 3, the control device 5 includes one or more input converters 70, one or more sample-and-hold (S / H) circuits 71, a multiplexer (MUX) 72, and an A / D converter 73. The control device 5 further includes one or more central processing units (CPUs) 74, random access memories (RAMs) 75, and read-only memories (ROMs) 76. The control device 5 further includes one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 that interconnects the above components.

[0040] The input converter 70 has an auxiliary transformer (not shown) for each input channel, which converts the detection signal from each electrical quantity detector in FIG. 1 into a signal with a voltage level suitable for subsequent signal processing.

[0041] A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds a signal representing an electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.

[0042] The multiplexer 72 sequentially selects the signals held in the plurality of sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing a plurality of A / D converters 73, A / D conversion may be performed in parallel on detection signals of a plurality of input channels.

[0043] The CPU 74 controls the entire control device 5 and executes arithmetic processing in accordance with a program. The RAM 75 as a volatile memory and the ROM 76 as a nonvolatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs, setting values ​​for signal processing, etc. The auxiliary storage device 78 is a nonvolatile memory with a larger capacity than the ROM 76, and stores programs, data on detected values ​​of electricity, etc.

[0044] The input / output interface 77 is an interface circuit for communication between the CPU 74 and an external device.

[0045] Unlike the example of FIG. 3, at least a part of the control device 5 can be configured using circuits such as an FPGA (Field Programmable Gate Array) and an ASIC (Application Specific Integrated Circuit).

[0046] Fig. 4 is a functional block diagram illustrating a control configuration according to the first embodiment of the power converter 6 by the control device 5. Fig. 4 shows an example of the functional configuration of a control device 5A for controlling the output of the power converter 6 of the example configuration (double star connection) in Fig. 1 by power control that directly controls the output current (current control type control system).

[0047] The functions of each functional block in each functional block diagram described below, including Fig. 4, can be configured based on the computer exemplified in Fig. 3, or at least a part of the functions can be configured using circuits such as FPGA and ASIC. Also, at least a part of the functions of each functional block can be configured using analog circuits.

[0048] As shown in FIG. 4 , the control device 5A includes a coordinate conversion unit 41, a PLL (Phase Locked Loop) unit 42, an amplitude calculation unit 43, and an AC power calculation unit 44 for obtaining state information of the interconnection point between the power converter 6 and the AC system 2.

[0049] The PLL unit 42 detects the system angular frequency ωsys and phase θsys of the AC voltage Vsys by using the PLL.

[0050] The coordinate conversion unit 41 uses the phase θsys detected by the PLL unit 42 to perform three-phase / two-phase conversion of the three-phase AC currents Isysu, Isysv, and Isysw (AC current detector 15) and the three-phase AC voltages Vsysu, Vsysv, and Vsysw (AC voltage detector 10), thereby calculating the d-axis current Id and the q-axis current Iq, as well as the d-axis voltage Vd and the q-axis voltage Vq.

[0051] The amplitude calculation unit 43 calculates the AC voltage amplitude Vmag indicated by the d-axis voltage Vd and the q-axis voltage Vq. Specifically, the amplitude calculation unit 43 removes high-frequency components from the d-axis voltage Vd and the q-axis voltage Vq using a moving average filter or the like, and calculates the square sum (i.e., √(Vd ２ +Vq ２ The amplitude calculation unit 43 outputs the sum of squares as the AC voltage amplitude Vmag of the output voltage of the power converter 6.

[0052] The AC power calculation unit 44 calculates the active power Pac and reactive power Qac of the AC system 2 based on the d-axis current Id, the q-axis current Iq, the d-axis voltage Vd, and the q-axis voltage Vq. The active power Pac and reactive power Qac correspond to the active power and reactive power output from the power converter 6 to the AC system 2, respectively. The positive and negative signs of the active power Pac are indicated by a positive value (Pac>0) when the active power is output from the power converter 6 to the AC system 2 and a negative value (Pac<0) when the active power is input from the AC system 2 to the power converter 6. The reactive power Qac is indicated by a positive value (Qac>0) when the power conversion device 100 is in capacitive operation and a negative value (Qac<0) when the power conversion device 100 is in inductive operation.

[0053] In this embodiment, the quantities used to control active power and reactive power, which are calculated based on the measured values ​​of the electrical quantities (AC voltage Vsys, AC current Isys) at the interconnection point, correspond to state information of the interconnection point. For example, the system angular frequency ωsys of the AC voltage Vsys detected by the PLL unit 42 and the AC voltage amplitude Vmag calculated by the amplitude calculation unit 43 correspond to an example of "state information of the interconnection point." Alternatively, the d-axis current Id and the q-axis current Iq, the d-axis voltage Vd and the q-axis voltage Vq calculated by the coordinate conversion unit 41, and the active power Pac and reactive power Qac calculated by the AC power calculation unit 44 also correspond to an example of "state information of the interconnection point." Furthermore, in the AC power control and AC current control described below, one embodiment also includes a power command value (active power and reactive power) calculated using the system angular frequency ωsys and the AC voltage amplitude Vmag, a current command value (d-axis and q-axis) calculated using the active power Pac and the reactive power Qac, and the "state information of the interconnection point."

[0054] The control device 5 further includes a capacitor voltage control unit 45, a DC current command value limiter unit 47A, a DC current control unit 48, a frequency control unit 49, an AC voltage control unit 50, an AC power command value limiter unit 51A, an active power control unit 52, a reactive power control unit 53, an AC current command value limiter unit 54A, an AC current control unit 55, and a PWM (Pulse Width Modulation) unit 56, all of which are used to control power conversion by the power converter 6.

[0055] The capacitor voltage control unit 45 generates the first DC current command value Idc* so that the average value Vcapav of the capacitor voltage Vcap (capacitor 32) of the converter cell 1 follows the command value Vcapav*. For example, the first DC current command value Idc* is generated by control calculation such as proportional (P) control or proportional-integral (PI) control based on the voltage deviation ΔVcap (ΔVcap = Vcapav* - Vcapav). Specifically, the first DC current command value Idc* can be calculated so that when ΔVcap > 0, the DC current Idc ( FIG. 1 ) from the DC circuit 4 is increased, while when ΔVcap < 0, the DC current Idc is decreased.

[0056] The DC current command value limiter unit 47A performs limit processing on the first DC current command value Idc* from the capacitor voltage control unit 45 to generate a second DC current command value Idc**.

[0057] FIG. 5 is a functional block diagram illustrating the internal configuration of the DC current command value limiter unit 47A.

[0058] 5, the DC current command value limiter unit 47A includes calculation units 47a and 47b and a switching processing unit 47x. The calculation unit 47b calculates the absolute value |Idc*| of the first DC current command value Idc*. The calculation unit 47a outputs the product of (Idc* / |Idc*|) and a predetermined DC current limit threshold Idclim* as a first input to the switching processing unit 47x. Furthermore, the first DC current command value Idc* is input as is to the switching processing unit 47x as a second input.

[0059] The DC current limit threshold Idclim* can be determined in advance based on the operating range and losses of the power converter 6. As an example, assume that the DC voltage Vdc is designed to output rated power in the range of 0.5 [pu] to 1 [pu], and the loss in the DC circuit 4 and the power conversion device 100 is rated at 0.01 [pu]. In this case, the DC current Idc needs to be output in the range of up to 2.02 [pu], but Idclim* can be set to 2.1 [pu] with a margin that takes into account errors in the detection system, etc.

[0060] The switching processing unit 47x selectively outputs one of the first input and the second input as a second DC current command value Idc** according to the result of comparison between |Idc*| from the calculation unit 47b and the DC current limit threshold value Idclim*.

[0061] Specifically, when |Idc*|≧Idclim* (A≧B, sw=0), the switching processing unit 47x outputs the output value (first input) of the calculation unit 47a as the second DC current command value Idc** in accordance with equation (2). As a result, it can be understood that when Idc*>0, Idc**=Idclim* is set, whereas when Idc*<0, Idc**=−Idclim* is set. Idc**=(Idc* / |Idc*|)×Idclim* (2)

[0062] On the other hand, when |Idc*|<Idclim* (A<B, sw=1), the switching processing unit 47x outputs the first DC current command value Idc* set by the DC current command value limiter unit 47A as the second DC current command value Idc** in accordance with equation (3): Idc**=Idc* (3)

[0063] As a result, the second DC current command value Idc** is set in accordance with the first DC current command value Idc* by the DC current command value limiter unit 47A, with limit processing (DC current command value limiter unit 47A) to prevent the absolute value from exceeding the DC current limit threshold value Idclim*.

[0064] 4, the DC current control unit 48 generates a DC voltage command value Vdc* so that the DC current Idc follows the second DC current command value Idc**. The DC voltage command value Vdc* is input to the PWM unit 56 and, as will be described later, is reflected in the generation of a gate signal GP for each converter cell 1 of the power converter 6.

[0065] The frequency control unit 49 generates the first active power command value Pac* so that the system angular frequency ωsys follows the system angular frequency command value ωsys*. For example, the frequency control unit 49 can generate the first active power command value Pac* by a control calculation (e.g., a proportional (P) control calculation, a proportional-plus-integral (PI) control calculation, or a first-order lag calculation) based on the deviation Δωsys (Δωsys = ωsys* - ωsys) between the system angular frequency ωsys and the system angular frequency command value ωsys*. At this time, it is also possible to set a dead band in the frequency control unit 49 and set Pac* = 0 when the absolute value of the deviation Δωsys is equal to or less than a predetermined threshold.

[0066] The AC voltage control unit 50 generates a first reactive power command value Qac* so that the AC voltage amplitude Vmag follows the AC voltage amplitude command value Vmag*. For example, the AC voltage control unit 50 can generate the first reactive power command value Qac* by a control calculation (proportional (P) control calculation, proportional-integral (PI) control calculation, first-order lag calculation, etc.) based on the deviation ΔVmag (ΔVmag = Vmag* - Vmag) between the AC voltage amplitude Vmag and the AC voltage amplitude command value Vmag*. At this time, it is also possible to set a dead band in the AC voltage control unit 50 and set Qac* to 0 when the absolute value of the deviation ΔVmag is equal to or less than a predetermined threshold.

[0067] The AC power command value limiter unit 51A performs limit processing on the first active power command value Pac* from the frequency control unit 49 and the first reactive power command value Qac* from the AC voltage control unit 50, and generates a second active power command value Pac** and a second reactive power command value Qac**.

[0068] FIG. 6 is a functional block diagram illustrating the internal configuration of the AC power command value limiter unit 51A.

[0069] As shown in FIG. 6, the AC power command value limiter unit 51A has calculation units 51a to 51c and a switching processing unit 51x.

[0070] The calculation unit 51c calculates the sum of squares of the first active power command value Pac* and the first reactive power command value Qac*, and outputs the apparent power command value Sac* expressed by the following equation (4): Sac*=√(Pac* ２ +Qac* ２ ) … (4)

[0071] The calculation unit 51a outputs a value (Pac* / Sac*) obtained by dividing the first active power command value Pac* by the apparent power command value Sac* to the switching processing unit 51x. The output value of the calculation unit 51a corresponds to the product of the first active power command value Pac* and the ratio (1 / Sac*) of the apparent power command value Sac* to the upper limit value (1.0 [pu]) corresponding to the rating of the apparent power of the power converter 6.

[0072] The calculation unit 51b outputs a value (Qac* / Sac*) obtained by dividing the first reactive power command value Qac* by the apparent power command value Sac* to the switching processing unit 51x. The output value of the calculation unit 51b corresponds to the multiplication value of the first reactive power command value Qac* and the above-mentioned ratio (1 / Sac*).

[0073] The switching processing unit 51x selectively outputs one of the first active power command value Pac* and the first reactive power command value Qac* and the output values ​​of the calculation units 51a and 51b as the second active power command value Pac** and the second reactive power command value Qac**, based on the comparison result between the apparent power command value Sac* from the calculation unit 51c and the upper limit value 1.0 [pu] corresponding to the rating (standard value) of the power converter 6.

[0074] Specifically, when Sac*<1.0 [pu] (A<B, sw=1), the switching processing unit 51x outputs the first active power command value Pac* from the frequency control unit 49 and the first reactive power command value Qac* from the AC voltage control unit 50 as the second active power command value Pac** and the second reactive power command value Qac** in accordance with equation (5): Pac**=Pac*, Qac**=Qac* (5)

[0075] On the other hand, when Sac*≧1.0 [pu] (A≧B, sw=0), the switching processing unit 51x outputs the output values ​​of the calculation units 51a and 51b as the second active power command value Pac** and the second reactive power command value Qac** in accordance with equations (6) and (7) in order to limit the apparent power of the power converter 6. Pac**=Pac*×(1 / Sac*) (6) Qac**=Qac*×(1 / Sac*) (7)

[0076] In the expressions (6) and (7), it is understood that when Sac*>1.0, (1 / Sac*)<1.0. The operation for limiting processing using the expressions (6) and (7) by the AC power command value limiter unit 51A corresponds to one example of the "first limiting operation."

[0077] As a result, the second active power command value Pac** and the second reactive power command value Qac** are set in accordance with the first active power command value Pac* and the first reactive power command value Qac*, accompanied by limit processing (AC power command value limiter section 51A) that limits the apparent power of the power converter 6 to a range that does not exceed an upper limit value (1.0 [pu]) corresponding to the rating.

[0078] Furthermore, when the apparent power command value Sac* resulting from the first active power command value Pac* and the first reactive power command value Qac* exceeds the upper limit (standard value), the limiting process by the AC power command value limiter unit 51A can set the second active power command value Pac** and the second reactive power command value Qac** by multiplying the first active power command value Pac* and the first reactive power command value Qac* by (1 / Sac*), which is the inverse ratio of the upper limit (1.0 [pu]) of the apparent power command value Sac*. The (1 / Sac*) common to equations (6) and (7) corresponds to an example of a "power limit coefficient."

[0079] As a result, the limiting process by the AC power command value limiter unit 51A can maximize the output power within the range of the specification values ​​of the power converter 6, compared to normal limiting process in which, when the first active power command value Pac* and the first reactive power command value Qac* exceed fixed upper limits, the second active power command value Pac** and the second reactive power command value Qac** are set to those upper limits.

[0080] It is understood that in the AC power command value limiter unit 51A, when the apparent power command value Sac* exceeds the upper limit value 1.0 [pu], limiting is performed by multiplying each of the first active power command value Pac* and the first reactive power command value Qac* by a common ratio (1 / Sac*), thereby limiting the active power output and the reactive power output with the same priority.

[0081] 4 , the second active power command value Pac** and the second reactive power command value Qac** from the AC power command value limiter unit 51A are input to the active power control unit 52 and the reactive power control unit 53 as the final active power command value and the final reactive power command value. The active power control unit 52 generates a first q-axis current command value Iq* of the active component (active current) of the AC current so that the active power Pac follows the second active power command value Pac**. For example, the active power control unit 52 can generate the first q-axis current command value Iq* by a control operation (proportional (P) control operation, proportional-integral (PI) control operation, first-order lag operation, etc.) based on the active power deviation ΔPac (ΔPac=Pac**-Pac).

[0082] Similarly, the reactive power control unit 53 generates a first d-axis current command value Id* of the reactive component (reactive current) of the AC current so that the reactive power Qac follows the second reactive power command value Qac**. For example, the reactive power control unit 53 can generate the first d-axis current command value Id* by a control calculation (proportional (P) control calculation, proportional-integral (PI) control calculation, first-order lag calculation, etc.) based on the reactive power deviation ΔQac (ΔQac=Qac**-Qac).

[0083] The AC current command value limiter unit 54A performs limit processing on the first q-axis current command value Iq* from the active power control unit 52 and the first d-axis current command value Id* from the reactive power control unit 53, and generates a second q-axis current command value Iq** and a second d-axis current command value Id**.

[0084] FIG. 7 is a functional block diagram illustrating the internal configuration of the AC current command value limiter unit 54A.

[0085] As shown in FIG. 7, the AC current command value limiter unit 54A has calculation units 54a to 54c and a switching processing unit 54x.

[0086] The calculation unit 51c calculates the sum of squares of the first q-axis current command value Iq* and the first d-axis current command value Id*, and outputs the AC current command value amplitude Iac* expressed by the following equation (8): Iac*=√(Id* ２ +Iq* ２ ) … (8)

[0087] The calculation unit 54a outputs to the switching processing unit 54x a value (Id* / Iac*×Iaclim) obtained by multiplying a value obtained by dividing the first d-axis current command value Id* by the AC current command value amplitude Iac* and a predetermined AC current limit threshold value Iaclim*. The output value of the calculation unit 54a corresponds to the multiplication value of the first d-axis current command value Id* by the ratio (Iaclim* / Iac*) of the upper limit value (Iaclim*) and the AC current command value amplitude Iac*.

[0088] Similarly, the calculation unit 54b outputs to the switching processing unit 54x a value (Iq* / Iac*×Iaclim) obtained by dividing the first q-axis current command value Iq* by the AC current command amplitude Iac* and multiplying the result by the AC current limit threshold Iaclim*. The output value of the calculation unit 54b corresponds to the multiplication value of the first q-axis current command value Iq* by the ratio (Iaclim* / Iac*).

[0089] The AC current limit threshold Iaclim*, which corresponds to the upper limit of the AC current command amplitude Iac*, can be determined in advance based on the operating range of the power converter 6. As an example, assume that the power converter 6 is designed to output rated power when the AC voltage amplitude Vmag is in the range of 0.5 [pu] to 1 [pu]. In this case, it is necessary to output an AC current of up to 2.0 [pu], but it is possible to set Iaclim* to 2.1 [pu], providing a margin that takes into account errors in the detection system, etc.

[0090] The switching processing unit 54x selectively outputs one of the first d-axis current command value Id* and the first q-axis current command value Iq* and the output values ​​of the calculation units 54a and 54b as the second d-axis current command value Id** and the second q-axis current command value Iq**, in accordance with the result of comparing the AC current command value amplitude Iac* from the calculation unit 54c with an AC current limit threshold value Iaclim* that corresponds to the upper limit value of the AC current amplitude in the power converter 6.

[0091] Specifically, when Iac*<Iaclim* (A<B, sw=1), the switching processing unit 54x outputs the first d-axis current command value Id* from the reactive power control unit 53 and the first q-axis current command value Iq* from the active power control unit 52 as the second d-axis current command value Id** and the second q-axis current command value Iq** in accordance with equation (9): Id**=Id*, Iq**=Iq* (9)

[0092] On the other hand, when Iac*≧Iaclim* (A≧B, sw=0), the switching processing unit 54x outputs the output values ​​of the calculation units 54a and 54b as a second d-axis current command value Id** and a second q-axis current command value Iq** in accordance with equations (10) and (11) so as to limit the amplitude of the AC current output from the power converter 6. Id**=Id*×(Iaclim* / Iac*) (10) Iq**=Iq*×(Iaclim* / Iac*) (11)

[0093] In the equations (10) and (11), since Iac*≧Iaclim*, it is understood that (Iaclim* / Iac*)<1.0. (Iaclim* / Iac*), which is common to the equations (10) and (11), corresponds to an example of a "current limiting coefficient."

[0094] As a result, the second d-axis current command value Id** and the second q-axis current command value Iq** are set in accordance with the first d-axis current command value Id* and the first q-axis current command value Iq*, accompanied by limit processing (AC current command value limiter unit 54A) that limits the AC current amplitude to a range not exceeding an upper limit value (AC current limit threshold Iaclim*).

[0095] Furthermore, when the AC current amplitude Iac* resulting from the first d-axis current command value Id* and the first q-axis current command value Iq* exceeds an upper limit, the AC current command value limiter unit 54A multiplies both the first d-axis current command value Id* and the first q-axis current command value Iq by (Iaclim* / Iac*) to set the second d-axis current command value Id** and the second q-axis current command value Iq**. That is, the AC current command value limiter unit 54A also performs limiting processes that limit the active power output and the reactive power output with the same priority, similar to the AC power command value limiter unit 51A.

[0096] As a result, the limiting process by the AC current command value limiter unit 54A can maximize the output current within the rated range (standard value) of the power converter 6, compared to normal limiting process in which, when the first d-axis current command value Id* and the first q-axis current command value Iq* exceed their fixed upper limit values, the second d-axis current command value Id** and the second q-axis current command value Iq** are set to those upper limit values.

[0097] Referring again to FIG. 4, the AC current control unit 55 generates the d-axis voltage command value Vd* and the q-axis voltage command value Vq* so that the d-axis current Id and the q-axis current Iq follow the second d-axis current command value Id** and the second q-axis current command value Iq**, respectively.

[0098] For example, the AC current control unit 55 can generate the d-axis voltage command value Vd* and the q-axis voltage command value Vq* by control calculations (proportional (P) control calculations, proportional-integral (PI) control calculations, first-order lag calculations, etc.) based on the d-axis current deviation ΔId (ΔId = Id** - Id) and the q-axis current deviation ΔIq (ΔIq = Iq** - Iq).

[0099] The PWM unit 56 generates a gate signal GP that controls the on / off of the switching element 31 of each converter cell 1 of the power converter 6 by pulse width modulation based on the DC voltage command value Vdc*, the d-axis voltage command value Vd*, the q-axis voltage command value Vq*, and the carrier signal car.

[0100] Specifically, the PWM unit 56 performs two-phase / three-phase conversion, which is the inverse of the three-phase / two-phase conversion performed by the coordinate conversion unit 41, on the d-axis voltage command value Vd* and the q-axis voltage command value Vq*, to obtain AC voltage command values ​​Vu*, Vv*, and Vw* for the u-phase, v-phase, and w-phase, each having a phase difference of 120°. Furthermore, the AC voltage command values ​​Vu*, Vv*, and Vw* for the u-phase, v-phase, and w-phase are added to the DC voltage command value Vdc* from the DC current control unit 48 to generate voltage command values ​​Vu**, Vv**, and Vw** for the u-phase, v-phase, and w-phase (Vu**=Vu*+Vdc*, Vv**=Vv*+Vdc*, Vw**=Vw*+Vdc*).

[0101] Furthermore, in the PWM unit 56, the gate signal GP of each converter cell 1 of the leg circuits 8u, 8v, 8w is generated based on a voltage comparison between the AC voltage command values ​​Vu**, Vv**, Vw** and a carrier signal car, which is a repetitive waveform signal (e.g., a triangular wave signal or a sawtooth wave signal) of a predetermined period.

[0102] This makes it possible to control the electrical quantity (at least one of current, voltage, and power) output from the power converter 6 in accordance with the electrical quantity command values ​​(Pac**, Qac**, Iq**, Id**, Idc**) set through limit processing by the AC power command value limiter unit 51A, the AC current command value limiter unit 54A, and the DC current command value limiter unit 47A.

[0103] The power converter 6 is not limited to the configuration example (double star connection) shown in FIG. 1, but may also have a delta connection configuration.

[0104] Fig. 8 is a circuit diagram illustrating a modified configuration of power converter 6. As shown in Fig. 8, power converter 6# according to the modified example can be configured to include delta-connected three-phase leg circuits 8u, 8v, and 8w. Each leg circuit 8 can be provided with reactor 7a described in Fig. 1.

[0105] 1 , the delta-connected power converter 6# is also connected to the AC system 2 via the transformer 3. That is, in the configuration example of FIG. 8 , the connection point between the transformer 3 and the AC system 2 corresponds to one example of the "interconnection point" between the power converter 6 and the AC system 2. Alternatively, as described in FIG. 1 , it is also possible to connect the power converter 6 and the AC system 2 without using the transformer 3.

[0106] Although not shown in Fig. 8, an AC voltage detector 10 and an AC current detector 15 similar to those in Fig. 1 are also arranged for power converter 6# at the point of interconnection with AC system 2. Then, AC voltage Vsys (three-phase AC voltages Vsysu, Vsysv, Vsysw) and AC current Isys (three-phase AC currents Isysu, Isysv, Isysw) similar to those in Fig. 1 are measured, and the measured values ​​are input to control device 5.

[0107] In addition, since the delta-connected power converter 6# does not have a DC terminal like the double star-connected power converter (FIG. 1), the full-bridge configuration shown in FIG. 2B is applied to each converter cell 1.

[0108] Fig. 9 is a functional block diagram illustrating a control configuration according to the first embodiment of power converter 6# shown in Fig. 8. Fig. 9 shows an example of a functional configuration of control device 5B for controlling the output of delta-connected power converter 6#.

[0109] 9, control device 5B differs from control device 5A (FIG. 4) applied to double star connection in that it does not include DC current control unit 48 for DC current control, capacitor voltage control unit 45 for generating a command value for DC current control unit 48, and DC current command value limiter unit 47A. As described above, this is because delta-connected power converter 6# is not connected to DC circuit 4 (FIG. 1), and therefore does not need the function of controlling DC current Idc.

[0110] As a result, in control device 5B, the output of delta-connected power converter 6# is controlled by coordinate conversion unit 41, PLL unit 42, amplitude calculation unit 43, AC power calculation unit 44, frequency control unit 49, AC voltage control unit 50, AC power command value limiter unit 51A, active power control unit 52, reactive power control unit 53, AC current command value limiter unit 54A, AC current control unit 55, and PWM unit 56, which are similar to those in control device 5A.

[0111] In the PWM unit 56 of the control device 5B, the u-phase, v-phase, and w-phase voltage command values ​​Vu**, Vv**, and Vw** are set by the above-mentioned AC voltage command values ​​Vu*, Vv*, and Vw* obtained by two-phase / three-phase conversion of the d-axis voltage command value Vd* and the q-axis voltage command value Vq* (Vu**=Vu*, Vv**=Vv*, Vw**=Vw*).

[0112] Therefore, control device 5B can also control the electrical quantity (at least one of current, voltage, and power) output from power converter 6# in accordance with the electrical quantity command values ​​(Pac**, Qac**, Iq**, Id**) set through limit processing by AC power command value limiter unit 51A and AC current command value limiter unit 54A similar to control device 5A.

[0113] 9 has been described as a configuration example in which the placement of the capacitor voltage control unit 45 in FIG. 4 is omitted, but it is also possible to configure the system so that the output value (active power command value) of the frequency control unit 49 is corrected using the output value of the capacitor voltage control unit 45. For example, it is possible to configure the capacitor voltage control unit 45 to output an active power correction value ΔPac* generated by a control calculation for making the average value Vcapav of the capacitor voltage of the converter cell 1 follow the command value Vcapav*, and to input the sum of the output value from the frequency control unit 49 and the active power correction value ΔPac* as a first active power command value Pac* to the AC power command value limiter unit 51A.

[0114] As described above, in the power conversion device according to the first embodiment, the outputs of power converters 6, 6# configured with double-star-connected or delta-connected MMCs can be controlled in accordance with the electric quantity command values ​​set in conjunction with the limiting processes by AC power command value limiter unit 51A, AC current command value limiter unit 54A, and DC current command value limiter unit 47A, or the limiting processes by AC power command value limiter unit 51A and AC current command value limiter unit 54A.

[0115] As a result, according to the power conversion device of embodiment 1, it is possible to limit the AC power output to the AC system 2 so that it is equal to or lower than the rating of the power converter (equal to or lower than the upper limit value), and to maximize the output power for effective use in system stabilization within the rating (standard value) range of the power converter.

[0116] In the power conversion device according to the first embodiment, the limiting process has been described in which both the active power output and the reactive power output are limited with the same priority by AC power command value limiter unit 51A and AC current command value limiter unit 54A. For example, this limiting process is suitable in a situation where both the system angular frequency deviation Δωsys and the AC voltage amplitude deviation ΔVmag are relatively large and the reactive power command value Qac* and the active power command value Pac* are somewhat balanced, i.e., in a situation where both the active power and the reactive power are output from power converters 6, 6#.

[0117] Modification of First Embodiment In the first embodiment, the power control that introduces the d-axis current and the q-axis current has been described. However, as will be described below as a modification of the first embodiment, it is also possible to apply a voltage control type control system that directly sets the amplitude and phase of an AC voltage command value to the output control of power converters 6, 6#, rather than a current control type control system that controls the output current.

[0118] Fig. 10 is a functional block diagram illustrating a control configuration according to a modification of the first embodiment for the double-star-connected power converter 6 (Fig. 1). Fig. 10 shows an example of the functional configuration of a control device 5C for applying a voltage-controlled control system to the output of the double-star-connected power converter 6 according to the modification of the first embodiment.

[0119] 10 , the control device 5C differs from the control device 5A ( FIG. 4 ) according to the first embodiment, which is applied to a double star connection, in the outputs from the active power control unit 52 and the reactive power control unit 53. Specifically, the active power control unit 52 generates an angular frequency command value ωconv* instead of the first q-axis current command value Iq* so that the active power Pac follows the second active power command value Pac** from the AC power command value limiter unit 51A. Similarly, the reactive power control unit 53 generates a voltage amplitude command value Vconv* instead of the first d-axis current command value Id* so that the reactive power Qac follows the second reactive power command value Qac** from the AC power command value limiter unit 51A.

[0120] Therefore, in the control device 5C, the AC current control in the control device 5A is not performed, and therefore the AC current command value limiter unit 54A and the AC current control unit 55 (FIG. 4) are omitted, and instead a phase calculation unit 57 is provided. The phase calculation unit 57 generates a reference phase θconv* of the power converter 6 based on the angular frequency command value ωconv* from the active power control unit 52. The reference phase θconv* changes at an angular velocity according to the angular frequency command value ωconv*.

[0121] In the control device 5C, the PWM unit 56 generates the gate signal GP described in FIG. 1 by pulse width modulation based on a voltage amplitude command value Vconv* from the reactive power control unit 53, a reference phase θconv* from the phase calculation unit 57, and an AC voltage command value for each phase based on a DC voltage command value Vdc* (DC current control unit 48) similar to that in FIG. 4, and a carrier signal car similar to that in FIG. 1.

[0122] Specifically, the PWM unit 56 of the control device 5C can generate the AC voltage command values ​​Vu**, Vv**, and Vw** of the u-phase, v-phase, and w-phase according to the following equations (12) to (14): Vu**=Vconv*×sin(θconv*)+Vdc* (12) Vv**=Vconv*×sin(θconv*−120°)+Vdc* (13) Vw**=Vconv*×sin(θconv*+120°)+Vdc* (14)

[0123] In this way, the control device 5C can control the output of the power converter 6 by a voltage control type configuration, rather than a current control type configuration like the control device 5A.

[0124] Therefore, the control device 5C can also control the electrical quantity (at least one of current, voltage, and power) output from the power converter 6# in accordance with the electrical quantity command values ​​(Pac**, Qac**) set with limit processing by the AC power command value limiter unit 51A and the DC current command value limiter unit 47A similar to those of the control device 5A.

[0125] 11 is a functional block diagram illustrating a control configuration according to a modification of the first embodiment for delta-connected power converter 6# (FIG. 8). Fig. 11 shows an example of the functional configuration of a control device 5D for applying a voltage-controlled control system to the output of delta-connected power converter 6# according to the modification of the first embodiment.

[0126] 11, the control device 5D is different from the control device 5B (FIG. 9) according to the first embodiment that is applied to a delta connection in the outputs from the active power control unit 52 and the reactive power control unit 53. Specifically, the active power control unit 52 and the reactive power control unit 53 output the angular frequency command value ωconv* and the voltage amplitude command value Vconv*, similarly to FIG. 10 (control device 5C).

[0127] Furthermore, in the control device 5D, the AC current control in the control device 5B is not executed, and therefore the AC current command value limiter unit 54A and the AC current control unit 55 (FIG. 9) are omitted, and instead, a phase calculation unit 57 similar to that in FIG. 10 is provided.

[0128] In the control device 5D, the PWM unit 56 generates the gate signal GP described in FIG. 4 by pulse width modulation based on a voltage amplitude command value Vconv* from the reactive power control unit 53 and a reference phase θconv* from the phase calculation unit 57, and a voltage comparison between the AC voltage command value for each phase and a carrier signal car similar to that in FIG. 4.

[0129] Specifically, in the PWM unit 56 of the control device 5D, the AC voltage command values ​​Vu**, Vv**, and Vw** of the u-phase, v-phase, and w-phase can be generated according to the following equations (15) to (17). Vu**=Vconv*×sin(θconv*) (15) Vv**=Vconv*×sin(θconv*−120°) (16) Vw**=Vconv*×sin(θconv*+120°) (17)

[0130] In this way, control device 5D can control the output of power converter 6# by a voltage control type configuration, rather than a current control type configuration like control device 5B. Note that control device 5D can also generate first active power command value Pac* to be input to AC power command value limiter unit 51A by additionally providing capacitor voltage control unit 45 of FIG. 4, as described for control device 5B.

[0131] Therefore, the control device 5D can also control the electrical quantity (at least one of current, voltage, and power) output from the power converter 6# in accordance with the electrical quantity command values ​​(Pac**, Qac**) set using the same AC power command value limiter unit 51A limit processing as in the control device 5B.

[0132] As described above, in the power conversion device according to the modification of the first embodiment, even in a control configuration that applies a voltage-controlled control system different from the current-controlled control system described in the first embodiment, the outputs of power converters 6, 6# configured with double-star-connected or delta-connected MMCs can be controlled in accordance with limiting processes by AC power command value limiter unit 51A and DC current command value limiter unit 47A, or in accordance with the command values ​​of the electrical quantity set in conjunction with limiting processes by AC power command value limiter unit 51A. Therefore, even in the case where the outputs of power converters 6, 6# are controlled by applying a so-called voltage-controlled control system, the same effects as those of the first embodiment can be obtained.

[0133] Embodiment 2 In the following embodiment, a modified example of the limiting process described in embodiment 1 will be described. In embodiment 2, a modified example of the AC power command value limiter unit 51A and the AC current command value limiter unit 54A in embodiment 1 will be described.

[0134] FIG. 12 is a functional block diagram illustrating the configuration of an AC power command value limiter unit 51B according to the second embodiment.

[0135] 12 receives a first active power command value Pac* and a first reactive power command value Qac*, and generates a second active power command value Pac** and a second reactive power command value Qac** after limit processing, similar to the AC power command value limiter unit 51A shown in the control devices 5A to 5D (FIGS. 4, 9 to 11). Therefore, the AC power command value limiter unit 51B can be arranged in place of the AC power command value limiter unit 51A in the control devices 5A to 5D (FIGS. 4, 9 to 11).

[0136] As shown in FIG. 12, the AC power command value limiter section 51B has a calculation section 51d and limiters 58A and 58B for normal processing.

[0137] The limiter 58A generates a second active power command value Pac** by performing normal limiting processing on the first active power command value Pac*, with an upper limit of 1.0 [pu] in accordance with the standard value (rating) of the apparent power of the power converter 6. Specifically, when |Pac*|<1.0 [pu], Pac**=Pac* is set, while when Pac*≧1.0 [pu], Pac**=1.0 [pu] is set, and when Pac*≦−1.0 [pu], Pac**=−1.0 [pu] is set.

[0138] The calculation unit 51d calculates the reactive power limit threshold Qlim* in accordance with the following equation (18) using the second active power command value Pac** output from the limiter 58A and an upper limit value 1.0 [pu] (apparent power) according to the standard value (rating) of the power converter 6. Qlim*=√(1.0−|Pac**| ２ ) … (18)

[0139] The limiter 58B performs normal limit processing on the first reactive power command value Qac*, with the reactive power limit threshold Qlim* from the calculation unit 51d set as the upper limit value, to generate a second reactive power command value Qac**.

[0140] Specifically, when |Qac*|<Qlim*, Qac** is set to Qac*, while when Qac*≧Qlim*, Qac**=Qlim*, and when Qac*≦−Qlim*, Qac**=−Qlim*. Therefore, when |Pac**|=1.0 [pu], Qlim* is set to 0, so that only active power is output (Qac**=0).

[0141] In this way, the AC power command value limiter unit 51B performs limit processing for the second active power command value Pac** so as to allow output up to the upper limit value (1.0 [pu]) of the apparent power of the power converter 6, while it performs limit processing for the second reactive power command value Qac** so that the upper limit is set to the surplus power with respect to the upper limit value of the apparent power under the output of the second active power command value Pac**. The operation for limit processing by the AC power command value limiter unit 51B corresponds to one example of a "second limit operation."

[0142] Therefore, unlike the AC power command value limiter unit 51A in which the priority of active power output and reactive power output is equal, the AC power command value limiter unit 51B can execute limit processing that prioritizes the output of active power.

[0143] FIG. 13 is a functional block diagram illustrating the configuration of the AC current command value limiter unit 54B according to the second embodiment.

[0144] 13 receives the first q-axis current command value Iq* and the first d-axis current command value Id*, and outputs the second q-axis current command value Iq** and the second d-axis current command value Id** after limiting, similar to the AC current command value limiter unit 54A shown in the control devices 5A and 5B (FIGS. 4 and 9). Therefore, the AC current command value limiter unit 54B can be arranged in the control devices 5A and 5B (FIGS. 4 and 9) in place of the AC current command value limiter unit 54A.

[0145] As shown in FIG. 13, the AC current command value limiter section 54B has a calculation section 54d and limiters 58C and 58D for normal processing.

[0146] The limiter 58C generates a second q-axis current command value Iq** by performing normal limiting processing on the first q-axis current command value Iq* related to the active current component, with the AC current limit threshold Iaclim* as the upper limit value, as in Fig. 7. Specifically, when |Iq*| < Iaclim*, Iq** is set to Iq*, while when Iq* ≥ Iaclim*, Iq** = Iaclim*, and when Iq* ≤ -Iaclim*, Iq** = -Iaclim*.

[0147] The calculation unit 54d calculates the d-axis current limit threshold Idlim* using the second q-axis current command value Iq** output from the limiter 58C and the AC current limit threshold Iaclim* according to the following equation (19): Idlim*=√(Iaclim* ２ - |Iq** | ２ ) … (19)

[0148] The limiter 58D performs normal limit processing on the first d-axis current command value Id* related to the reactive current component, with the d-axis current limit threshold Idlim* from the calculation unit 54d as the upper limit value, to generate a second d-axis current command value Id**.

[0149] Specifically, when |Id*|<Idlim*, Id**=Idlim* is set, while when Id*≧Idlim*, Id**=Idlim*, and when Id*≦−Idlim*, Id**=−Idlim*. Therefore, when |Iq**|=Iaclim*, Idlim*=0 is set, and only the active component of the AC current (active current) is output (Id**=0).

[0150] In this way, the AC current command value limiter unit 54B performs limit processing on the second q-axis current command value Iq** related to the active component so as to allow output up to the AC current limit threshold Iaclim*, while it performs limit processing on the second d-axis current command value Id** related to the reactive component so as to set the upper limit to the surplus capacity with respect to the upper limit value of the AC current amplitude when the second q-axis current command value Iq** is output.

[0151] Therefore, unlike the AC current command value limiter unit 54A in which the priority of the active power (current) output and the reactive power (current) output is equal, the AC current command value limiter unit 54B can perform limit processing that prioritizes the output of active power (current).

[0152] As described above, in the power conversion device according to the second embodiment, the limiting process by the AC power command value limiter unit 51B, or by the AC power command value limiter unit 51B and the AC current command value limiter unit 54B, makes it possible to maximize the output power by prioritizing active power output over reactive power output in order to effectively utilize the power converter for system stabilization within the range of its rating (standard value).

[0153] For example, such limiting processing is suitable for a situation in which, for the AC voltage of the AC system 2, the system angular frequency deviation Δωsys is large, while the AC voltage amplitude deviation ΔVmag is relatively small, and the ratio of the active power command value Pac* to the reactive power command value Qac* is large.

[0154] Third Embodiment In a third embodiment, a modified example of limiting processing that prioritizes reactive power output will be described, in contrast to the AC power command value limiter section 51B and AC current command value limiter section 54B in the second embodiment.

[0155] FIG. 14 is a functional block diagram illustrating the configuration of an AC power command value limiter unit 51C according to the third embodiment.

[0156] 14 receives a first active power command value Pac* and a first reactive power command value Qac*, and generates a second active power command value Pac** and a second reactive power command value Qac** after limit processing, similar to the AC power command value limiter units 51A and 51B. Therefore, the AC power command value limiter unit 51C can also be arranged in the control devices 5A to 5D (FIGS. 4, 9 to 11) in place of the AC power command value limiter unit 51A.

[0157] As shown in FIG. 14, the AC power command value limiter section 51B has a calculation section 51e and limiters 58A and 58E for normal processing.

[0158] The limiter 58A generates a second reactive power command value Qac** by performing normal limiting processing on the first reactive power command value Qac*, with an upper limit of 1.0 [pu] in accordance with the standard value (rating) of the apparent power of the power converter 6. Specifically, when |Qac*|<1.0 [pu], Qac** is set to Qac*, while when Qac*≧1.0 [pu], Qac** is limited to 1.0 [pu], and when Qac*≦−1.0 [pu], Qac** is limited to −1.0 [pu].

[0159] The calculation unit 51e calculates the active power limit threshold Plim* using the second reactive power command value Qac** output from the limiter 58A and an upper limit value 1.0 [pu] (apparent power) according to the standard value (rating) of the power converter 6, according to the following equation (20): Plim*=√(1.0−|Qac**| ２ ) … (20)

[0160] The limiter 58E performs normal limit processing on the first active power command value Pac*, with the active power limit threshold Plim* from the calculation unit 51e as the upper limit value, to generate a second active power command value Pac**.

[0161] Specifically, when |Pac*|<Plim*, Pac**=Pac* is set, while when Pac*≧Plim*, Pac**=Plim* is set, and when Pac*≦−Plim*, Pac**=−Plim* is set. Therefore, when |Qac**|=1.0 [pu], Plim*=0 is set, and only reactive power is output (Pac**=0).

[0162] In this way, the AC power command value limiter unit 51C performs limit processing for the second reactive power command value Qac** so as to allow output up to the upper limit value (1.0 [pu]) of the apparent power of the power converter 6, while it performs limit processing for the second active power command value Pac** so that the upper limit is the surplus power with respect to the upper limit value of the apparent power when the second reactive power command value Qac** is output.

[0163] Therefore, the AC power command value limiter unit 51C can execute limiting processing that prioritizes the output of reactive power, in contrast to the AC power command value limiter unit 51B that prioritizes the output of active power. The operation for limiting processing by the AC power command value limiter unit 51C corresponds to one example of the "third limiting operation."

[0164] FIG. 15 is a functional block diagram illustrating the configuration of the AC current command value limiter unit 54C according to the third embodiment.

[0165] 15 receives the first q-axis current command value Iq* and the first d-axis current command value Id*, and outputs the second q-axis current command value Iq** and the second d-axis current command value Id** after limiting, similar to the AC current command value limiter units 54A and 54B. Therefore, the AC current command value limiter unit 54C can be arranged in the control devices 5A and 5B (FIGS. 4 and 9) in place of the AC current command value limiter unit 54A.

[0166] As shown in FIG. 15, the AC current command value limiter section 54C has a calculation section 54e and limiters 58C and 58F for normal processing.

[0167] The limiter 58C generates a second d-axis current command value Id** by performing normal limiting processing on the first d-axis current command value Id* related to the reactive current component, with the AC current limit threshold Iaclim* set as the upper limit, as in Fig. 7. Specifically, when |Id*| < Iaclim*, Id** = Id*, while when Id* ≥ Iaclim*, Id** = Iaclim*, and when Id* ≤ Iaclim*, Id** = -Iaclim*.

[0168] The calculation unit 54e calculates the q-axis current limit threshold Iqlim* using the second d-axis current command value Id** output from the limiter 58C and the AC current limit threshold Iaclim* according to the following equation (21): Iqlim*=√(Iaclim* ２ - |Id**| ２ ) … (21)

[0169] The limiter 58F performs normal limit processing on the first q-axis current command value Iq* related to the active current component, with the q-axis current limit threshold Iqlim* from the calculation unit 54e as the upper limit value, to generate a second q-axis current command value Iq**.

[0170] Specifically, when |Iq*|<Iqlim*, Iq** is set to Iqlim*, while when Iq*≧Iqlim*, Iq**=Iqlim*, and when Iq*≦−Iqlim*, Iq**=−Iqlim*. Therefore, when |Id**|=Iaclim*, Iqlim* is set to 0, and only the reactive component of the AC current (reactive current) is output (Iq**=0).

[0171] In this way, the AC current command value limiter unit 54C performs limit processing on the second d-axis current command value Id** related to the reactive component so as to allow output up to the AC current limit threshold Iaclim*, while it performs limit processing on the second q-axis current command value Iq** related to the active component so that the upper limit is the surplus capacity with respect to the upper limit value of the AC current amplitude when the second d-axis current command value Id** is output.

[0172] Therefore, unlike the AC current command value limiter unit 54B which prioritizes active power (current) output, the AC current command value limiter unit 54C can execute limit processing that prioritizes reactive power (current) output.

[0173] As described above, in the power conversion device according to the third embodiment, the limiting process by the AC power command value limiter unit 51C, or by the AC power command value limiter unit 51C and the AC current command value limiter unit 54C, makes it possible to maximize the output power by giving priority to reactive power output over active power output in order to effectively utilize the power for system stabilization within the range of the rating (standard value) of the power converter.

[0174] For example, such limiting processing is suitable in a situation where, for the AC voltage of the AC system 2, the deviation ΔVmag of the AC voltage amplitude is large, while the deviation Δωsys of the system angular frequency is relatively small, and the ratio of the reactive power command value Qac* to the active power command value Pac* is large.

[0175] Fourth Embodiment In a fourth embodiment, a modified example of the setting of the AC current limit threshold Iaclim* in the AC current command value limiter units 54A to 54C, which is a predetermined constant in the first to third embodiments, will be described.

[0176] 16 is a functional block diagram illustrating the configuration of an AC current command value limiter unit 54D according to embodiment 4. The AC current command value limiter unit 54D can be arranged in place of the AC current command value limiter unit 54A in the control devices 5A and 5B (FIGS. 4 and 9).

[0177] 16, compared to the AC current command value limiter unit 54A shown in FIG. 7, the AC current command value limiter unit 54D further includes a calculation unit 54d and a limiter 58H for normal processing, both of which calculate the AC current limit threshold value Iaclim*.

[0178] The calculation unit 54d calculates a base value (Saclim / Vmag) of the AC current limit threshold Iaclim* by dividing the apparent power limit value Saclim by the AC voltage amplitude Vmag calculated by the amplitude calculation unit 43. The apparent power limit value Saclim can be set to an upper limit value (e.g., 1.0 [pu]) of the power that the power converter 6 can output.

[0179] The limiter 58H performs normal limiting processing on (Saclim / Vmag) from the calculation unit 54d, with the AC current maximum limit value IaclimMAX* set as the upper limit value, to generate an AC current limit threshold value Iaclim*.

[0180] Specifically, when (Saclim / Vmag)<IaclimMAX*, Iaclim*=(Saclim / Vmag), whereas when (Saclim / Vmag)≧IaclimMAX*, Iaclim*=IaclimMAX*.

[0181] The maximum AC current limit value IaclimMAX* is a standard value determined based on the maximum current amplitude that can be passed through the AC terminals of power converters 6, 6#. Alternatively, in power converter 6, the maximum AC current limit value IaclimMAX* may be determined in accordance with the maximum AC current determined by design.

[0182] The AC current command value limiter unit 54D uses the AC current limit threshold Iaclim* set as the output value of the limiter 58H to perform limit processing similar to that of the AC current command value limiter unit 54A in FIG. 7 to generate second q-axis current command values ​​Iq** and second d-axis current command values ​​Id** after limit processing from the first q-axis current command value Iq* and the first d-axis current command value Id*.

[0183] The configuration in which the AC current command value limiter unit 54D calculates the AC current limit threshold Iaclim* by the calculation unit 54d and the limiter for normal processing 58H can be applied not only to the AC current command value limiter unit 54A according to the first embodiment (FIG. 7) but also to the AC current command value limiter unit 54B according to the second embodiment and the AC current command value limiter unit 54C according to the third embodiment. That is, in each of the AC current command value limiter unit 54B shown in FIG. 13 and the AC current command value limiter unit 54C shown in FIG. 15, the AC current limit threshold Iaclim* can also be calculated by the calculation unit 54d and the limiter for normal processing 58H similar to those in FIG. 16.

[0184] As described above, in the power conversion device according to embodiment 4, limiting processing can be performed by setting AC current limit threshold value Iaclim* according to actual AC voltage amplitude Vmag in AC current command value limiter units 54A to 54C according to embodiments 1 to 3. This makes it possible to limit the apparent power output from power converters 6, 6# to be equal to or less than apparent power limit value Saclim, and further maximize the output power from power converters 6, 6#.

[0185] Fifth Embodiment In a fifth embodiment, a modification of the setting of the DC current limit threshold Idclim* in the DC current command value limiter unit 47A (FIG. 5), which is a predetermined constant in the first embodiment and its modifications, will be described.

[0186] 17 is a functional block diagram illustrating the configuration of the DC current command value limiter unit 47B according to embodiment 5. The DC current command value limiter unit 47B can be arranged in place of the DC current command value limiter unit 47A in the control devices 5A and 5C (FIGS. 4 and 10).

[0187] 17, the DC current command value limiter unit 47B further includes a calculation unit 47c and a limiter 58G for normal processing, for calculating the DC current limit threshold Idclim*, compared to the DC current command value limiter unit 47A shown in FIG. 5.

[0188] The calculation unit 47c calculates a base value (Pdclim / Vdc) of the DC current limit threshold Idclim* by dividing the DC power limit value Pdclim by the DC voltage Vdc measured by the DC voltage detectors 11a and 11b. The DC power limit value Pdclim can be determined based on the upper limit (e.g., 1.0 [pu]) of the power that can be output by the power converter 6 and losses.

[0189] The limiter 58G performs normal limiting processing on (Pdclim / Vdc) from the calculation unit 47c, with the DC current maximum limit value IdclimMAX* set as the upper limit value, to generate the DC current limit threshold value Idclim*.

[0190] Specifically, when (Pdclim / Vdc)<IdclimMAX*, Idclim*=(Pdclim / Vdc), whereas when (Pdclim / Vdc)≧IdclimMAX*, Idclim* is limited to IdclimMAX*=IdclimMAX*.

[0191] The DC current limit maximum value IdclimMAX* is a standard value determined based on the maximum current that can be passed through the DC terminals of the power converter 6. For example, the DC current limit maximum value IdclimMAX* can be determined as the maximum DC current determined by the design of the power converter 6.

[0192] The DC current command value limiter unit 47B uses the DC current limit threshold Idclim* set as the output value of the limiter 58G to perform limit processing similar to that of the DC current command value limiter unit 47A in Figure 5, and generates a second DC current command value Idc** after limit processing from the first DC current command value Idc*.

[0193] As described above, in the power conversion device according to the fifth embodiment, the DC current command value limiter unit 47A according to the first embodiment or its modification can set the DC current limit threshold value Idclim* according to the actual DC voltage Vdc (measured value) and perform limiting processing. This makes it possible to further maximize the output power from the power converter 6 after limiting the power of the power converter 6 to be equal to or less than the DC power limit value Pdclim*.

[0194] (Selection of limit processing) In the present disclosure, the limit processing described in the above-mentioned first to third embodiments is selectively executed based on status information (typically, status information of the system voltage) of the interconnection point between the power converters 6, 6# and the AC system 2.

[0195] Fig. 18 shows a flowchart illustrating an example of a control process for selecting the limit process according to embodiments 1 to 3. The control process shown in Fig. 18 can be periodically executed by the control device 5 during operation of the power conversion device according to this embodiment.

[0196] Referring to FIG. 18 , in step (hereinafter also simply referred to as “S”) S110, the control device 5 compares the absolute value of the deviation Δωsys between the system angular frequency ωsys of the AC voltage at the interconnection point detected by the PLL unit 42 and the system angular frequency command value ωsys* with a predetermined judgment value ωt, thereby determining whether the system angular frequency ωsys is outside a predetermined frequency reference range that includes the system angular frequency command value ωsys*.

[0197] When |Δωsys|>ωt (YES determination in S110), it is determined that the system angular frequency ωsys is outside the frequency reference range, and S112 sets the flag Fω to 1. On the other hand, when |Δωsys|≦ωt (NO determination in S110), it is determined that the system angular frequency ωsys is within the frequency reference range, and S114 sets the flag Fω to 0.

[0198] In step S120, the control device 5 compares the absolute value of the deviation ΔVmag between the AC voltage amplitude Vmag at the interconnection point calculated by the amplitude calculation unit 43 and the AC voltage amplitude command value Vmag* with a predetermined determination value Vt, thereby determining whether the AC voltage amplitude Vmag is outside a predetermined voltage reference range that includes the AC voltage amplitude command value Vmag*.

[0199] When |ΔVmag|>Vt (YES determination in S120), it is determined that the AC voltage amplitude Vmag is outside the voltage reference range, and the flag Fv is set to 1 in S122. On the other hand, when |ΔVmag|≦Vt (NO determination in S120), it is determined that the AC voltage amplitude Vmag is within the voltage reference range, and the flag Fv is set to 0 in S124.

[0200] In S130, the control device 5 selects one of the AC power command value limiter units 51A to 51C, or selects one of the AC power command value limiter units 51A to 51C and the AC current command value limiter units 54A to 54C, based on the values ​​of the flags Fω and Fv.

[0201] Specifically, when Fω = Fv (0 or 1), it is determined that the degree of deviation of the voltage amplitude at the interconnection point from the AC voltage amplitude command value Vmag* is equivalent to the degree of deviation of the frequency at the interconnection point from the system angular frequency command value ωsys*. In this case, by selecting AC power command value limiter unit 51A (and AC current command value limiter unit 54A) according to the first embodiment, the outputs of power converters 6, 6# are controlled in accordance with command values ​​that are set with limiting processes that limit both the active power output and the reactive power output with the same priority.

[0202] On the other hand, when Fω = 1 and Fv = 0, it is determined that the degree of deviation of the frequency is greater than the degree of deviation of the voltage amplitude. In this case, by selecting AC power command value limiter unit 51B (and AC current command value limiter unit 54B) according to the second embodiment, the outputs of power converters 6, 6# are controlled in accordance with command values ​​that are set with limiting processing that prioritizes active power output over reactive power output.

[0203] Conversely, it is determined that the degree of deviation of the voltage amplitude is greater than the degree of deviation of the frequency when Fω = 0 and Fv = 1. In this case, by selecting AC power command value limiter unit 51C (and AC current command value limiter unit 54C) according to the third embodiment, the outputs of power converters 6, 6# are controlled in accordance with command values ​​that are set with limiting processing that prioritizes reactive power output over active power output.

[0204] 18 , by comparing |Δωsys| and |ΔVmag| with the determination values ​​ωt and Vt (S110, S120), the upper and lower limit values ​​of the above-mentioned frequency reference range and voltage reference range are set symmetrically with respect to the system angular frequency command value ωsys* and the AC voltage amplitude command value Vmag*. However, it is also possible to set the frequency reference range and the voltage reference range so that the upper and lower limit values ​​are asymmetric with respect to the system angular frequency command value ωsys* and the AC voltage amplitude command value Vmag*.

[0205] Alternatively, the limit processing according to the first to third embodiments can be selected according to the ratio between the first active power command value Pac* (frequency control unit 49) and the first reactive power command value Qac* (AC voltage control unit 50) based on the state information of the interconnection point.

[0206] Fig. 19 shows a flowchart illustrating another example of the control process for selecting the limit process according to embodiments 1 to 3. The control process shown in Fig. 19 can be periodically executed by the control device 5 during operation of the power conversion device according to this embodiment.

[0207] In S111, the control device 5 determines whether the ratio of the absolute values ​​of the first active power command value Pac* and the first reactive power command value Qac* (|Pac*| / |Qac*|) is within a predetermined range of k1 (k1<1.0) to k2 (k2>1.0).

[0208] In order to cope with the case where a dead zone is provided in frequency control unit 49 and AC voltage control unit 50, when |Pac*|<ε or |Qac*|<ε, it is preferable to perform the calculation in S111 by replacing |Pac*|=ε or |Qac*|=ε. Note that ε can be determined in accordance with the width of the dead zone.

[0209] If (|Pac*| / |Qac*|) is within the range of k1 to k2 (YES in S111), control device 5 determines that the degree of deviation of the frequency and the degree of deviation of the voltage amplitude at the interconnection point are equivalent, that is, that the priorities of the active power output and the reactive power output are equivalent, and proceeds to S131. In S131, the outputs of power converters 6, 6# are controlled in accordance with the command values ​​set by AC power command value limiter unit 51A (and AC current command value limiter unit 54A) according to the first embodiment, accompanied by the selected limiter processing.

[0210] On the other hand, if (|Pac*| / |Qac*|) is outside the range of k1 to k2 (NO in S111), the control device 5 determines in S121 whether |Pac*|>|Qac*|.

[0211] When |Pac*|>|Qac*| (YES in S121), control device 5 determines that the degree of deviation of the frequency at the interconnection point is greater than the degree of deviation of the voltage amplitude, that is, that active power output has a higher priority than reactive power output, and proceeds to S132. In S132, AC power command value limiter unit 51B (and AC current command value limiter unit 54B) according to the second embodiment controls the outputs of power converters 6, 6# in accordance with the command values ​​set with the selected limiting process.

[0212] On the other hand, when |Pac*|<|Qac*| (NO in S121), control device 5 determines that the deviation degree of the voltage amplitude at the interconnection point is greater than the deviation degree of the frequency, that is, that reactive power output has a higher priority than active power output, and proceeds to S133. In S133, AC power command value limiter unit 51C (and AC current command value limiter unit 54C) according to the third embodiment controls the outputs of power converters 6, 6# in accordance with the command values ​​set with the selected limiting process.

[0213] In this way, by selecting the limit processing according to embodiments 1 to 3 based on the state information of the interconnection point, the priority of the output of active power and the output of reactive power can be adjusted in accordance with the state of the interconnection point (state of the system voltage), and the output power of the power converter can be effectively used for the operation and stabilization of the AC system 2.

[0214] In the present disclosure, the AC power command value limiter units 51A to 51C correspond to an example of a "first command value limiter unit." Furthermore, the limiting process performed by each of the AC power command value limiter units 51A to 51C to set the command values ​​Pac** and second reactive power command value Qac** before the second active power limiting process from the first active power command value Pac* and first reactive power command value Qac* when the apparent power command value Sac* indicated by the first active power command value Pac* and first reactive power command value Qac* before the limiting process is equal to or greater than the upper limit value (1.0 [pu]) corresponds to an example of a "first limiting process." Furthermore, the DC current command value limiter units 47A and 47B correspond to an example of a "third command value limiter unit."

[0215] Furthermore, the AC power command value limiter units 51A to 51D correspond to an example of a "second command value limiter unit," and the limiting process performed by each of the AC power command value limiter units 51A to 51D to generate a second d-axis current command value Id** and a second q-axis current command value Iq** from the first q-axis current command value Iq* and the first d-axis current command value Id* before limiting when the AC current amplitude (Iac*)* according to the first q-axis current command value Iq* and the first d-axis current command value Id* before limiting is equal to or greater than a limit threshold (Iaclim*) corresponds to an example of a "second limiting process." Furthermore, the arithmetic process for the limiting process performed by each of the AC power command value limiter units 51A to 51C corresponds to an example of a "first arithmetic process" to a "third arithmetic process," respectively.

[0216] Furthermore, in this embodiment, a power conversion device that exchanges power with an AC system using a power converter configured with a double-star-connected or delta-connected MMC has been illustrated, but as long as power conversion that can control active power and reactive power can be performed, the power conversion circuit is not limited to the examples shown in Figures 1 and 8, and any circuit configuration can be applied. Similarly, with regard to output control of the power converter, as long as it is possible to set a command value for the electrical quantity accompanied by the limit processing described in this embodiment, it is not limited to the examples shown in Figures 4 and 9 to 11, and any control configuration can be applied.

[0217] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0218] REFERENCE SIGNS LIST 1 Converter cell, 2 AC system, 3 Transformer, 4 DC circuit, 5, 5A to 5D Control device, 6 Power converter, 7a, 7b Reactor, 8, 8u, 8v, 8w Leg circuit, 9a, 9b Arm current detector, 10 AC voltage detector, 11a, 11b DC voltage detector, 13u, 13v, 13w Positive side arm, 14u, 14v, 14w Negative side arm, 15 AC current detector, 31, 31n, 31n1, 31n2, 31p, 31p1, 31p2 Switching element, 32 Capacitor, 33 Voltage detector, 41 Coordinate conversion unit, 42 PLL unit, 43 Amplitude calculation unit, 44 AC power calculation unit, 45 Capacitor voltage control unit, 47A, 47B DC current command value limiter unit, 47a to 47c, 51a to 51e, 54a to 54e, 58e calculation unit, 47x, 51x, 54x switching processing unit, 48 DC current control unit, 49 Frequency control unit, 50 AC voltage control unit, 51A, 51B, 51C, 51D AC power command value limiter unit, 52 Active power control unit, 53 Reactive power control unit, 54A to 54D AC current command value limiter unit, 55 AC current control unit, 56 PWM unit, 57 Phase calculation unit, 58A to 58H Limiter, 100 Power conversion device, Fω, Fv Flag, G1, G2 Input / output terminal, GP Gate signal, Iaclim* AC current limit threshold, IaclimMAX* AC current limit maximum value, Id d-axis current, Id* First d-axis current command value (before limit processing), Id** second d-axis current command value, Idc DC current, Idclim* DC current limit threshold, IdclimMAX* DC current limit maximum value, Idc* first DC current command value (before limit processing), Idc** second DC current command value, Idlim* d-axis current limit threshold, Iq q-axis current, Iqlim* q-axis current limit threshold, Iq* first q-axis current command value (before limit processing), Iq** second q-axis current command value, Isys AC current, Isysu, Isysv, Isysw three-phase AC current, Nn negative side DC terminal, Np positive side DC terminal, Nu, Nv,Nw AC terminal, Pac active power, Pac* first active power command value (before limit processing), Pac** second active power command value, Pdclim* DC power limit value, Plim* active power limit threshold, Qac reactive power, Qac* first reactive power command value (before limit processing), Qac** second reactive power command value, Qlim* reactive power limit threshold, Saclim* apparent power limit value, Vcap capacitor voltage (converter cell), Vcapav average value, Vcapav* command value (capacitor voltage), Vconv voltage amplitude command value, Vd d-axis voltage, Vd* d-axis voltage command value, Vq q-axis voltage, Vq* q-axis voltage command value, Vdc DC voltage, Vdc* DC voltage command value, Vdcn, Vdcp DC voltage actual measurement value, Vsys AC voltage, Vsysu, Vsysv, Vsysw three-phase AC voltage, car carrier signal.

Claims

1. A power conversion device connected to an AC system, comprising: a power converter for performing power conversion between the AC system and the power converter; and a control device for controlling an amount of electricity exchanged between the power converter and the AC system in accordance with a plurality of command values, wherein the plurality of command values ​​include an active power command value and a reactive power command value which are command values ​​for active power and reactive power exchanged between the AC system and the power converter, respectively, and the control device includes a first command value limiter unit that generates final active power command value and final reactive power command value, accompanied by first limit processing that limits at least one of the active power command value and the reactive power command value so that the apparent power of the power converter does not exceed an upper limit value, and the first command value limiter unit executes the first limit processing to select from a plurality of limit operations that differ in arithmetic processing for calculating the final active power command value and final reactive power command value from the active power command value and reactive power command value before the first limit processing, based on state information of the power converter used for controlling the active power and the reactive power and a connection point of the AC system.

2. The plurality of limit operations include: a first limit operation that generates final active power command values ​​and reactive power command values ​​by multiplying the active power command value and the reactive power command value before the first limit processing by a common power limit coefficient so that the apparent powers according to the final active power command value and reactive power command values ​​do not exceed upper limits; and a second limit operation that sets the final active power command value according to the active power command value before the first limit processing while limiting the apparent power to a range equal to or less than the upper limit value, and then sets the final reactive power command value according to the reactive power command value before the first limit processing within a range so that the apparent powers according to the final active power command value and reactive power command values ​​do not exceed upper limits; and a third limit operation of setting the final reactive power command value in accordance with the reactive power command value before the first limit processing while limiting the apparent power to a range not exceeding an upper limit value of the apparent power, and then setting the final active power command value in accordance with the active power command value before the first limit processing within a range in which the apparent power according to the final reactive power command value and the active power command value does not exceed the upper limit value.

3. A power conversion device according to claim 2, wherein in the first limit operation, the power limit coefficient is set to a ratio of an upper limit value of the apparent power to an apparent power command value indicated by the active power command value and the reactive power command value before the first limit processing.

4. A power conversion device according to claim 2 or 3, wherein in the second limit operation, the final active power command value generated by the first command value limiter unit is set equal to the active power command value before the first limit processing when the active power command value before the first limit processing does not exceed the upper limit value of the apparent power, and is set equal to the upper limit value of the apparent power when the active power command value before the first limit processing is equal to or greater than the upper limit value of the apparent power; and the final reactive power command value generated by the first command value limiter unit is set in accordance with the reactive power command value before the first limit processing, by limiting it to a range not exceeding a reactive power limit value calculated from the upper limit value of the apparent power and the final active power command value.

5. A power conversion device according to any one of claims 2 to 4, wherein in the third limit operation, the final reactive power command value generated by the first command value limiter section is set equal to the reactive power command value before the first limit processing when the reactive power command value before the first limit processing does not exceed the upper limit value of the apparent power, and is set equal to the upper limit value of the apparent power when the reactive power command value before the first limit processing is equal to or greater than the upper limit value of the apparent power, and the final active power command value is set in accordance with the active power command value before the first limit processing, while being limited to a range not exceeding an active power limit value calculated from the upper limit value of the apparent power and the final reactive power command value.

6. The power conversion device according to any one of claims 1 to 5, wherein the state information of the interconnection point includes a frequency and amplitude of the AC voltage of the AC system at the interconnection point.

7. A power conversion device according to any one of claims 2 to 5, wherein the state information of the interconnection point includes a frequency and amplitude of the AC voltage of the AC system at the interconnection point, and the first command value limiter unit selects the second limit operation and executes the first limit processing when it is determined that the degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value is greater than the degree of deviation of the detected value of the amplitude of the AC voltage from a voltage amplitude command value.

8. A power conversion device according to any one of claims 2 to 5, wherein the state information of the interconnection point includes a frequency and amplitude of the AC voltage of the AC system at the interconnection point, and the first command value limiter unit selects the third limit operation and executes the first limit processing when it is determined that the degree of deviation of the detected value of the amplitude of the AC voltage from a voltage amplitude command value is greater than the degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value.

9. A power conversion device according to any one of claims 2 to 5, wherein the state information of the interconnection point includes a frequency and amplitude of the AC voltage of the AC system at the interconnection point, and wherein the first command value limiter unit selects the first limit operation and executes the first limit processing when it is determined that the degree of deviation of the detected value of the amplitude of the AC voltage from a voltage amplitude command value is equivalent to the degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value.

10. The power conversion device according to any one of claims 1 to 5, wherein the plurality of command values ​​further include a q-axis current command value for controlling an active component of the AC current of the power converter so that the active power of the power converter follows the final active power command value generated by the first command value limiter unit, and a d-axis current command value for controlling a reactive component of the AC current of the power converter so that the reactive power of the power converter follows the final reactive power command value generated by the first command value limiter unit, and wherein the control device further includes a second command value limiter unit that generates final q-axis current command value and d-axis current command value, accompanied by second limit processing that limits at least one of the q-axis current command value and the d-axis current command value so that the AC current amplitude of the power converter does not exceed a limit threshold.

11. A power conversion device as described in claim 10, wherein the second command value limiter unit selects, based on state information of the interconnection point, a plurality of limit operations that have different calculation processes for calculating the final q-axis current command value and d-axis current command value from the q-axis current command value and d-axis current command value before the second limit processing, and performs the second limit processing.

12. The power conversion device according to claim 11, wherein the state information of the interconnection point includes a frequency and an amplitude of the AC voltage of the AC system at the interconnection point, and wherein the second command value limiter unit executes the second limit process by a first calculation process when it is determined that a degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value is equivalent to a degree of deviation of the detected value of the amplitude of the AC voltage from a voltage amplitude command value, and wherein the first calculation process multiplies the q-axis current command value and the d-axis current command value before the second limit process by a common current limit coefficient to generate the final q-axis current command value and the q-axis current command value so that the AC current amplitude according to the final q-axis current command value and the q-axis current command value does not exceed the limit threshold value.

13. The power conversion device according to claim 11, wherein the state information of the interconnection point includes a frequency and an amplitude of the AC voltage of the AC system at the interconnection point, and wherein the second command value limiter unit executes the second limit process by a second calculation process when it is determined that the degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value is greater than the degree of deviation of the detected value of the amplitude of the AC voltage from a voltage amplitude command value, and wherein the second calculation process sets the final q-axis current command value in accordance with the q-axis current command value before the second limit process while limiting the AC current amplitude to a range equal to or less than a limit threshold, and then sets the final d-axis current command value in accordance with the d-axis current command value before the second limit process within a range in which the AC current amplitude according to the final q-axis current command value and the d-axis current command value does not exceed the limit threshold.

14. The power conversion device according to claim 11, wherein the state information of the interconnection point includes a frequency and an amplitude of the AC voltage of the AC system at the interconnection point, and wherein the second command value limiter unit executes the second limit process by a third calculation process when it is determined that the degree of deviation of the detected value of the AC voltage amplitude from a voltage amplitude command value is greater than the degree of deviation of the detected value of the frequency of the AC voltage from a frequency command value, and wherein the third calculation process sets the final d-axis current command value in accordance with the d-axis current command value before the second limit process while limiting the AC current amplitude to a range equal to or less than a limit threshold, and then sets the final q-axis current command value in accordance with the q-axis current command value before the second limit process within a range in which the AC current amplitude according to the final d-axis current command value and the q-axis current command value does not exceed the limit threshold.

15. A power conversion device according to any one of claims 10 to 14, wherein the limit threshold of the AC current amplitude is variably set depending on a measured value of the voltage amplitude at the interconnection point, so that the limit threshold decreases as the voltage amplitude increases.

16. The power conversion device according to any one of claims 1 to 15, wherein the power converter is configured as a double-star-connected modular multilevel converter that performs power conversion between a DC circuit and the AC system.

17. The power conversion device according to claim 16, wherein the plurality of command values ​​further include a DC current command value for controlling a DC current exchanged between the power converter and the DC circuit so as to cause a voltage of a storage element included in each of a plurality of conversion cells constituting the modular multilevel converter to follow the command value, and the control device further includes a third command value limiter unit for limiting the DC current command value so that it does not exceed a limit threshold value of the DC current.

18. The power conversion device according to claim 17, wherein the limit threshold of the DC current is variably set depending on a measured value of the DC voltage at the connection point between the power converter and the DC circuit, so that the limit threshold decreases as the DC voltage increases.

19. The power conversion device according to any one of claims 1 to 15, wherein the power converter is configured as a delta-connected modular multilevel converter that performs power conversion between the AC system and the power converter.

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