Step-up / step-down converter and control method

Abstract

This step-up / step-down converter comprises: a first switch element, a second switch element, a third switch element, and a fourth switch element; an inductor; a first BS circuit that includes a first capacitor and generates a first drive voltage for the first switch element; a second BS circuit that includes a second capacitor and generates a second drive voltage for the fourth switch element; a switch unit; and a control circuit. The control circuit has a step-down operation mode and a step-up operation mode. In the step-down operation mode, the switch unit is controlled so as to apply an input voltage or the first drive voltage to the second capacitor. In the step-up operation mode, the switch unit is controlled so as to apply an output voltage or the second drive voltage to the first capacitor.

Description

Buck-boost converter and control method

[0001] The present disclosure relates to a buck-boost converter and a control method thereof.

[0002] Patent Document 1 discloses a technique for suppressing a voltage drop in a bootstrap capacitor (hereinafter also referred to as a BS capacitor).

[0003] Japanese Patent Application Laid-Open No. 2020-78203

[0004] Patent Document 1 does not describe any technology for suppressing a drop in the voltage of the BS capacitor in a DC-DC converter that is capable of both step-up and step-down.

[0005] A buck-boost converter according to the present disclosure is a buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, and includes: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series to each other via a first node; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series to each other via a second node; an inductor connected between the first node and the second node; a first bootstrap circuit including a first capacitor that generates a first drive voltage for the first switch element; a second bootstrap circuit including a second capacitor that generates a second drive voltage for a child, a switch unit, and a control circuit that controls the first bridge circuit, the second bridge circuit, and the switch unit, wherein the control circuit has a step-down operation mode in which the input voltage is stepped down to output the output voltage, and a step-up operation mode in which the input voltage is stepped up to output the output voltage, and controls the switch unit in the step-down operation mode to apply the input voltage or the first drive voltage to the second capacitor, and in the step-up operation mode to apply the output voltage or the second drive voltage to the first capacitor.

[0006] A control method according to the present disclosure is a control method for a buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, the buck-boost converter comprising: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series to each other via a first node; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series to each other via a second node; an inductor connected between the first node and the second node; and a first capacitor that generates a first drive voltage for the first switch element. a first bootstrap circuit including a second capacitor that generates a second drive voltage for the fourth switch element; and a switch unit, wherein the control method has a step-down operation mode in which the input voltage is stepped down to output the output voltage, and a step-up operation mode in which the input voltage is stepped up to output the output voltage, and controls the switch unit to apply the input voltage or the first drive voltage to the second capacitor in the step-down operation mode, and controls the switch unit to apply the output voltage or the second drive voltage to the first capacitor in the step-up operation mode.

[0007] These comprehensive or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or may be realized as any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0008] According to a buck-boost converter according to an aspect of the present disclosure, the voltage drop of the BS capacitor can be suppressed whether in a boost operation or a buck operation.

[0009] FIG. 1 is a circuit diagram showing an example of a buck-boost converter according to an embodiment. FIG. 2 is a circuit diagram showing an example of a first switch circuit according to an embodiment. FIG. 3A is a circuit diagram showing an example of a second switch circuit according to an embodiment. FIG. 3B is a circuit diagram showing an example of a second switch circuit according to an embodiment. FIG. 4A is a circuit diagram showing an example of a third switch circuit according to an embodiment. FIG. 4B is a circuit diagram showing an example of a third switch circuit according to an embodiment. FIG. 5 is a diagram showing a first example of operating waveforms during buck operation of a buck-boost converter according to an embodiment. FIG. 6A is a circuit diagram showing an example of a gate signal generating circuit of a second switch circuit according to an embodiment. FIG. 6B is a diagram showing an example of operating waveforms of a gate signal generating circuit of a second switch circuit according to an embodiment. FIG. 7A is a circuit diagram showing an example of a divider circuit for a second switch circuit according to an embodiment. FIG. 7B is a diagram showing an example of operating waveforms of a divider circuit for a second switch circuit according to an embodiment. FIG. 8 is a diagram showing a second example of operating waveforms during buck operation of a buck-boost converter according to an embodiment. FIG. 9 is a diagram showing a third example of operating waveforms during buck operation of a buck-boost converter according to an embodiment. FIG. 10A is a circuit diagram showing an example of a gate signal generation circuit for a first switch circuit according to an embodiment. FIG. 10B is a diagram showing an example of an operating waveform of the gate signal generation circuit for the first switch circuit according to an embodiment. FIG. 11A is a circuit diagram showing an example of a frequency divider circuit for the first switch circuit according to an embodiment. FIG. 11B is a diagram showing an example of an operating waveform of the frequency divider circuit for the first switch circuit according to an embodiment. FIG. 12 is a diagram showing a fourth example of an operating waveform during a buck operation of the buck-boost converter according to an embodiment. FIG. 13 is a diagram showing a first example of an operating waveform during a boost operation of the buck-boost converter according to an embodiment. FIG. 14A is a circuit diagram showing an example of a gate signal generation circuit for a third switch circuit according to an embodiment. FIG. 14B is a diagram showing an example of an operating waveform of the gate signal generation circuit for the third switch circuit according to an embodiment. FIG. 15A is a circuit diagram showing an example of a frequency divider circuit for the third switch circuit according to an embodiment. FIG. 15B is a diagram showing an example of an operating waveform of the frequency divider circuit for the third switch circuit according to an embodiment.FIG. 16 is a diagram showing a second example of operational waveforms during boost operation of the buck-boost converter according to the embodiment. FIG. 17 is a diagram showing a third example of operational waveforms during boost operation of the buck-boost converter according to the embodiment. FIG. 18A is a circuit diagram showing another example of a gate signal generation circuit of the first switch circuit according to the embodiment. FIG. 18B is a diagram showing another example of operational waveforms of the gate signal generation circuit of the first switch circuit according to the embodiment. FIG. 19A is a circuit diagram showing another example of a frequency divider circuit for the first switch circuit according to the embodiment. FIG. 19B is a diagram showing another example of operational waveforms of the frequency divider circuit for the first switch circuit according to the embodiment. FIG. 20 is a diagram showing a fourth example of operational waveforms during boost operation of the buck-boost converter according to the embodiment. FIG. 21 is a flowchart showing an example of a control method according to another embodiment.

[0010] Hereinafter, the embodiments will be specifically described with reference to the drawings.

[0011] The embodiments described below are all comprehensive or specific examples, and the numerical values, shapes, materials, components, arrangement and connection of the components, steps, and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0012] (Embodiment) Hereinafter, a step-up / step-down converter according to an embodiment will be described.

[0013] FIG. 1 is a circuit diagram showing an example of a buck-boost converter 1 according to an embodiment. In addition to the buck-boost converter 1, FIG. 1 also shows an input voltage source 100 and a capacitor 200. For example, the buck-boost converter 1 is mounted on a vehicle or the like, and power is supplied from the input voltage source 100, such as a lead-acid battery, to a capacitor 200 connected to a load, such as an auxiliary device of the vehicle. The capacitor 200 is an example of an output capacitor. The voltage of the input voltage source 100 is the input voltage of the buck-boost converter 1, and the voltage of the capacitor 200 is the output voltage of the buck-boost converter 1.

[0014] The buck-boost converter 1 is a DC-DC converter that steps down or steps up an input voltage from an input voltage source 100 and outputs an output voltage to a capacitor 200. The input voltage is also referred to as Vi, and the output voltage is also referred to as Vo.

[0015] The buck-boost converter 1 includes a first bridge circuit, a second bridge circuit, an inductor L1, a first bootstrap circuit, a second bootstrap circuit, a switch unit, and a control circuit 10. Hereinafter, the bootstrap circuit will also be referred to as a BS circuit. The buck-boost converter 1 also includes voltage detection circuits 11 and 12, voltage comparison circuits 21 and 22, level shifters 31 and 32, gate drivers GD1, GD2, GD3, GD4, GD5, GD6, and GD7, and capacitors C1 and C2. The voltage detection circuits 11 and 12, the voltage comparison circuits 21 and 22, the level shifters 31 and 32, the gate drivers GD1, GD2, GD3, GD4, GD5, GD6, and GD7, or the capacitors C1 and C2 may not be provided in the buck-boost converter 1 and may be components external to the buck-boost converter 1.

[0016] The first bridge circuit has switches M1 and M2 connected in series to each other via a node N1, and the switches M1 and M2 are examples of a first switch element and a second switch element, respectively.

[0017] The switch M1 is, for example, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) that is a semiconductor switch. The drain of the switch M1 is connected to the high-potential terminal of the input voltage source 100, and the source of the switch M1 is connected to the drain of the switch M2. The switch M2 is, for example, an N-channel MOSFET that is a semiconductor switch. The drain of the switch M2 is connected to the source of the switch M1, and the source of the switch M2 is connected to ground.

[0018] The second bridge circuit has switches M3 and M4 connected in series to each other via node N2, and the output voltage is applied to the second bridge circuit. The switch M3 is an example of a third switch element, and the switch M4 is an example of a fourth switch element.

[0019] The switch M4 is, for example, an N-channel MOSFET, which is a semiconductor switch. The drain of the switch M4 is connected to the high-potential terminal of the capacitor 200, and the source of the switch M4 is connected to the drain of the switch M3. The switch M3 is, for example, an N-channel MOSFET, which is a semiconductor switch. The drain of the switch M3 is connected to the source of the switch M4, and the source of the switch M3 is connected to ground.

[0020] 1 shows the body diodes of the switches M1, M2, M3, and M4, and each body diode is connected in parallel to the corresponding switch in the equivalent circuit. Specifically, the anode of each body diode is connected to the source of the corresponding switch in the equivalent circuit, and the cathode is connected to the drain of the corresponding switch.

[0021] Inductor L1 is connected to nodes N1 and N2 between node N1 between switch M1 and switch M2 and node N2 between switch M3 and switch M4. Node N1 is an example of a first node, and node N2 is an example of a second node. The voltage at one end of inductor L1 (the voltage at node N1) is also referred to as Vl, and the voltage at the other end of inductor L1 (the voltage at node N2) is also referred to as Vr.

[0022] The gate driver GD1 is connected to the gate of the switch M1 and drives the switch M1, and the gate driver GD2 is connected to the gate of the switch M2 and drives the switch M2.

[0023] A half-bridge circuit such as the first bridge circuit (switches M1 and M2) uses a first BS circuit to ensure a drive voltage for the gate driver GD1 of the high-side switch (switch M1). The first BS circuit generates a first drive voltage for the switch M1 and includes a capacitor Cbs1. The capacitor Cbs1 is an example of a first capacitor. The first BS circuit also includes a power supply Bbs1 and a diode Dbs1. The capacitor Cbs1 is a bootstrap (BS) capacitor for supplying drive power to the switch M1. The first drive voltage, which is input to the power supply terminal of the gate driver GD1 for the high-side switch M1 and drives the gate driver GD1, can be ensured by the first BS circuit, which has a simple circuit configuration consisting of the diode Dbs1 and the capacitor Cbs1, thereby reducing cost and size.

[0024] One end of capacitor Cbs1 is connected to node N1 and the ground terminal of gate driver GD1, and the other end is connected to the power supply terminal of gate driver GD1 and the cathode of diode Dbs1. Diode Dbs1 has an anode connected to power supply Bbs1 and a cathode connected to the power supply terminal of gate driver GD1 and capacitor Cbs1. The drive voltage for driving gate driver GD2 is supplied from power supply Bbs1. Note that a capacitor C1 for gate driver GD2 is connected to gate driver GD2.

[0025] Because capacitor Cbs1 is connected to the power supply terminal and ground terminal of gate driver GD1, the voltage across capacitor Cbs1 serves as the drive voltage for driving gate driver GD1, i.e., the voltage for controlling switch M1. Charging of capacitor Cbs1 begins when switch M2 is turned on. The voltage of power supply Bbs1 (first drive voltage for switch M1) is also referred to as Vreg1, and the voltage across capacitor Cbs1 is also referred to as Vbs1. The first drive voltage is equal to or greater than a predetermined voltage, which will be described later.

[0026] The gate driver GD3 is connected to the gate of the switch M3 and drives the switch M3. The gate driver GD4 is connected to the gate of the switch M4 and drives the switch M4.

[0027] A half-bridge circuit such as the second bridge circuit (switches M3 and M4) uses a second BS circuit to ensure a drive voltage for the gate driver GD4 of the high-side switch (switch M4). The second BS circuit generates a second drive voltage for switch M4 and includes a capacitor Cbs2. Capacitor Cbs2 is an example of a second capacitor. The second BS circuit also includes a power supply Bbs2 and a diode Dbs2. Capacitor Cbs2 is a BS capacitor for supplying drive power to switch M4. The second drive voltage, which is input to the power supply terminal of the gate driver GD4 for the high-side switch M4 and drives the gate driver GD4, can be ensured by the second BS circuit, which has a simple circuit configuration consisting of diode Dbs2 and capacitor Cbs2, thereby reducing cost and size.

[0028] One end of capacitor Cbs2 is connected to node N2 and the ground terminal of gate driver GD4, and the other end is connected to the power supply terminal of gate driver GD4 and the cathode of diode Dbs2. Diode Dbs2 has an anode connected to power supply Bbs2 and a cathode connected to the power supply terminal of gate driver GD4 and capacitor Cbs2. The drive voltage for driving gate driver GD3 is supplied from power supply Bbs2. Note that a capacitor C2 for gate driver GD3 is connected to gate driver GD3.

[0029] Because capacitor Cbs2 is connected to the power supply terminal and ground terminal of gate driver GD4, the voltage of capacitor Cbs2 serves as the drive voltage for gate driver GD4, i.e., the voltage for controlling switch M4. Charging of capacitor Cbs2 begins when switch M3 is turned on. The voltage of power supply Bbs2 (second drive voltage for switch M4) is also referred to as Vreg2, and the voltage of capacitor Cbs2 as Vbs2. The second drive voltage is a voltage equal to or greater than a predetermined voltage, which will be described later. Furthermore, the first drive voltage (voltage of power supply Bbs1) and the second drive voltage (voltage of power supply Bbs2) may be the same.

[0030] For example, input voltage source 100, capacitor 200, the low potential terminals of power sources Bbs1 and Bbs2, and the sources of switches M2 and M3 are connected to a common ground.

[0031] The voltage detection circuit 11 is a circuit that detects the voltage across capacitor Cbs1. Capacitor Cbs1 has a high-potential terminal connected to diode Dbs1 and a low-potential terminal. The voltage across capacitor Cbs1 is the difference between the potential at the high-potential terminal and the potential at the low-potential terminal of capacitor Cbs1, and is the voltage across these terminals. The voltage detection circuit 11 outputs the detected voltage to a voltage comparison circuit 21. The voltage detection circuit 12 is a circuit that detects the voltage across capacitor Cbs2. Capacitor Cbs2 has a high-potential terminal connected to diode Dbs2 and a low-potential terminal. The voltage across capacitor Cbs2 is the difference between the potential at the high-potential terminal and the potential at the low-potential terminal of capacitor Cbs2, and is the voltage across these terminals. The voltage detection circuit 12 outputs the detected voltage to a voltage comparison circuit 22. The voltage detected by the voltage detection circuit 11 is also referred to as Vcbs1, and the voltage detected by the voltage detection circuit 12 is also referred to as Vcbs2.

[0032] The voltage comparison circuit 21 compares the voltage detected by the voltage detection circuit 11 (the voltage of capacitor Cbs1) with a predetermined voltage. The voltage comparison circuit 21 outputs the comparison result to the control circuit 10. For example, the voltage comparison circuit 21 outputs a high-level signal when the voltage of capacitor Cbs1 is greater than the predetermined voltage. The voltage comparison circuit 22 compares the voltage detected by the voltage detection circuit 12 (the voltage of capacitor Cbs2) with the predetermined voltage. The voltage comparison circuit 22 outputs the comparison result to the control circuit 10. For example, the voltage comparison circuit 22 outputs a high-level signal when the voltage of capacitor Cbs2 is greater than the predetermined voltage. The predetermined voltage is also referred to as Vth. The predetermined voltage is a voltage greater than the voltage (minimum voltage) required to fully turn on switches M1 and M4 (described below). Fully on indicates that the resistance of the switch when on is sufficiently small within the on-resistance characteristic range of the switch. In this embodiment, in this state, the switch operates in the saturation region rather than the linear region of a semiconductor switch.

[0033] The switch section has switches M5, M6, and M7. The switch M5 is an example of a first switch circuit, the switch M6 is an example of a second switch circuit, and the switch M7 is an example of a third switch circuit.

[0034] The switch M5 switches between conductive and non-conductive states between the high-potential terminal of the capacitor Cbs1 and the high-potential terminal of the capacitor Cbs2. The gate driver GD5 is connected to the switch M5 and drives the switch M5. Details of the switch M5 will be described later.

[0035] The switch M6 switches between conduction and non-conduction between the high potential terminal of the input voltage source 100 and the high potential terminal of the capacitor Cbs2. The gate driver GD6 is connected to the switch M6 and drives the switch M6. Details of the switch M6 will be described later.

[0036] The switch M7 switches between conductive and non-conductive states between the high potential terminal of the capacitor 200 and the high potential terminal of the capacitor Cbs1. The gate driver GD7 is connected to the switch M7 and drives the switch M7. Details of the switch M7 will be described later.

[0037] The control circuit 10 is a circuit for controlling the first bridge circuit (specifically, switches M1 and M2), the second bridge circuit (specifically, switches M3 and M4), and the switch unit (specifically, switches M5, M6, and M7). Specifically, the control circuit 10 controls the gate drivers GD1, GD2, GD3, GD4, GD5, GD6, and GD7 to control the switches M1, M2, M3, M4, M5, M6, and M7. Note that the switch M1 is controlled via a level shifter 31 because its reference potential may not be equal to the ground potential. The switch M4 is similarly controlled via a level shifter 32. The control signals output from the control circuit 10 to the switches M1 to M7 are also referred to as SM1 to SM7.

[0038] The control circuit 10 is realized by a computer including, for example, a processor (microprocessor) and a memory. The memory may be a read-only memory (ROM) or a random access memory (RAM), and can store programs executed by the processor.

[0039] For example, the control circuit 10 detects an input voltage and an output voltage. Note that an input voltage detection circuit that detects the input voltage and an output voltage detection circuit that detects the output voltage may be separately provided, and the control circuit 10 may acquire the input voltage and the output voltage from the input voltage detection circuit and the output voltage detection circuit. Furthermore, the voltage detection circuits 11 and 12, the voltage comparison circuits 21 and 22, and the level shifters 31 and 32 may not be provided, and the control circuit 10 may have the functions of the voltage detection circuits 11 and 12, the voltage comparison circuits 21 and 22, and the level shifters 31 and 32.

[0040] The control circuit 10 has a buck operation mode in which it steps down an input voltage and outputs an output voltage, and a boost operation mode in which it steps up the input voltage and outputs an output voltage. The control circuit 10 operates in the buck operation mode when the input voltage is higher than the output voltage, and in the boost operation mode when the input voltage is lower than the output voltage. In the buck operation mode, the control circuit 10 performs switching control such that the switches M1 and M2 alternately turn on and off at a switching frequency, fixing the switch M4 in an on state and the switch M3 in an off state. In the boost operation mode, the control circuit 10 performs switching control such that the switches M3 and M4 alternately turn on and off at a switching frequency, fixing the switch M1 in an on state and the switch M2 in an off state. Note that the control circuit 10 may also have a buck-boost operation mode, or may operate in the buck-boost operation mode when the input voltage and the output voltage are approximately the same (e.g., when the input voltage is within ±5% of the output voltage or when the output voltage is within ±5% of the input voltage). In the step-up / step-down operation mode, the control circuit 10 performs switching control in which the switches M1 and M2 are alternately turned on and off at a switching frequency, and in which the switches M3 and M4 are alternately turned on and off at a switching frequency. In these operation modes, the output voltage can be changed by the duty ratio, which is the ratio of the length of the on period of one of the two switches that are alternately turned on and off at the switching frequency in the switching control, to the length of one cycle, which is the sum of the on period and the off period of that switch.

[0041] In the step-down operation mode, the control circuit 10 controls the switch unit to apply the input voltage or the first drive voltage to capacitor Cbs2, and in the step-up operation mode, the control circuit 10 controls the switch unit to apply the output voltage or the second drive voltage to capacitor Cbs1. Specifically, in the step-down operation mode, the control circuit 10 controls switch M6 to apply the input voltage to capacitor Cbs2, or controls switch M5 to apply the first drive voltage to capacitor Cbs2. In the step-up operation mode, the control circuit 10 controls switch M7 to apply the output voltage to capacitor Cbs1, or controls switch M5 to apply the second drive voltage to capacitor Cbs1. Details of the operation of the control circuit 10 will be described later.

[0042] Next, the switches M5, M6 and M7 will be described in detail.

[0043] Fig. 2 is a circuit diagram illustrating an example of a switch M5 according to an embodiment. Figs. 3A and 3B are circuit diagrams illustrating an example of a switch M6 according to an embodiment. Figs. 4A and 4B are circuit diagrams illustrating an example of a switch M7 according to an embodiment.

[0044] For example, the switch M5 can be realized by one N-channel MOSFET and two P-channel MOSFETs as shown in Figure 2. The switch M5 is configured by applying a control signal S Ｍ５ When this signal is input, a current can flow from the capacitor Cbs1 to the capacitor Cbs2, or from the capacitor Cbs2 to the capacitor Cbs1.

[0045] For example, the switch M6 can be realized by one N-channel MOSFET and two P-channel MOSFETs as shown in Figure 3A. In this case, the switch M6 is connected by applying a control signal S Ｍ６When Vi is input, current can flow from the power supply Bbs1 to the capacitor Cbs2, or current can flow from the capacitor Cbs2 to the power supply Bbs1. Also, for example, if Vi>Vo+Vfo, the switch M6 can be realized by one N-channel MOSFET and one P-channel MOSFET, as shown in FIG. 3B. Vfo is the voltage (minimum voltage) required to fully turn on the switches M1 and M4. In this case, the switch M6 applies a control signal S to the gate of the N-channel MOSFET. Ｍ６ When this voltage is input, a current can flow from the power supply Bbs1 to the capacitor Cbs2.

[0046] For example, the switch M7 can be realized by one N-channel MOSFET and two P-channel MOSFETs as shown in Figure 4A. In this case, the switch M7 is connected by applying a control signal S Ｍ７ When Vo is input, a current can flow from the capacitor Cbs1 to the capacitor 200, or from the capacitor 200 to the capacitor Cbs1. Also, for example, when Vo>Vi+Vfo, the switch M7 can be realized by one N-channel MOSFET and one P-channel MOSFET, as shown in FIG. 4B. In this case, the switch M7 applies a control signal S to the gate of the N-channel MOSFET. Ｍ７ When this signal is input, a current can flow from the capacitor 200 to the capacitor Cbs1.

[0047] Next, the voltage step-down operation of the control circuit 10 will be described in detail with reference to first to fourth examples.

[0048] First, a first example of the voltage step-down operation of the control circuit 10 will be described with reference to FIG.

[0049] 5 is a diagram showing a first example of an operating waveform during a step-down operation of the step-up / step-down converter 1 according to the embodiment. Ｍ１ , the control signal S to the switch M2 Ｍ２ , the control signal S to the switch M3 Ｍ３ , the control signal S to the switch M4 Ｍ４ , the control signal S to the switch M6Ｍ６ , the time waveforms of the voltage Vl (solid line) at one end of the inductor L1, the voltage Vbs1 (dashed line) across the capacitor Cbs1, the voltage Vr (solid line) at the other end of the inductor L1, and the voltage Vbs2 (dashed line) across the capacitor Cbs2 are shown. The same applies to FIG. 8, which will be described later.

[0050] 5, at time t1, switch M2 is turned off and switch M1 is turned on due to output stabilization control in buck-boost converter 1. The energy stored in capacitor Cbs1 is used to provide drive power for switch M1, so the voltage Vbs1 of capacitor Cbs1 decreases. The energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on all the time, so the voltage Vbs2 of capacitor Cbs2 decreases.

[0051] At time t2, due to output stabilization control in the buck-boost converter 1, switch M1 is turned off and switch M2 is turned on. At this time, switch M6 is turned on, establishing conduction between the high-potential terminal of input voltage source 100 and the high-potential terminal of capacitor Cbs2. Energy is supplied to capacitor Cbs1 by the application of first drive voltage Vreg1 from power source Bbs1, and the voltage Vbs1 of capacitor Cbs1 rises and reaches the first drive voltage Vreg1. The energy stored in capacitor Cbs2 continues to be used to drive switch M4, which must be kept in an on state at all times. At the same time, input voltage source 100 supplies energy greater than the drive power of switch M4, resulting in a rise in the voltage Vbs2 of capacitor Cbs2.

[0052] At time t3, the increasing voltage Vbs2 of capacitor Cbs2 reaches a predetermined voltage Vth, turning off switch M6 and establishing a non-conductive connection between the high-potential terminal of input voltage source 100 and the high-potential terminal of capacitor Cbs2. After switch M6 is turned off, the energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on at all times, so the voltage Vbs2 of capacitor Cbs2 decreases. Energy is supplied to capacitor Cbs1 by the application of a first drive voltage Vreg1 from power source Bbs1, and the voltage Vbs1 of capacitor Cbs1 is maintained at the first drive voltage Vreg1.

[0053] After time t4, the operations from time t1 to time t3 are repeated.

[0054] Thus, in the step-down operation mode, when the input voltage is higher than the sum of the output voltage and the voltage required to fully turn on switch M4 (Vi>Vo+Vfo), control circuit 10 controls switch M6 to apply the input voltage to capacitor Cbs2. On the other hand, in the step-down operation mode, when the input voltage is not higher than the sum of the output voltage and the voltage required to fully turn on switch M4 (Vi≦Vo+Vfo), control circuit 10 controls switch M6 not to apply the input voltage to capacitor Cbs2.

[0055] In the step-down operation mode, switch M3 is always off and switch M4 is always on, so in order to fully turn on switch M4, a voltage higher than the sum of the output voltage and the voltage required to fully turn on switch M4 must be applied to capacitor Cbs2. Therefore, when the input voltage is higher than the sum of the output voltage and the voltage required to fully turn on switch M4, the voltage required to fully turn on switch M4 can be applied from input voltage source 100 to capacitor Cbs2. In this case, therefore, by controlling switch M6 to connect the high-potential terminal of input voltage source 100 and the high-potential terminal of capacitor Cbs2, a drop in the voltage of capacitor Cbs2 can be suppressed.

[0056] Furthermore, in a first example of step-down operation, control circuit 10 turns on switch M6 when switch M2 is turned on, and turns off switch M6 when the voltage across capacitor Cbs2 reaches a predetermined voltage. This allows capacitor Cbs2 to be charged from input voltage source 100 every time switch M2 is turned on (in other words, switch M1 is turned off), which is a timing when input voltage source 100 and capacitor 200 are not connected. Furthermore, charging of capacitor Cbs2 can be stopped when the voltage across capacitor Cbs2 reaches a predetermined voltage (e.g., a voltage that can sustain full on state of switch M4 for a certain period of time).

[0057] Here, the control signal S Ｍ６ A method for generating the formula will be described with reference to FIGS. 6A and 6B.

[0058] 6A is a circuit diagram showing an example of a gate signal generation circuit for the switch M6 according to an embodiment. This gate signal generation circuit generates a control signal S that is input to the gate of the switch M6 and controls the switch M6 to turn on and off. Ｍ６ Generate.

[0059] 6B is a diagram showing an example of an operational waveform of the gate signal generation circuit of the switch M6 according to the embodiment. Ｍ２ an inverted signal of the control signal S Ｍ２ , the comparison result Scmp of the voltage comparator circuit 22 (a signal that becomes high level when Vbs2≧Vth and becomes low level when Vbs2<Vth), a signal output from the NQ output terminal of the RS flip-flop circuit, and a control signal S to the switch M6. Ｍ６ , and the time waveform of the voltage Vbs2 of the capacitor Cbs2. Times t1, t2, t3, and t4 in FIG. 6B correspond to those in FIG.

[0060] By using the gate signal generation circuit for switch M6 shown in FIG. 6A, switch M6 can be turned on at time t2 when switch M2 is turned on, and can be turned off at time t3 when Vbs2≧Vth, as shown in FIG. 6B.

[0061] Next, a second example of the voltage step-down operation of the control circuit 10 will be described with reference to FIGS. 7A, 7B, and 8. FIG.

[0062] In the first example of the step-down operation of the control circuit 10, an example was described in which the capacitor Cbs2 was charged each time the switch M2 was turned on, but there are cases in which it is not necessary to charge the capacitor Cbs2 each time the switch M2 is turned on. For example, in the second example of the step-down operation of the control circuit 10, a frequency divider circuit is used to prevent the capacitor Cbs2 from being charged each time the switch M2 is turned on.

[0063] FIG. 7A is a circuit diagram illustrating an example of a frequency divider circuit for switch M6 according to an embodiment.

[0064] 7B is a diagram showing an example of an operation waveform of the frequency divider circuit for the switch M6 according to the embodiment. Ｍ２ , control signal S Ｍ２ 1 / 2 frequency division signal, control signal S Ｍ２ and control signal S Ｍ２ AND signal S Ｍ２Ｐ The time waveform of the AND signal S Ｍ２Ｐ is the control signal S to the switch M6 Ｍ６ The control signal S of the circuit shown in FIG. Ｍ２ By using such a frequency divider circuit, it is possible to charge capacitor Cbs2 once every n periods (n is an integer equal to or greater than 2) in the switching control in which switches M1 and M2 are alternately turned on and off, rather than charging capacitor Cbs2 every time switch M2 is turned on. If capacitor Cbs2 is to be charged once every n periods (m is an integer equal to or greater than 2) in the switching control in which switches M1 and M2 are alternately turned on and off, a 1 / m frequency divider circuit is used instead of the 1 / 2 frequency divider circuit shown in FIG. 7A.

[0065] FIG. 8 is a diagram showing a second example of operating waveforms during the buck operation of the buck-boost converter 1 according to the embodiment.

[0066] As shown in Fig. 8, from time t1 to time t3, the control circuit 10 operates in the same manner as in the first example described in Fig. 5. At time t4, the control circuit 10 operates in the same manner as at time t1.

[0067] At time t5, output stabilization control in the buck-boost converter 1 turns switch M1 off and switch M2 on. At this time, a frequency divider circuit (e.g., a 1 / 2 frequency divider circuit) is used to turn switch M6 on every two times switch M2 is turned on. Therefore, at time t5, switch M6 does not turn on and remains in the off state. Energy is supplied to capacitor Cbs1 by the application of first drive voltage Vreg1 from power supply Bbs1, and the voltage Vbs1 of capacitor Cbs1 increases and reaches the first drive voltage Vreg1. The energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on at all times. Therefore, the voltage Vbs2 of capacitor Cbs2 decreases, but does not fall below the minimum voltage Vfo at which switch M4 can be fully on.

[0068] After time t6, the operations from time t1 to time t5 are repeated. At a time after time t6 that corresponds to time t3, the capacitor Cbs2 is charged.

[0069] Thus, after charging of capacitor Cbs2 is completed, switch M4 may be kept fully on for longer than one cycle of the switching control. Therefore, instead of charging capacitor Cbs2 every time switch M2 is turned on, capacitor Cbs2 may be charged once every n cycles of the switching control. Specifically, in the second example of step-down operation, in which switches M1 and M2 are alternately turned on and off, the control circuit 10 turns on switch M6 along with turning on switch M2 once every n cycles of the switching control, and turns off switch M6 when the voltage of capacitor Cbs2 reaches a predetermined voltage. This reduces the power used to drive switch M6 and ultimately the power of the buck-boost converter 1. Note that n is preset to a value that prevents the voltage Vbs2 of the charged capacitor Cbs2 from falling below voltage Vfo. In other words, the division ratio of the frequency divider circuit is designed in advance so that the voltage Vbs2 of the charged capacitor Cbs2 does not fall below voltage Vfo when it falls.

[0070] Next, a third example of the voltage step-down operation of the control circuit 10 will be described with reference to FIG.

[0071] 9 is a diagram showing a third example of the operation waveforms during the buck operation of the buck-boost converter 1 according to the embodiment. Ｍ１ , the control signal S to the switch M2 Ｍ２ , the control signal S to the switch M3 Ｍ３ , the control signal S to the switch M4 Ｍ４ , the control signal S to the switch M5 Ｍ５ 12, which will be described later, shows the time waveforms of the voltage Vl (solid line) at one end of the inductor L1, the voltage Vbs1 (dashed line) across the capacitor Cbs1, the voltage Vr (solid line) at the other end of the inductor L1, and the voltage Vbs2 (dashed line) across the capacitor Cbs2.

[0072] As shown in Figure 9, at time t1, due to output stabilization control in the buck-boost converter 1, switch M2 is turned off and switch M1 is turned on. At this time, switch M5 is turned on, conducting the high-potential terminal of capacitor Cbs1 and the high-potential terminal of capacitor Cbs2, and energy is supplied from capacitor Cbs1 to capacitor Cbs2. The energy stored in capacitor Cbs1 is used to provide drive power for switch M1 and to supply energy to capacitor Cbs2, so the voltage Vbs1 of capacitor Cbs1 decreases. The energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on at all times. At the same time, however, capacitor Cbs1 supplies energy greater than the drive power for switch M4, resulting in a rise in the voltage Vbs2 of capacitor Cbs2.

[0073] At time t2, the rising voltage Vbs2 of capacitor Cbs2 reaches a predetermined voltage Vth, turning off switch M5 and disconnecting the high-potential terminal of capacitor Cbs1 from the high-potential terminal of capacitor Cbs2. After switch M5 is turned off, the energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on all the time, so the voltage Vbs2 of capacitor Cbs2 decreases. The energy stored in capacitor Cbs1 is used to provide drive power for switch M1, so the voltage Vbs1 of capacitor Cbs1 decreases.

[0074] At time t3, switch M1 is turned off and switch M2 is turned on due to output stabilization control in buck-boost converter 1. Energy is supplied to capacitor Cbs1 by application of first drive voltage Vreg1 from power supply Bbs1, and the voltage Vbs1 of capacitor Cbs1 rises, reaches the first drive voltage Vreg1, and is maintained at that level. The energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on all the time, so the voltage Vbs2 of capacitor Cbs2 drops.

[0075] After time t4, the operations from time t1 to time t3 are repeated.

[0076] Thus, in the step-down operation mode, when the sum of the output voltage and the voltage required to fully turn on switch M4 is higher than the input voltage and the sum of the input voltage and the first drive voltage is higher than the sum of the output voltage and the voltage required to fully turn on switch M4 (Vi+Vreg1>Vo+Vfo>Vi>Vo), the control circuit 10 controls switch M5 to apply the first drive voltage to capacitor Cbs2. On the other hand, in the step-down operation mode, when the sum of the output voltage and the voltage required to fully turn on switch M4 is not higher than the input voltage or the sum of the input voltage and the first drive voltage is not higher than the sum of the output voltage and the voltage required to fully turn on switch M4 (Vi+Vreg1≦Vo+Vfo, or Vo+Vfo≦Vi), the control circuit 10 controls switch M5 not to apply the first drive voltage to capacitor Cbs2.

[0077] In the step-down operation mode, switch M3 is always off and switch M4 is always on. Therefore, to fully turn on switch M4, a voltage higher than the sum of the output voltage and the voltage required to fully turn on switch M4 must be applied to capacitor Cbs2. However, if the input voltage is lower than the sum of the output voltage and the voltage required to fully turn on switch M4, it is difficult to apply the voltage required to fully turn on switch M4 from input voltage source 100 to capacitor Cbs2. On the other hand, if the sum of the input voltage and the first drive voltage is higher than the sum of the output voltage and the voltage required to fully turn on switch M4, the voltage required to fully turn on switch M4 can be applied from the first BS circuit to capacitor Cbs2. Therefore, in this case, by controlling switch M5 to connect the high-potential terminal of capacitor Cbs1 and the high-potential terminal of capacitor Cbs2, a drop in the voltage of capacitor Cbs2 can be suppressed.

[0078] In a third example of step-down operation, the control circuit 10 turns on the switch M5 together with the switch M1, and turns off the switch M5 when the voltage across the capacitor Cbs2 reaches a predetermined voltage. This allows the sum of the input voltage and the first drive voltage to be applied to the capacitor Cbs2 each time the switch M1 is turned on, thereby charging the capacitor Cbs2, and stops charging the capacitor Cbs2 when the voltage across the capacitor Cbs2 reaches a predetermined voltage (e.g., a voltage that can sustain the full on state of the switch M4 for a certain period of time).

[0079] Here, the control signal S Ｍ５ A method for generating the formula will be described with reference to FIGS. 10A and 10B.

[0080] 10A is a circuit diagram showing an example of a gate signal generation circuit for the switch M5 according to an embodiment. This gate signal generation circuit generates a control signal S Ｍ５ Generate.

[0081] 10B is a diagram showing an example of an operational waveform of the gate signal generation circuit of the switch M5 according to the embodiment. Ｍ１ , control signal S Ｍ１ the inverted signal of Vbs2, the comparison result Scmp of the voltage comparator circuit 22 (a signal that becomes high level when Vbs2≧Vth and becomes low level when Vbs2<Vth), the signal output from the NQ output terminal of the RS flip-flop circuit, and the control signal S to the switch M5. Ｍ５ , and the time waveform of the voltage Vbs2 of the capacitor Cbs2. Times t1, t2, t3, and t4 in Fig. 10B correspond to those in Fig. 9.

[0082] By using the gate signal generation circuit for switch M5 shown in FIG. 10A, switch M5 can be turned on at time t1 when switch M1 is turned on, and can be turned off at time t2 when Vbs2≧Vth, as shown in FIG. 10B.

[0083] Next, a fourth example of the step-down operation of the control circuit 10 will be described with reference to FIGS. 11A, 11B, and 12. FIG.

[0084] In the third example of the step-down operation of the control circuit 10, an example was described in which the capacitor Cbs2 is charged each time the switch M1 is turned on, but there are cases in which it is not necessary to charge the capacitor Cbs2 each time the switch M1 is turned on. For example, in the fourth example of the step-down operation of the control circuit 10, a frequency divider circuit is used to prevent the capacitor Cbs2 from being charged each time the switch M1 is turned on.

[0085] FIG. 11A is a circuit diagram illustrating an example of a frequency divider circuit for switch M5 according to an embodiment.

[0086] 11B is a diagram showing an example of an operation waveform of the frequency divider circuit for the switch M5 according to the embodiment. Ｍ１ , control signal S Ｍ１ 1 / 2 frequency division signal, control signal S Ｍ１ and control signal S Ｍ１ AND signal S Ｍ１Ｐ The time waveform of the AND signal S Ｍ１Ｐ is the control signal S to the switch M5 Ｍ５ The control signal S of the circuit shown in FIG. Ｍ１ is input instead of the 1 / 2 divider circuit shown in FIG. 11A . By using such a divider circuit, it is possible to charge capacitor Cbs2 once every n cycles (n is an integer equal to or greater than 2) in the switching control in which switches M1 and M2 are alternately turned on and off, rather than charging capacitor Cbs2 every time switch M1 is turned on. If capacitor Cbs2 is to be charged once every n cycles (m is an integer equal to or greater than 2) in the switching control in which switches M1 and M2 are alternately turned on and off, a 1 / m divider circuit is used instead of the 1 / 2 divider circuit shown in FIG. 11A .

[0087] FIG. 12 is a diagram showing a fourth example of operating waveforms during the buck operation of the buck-boost converter 1 according to the embodiment.

[0088] As shown in FIG. 12, from time t1 to time t3, the control circuit 10 operates in the same manner as in the third example described with reference to FIG.

[0089] At time t4, due to output stabilization control in the buck-boost converter 1, switch M2 is turned off and switch M1 is turned on. At this time, a frequency divider circuit (e.g., a 1 / 2 frequency divider circuit) is used to turn on switch M5 every time switch M1 is turned on twice, so at time t4, switch M5 does not turn on and remains in the off state. Since the energy stored in capacitor Cbs1 is used to provide drive power for switch M1, the voltage Vbs1 of capacitor Cbs1 decreases. Since the energy stored in capacitor Cbs2 continues to be used to provide drive power for switch M4, which must be kept on all the time, the voltage Vbs2 of capacitor Cbs2 decreases, but does not fall below the minimum voltage Vfo at which switch M4 can be fully on.

[0090] At time t5, the control circuit 10 operates in the same manner as at time t3, and from time t6 onwards, the operation from time t1 to time t5 is repeated. At times after time t6 which correspond to time t1, the capacitor Cbs2 is charged.

[0091] Thus, after charging of capacitor Cbs2 is completed, switch M4 may be kept fully on for longer than one cycle of the switching control. Therefore, instead of charging capacitor Cbs2 every time switch M1 is turned on, capacitor Cbs2 may be charged once every n cycles of the switching control. Specifically, in the fourth example of step-down operation, in which switches M1 and M2 are alternately turned on and off, the control circuit 10 turns on switch M5 along with turning on switch M1 once every n cycles of the switching control, and turns off switch M5 when the voltage of capacitor Cbs2 reaches a predetermined voltage. This reduces the power used to drive switch M5 and ultimately the power of the buck-boost converter 1. Note that n is preset to a value that prevents the voltage Vbs2 of the charged capacitor Cbs2 from falling below voltage Vfo. In other words, the division ratio of the frequency divider circuit is designed in advance so that the voltage Vbs2 of the charged capacitor Cbs2 does not fall below voltage Vfo when it falls.

[0092] Next, the boosting operation of the control circuit 10 will be described in detail with reference to first to fourth examples.

[0093] First, a first example of the boosting operation of the control circuit 10 will be described with reference to FIG.

[0094] 13 is a diagram showing a first example of an operating waveform during a boost operation of the boost-buck converter 1 according to the embodiment. Ｍ１ , the control signal S to the switch M2 Ｍ２ , the control signal S to the switch M3 Ｍ３ , the control signal S to the switch M4 Ｍ４ , the control signal S to the switch M7 Ｍ７ 16, which will be described later, shows the time waveforms of the voltage Vr (solid line) at the other end of the inductor L1, the voltage Vbs2 (dashed line) at the capacitor Cbs2, the voltage Vl (solid line) at one end of the inductor L1, and the voltage Vbs1 (dashed line) at the capacitor Cbs1.

[0095] 13, at time t1, switch M3 is turned off and switch M4 is turned on due to output stabilization control in buck-boost converter 1. The energy stored in capacitor Cbs1 continues to be used to provide drive power for switch M1, which must be kept on all the time, so the voltage Vbs1 of capacitor Cbs1 decreases. The energy stored in capacitor Cbs2 is used to provide drive power for switch M4, so the voltage Vbs2 of capacitor Cbs2 decreases.

[0096] At time t2, due to output stabilization control in the buck-boost converter 1, switch M4 is turned off and switch M3 is turned on. At this time, switch M7 is turned on, establishing electrical continuity between the high-potential terminal of capacitor 200 and the high-potential terminal of capacitor Cbs1. The energy stored in capacitor Cbs1 continues to be used to drive switch M1, which must be kept on at all times. At the same time, however, capacitor 200 supplies energy greater than the drive power for switch M1, resulting in a rise in the voltage Vbs1 across capacitor Cbs1. Energy is supplied to capacitor Cbs2 by the application of a second drive voltage Vreg2 from power supply Bbs2, causing the voltage Vbs2 across capacitor Cbs2 to rise and reach the second drive voltage Vreg2.

[0097] At time t3, the rising voltage Vbs1 of capacitor Cbs1 reaches a predetermined voltage Vth, turning off switch M7 and disconnecting the high-potential terminal of capacitor 200 from the high-potential terminal of capacitor Cbs1. After switch M7 is turned off, the energy stored in capacitor Cbs1 continues to be used to drive switch M1, which must be kept on all the time, so the voltage Vbs1 of capacitor Cbs1 drops. Energy is supplied to capacitor Cbs2 by applying a second drive voltage Vreg2 from power supply Bbs2, and the voltage Vbs2 of capacitor Cbs2 is maintained at the second drive voltage Vreg2.

[0098] After time t4, the operations from time t1 to time t3 are repeated.

[0099] Thus, in the step-up operation mode, when the output voltage is higher than the sum of the input voltage and the voltage required to fully turn on switch M1 (Vo>Vi+Vfo), control circuit 10 controls switch M7 to apply the output voltage to capacitor Cbs1. On the other hand, in the step-up operation mode, when the output voltage is not higher than the sum of the input voltage and the voltage required to fully turn on switch M1 (Vo≦Vi+Vfo), control circuit 10 controls switch M7 not to apply the output voltage to capacitor Cbs1.

[0100] In the boost operation mode, switch M2 is always off and switch M1 is always on, so in order to fully turn on switch M1, a voltage higher than the sum of the input voltage and the voltage required to fully turn on switch M1 must be applied to capacitor Cbs1. Therefore, when the output voltage is higher than the sum of the input voltage and the voltage required to fully turn on switch M1, the voltage required to fully turn on switch M1 can be applied from capacitor 200 to capacitor Cbs1. In this case, by controlling switch M7 to connect the high-potential terminal of capacitor 200 and the high-potential terminal of capacitor Cbs1, a drop in the voltage of capacitor Cbs1 can be suppressed.

[0101] Furthermore, in a first example of boost operation, the control circuit 10 turns on switch M7 when it turns on switch M3, and turns off switch M7 when the voltage across capacitor Cbs1 reaches a predetermined voltage. This allows capacitor Cbs1 to be charged from capacitor 200 every time switch M3 is turned on (in other words, switch M4 is turned off), which is a timing when input voltage source 100 and capacitor 200 are not connected. Furthermore, charging of capacitor Cbs1 can be stopped when the voltage across capacitor Cbs1 reaches a predetermined voltage (e.g., a voltage that can sustain full on state of switch M1 for a certain period of time).

[0102] Here, the control signal S Ｍ７ A method for generating the formula will be described with reference to FIGS. 14A and 14B.

[0103] 14A is a circuit diagram showing an example of a gate signal generation circuit for the switch M7 according to an embodiment. This gate signal generation circuit generates a control signal S Ｍ７ Generate.

[0104] 14B is a diagram showing an example of an operation waveform of the gate signal generation circuit of the switch M7 according to the embodiment. Ｍ３ an inverted signal of the control signal S Ｍ３ , the comparison result Scmp of the voltage comparator circuit 21 (a signal that becomes high level when Vbs1≧Vth and becomes low level when Vbs1<Vth), a signal output from the NQ output terminal of the RS flip-flop circuit, and a control signal S to the switch M7. Ｍ７ , and the time waveform of the voltage Vbs1 of the capacitor Cbs1. Times t1, t2, t3, and t4 in FIG. 14B correspond to those in FIG.

[0105] By using the gate signal generation circuit for switch M7 shown in FIG. 14A, switch M7 can be turned on at time t2 when switch M3 is turned on, and can be turned off at time t3 when Vbs1≧Vth, as shown in FIG. 14B.

[0106] Next, a second example of the boosting operation of the control circuit 10 will be described with reference to FIGS. 15A, 15B, and 16. FIG.

[0107] In the first example of the boost operation of the control circuit 10, an example was described in which the capacitor Cbs1 was charged each time the switch M3 was turned on, but there are cases in which it is not necessary to charge the capacitor Cbs1 each time the switch M3 is turned on. For example, in the second example of the boost operation of the control circuit 10, a frequency divider circuit is used to prevent the capacitor Cbs1 from being charged each time the switch M3 is turned on.

[0108] FIG. 15A is a circuit diagram illustrating an example of a frequency divider circuit for the switch M7 according to the embodiment.

[0109] 15B is a diagram showing an example of an operation waveform of the frequency divider circuit for the switch M7 according to the embodiment. Ｍ３ , control signal S Ｍ３ 1 / 2 frequency division signal, control signal S Ｍ３ and control signal S Ｍ３ AND signal S Ｍ３Ｐ The time waveform of the AND signal S Ｍ３Ｐ is the control signal S to the switch M7 Ｍ７ The control signal S of the circuit shown in FIG. Ｍ３ 15A. By using such a frequency divider circuit, it is possible to charge capacitor Cbs1 once every n periods (n is an integer equal to or greater than 2) in the switching control in which switches M3 and M4 are alternately turned on and off, rather than charging capacitor Cbs1 every time switch M3 is turned on. If capacitor Cbs1 is to be charged once every n periods (m is an integer equal to or greater than 2) in the switching control in which switches M3 and M4 are alternately turned on and off, a 1 / m frequency divider circuit is used instead of the 1 / 2 frequency divider circuit shown in FIG. 15A.

[0110] FIG. 16 is a diagram showing a second example of operating waveforms during the boost operation of the buck-boost converter 1 according to the embodiment.

[0111] As shown in Fig. 16, from time t1 to time t3, the control circuit 10 operates in the same manner as in the first example described in Fig. 13. At time t4, the control circuit 10 operates in the same manner as at time t1.

[0112] At time t5, output stabilization control in the buck-boost converter 1 turns switch M3 off and switch M4 on. At this time, a frequency divider circuit (e.g., a 1 / 2 frequency divider circuit) is used to turn switch M7 on every two times switch M3 is turned on. Therefore, at time t5, switch M7 does not turn on and remains off. Energy is supplied to capacitor Cbs2 by the application of second drive voltage Vreg2 from power supply Bbs2, and the voltage Vbs2 of capacitor Cbs2 increases and reaches the second drive voltage Vreg2. The energy stored in capacitor Cbs1 continues to be used to drive switch M1, which must be kept on at all times. Therefore, the voltage Vbs1 of capacitor Cbs1 decreases, but does not fall below the minimum voltage Vfo at which switch M1 can be fully on.

[0113] After time t6, the operations from time t1 to time t5 are repeated. At a time after time t6 that corresponds to time t3, the capacitor Cbs1 is charged.

[0114] Thus, after charging of capacitor Cbs1 is completed, switch M1 may be kept fully on for a period longer than one cycle of the switching control. Therefore, instead of charging capacitor Cbs1 every time switch M3 is turned on, capacitor Cbs1 may be charged once every n cycles of the switching control. Specifically, in the second example of boost operation, in which switches M3 and M4 are alternately turned on and off, control circuit 10 turns on switch M7 along with turning on switch M3 once every n cycles of the switching control, and turns off switch M7 when the voltage of capacitor Cbs1 reaches a predetermined voltage. This reduces the power used to drive switch M7 and ultimately the power of the buck-boost converter 1. Note that n is preset to a value that prevents the voltage Vbs1 of charged capacitor Cbs1 from falling below voltage Vfo as it decreases. In other words, the division ratio of the frequency divider circuit is designed in advance so that the voltage Vbs1 of charged capacitor Cbs1 does not fall below voltage Vfo as it decreases.

[0115] Next, a third example of the boosting operation of the control circuit 10 will be described with reference to FIG.

[0116] 17 is a diagram showing a third example of operational waveforms during the boost operation of the boost-buck converter 1 according to the embodiment. Ｍ１ , the control signal S to the switch M2 Ｍ２ , the control signal S to the switch M3 Ｍ３ , the control signal S to the switch M4 Ｍ４ , the control signal S to the switch M5 Ｍ５ 20, which will be described later, shows the time waveforms of the voltage Vr (solid line) at the other end of the inductor L1, the voltage Vbs2 (dashed line) at the capacitor Cbs2, the voltage Vl (solid line) at one end of the inductor L1, and the voltage Vbs1 (dashed line) at the capacitor Cbs1.

[0117] 17 , at time t1, due to output stabilization control in the buck-boost converter 1, switch M3 is turned off and switch M4 is turned on. At this time, switch M5 is turned on, the high-potential terminal of capacitor Cbs1 and the high-potential terminal of capacitor Cbs2 are connected, and energy is supplied from capacitor Cbs2 to capacitor Cbs1. The energy stored in capacitor Cbs2 is used to provide drive power for switch M4 and to supply energy to capacitor Cbs1, so the voltage Vbs2 of capacitor Cbs2 decreases. The energy stored in capacitor Cbs1 continues to be used to provide drive power for switch M1, which must be kept on at all times. At the same time, however, capacitor Cbs2 supplies energy greater than the drive power of switch M1, resulting in the voltage Vbs1 of capacitor Cbs1 increasing.

[0118] At time t2, the rising voltage Vbs1 of capacitor Cbs1 reaches a predetermined voltage Vth, turning off switch M5 and disconnecting the high-potential terminal of capacitor Cbs1 from the high-potential terminal of capacitor Cbs2. After switch M5 is turned off, the energy stored in capacitor Cbs1 continues to be used to provide drive power for switch M1, which must be kept on all the time, so the voltage Vbs1 of capacitor Cbs1 decreases. The energy stored in capacitor Cbs2 is used to provide drive power for switch M4, so the voltage Vbs2 of capacitor Cbs2 decreases.

[0119] At time t3, switch M4 is turned off and switch M3 is turned on due to output stabilization control in the buck-boost converter 1. Energy is supplied to capacitor Cbs2 by the application of second drive voltage Vreg2 from power supply Bbs2, and the voltage Vbs2 of capacitor Cbs2 rises, reaches the second drive voltage Vreg2, and is maintained at that level. The energy stored in capacitor Cbs1 continues to be used to provide drive power for switch M1, which must be kept in an on state at all times, so the voltage Vbs1 of capacitor Cbs1 drops.

[0120] After time t4, the operations from time t1 to time t3 are repeated.

[0121] Thus, in the step-up operation mode, when the sum of the input voltage and the voltage required to fully turn on switch M1 is higher than the output voltage and the sum of the output voltage and the second drive voltage is higher than the sum of the input voltage and the voltage required to fully turn on switch M1 (Vo+Vreg2>Vi+Vfo>Vo>Vi), the control circuit 10 controls switch M5 to apply the second drive voltage to capacitor Cbs1. On the other hand, in the step-up operation mode, when the sum of the input voltage and the voltage required to fully turn on switch M1 is not higher than the output voltage or the sum of the output voltage and the second drive voltage is not higher than the sum of the input voltage and the voltage required to fully turn on switch M1 (Vo+Vreg2≦Vi+Vfo or Vi+Vfo≦Vo), the control circuit 10 controls switch M5 not to apply the second drive voltage to capacitor Cbs1.

[0122] In the boost operation mode, switch M2 is always off and switch M1 is always on. Therefore, to fully turn on switch M1, a voltage higher than the sum of the input voltage and the voltage required to fully turn on switch M1 must be applied to capacitor Cbs1. However, if the output voltage is lower than the sum of the input voltage and the voltage required to fully turn on switch M1, it is difficult to apply the voltage required to fully turn on switch M1 from capacitor 200 to capacitor Cbs1. On the other hand, if the sum of the output voltage and the second drive voltage is higher than the sum of the input voltage and the voltage required to fully turn on switch M1, the voltage required to fully turn on switch M1 can be applied from the second BS circuit to capacitor Cbs1. Therefore, in this case, by controlling switch M5 to connect the high-potential terminal of capacitor Cbs1 and the high-potential terminal of capacitor Cbs2, a drop in the voltage of capacitor Cbs1 can be suppressed.

[0123] In a third example of boost operation, the control circuit 10 turns on switch M5 together with turning on switch M4, and turns off switch M5 when the voltage across capacitor Cbs1 reaches a predetermined voltage. This allows the sum of the output voltage and the second drive voltage to be applied to capacitor Cbs1 each time switch M4 is turned on, thereby charging capacitor Cbs1, and stops charging capacitor Cbs1 when the voltage across capacitor Cbs1 reaches a predetermined voltage (e.g., a voltage that can sustain full on state of switch M1 for a certain period of time).

[0124] Here, the control signal S Ｍ５ A method for generating the formula will be described with reference to FIGS. 18A and 18B.

[0125] 18A is a circuit diagram showing another example of a gate signal generation circuit for the switch M5 according to an embodiment. This gate signal generation circuit generates a control signal S Ｍ５ Generate.

[0126] 18B is a diagram showing another example of the operation waveform of the gate signal generation circuit of the switch M5 according to the embodiment. Ｍ４ , control signal S Ｍ４ the inverted signal of Vbs1, the comparison result Scmp of the voltage comparator circuit 21 (a signal that becomes high level when Vbs1≧Vth and becomes low level when Vbs1<Vth), the signal output from the NQ output terminal of the RS flip-flop circuit, and the control signal S to the switch M5. Ｍ５ 18B, and the time waveform of the voltage Vbs1 of the capacitor Cbs1 are shown. Times t1, t2, t3, and t4 in FIG. 18B correspond to those in FIG.

[0127] By using the gate signal generation circuit for switch M5 shown in FIG. 18A, switch M5 can be turned on at time t1 when switch M4 is turned on, and can be turned off at time t2 when Vbs1≧Vth, as shown in FIG. 18B.

[0128] Next, a fourth example of the boosting operation of the control circuit 10 will be described with reference to FIGS. 19A, 19B, and 20. FIG.

[0129] In the third example of the boost operation of the control circuit 10, an example was described in which the capacitor Cbs1 was charged each time the switch M4 was turned on, but there are cases in which it is not necessary to charge the capacitor Cbs1 each time the switch M4 is turned on. For example, in the fourth example of the boost operation of the control circuit 10, a frequency divider circuit is used to prevent the capacitor Cbs1 from being charged each time the switch M4 is turned on.

[0130] FIG. 19A is a circuit diagram illustrating another example of a frequency divider circuit for the switch M5 according to the embodiment.

[0131] 19B is a diagram showing another example of the operating waveform of the frequency divider circuit for the switch M5 according to the embodiment. Ｍ４ , control signal S Ｍ４ 1 / 2 frequency division signal, control signal S Ｍ４ and control signal S Ｍ４ The AND signal SＭ４Ｐ The time waveform of the AND signal S Ｍ４Ｐ is the control signal S to the switch M5 Ｍ５ The control signal S of the circuit shown in FIG. Ｍ４ 19A. By using such a frequency divider circuit, capacitor Cbs1 can be charged once every n periods (n is an integer equal to or greater than 2) in the switching control in which switches M3 and M4 are alternately turned on and off, rather than every time switch M4 is turned on. If capacitor Cbs1 is to be charged once every n periods (m is an integer equal to or greater than 2) in the switching control in which switches M3 and M4 are alternately turned on and off, a 1 / m frequency divider circuit is used instead of the 1 / 2 frequency divider circuit shown in FIG. 19A.

[0132] FIG. 20 is a diagram showing a fourth example of operating waveforms during the step-up operation of the step-up / step-down converter 1 according to the embodiment.

[0133] As shown in FIG. 20, from time t1 to time t3, the control circuit 10 operates in the same manner as in the third example described with reference to FIG.

[0134] At time t4, due to output stabilization control in the buck-boost converter 1, switch M3 is turned off and switch M4 is turned on. At this time, a frequency divider circuit (e.g., a 1 / 2 frequency divider circuit) is used to turn on switch M5 every time switch M4 is turned on twice, so at time t4, switch M5 does not turn on and remains in the off state. Since the energy stored in capacitor Cbs2 is used to provide drive power for switch M4, the voltage Vbs2 of capacitor Cbs2 decreases. Since the energy stored in capacitor Cbs1 continues to be used to provide drive power for switch M1, which must be kept in the on state at all times, the voltage Vbs1 of capacitor Cbs1 decreases, but does not fall below the minimum voltage Vfo at which switch M1 can be fully on.

[0135] At time t5, the control circuit 10 operates in the same manner as at time t3, and from time t6 onwards, the operation from time t1 to time t5 is repeated. At times after time t6 which correspond to time t1, the capacitor Cbs1 is charged.

[0136] Thus, after charging of capacitor Cbs1 is completed, switch M1 may be kept fully on for longer than one cycle of the switching control. Therefore, instead of charging capacitor Cbs1 every time switch M4 is turned on, capacitor Cbs1 may be charged once every n cycles of the switching control. Specifically, in the fourth example of boost operation, the control circuit 10 turns on switch M4 and switch M5 once every n cycles of the switching control in which switches M3 and M4 are alternately turned on and off. When the voltage of capacitor Cbs1 reaches a predetermined voltage, switch M5 is turned off. This reduces the power used to drive switch M5, thereby reducing the overall power consumption of the buck-boost converter 1. Note that n is preset to a value that prevents the voltage Vbs1 of the charged capacitor Cbs1 from falling below voltage Vfo. In other words, the division ratio of the frequency divider circuit is designed in advance so that the voltage Vbs1 of the charged capacitor Cbs1 does not fall below voltage Vfo when it drops.

[0137] As described above, the voltage of capacitor Cbs2 may decrease in the step-down operation mode, and the voltage of capacitor Cbs1 may decrease in the step-up operation mode. In contrast, in the step-down operation mode, the switch unit is controlled to apply the input voltage of input voltage source 100 or the first drive voltage of the first BS circuit to capacitor Cbs2, thereby suppressing the voltage drop of capacitor Cbs2. In the step-up operation mode, the switch unit is controlled to apply the output voltage of capacitor 200 or the second drive voltage of the second BS circuit to capacitor Cbs1, thereby suppressing the voltage drop of capacitor Cbs1. Therefore, the voltage drop of the BS capacitor can be suppressed both during step-up operation and step-down operation. This allows the drive voltage of the high-side switch, which is always on, to be continuously maintained during step-down operation or step-up operation. Furthermore, during step-down operation, the second bridge circuit does not perform an extra switching operation to charge capacitor Cbs2, and during step-up operation, the first bridge circuit does not perform an extra switching operation to charge capacitor Cbs1. This reduces the voltage ripple of the output voltage and eliminates the need for strengthened output voltage stability control (feedback control), widening the design margin. Furthermore, since only a switch section is provided to suppress the voltage drop of the BS capacitor, no high-precision components are required, which allows for lower costs.

[0138] For example, in the step-down operation mode, by controlling switch M6 or M5, the input voltage of input voltage source 100 or the first drive voltage of the first BS circuit is applied to capacitor Cbs2, thereby suppressing a drop in the voltage of capacitor Cbs2. For example, in the step-up operation mode, by controlling switch M7 or M5, the output voltage of capacitor 200 or the second drive voltage of the second BS circuit is applied to capacitor Cbs1, thereby suppressing a drop in the voltage of capacitor Cbs1.

[0139] (Other Embodiments) As described above, the embodiments have been described as examples of the technology according to the present disclosure. However, the technology according to the present disclosure is not limited to these, and can be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate. For example, the following modifications are also included in one embodiment of the present disclosure.

[0140] For example, in the above embodiment, an example has been described in which the switch unit includes switches M5, M6, and M7, but this is not limiting. For example, the switch unit may not include switches M6 and M7 among switches M5, M6, and M7, or may not include switch M5 among switches M5, M6, and M7.

[0141] For example, the present disclosure can be realized not only as a buck-boost converter 1 but also as a control method including steps (processing) performed by components (e.g., the control circuit 10) that make up the buck-boost converter 1.

[0142] FIG. 21 is a flowchart showing an example of a control method according to another embodiment.

[0143] The control method is a control method for a buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, the buck-boost converter comprising: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series; an inductor connected between a first node between the first switch element and the second switch element and a second node between the third switch element and the fourth switch element; and a first bootstrap circuit including a first capacitor that generates a first drive voltage for the first switch element. The control method includes a bootstrap circuit, a second bootstrap circuit including a second capacitor that generates a second drive voltage for the fourth switch element, and a switch unit. The control method has a buck operation mode in which an input voltage is bucked and an output voltage is output, and a boost operation mode in which the input voltage is bucked and an output voltage is output. As shown in FIG. 21 , in the buck operation mode (bucking down in step S11), the switch unit is controlled to apply the input voltage or the first drive voltage to the second capacitor (step S12), and in the boost operation mode (boosting in step S11), the switch unit is controlled to apply the output voltage or the second drive voltage to the first capacitor (step S13).

[0144] For example, the present disclosure can be realized as a program for causing a computer (processor) to execute steps included in the control method. Furthermore, the present disclosure can be realized as a non-transitory computer-readable recording medium, such as a CD-ROM, on which the program is recorded.

[0145] For example, when the present disclosure is realized as a program (software), each step is performed by running the program using hardware resources such as a computer's CPU, memory, input / output circuits, etc. In other words, each step is performed by the CPU acquiring data from memory or input / output circuits, etc., performing calculations, and outputting the calculation results to memory or input / output circuits, etc.

[0146] In the above embodiment, each component included in the buck-boost converter 1 may be configured with dedicated hardware, or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0147] Some or all of the functions of the step-up / step-down converter 1 according to the above embodiment are typically realized as an LSI, which is an integrated circuit. These may be individually integrated into single chips, or some or all of them may be integrated into a single chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized by a dedicated circuit or a general-purpose processor. It is also possible to use an FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells within an LSI.

[0148] Furthermore, if an integrated circuit technology that can replace LSI emerges due to advances in semiconductor technology or other derived technologies, it is natural that each component included in the step-up / step-down converter 1 can be integrated using that technology.

[0149] In addition, this disclosure also includes forms obtained by making various modifications to the embodiments that a person skilled in the art would think of, and forms realized by arbitrarily combining the components and functions in each embodiment within the scope that does not deviate from the intent of this disclosure.

[0150] (Additional Notes) The above description of the embodiments discloses the following techniques.

[0151] (Technology 1) A buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, comprising: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series to each other via a first node; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series to each other via a second node; an inductor connected between the first node and the second node; a first bootstrap circuit including a first capacitor that generates a first drive voltage for the first switch element; a second bootstrap circuit including a second capacitor that generates a voltage corresponding to the first drive voltage, a switch unit, and a control circuit that controls the first bridge circuit, the second bridge circuit, and the switch unit, wherein the control circuit has a buck operation mode in which the input voltage is stepped down to output the output voltage, and a boost operation mode in which the input voltage is stepped up to output the output voltage, and controls the switch unit to apply the input voltage or the first drive voltage to the second capacitor in the buck operation mode, and controls the switch unit to apply the output voltage or the second drive voltage to the first capacitor in the boost operation mode.

[0152] In the step-down operation mode, the voltage of the second capacitor may decrease, and in the step-up operation mode, the voltage of the first capacitor may decrease. In contrast, in the step-down operation mode, the switch unit is controlled so that the input voltage of the input voltage source or the first drive voltage of the first BS circuit is applied to the second capacitor, thereby suppressing the voltage drop of the second capacitor. In the step-up operation mode, the switch unit is controlled so that the output voltage of the output capacitor or the second drive voltage of the second BS circuit is applied to the first capacitor, thereby suppressing the voltage drop of the first capacitor. Therefore, the voltage drop of the BS capacitor can be suppressed both in step-up operation and step-down operation. This allows the drive voltage of the high-side switch, which is always on, to be continuously maintained during step-down operation or step-up operation. Furthermore, during step-down operation, the second bridge circuit does not perform an extra switching operation to charge the second capacitor, and during step-up operation, the first bridge circuit does not perform an extra switching operation to charge the first capacitor. This reduces the voltage ripple of the output voltage and eliminates the need for strengthened output voltage stability control (feedback control), widening the design margin. Furthermore, since only a switch section is provided to suppress the voltage drop of the BS capacitor, no high-precision components are required, which allows for lower costs.

[0153] (Technology 2) A buck-boost converter according to Technology 1, wherein the switch unit includes a first switch circuit that switches between conduction and non-conduction between a high potential terminal of the first capacitor and a high potential terminal of the second capacitor, a second switch circuit that switches between conduction and non-conduction between a high potential terminal of the input voltage source and a high potential terminal of the second capacitor, and a third switch circuit that switches between conduction and non-conduction between a high potential terminal of the output capacitor and a high potential terminal of the first capacitor, and wherein the control circuit, in the step-down operation mode, controls the second switch circuit to apply the input voltage to the second capacitor or controls the first switch circuit to apply the first drive voltage to the second capacitor, and, in the step-up operation mode, controls the third switch circuit to apply the output voltage to the first capacitor or controls the first switch circuit to apply the second drive voltage to the first capacitor.

[0154] According to this, in the step-down operation mode, the second switch circuit or the first switch circuit is controlled to apply the input voltage of the input voltage source or the first drive voltage of the first BS circuit to the second capacitor, thereby suppressing a drop in the voltage of the second capacitor.In the step-up operation mode, the third switch circuit or the first switch circuit is controlled to apply the output voltage of the output capacitor or the second drive voltage of the second BS circuit to the first capacitor, thereby suppressing a drop in the voltage of the first capacitor.

[0155] (Technology 3) The buck-boost converter according to Technology 2, wherein, in the buck operation mode, when the input voltage is higher than the sum of the output voltage and a voltage required to fully turn on the fourth switch element, the control circuit controls the second switch circuit to apply the input voltage to the second capacitor.

[0156] In the step-down operation mode, since the third switch element is always in an off state and the fourth switch element is always in an on state, to fully turn on the fourth switch element, it is necessary to apply to the second capacitor a voltage that is at least higher than the sum of the output voltage and the voltage required to fully turn on the fourth switch element. Therefore, when the input voltage is higher than the sum of the output voltage and the voltage required to fully turn on the fourth switch element, the voltage required to fully turn on the fourth switch element can be applied from the input voltage source to the second capacitor. Therefore, in this case, by controlling the second switch circuit to connect the high-potential terminal of the input voltage source and the high-potential terminal of the second capacitor, it is possible to suppress a drop in the voltage of the second capacitor.

[0157] (Technology 4) In the buck-boost converter according to Technology 3, in the buck operation mode, the control circuit performs switching control such that the first switch element and the second switch element are alternately turned on and off, turns on the second switch circuit together with turning on the second switch element, and turns off the second switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

[0158] This allows the second capacitor to be charged from the input voltage source every time the second switch element is turned on (in other words, the first switch element is turned off), which is the timing when the input voltage source and the output capacitor are not connected, and also allows charging of the second capacitor to be stopped when the voltage of the second capacitor reaches a predetermined voltage (for example, a voltage that can sustain full on of the fourth switch element for a certain period of time).

[0159] (Technology 5) In the buck-boost converter according to Technology 3, in the buck operation mode, the control circuit performs switching control in which the first switch element and the second switch element are alternately turned on and off, turns on the second switch circuit together with turning on the second switch element once per n cycles (n is an integer of 2 or more) of the switching control, and turns off the second switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

[0160] For example, after the charging of the second capacitor is completed, the fourth switch element may be kept fully on for a period longer than one cycle of the switching control. Therefore, the second capacitor may be charged once every n cycles of the switching control, rather than being charged every time the second switch element is turned on. This reduces the power used to drive the second switch circuit, and ultimately reduces the power consumption of the entire buck-boost converter.

[0161] (Technology 6) In the buck-boost converter according to Technology 2, when a sum of the output voltage and a voltage required for fully turning on the fourth switch element is higher than the input voltage and a sum of the input voltage and the first drive voltage is higher than a sum of the output voltage and a voltage required for fully turning on the fourth switch element, in the buck operation mode, the control circuit controls the first switch circuit to apply the first drive voltage to the second capacitor.

[0162] In the step-down operation mode, the third switch element is always in an off state and the fourth switch element is always in an on state. Therefore, to fully turn on the fourth switch element, a voltage higher than the sum of the output voltage and the voltage required to fully turn on the fourth switch element must be applied to the second capacitor. However, when the input voltage is lower than the sum of the output voltage and the voltage required to fully turn on the fourth switch element, it is difficult to apply the voltage required to fully turn on the fourth switch element from the input voltage source to the second capacitor. On the other hand, when the sum of the input voltage and the first drive voltage is higher than the sum of the output voltage and the voltage required to fully turn on the fourth switch element, the voltage required to fully turn on the fourth switch element can be applied from the first BS circuit to the second capacitor. Therefore, in this case, by controlling the first switch circuit to connect the high-potential terminal of the first capacitor and the high-potential terminal of the second capacitor, a drop in the voltage of the second capacitor can be suppressed.

[0163] (Technology 7) In the buck-boost converter according to Technology 6, in the buck operation mode, the control circuit performs switching control such that the first switch element and the second switch element are alternately turned on and off, turns on the first switch circuit together with turning on the first switch element, and turns off the first switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

[0164] According to this, each time the first switch element is turned on, the sum of the input voltage and the first drive voltage is applied to the second capacitor to charge the second capacitor, and when the voltage of the second capacitor reaches a predetermined voltage (for example, a voltage that can sustain full-on of the fourth switch element for a certain period of time), charging of the second capacitor can be stopped.

[0165] (Technology 8) In the buck-boost converter according to Technology 6, in the buck operation mode, the control circuit performs switching control in which the first switch element and the second switch element are alternately turned on and off, turns on the first switch circuit together with turning on the first switch element once per n cycles (n is an integer of 2 or more) of the switching control, and turns off the first switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

[0166] For example, after the charging of the second capacitor is completed, the fourth switch element may be kept fully on for a period longer than one cycle of the switching control. Therefore, the second capacitor may be charged once every n cycles of the switching control, rather than being charged every time the first switch element is turned on. This reduces the power used to drive the first switch circuit, and ultimately reduces the power consumption of the entire buck-boost converter.

[0167] (Technology 9) The buck-boost converter according to Technology 2, wherein, in the boost operation mode, when the output voltage is higher than the sum of the input voltage and a voltage required for fully turning on the first switch element, the control circuit controls the third switch circuit to apply the output voltage to the first capacitor.

[0168] In the boost operation mode, since the second switch element is always in an off state and the first switch element is always in an on state, to fully turn on the first switch element, it is necessary to apply to the first capacitor a voltage that is at least higher than the sum of the input voltage and the voltage required to fully turn on the first switch element. Therefore, when the output voltage is higher than the sum of the input voltage and the voltage required to fully turn on the first switch element, the voltage required to fully turn on the first switch element can be applied from the output capacitor to the first capacitor. Therefore, in this case, by controlling the third switch circuit to connect the high-potential terminal of the output capacitor and the high-potential terminal of the first capacitor, it is possible to suppress a drop in the voltage of the first capacitor.

[0169] (Technology 10) In the buck-boost converter according to Technology 9, in the boost operation mode, the control circuit performs switching control such that the third switch element and the fourth switch element are alternately turned on and off, turns on the third switch circuit together with turning on the third switch element, and turns off the third switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

[0170] This allows the first capacitor to be charged from the output capacitor every time the third switch element is turned on (in other words, the fourth switch element is turned off), which is the timing when the input voltage source and the output capacitor are not connected, and also allows the charging of the first capacitor to be stopped when the voltage of the first capacitor reaches a predetermined voltage (for example, a voltage that can sustain full on of the first switch element for a certain period of time).

[0171] (Technology 11) In the buck-boost converter according to Technology 9, in the boost operation mode, the control circuit performs switching control in which the third switch element and the fourth switch element are alternately turned on and off, turns on the third switch circuit together with turning on the third switch element once per n cycles (n is an integer of 2 or more) of the switching control, and turns off the third switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

[0172] For example, after the charging of the first capacitor is completed, the first switch element may be kept fully on for a period longer than one cycle of the switching control. Therefore, the first capacitor may be charged once every n cycles of the switching control, rather than being charged every time the third switch element is turned on. This reduces the power used to drive the third switch circuit, and ultimately reduces the power consumption of the entire buck-boost converter.

[0173] (Technology 12) In the buck-boost converter according to Technology 2, when the sum of the input voltage and the voltage required for full-on of the first switch element is higher than the output voltage and the sum of the output voltage and the second drive voltage is higher than the sum of the input voltage and the voltage required for full-on of the first switch element, the control circuit controls the first switch circuit to apply the second drive voltage to the first capacitor in the boost operation mode.

[0174] In the boost operation mode, the second switch element is always in an OFF state and the first switch element is always in an ON state. Therefore, to fully turn on the first switch element, a voltage higher than the sum of the output voltage and the voltage required to fully turn on the first switch element must be applied to the first capacitor. However, if the output voltage is lower than the sum of the input voltage and the voltage required to fully turn on the first switch element, it is difficult to apply the voltage required to fully turn on the first switch element from the output capacitor to the first capacitor. On the other hand, if the sum of the output voltage and the second drive voltage is higher than the sum of the input voltage and the voltage required to fully turn on the first switch element, the voltage required to fully turn on the first switch element can be applied from the second BS circuit to the first capacitor. Therefore, in this case, by controlling the first switch circuit to establish electrical continuity between the high-potential terminal of the first capacitor and the high-potential terminal of the second capacitor, a drop in the voltage of the first capacitor can be suppressed.

[0175] (Technology 13) In the buck-boost converter according to Technology 12, in the boost operation mode, the control circuit performs switching control in which the third switch element and the fourth switch element are alternately turned on and off, turns on the first switch circuit together with turning on the fourth switch element, and turns off the first switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

[0176] According to this, each time the fourth switch element is turned on, the sum of the output voltage and the second drive voltage is applied to the first capacitor to charge the first capacitor, and when the voltage of the first capacitor reaches a predetermined voltage (for example, a voltage that can sustain full-on of the first switch element for a certain period of time), the charging of the first capacitor can be stopped.

[0177] (Technology 14) In the buck-boost converter according to Technology 12, in the boost operation mode, the control circuit performs switching control in which the third switch element and the fourth switch element are alternately turned on and off, turns on the first switch circuit together with turning on the fourth switch element once per n cycles (n is an integer of 2 or more) of the switching control, and turns off the first switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

[0178] For example, after the charging of the first capacitor is completed, the first switch element may be kept fully on for a period longer than one cycle of the switching control. Therefore, the first capacitor may be charged once every n cycles of the switching control, rather than being charged every time the fourth switch element is turned on. This reduces the power used to drive the first switch circuit, and ultimately reduces the power consumption of the entire buck-boost converter.

[0179] (Technology 15) A control method for a buck-boost converter that steps up or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, the buck-boost converter including a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series to each other via a first node, a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series to each other via a second node, an inductor connected between the first node and the second node, and a first capacitor that generates a first drive voltage for the first switch element. a first bootstrap circuit, a second bootstrap circuit including a second capacitor that generates a second drive voltage for the fourth switch element, and a switch unit, wherein the control method has a step-down operation mode that steps down the input voltage and outputs the output voltage, and a step-up operation mode that steps up the input voltage and outputs the output voltage, and controls the switch unit to apply the input voltage or the first drive voltage to the second capacitor in the step-down operation mode, and controls the switch unit to apply the output voltage or the second drive voltage to the first capacitor in the step-up operation mode.

[0180] This makes it possible to provide a control method that can suppress a drop in the voltage of the BS capacitor whether in a step-up operation or a step-down operation.

[0181] The present disclosure can be applied to a step-up / step-down converter that steps up or steps down an input voltage and outputs the stepped-up or stepped-up voltage.

[0182] 1 Step-up / down converter 10 Control circuit 11, 12 Voltage detection circuit 21, 22 Voltage comparison circuit 31, 32 Level shifter 100 Input voltage source 200, C1, C2, Cbs1, Cbs2 Capacitors Bbs1, Bbs2 Power supply Dbs1, Dbs2 Diodes GD1, GD2, GD3, GD4, GD5, GD6, GD7 Gate drivers M1, M2, M3, M4, M5, M6, M7 Switch

Claims

1. A buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, comprising: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series via a first node; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series via a second node; an inductor connected between the first node and the second node; a first bootstrap circuit including a first capacitor that generates a first drive voltage for the first switch element; a second bootstrap circuit including a second capacitor that generates a second drive voltage for the fourth switch element; a switch unit; and a control circuit that controls the first bridge circuit, the second bridge circuit, and the switch unit, wherein the control circuit has a buck operation mode in which the input voltage is stepped down to output the output voltage, and a boost operation mode in which the input voltage is stepped up to output the output voltage, and in the buck operation mode, controls the switch unit to apply the input voltage or the first drive voltage to the second capacitor, In the boost operation mode, the switch unit is controlled so as to apply the output voltage or the second drive voltage to the first capacitor.

2. The buck-boost converter according to claim 1, wherein the switch section comprises: a first switch circuit that switches between conduction and non-conduction between the high potential terminal of the first capacitor and the high potential terminal of the second capacitor; a second switch circuit that switches between conduction and non-conduction between the high potential terminal of the input voltage source and the high potential terminal of the second capacitor; and a third switch circuit that switches between conduction and non-conduction between the high potential terminal of the output capacitor and the high potential terminal of the first capacitor; and wherein the control circuit, in the buck operation mode, controls the second switch circuit to apply the input voltage to the second capacitor or controls the first switch circuit to apply the first drive voltage to the second capacitor, and in the boost operation mode, controls the third switch circuit to apply the output voltage to the first capacitor or controls the first switch circuit to apply the second drive voltage to the first capacitor.

3. The buck-boost converter according to claim 2, wherein, in the buck operation mode, when the input voltage is higher than the sum of the output voltage and a voltage required to fully turn on the fourth switch element, the control circuit controls the second switch circuit to apply the input voltage to the second capacitor.

4. The buck-boost converter according to claim 3, wherein, in the buck operation mode, the control circuit performs switching control such that the first switch element and the second switch element are alternately turned on and off, turns on the second switch circuit when the second switch element is turned on, and turns off the second switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

5. The buck-boost converter according to claim 3, wherein, in the buck operation mode, the control circuit performs switching control in which the first switch element and the second switch element are alternately turned on and off, turns on the second switch circuit together with turning on the second switch element once every n cycles (n is an integer of 2 or more) of the switching control, and turns off the second switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

6. The buck-boost converter according to claim 2, wherein, in the buck operation mode, when the sum of the output voltage and a voltage required to fully turn on the fourth switch element is higher than the input voltage and the sum of the input voltage and the first drive voltage is higher than the sum of the output voltage and a voltage required to fully turn on the fourth switch element, the control circuit controls the first switch circuit to apply the first drive voltage to the second capacitor.

7. The buck-boost converter according to claim 6, wherein, in the buck operation mode, the control circuit performs switching control such that the first switch element and the second switch element are alternately turned on and off, turns on the first switch circuit when the first switch element is turned on, and turns off the first switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

8. The buck-boost converter according to claim 6, wherein, in the buck operation mode, the control circuit performs switching control in which the first switch element and the second switch element are alternately turned on and off, turns on the first switch circuit together with turning on the first switch element once every n periods (n is an integer of 2 or more) of the switching control, and turns off the first switch circuit when the voltage of the second capacitor reaches a predetermined voltage.

9. The buck-boost converter according to claim 2, wherein, in the boost operation mode, when the output voltage is higher than the sum of the input voltage and a voltage required for fully turning on the first switch element, the control circuit controls the third switch circuit to apply the output voltage to the first capacitor.

10. The buck-boost converter according to claim 9, wherein, in the boost operation mode, the control circuit performs switching control such that the third switch element and the fourth switch element are alternately turned on and off, turns on the third switch circuit when the third switch element is turned on, and turns off the third switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

11. The buck-boost converter according to claim 9, wherein, in the boost operation mode, the control circuit performs switching control in which the third switch element and the fourth switch element are alternately turned on and off, turns on the third switch circuit together with turning on the third switch element once every n cycles (n is an integer of 2 or more) of the switching control, and turns off the third switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

12. The buck-boost converter according to claim 2, wherein, in the boost operation mode, when the sum of the input voltage and the voltage required to fully turn on the first switch element is higher than the output voltage and the sum of the output voltage and the second drive voltage is higher than the sum of the input voltage and the voltage required to fully turn on the first switch element, the control circuit controls the first switch circuit to apply the second drive voltage to the first capacitor.

13. The buck-boost converter according to claim 12, wherein, in the boost operation mode, the control circuit performs switching control such that the third switch element and the fourth switch element are alternately turned on and off, turns on the first switch circuit when the fourth switch element is turned on, and turns off the first switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

14. The buck-boost converter according to claim 12, wherein, in the boost operation mode, the control circuit performs switching control in which the third switch element and the fourth switch element are alternately turned on and off, turns on the first switch circuit together with turning on the fourth switch element once every n cycles (n is an integer of 2 or more) of the switching control, and turns off the first switch circuit when the voltage of the first capacitor reaches a predetermined voltage.

15. A control method for a buck-boost converter that steps down or steps up an input voltage from an input voltage source and outputs an output voltage to an output capacitor, the buck-boost converter comprising: a first bridge circuit to which the input voltage is applied and having a first switch element and a second switch element connected in series to each other via a first node; a second bridge circuit to which the output voltage is applied and having a third switch element and a fourth switch element connected in series to each other via a second node; an inductor connected between the first node and the second node; a first bootstrap circuit including a first capacitor that generates a first drive voltage for the first switch element; a second bootstrap circuit including a second capacitor that generates a second drive voltage for the fourth switch element; and a switch unit, the control method having a buck operation mode in which the input voltage is stepped down to output the output voltage, and a boost operation mode in which the input voltage is stepped up to output the output voltage, and in the buck operation mode, controlling the switch unit to apply the input voltage or the first drive voltage to the second capacitor, In the step-up operation mode, the switch unit is controlled so as to apply the output voltage or the second drive voltage to the first capacitor.

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