System crash information storage method and apparatus and computer system

Abstract

The present application relates to the technical field of computers, and provides a system crash information storage method and apparatus and a computer system. The method comprises: receiving a target interrupt signal sent by a system monitoring apparatus; sending the target interrupt signal to a first core and a second core in a processor; controlling the first core to run a first interrupt processing program, and storing first system crash information to a reserved storage space of a system memory; and controlling the second core to run a second interrupt processing program, and storing second system crash information to the system monitoring apparatus; wherein the system monitoring apparatus and the system memory are separately connected to the processor. By means of the method and apparatus provided in the present application, relevant information of the computer system when a system crash occurs can be stored as much as possible, improving the fault diagnosis efficiency of the computer system.

Description

System crash information saving method, device and computer system

[0001] Cross-reference to Related Applications

[0002] The present application claims priority to the Chinese patent application No. 202410535742.8, filed on April 30, 2024, and entitled "System crash information saving method, device and computer system", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the technical field of computer, in particular, to a system crash information saving method, device and computer system. BACKGROUND

[0004] During the running of a computer system, some unresolvable faults may occur, at this time, the computer system cannot continue to run normally, and this phenomenon is also called system crash. These faults may be caused by software program errors, may be caused by hardware faults (such as too high temperature, firmware stall, unstable external connection signal, etc.), or may be triggered by human error. In order to facilitate fault diagnosis, users usually need to obtain sufficient on-site information (i.e. the state of the computer at the time of fault occurrence, including the call stack of abnormal code, the value of key register, the running temperature of chip, etc.), which can analyze the cause of the fault.

[0005] Therefore, how to save as much as possible the relevant information of the computer system when the system crash occurs, and improve the fault diagnosis efficiency of the computer system has become a technical problem to be solved in the industry. SUMMARY

[0006] The present application provides a system crash information saving method, device and computer system, which is used to solve the technical problem of how to save as much as possible the relevant information of the computer system when the system crash occurs, and improve the fault diagnosis efficiency of the computer system.

[0007] The present application provides a system crash information saving method, comprising:

[0008] receiving a target interrupt signal sent by a system monitoring device;

[0009] sending the target interrupt signal to a first core and a second core in a processor;

[0010] controlling the first core to run a first interrupt processing program, and saving first system crash information to a reserved storage space of a system memory;

[0011] controlling the second core to run a second interrupt processing program, and saving second system crash information to the system monitoring device;

[0012] The system monitoring device and the system memory are respectively connected with the processor.

[0013] In some embodiments, the first interrupt handling program is stored in the system memory; and the second interrupt handling program is stored in the system monitoring device.

[0014] In some embodiments, before receiving the target interrupt signal sent by the system monitoring device, the method further comprises:

[0015] In the case that the running state of the processor is abnormal, the feeding signal to the watchdog module in the system monitoring device is stopped;

[0016] The system monitoring device periodically monitors the running temperature of each device in the computer system; and in the case that the running temperature of any device is abnormal or the watchdog module does not receive the feeding signal within a monitoring period, the target interrupt signal is sent to the processor.

[0017] In some embodiments, the target interrupt signal is sent to the first core and the second core in the processor, comprising:

[0018] In the case that the first core and the second core support non-maskable interrupt, the interrupt controller in the processor is configured to send the target interrupt signal to the first core and the second core based on the non-maskable interrupt input interface of the first core and the non-maskable interrupt input interface of the second core.

[0019] In some embodiments, before controlling the first core to run the first interrupt handling program and saving the first system crash information to the reserved storage space in the system memory, the method further comprises:

[0020] In the case of initializing the computer system, the address of the first interrupt handling program in the system memory is set as the interrupt entry address of the first core.

[0021] The monitoring thread is started; and the monitoring thread is used to monitor the running state of the processor, and periodically sends the feeding signal to the watchdog module in the case that the running state of the processor is normal.

[0022] In some embodiments, controlling the first core to run the first interrupt handling program and saving the first system crash information to the reserved storage space in the system memory, comprising:

[0023] Controlling the first core to execute the first interrupt handling program in the case that the target interrupt signal is received;

[0024] Obtaining the call stack information of each core in the processor;

[0025] Reading the running temperature information of each device and the obtaining time information which are real-time saved in the system monitoring device;

[0026] generate first system crash information based on the running temperature information and the acquisition time information of each device, and the call stack information of each core;

[0027] save the first system crash information to a reserved storage space of the system memory.

[0028] In some embodiments, after saving the first system crash information to the reserved storage space of the system memory, the method further comprises:

[0029] configuring the system memory to a self-refresh state;

[0030] calling a restart command to restart the computer system.

[0031] In some embodiments, before calling the restart command to restart the computer system, the method further comprises:

[0032] determining an execution state of the second interrupt handler;

[0033] in a case where the execution state of the second interrupt handler is complete, calling the restart command to restart the computer system.

[0034] In some embodiments, before controlling the second core to run the second interrupt handler and save the second system crash information to the system monitoring device, the method further comprises:

[0035] in a case where the computer system is initialized, copying the second interrupt handler from the system memory to a crash information memory of the system monitoring device;

[0036] setting an address of the second interrupt handler in the crash information memory as an interrupt entry address of the second core.

[0037] In some embodiments, controlling the second core to run the second interrupt handler and save the second system crash information to the system monitoring device comprises:

[0038] controlling the second core to execute the second interrupt handler in a case where a target interrupt signal is received;

[0039] acquiring running state information of the system memory;

[0040] reading running temperature information and acquisition time information of each device saved in real time in the system monitoring device;

[0041] generating second system crash information based on the running temperature information and the acquisition time information of each device, and the running state information of the system memory;

[0042] saving the second system crash information to a crash information memory of the system monitoring device.

[0043] In some embodiments, the second system crash information is generated based on the running temperature information and the acquisition time information of each device, and the running state information of the system memory, including:

[0044] The second system crash information is generated based on the running temperature information and the acquisition time information of each device, the power-on / off information of the processor, and the running state information of the system memory.

[0045] In some embodiments, the method further includes:

[0046] In the case of computer system restart, the refresh setting information of the system memory is acquired;

[0047] In the case of self-refresh of the refresh setting information of the system memory, the system memory is configured as system refresh;

[0048] A reserved storage space is set in the system memory.

[0049] In some embodiments, the method further includes:

[0050] In the case of computer system restart, the first system crash information is acquired from the reserved storage space of the system memory;

[0051] The second system crash information is acquired from the system monitoring device;

[0052] The first system crash information and the second system crash information are displayed.

[0053] The present application provides a system crash information saving device, including:

[0054] The receiving unit is configured to receive the target interrupt signal sent by the system monitoring device;

[0055] The sending unit is configured to send the target interrupt signal to the first core and the second core in the processor;

[0056] The first saving unit is configured to control the first core to run the first interrupt processing program, and save the first system crash information to the reserved storage space of the system memory;

[0057] The second saving unit is configured to control the second core to run the second interrupt processing program, and save the second system crash information to the system monitoring device;

[0058] Wherein, the system monitoring device and the system memory are respectively connected with the processor; the first interrupt processing program is stored in the system memory; and the second interrupt processing program is stored in the system monitoring device.

[0059] The present application provides a computer system, including a processor, a system monitoring device and a system memory;

[0060] The processor is configured to perform a system crash information saving method.

[0061] In some embodiments, the processor comprises an interrupt input interface and a bus interface.

[0062] The processor receives a target interrupt signal sent by the system monitoring device based on the interrupt input interface.

[0063] The processor reads the running temperature information of each device and the acquisition time information saved in real time in the system monitoring device based on the bus interface.

[0064] In some embodiments, the system monitoring device further comprises a temperature acquisition module.

[0065] The temperature acquisition module is connected with the temperature sensor of each device in the computer system and is configured to acquire the running temperature information of each device.

[0066] In some embodiments, the system monitoring device further comprises a timing module.

[0067] The timing module is configured to determine the acquisition time information corresponding to the running temperature information of each device.

[0068] In some embodiments, the system monitoring device further comprises a power management module.

[0069] The power management module is configured to control the working power supply of the processor and the system memory and generate power on-off information.

[0070] The present application provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements a system crash information saving method when executing the program.

[0071] The present application provides a non-transitory computer readable storage medium having a computer program stored thereon, wherein the computer program implements a system crash information saving method when executed by a processor.

[0072] The system crash information saving method, device and computer system provided in the application receive a target interrupt signal sent by a system monitoring device; the target interrupt signal is sent to a first core and a second core in a processor; the first core is controlled to run a first interrupt processing program, and first system crash information is saved to a reserved storage space of a system memory; the second core is controlled to run a second interrupt processing program, and second system crash information is saved to the system monitoring device; since the first core and the second core are used to respectively execute different interrupt processing programs, the system crash information of the computer system is saved in the system memory and the system monitoring device respectively, so that the core executing the interrupt processing program, the storage position of the interrupt processing program and the saving position of the system crash information are all independent of each other, the redundancy of the system crash information saving is improved, the system crash information can still be saved even in the case that the system memory fails, the related information of the computer system when the system crash occurs is saved as much as possible, and the fault diagnosis efficiency of the computer system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0073] The drawings incorporated in the specification and constituting a part thereof illustrate embodiments consistent with the present application and together with the specification serve to explain the principles of the application.

[0074] In order to more clearly illustrate the technical solutions in the application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0075] Fig. 1 is a flowchart of the system crash information saving method provided in the application;

[0076] Fig. 2 is a structural schematic diagram of a computer system provided in the application;

[0077] Fig. 3 is a flowchart of a computer system initialization method provided in the application;

[0078] Fig. 4 is a processing flowchart of a first interrupt processing program provided in the application;

[0079] Fig. 5 is a flowchart of a computer system initialization method provided in the application;

[0080] Fig. 6 is a processing flowchart of a second interrupt processing program provided in the application;

[0081] Fig. 7 is a flowchart of a computer system restart method provided in the application;

[0082] Fig. 8 is a structural schematic diagram of a system crash information saving device provided in the application;

[0083] Fig. 9 is a second structural schematic diagram of a computer system according to the present application;

[0084] Fig. 10 is a structural schematic diagram of an electronic device according to the present application. DETAILED DESCRIPTION

[0085] In order to make the personnel in the art better understand the scheme of the present application, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0086] It should be noted that the terms "first", "second", and the like in the present application are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0087] If software running in a computer system has a defect, it will generally cause an instruction execution exception (including invalid instruction, invalid address, etc.), thus leading to system crash. These exceptions are similar to interrupts generated by the processor core itself, and the operating system will stop executing the program that is currently being executed and immediately execute an exception handling program. If the exception is generated by an application program, the operating system will parse the call stack (the order of function calls) of the program and save it to a core dump file for subsequent investigation by engineers. Engineers can also automatically re-execute the application program by writing programs or scripts. However, for exceptions generated by internal code of the operating system, it is generally not possible to recover, at which point the system can only be restarted. During the restart process, the double data rate synchronous dynamic random access memory (DDR) controller in the central processing unit (CPU) is in an inactive state and will not refresh the data in the DDR, and after the restart, the basic input output system (BIOS) or universal boot loader (U-boot) will reinitialize and configure the DDR controller, so all data in the DDR will be lost, and therefore it is meaningless to save the field information to the DDR in the exception handling program. It is also difficult to store the field information to a hard disk or other non-volatile medium, because the hard disk driver is also part of the operating system and cannot be guaranteed to work normally in the case of an exception in the internal code of the operating system. If the hard disk driver is called to save the field information data to the hard disk, there is a risk that the program will be stuck during this process and will not be able to execute the restart process normally to recover the system execution. Therefore, for the system crash described above caused by errors in the internal code of the operating system, it is difficult for engineers to investigate the cause of the problem due to the lack of sufficient field information.

[0088] For system crashes caused by hardware and human operation, an interrupt is generally passed to the processor core, which will immediately execute an interrupt handling program, query the interrupt reason, and perform corresponding processing (generally restart). Since the data in the DDR is lost after the restart, it is also difficult to save sufficient field information at this time.

[0089] The related technology reserves a special address segment in the DDR to store field information, sets the DDR to a self-refresh state before the computer system crashes and restarts, so that the DDR can avoid data loss after the computer restarts. However, the related technology still has the following deficiencies:

[0090] (1) If the DDR and the DDR controller itself have a fault, the system crash site information cannot be saved, and the code responsible for saving information and restarting cannot be executed (because the code is also in the DDR), at which time the system will be deadlocked;

[0091] (2) For the restart after shutdown caused by the user pressing the shutdown key, the user misinputting the shutdown command, etc., since the CPU has been powered off, the data in the DDR cannot be saved, resulting in the specific reason for the system restart being unable to be obtained;

[0092] (3) The saved site information is incomplete, and the specific reason for the computer system crash cannot be accurately analyzed.

[0093] In order to solve the problems in the prior art, FIG. 1 is a flowchart of a system crash information saving method provided by the present application, as shown in FIG. 1, the execution steps of the method include step 110, step 120, step 130 and step 140.

[0094] Step 110, receiving a target interrupt signal sent by a system monitoring device. The system monitoring device and the system memory are respectively connected with a processor of the computer system.

[0095] Optionally, the execution subject of the system crash information saving method provided by the embodiment of the present application is a system crash information saving device. The device can be realized by software, for example, a system crash information saving program, or can be a device for executing the system crash information saving method, for example, a computer or a server, etc.

[0096] System crash refers to a serious fault or error of the computer system hardware or software, which causes the system to be unable to normally operate. The system crash can cause data loss, task interruption, production efficiency reduction, etc.

[0097] System crash information refers to information related to the cause of the system crash of the computer system, also known as site information at the time of system crash, for example, can include the running state of each hardware device, error code, log information, stack tracking information and running environment, etc.

[0098] FIG. 2 is one of the structural diagrams of a computer system provided by the present application, as shown in FIG. 2, the computer system 200 at least includes a processor 210, and a system monitoring device 220 and a system memory 230 connected with the processor.

[0099] The processor can be a CPU chip, which is the core of the whole system. Its internal part can include at least two processor cores, an Inter-Integrated Circuit (I2C) controller, a Universal Asynchronous Receiver and Transmitter (UART) controller, a Local Bus controller, a DDR controller, a Peripheral Component Interconnect express (PCIe) controller, and the like hardware modules.

[0100] The system memory refers to the main area of the system for temporarily storing program instructions and data, and is usually a Double Data Rate Synchronous Dynamic Random Access Memory (DDR).

[0101] The system monitoring device refers to a device for monitoring the state of each hardware device (including the processor) in the computer system.

[0102] In a computer system, an interrupt signal is a special signal used to inform the processor that it needs to immediately stop the task being executed and handle an urgent event or request from an external device or other component. The interrupt signal can come from various sources, including hardware devices, operating systems, or other software components.

[0103] The target interrupt signal refers to an interrupt signal that occurs when the computer system crashes and the processor needs to save the system crash information.

[0104] The target interrupt signal can be sent by the system monitoring device and input through the interrupt signal interface (usually an interrupt input pin) of the processor.

[0105] Step 120: Send the target interrupt signal to the first core and the second core in the processor.

[0106] Optionally, the processor can include one or more cores. Each core is an independent processing unit that can execute instructions and process data. In a multi-core processor, each core can execute different tasks simultaneously.

[0107] In the embodiments of the present application, the processor includes at least two cores, namely the first core and the second core. After receiving the target interrupt signal, the processor will immediately send the target interrupt signal to the first core and the second core.

[0108] Step 130: Control the first core to run the first interrupt handling program and save the first system crash information to the reserved storage space of the system memory. The first interrupt handling program is stored in the system memory.

[0109] Optionally, the reserved storage space of the system memory refers to a storage space reserved in the system memory and specially configured to save the system crash information. The system memory can be initialized by a system boot program during the process of booting the computer system, and part of the storage space can be reserved as the reserved storage space configured to save the system crash information, and the remaining storage space can be used as the memory for the operating system. The operating system will not automatically use the reserved storage space during the booting or normal running process.

[0110] The interrupt handling program is a special code for responding to and processing the interrupt signal. When the processor receives the interrupt signal, it will pause the task being executed at present and execute the interrupt handling program to process the event or request caused by the interrupt. The main tasks of the interrupt handling program include saving the current state, responding to the interrupt request, executing the interrupt service, restoring the execution state, and clearing the interrupt flag, etc.

[0111] The first interrupt handling program can be stored in the system memory, for example, in the reserved storage space of the system memory. The processor sends the target interrupt signal to the first core, controls the first core to read and run the first interrupt handling program from the reserved storage space of the system memory, and saves the first system crash information to the reserved storage space of the system memory.

[0112] Step 140, controlling the second core to run the second interrupt handling program and save the second system crash information to the system monitoring device. The second interrupt handling program is stored in the system monitoring device.

[0113] Optionally, the system monitoring device is independent of the processor externally, and a crash information storage can be arranged in the system monitoring device independently, for example, a random access memory (RAM) can be used to realize the crash information storage.

[0114] The second interrupt handling program can be stored in the crash information storage of the system monitoring device. The processor sends the target interrupt signal to the second core, controls the second core to read and run the second interrupt handling program from the crash information storage of the system monitoring device, and saves the second system crash information to the crash information storage of the system monitoring device.

[0115] The system crash information saving method provided by the embodiments of the present application receives a target interrupt signal sent by a system monitoring device; sends the target interrupt signal to a first core and a second core in a processor; controls the first core to run a first interrupt processing program and saves first system crash information to a reserved storage space in a system memory; controls the second core to run a second interrupt processing program and saves second system crash information to the system monitoring device; since the first core and the second core are used to respectively execute different interrupt processing programs, the system crash information of the computer system is saved in the system memory and the system monitoring device respectively, so that the core executing the interrupt processing program, the storage position of the interrupt processing program and the saving position of the system crash information are all independent of each other, the redundancy of the system crash information saving is improved, the system crash information can still be saved even in the case that the system memory fails, and the related information of the computer system when the system crash occurs is saved as much as possible, and the fault diagnosis efficiency of the computer system is improved.

[0116] It should be noted that each embodiment of the present application can be freely combined, the order can be changed or the embodiments can be executed independently, and the fixed execution order is not required.

[0117] In some embodiments, before receiving the target interrupt signal sent by the system monitoring device, the method further comprises:

[0118] In the case that the running state of the processor is abnormal, the feeding signal to the watchdog module in the system monitoring device is stopped;

[0119] The system monitoring device periodically monitors the running temperature of each device in the computer system; in the case that the running temperature of any device is abnormal or the watchdog module does not receive the feeding signal within a monitoring period, the target interrupt signal is sent to the processor.

[0120] Optionally, the watchdog is a hardware or software mechanism for monitoring the running state of the system and taking measures to restore the normal operation of the system when the system is abnormal or stops responding. The watchdog module can be set in the computer system to monitor the running state of the processor.

[0121] A thread can be created in the processor to monitor the running state of the processor. For example, the thread can determine the running state of the processor by whether the thread is called by the processor within a set period. If the thread is called by the processor within the set period (for example, 10 seconds), it indicates that the running state of the processor is normal; if the thread is not called by the processor within the set period, it indicates that the running state of the processor is abnormal, and the processor can stop responding or fall into a deadlock state.

[0122] In the case that the running state of the processor is normal, a feeding signal can be sent to the watchdog module in the system monitoring device, which prevents the timer in the watchdog module from timing out. In the case that the running state of the processor is abnormal, the feeding signal to the watchdog module in the system monitoring device is stopped. If the watchdog module does not receive the feeding signal within a monitoring period (for example, 30 seconds), the timer in the watchdog module times out, triggering the system monitoring device to send a target interrupt signal to the processor.

[0123] A temperature acquisition module can be arranged in the system monitoring device, which is connected with temperature sensors of each device in the computer system and is configured to periodically acquire and monitor the running temperature of each device. In the case that the running temperature of any device is abnormal or the watchdog module does not receive the feeding signal within the monitoring period, the system monitoring device determines that a system crash occurs and sends a target interrupt signal to the processor.

[0124] The system crash information saving method provided by the embodiment of the application arranges a watchdog module in the system monitoring device, sends a target interrupt signal in the case that the running temperature of any device is abnormal or the watchdog module does not receive the feeding signal within the monitoring period, and thus the monitoring of each device in the computer system is realized, the interrupt signal can be sent in time according to the running state of each device, and the system crash information can be saved in time and effectively.

[0125] In some embodiments, sending the target interrupt signal to the first core and the second core in the processor includes:

[0126] In the case that the first core and the second core support non-maskable interrupts, an interrupt controller in the processor is configured to send the target interrupt signal to the first core and the second core based on a non-maskable interrupt input interface of the first core and a non-maskable interrupt input interface of the second core.

[0127] Optionally, the interrupt types supported by the cores in the processor generally include maskable interrupts (normal interrupts) and non-maskable interrupts (NMIs).

[0128] A non-maskable interrupt is a special type of interrupt, which has a higher priority than other interrupts and is generally used to handle emergency events or critical abnormal situations in a system. Unlike maskable interrupts, a non-maskable interrupt cannot be turned off by executing instructions by software, and can still be triggered even if the system is in a state of masking all interrupts.

[0129] The core in the processor usually has a pin (interrupt input interface) to receive an interrupt signal. Once the function of receiving the interrupt is closed (usually when the interrupt is being processed), the core cannot process some more urgent events than the normal interrupt. These events include: the machine temperature is too high, the hardware has an exception (for example, the DDR cannot be written), the user performs a restart or shutdown operation (at this time, the information needs to be saved urgently in order to investigate the reason for the restart or shutdown later). Therefore, in addition to the pin to receive the normal interrupt signal, the core of the processor usually has at least one pin to receive the non-maskable interrupt signal. For example, some models of processors can support connecting the interrupt signal of an external device or controller to the non-maskable interrupt pin of the processor core by setting the interrupt controller.

[0130] If the first core and the second core support the non-maskable interrupt, the interrupt controller in the processor can be configured to send the target interrupt signal to the first core and the second core through the non-maskable interrupt input interface of the first core and the non-maskable interrupt input interface of the second core at the same time, so that the first core and the second core execute the first interrupt processing program and the second interrupt processing program respectively to save the system crash information.

[0131] The system crash information saving method provided by the embodiment of the application sends the target interrupt signal to the first core and the second core through the non-maskable interrupt input interface of the first core and the non-maskable interrupt input interface of the second core at the same time, so that the target interrupt signal has a high priority and the system crash information is saved in time and effectively.

[0132] In some embodiments, before the first core runs the first interrupt processing program and saves the first system crash information to the reserved storage space in the system memory, the method further comprises:

[0133] In the case of initializing the computer system, the address of the first interrupt processing program in the system memory is set as the interrupt entry address of the first core.

[0134] Starting a monitoring thread; the monitoring thread is used to monitor the running state of the processor, and periodically sends a dog-feeding signal to the watchdog module when the running state of the processor is normal.

[0135] Optionally, after the computer system is initialized, a series of drivers are loaded. One of them is used to load the first interrupt processing program. Since the loading of the first interrupt processing program involves the watchdog module, the driver for loading the first interrupt processing program can also be called the watchdog driver.

[0136] Figure 3 is one of the flow diagrams of the computer system initialization method provided by the present application, as shown in Figure 3, the flow is the initialization flow of the watchdog driver. All the codes and data of the watchdog driver are located in the DDR, as the main program for saving the system crash information, which can save all the required live information in the case that the DDR and the operating system have no serious problems (at least the watchdog driver can still execute).

[0137] In the case of computer system initialization, the watchdog driver configures the interrupt controller, and sends the target interrupt signal from the system monitoring module to the first core through the non-maskable interrupt interface of the first core. The address of the first interrupt handling program in the system memory is set as the interrupt entry address of the first core, so that the first core will immediately jump to the first interrupt handling program for execution after receiving the target interrupt signal.

[0138] In addition, the watchdog driver also starts a monitoring thread. The monitoring thread is bound to the first core, so that the monitoring thread can be used to monitor the running state of the processor, and in the case that the running state of the processor is normal, the watchdog module is periodically (for example, the period can be 10 seconds) sent a feed dog signal, that is, the dog is kicked at a frequency of once every 10 seconds.

[0139] The system crash information saving method provided by the embodiment of the present application sets the address of the first interrupt handling program in the system memory as the interrupt entry address of the first core and starts the monitoring thread to monitor the running state of the processor in the case of computer system initialization, which realizes the loading of the first interrupt handling program, facilitates the execution of the first core, and enables the first core to save the system crash information in time and effectively.

[0140] In some embodiments, controlling the first core to run the first interrupt handling program and saving the first system crash information to the reserved storage space of the system memory includes:

[0141] Controlling the first core to execute the first interrupt handling program in the case of receiving the target interrupt signal;

[0142] Obtaining the call stack information of each core in the processor;

[0143] Reading the running temperature information of each device and obtaining the time information saved in real time by the system monitoring device;

[0144] Based on the running temperature information of each device and the obtaining time information, and the call stack information of each core, generating the first system crash information;

[0145] Saving the first system crash information to the reserved storage space of the system memory.

[0146] Optionally, FIG. 4 is a flowchart of a first interrupt handling procedure provided by the present application. As shown in FIG. 4, when the first core receives an interrupt signal, the first core reads a status register of an interrupt controller, and determines whether the received interrupt signal is from the system monitoring device. If the received interrupt signal is not from the system monitoring device, it is determined that the interrupt signal is likely to be another interrupt, and the flow enters the processing procedure of the other interrupt. If the received interrupt signal is from the system monitoring device, it is determined that the interrupt signal is from the system monitoring device.

[0147] By communicating with the system monitoring device through the processor, the first core reads an identification register in the system monitoring device, and determines whether the system monitoring device can be accessed. If the system monitoring device cannot be accessed, it is determined that the system monitoring device is likely to be faulty, and the call stack information of each core in the processor is acquired. If the system monitoring device can be accessed, it is determined through the interrupt status register whether the running temperature of any device is abnormal or whether the watchdog module receives a feed signal (watchdog alarm) in a monitoring period. If the running temperature of any device is normal and the watchdog module receives the feed signal in the monitoring period, it is determined that the interrupt signal is likely to be another interrupt, and the flow enters the processing procedure of the other interrupt. If it is determined that the running temperature of any device is abnormal or the watchdog module does not receive the feed signal in the monitoring period, it is determined that the interrupt signal is the target interrupt signal, the call stack information of each core in the processor is acquired, and the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time are read.

[0148] According to the running temperature information and the acquisition time information of each device, and the call stack information of each core, first system crash information is generated, and the first system crash information is saved to the reserved storage space of the system memory.

[0149] Here, the acquisition time information refers to the real-time collection time information of the running temperature information of each device. The call stack is used to track the order of function calls, and can also be used for exception handling, debugging, and memory management, etc. The call stack information is the function call information in the execution of the software program of each core. Through the call stack information, the flow of program execution and the location of the error can be determined.

[0150] The system crash information saving method provided by the embodiment of the present application controls the first core to execute the first interrupt handling procedure, saves the running temperature information and the acquisition time information of each device, and the call stack information of each core as the first system crash information to the reserved storage space of the system memory, and realizes the saving of as much relevant information as possible of the computer system when the system crash occurs.

[0151] In some embodiments, after the first system crash information is saved to the reserved storage space of the system memory, the method further includes:

[0152] configuring the system memory to a self-refresh state;

[0153] calling the restart command to restart the computer system.

[0154] Optionally, the system memory can be implemented by a DDR memory. The DDR memory is configured to store data and programs, but needs a DDR controller in the processor to refresh regularly to keep the data valid. If the data in the system memory is not refreshed, the data will gradually disappear.

[0155] In the case of computer system crash, restart is needed. During the restart, the DDR controller in the processor is in an inactive state and will not refresh the data in the DDR, and after the restart, the system boot program such as BIOS or U-boot will re-initialize and configure the DDR controller, so all the data in the DDR will be lost.

[0156] Therefore, before the restart, the system memory can be configured to a self-refresh state. The DDR memory usually has a built-in refresh controller responsible for regularly refreshing the data stored in the memory. This automatic refresh process is called memory self-refresh. Memory self-refresh is part of computer memory management, which ensures the persistence and stability of data in the system while reducing the intervention to the operating system or application program.

[0157] The system crash information saving method provided by the embodiment of the present application configures the system memory to a self-refresh state before restarting the computer system, realizes effective saving of the first system crash information, avoids data loss, and realizes saving as much as possible of the relevant information of the computer system when the system crashes.

[0158] In some embodiments, before calling the restart command to restart the computer system, the method further comprises:

[0159] determining the execution state of the second interrupt handling program;

[0160] In the case that the execution state of the second interrupt handling program is completed, calling the restart command to restart the computer system.

[0161] Optionally, since the first interrupt handling program and the second interrupt handling program are independently executed by the first core and the second core respectively, and the first core is responsible for restarting the computer system, before the first core calls the restart command to restart the computer system, the execution state of the second interrupt handling program can be obtained through inter-core communication.

[0162] If the execution state of the second interrupt handler is complete, the first core invokes a restart command to restart the computer system; if the execution state of the second interrupt handler is incomplete, the first core can wait until the second interrupt handler is executed completely, and then invokes the restart command to restart the computer system.

[0163] The system crash information saving method provided by the embodiment of the present application can restart the computer system by invoking a restart command when the execution state of the second interrupt handler is complete, so that the first interrupt handler and the second interrupt handler can be executed completely, and the relevant information of the computer system when the system crashes is saved as much as possible.

[0164] In some embodiments, before the second core is controlled to run the second interrupt handler and the second system crash information is saved to the system monitoring device, the method further comprises:

[0165] In the case of initialization of the computer system, the second interrupt handler is copied from the system memory to the crash information memory of the system monitoring device;

[0166] The address of the second interrupt handler in the crash information memory is set as the interrupt entry address of the second core.

[0167] Optionally, after the computer system is initialized, the first interrupt handler is loaded, and the second interrupt handler is also loaded. Since the loading of the second interrupt handler involves the system monitoring device, the driver for loading the second interrupt handler can also be referred to as the system monitoring device driver.

[0168] FIG. 5 is a flowchart of a computer system initialization method provided by the present application, which is the initialization flowchart of the system monitoring device driver. All codes of the system monitoring device driver (including the second interrupt handler) are stored in the system memory before initialization. In the case of initialization of the computer system, the system monitoring device driver copies the second interrupt handler from the system memory to the crash information memory of the system monitoring device. The crash information memory is a memory specially set in the system monitoring device and is configured to store the system crash information and the second interrupt handler.

[0169] After the second interrupt handler is copied from the system memory to the crash information memory of the system monitoring device, the address of the second interrupt handler in the crash information memory is set as the interrupt entry address of the second core, so that the second core will immediately jump to the second interrupt handler for execution after receiving the target interrupt signal.

[0170] At this time, even if the system memory fails and cannot be accessed, the second core can execute the second interrupt handler to save the second system crash information.

[0171] The system crash information saving method provided by the embodiment of the application copies the second interrupt processing program from the system memory to the crash information storage of the system monitoring device in the case of computer system initialization, sets the address of the second interrupt processing program in the crash information storage as the interrupt entry address of the second core, realizes the loading of the second interrupt processing program, facilitates the execution of the second core, and enables the second core to save system crash information in time and effectively.

[0172] In some embodiments, the control of the second core to run the second interrupt processing program and save the second system crash information to the system monitoring device comprises:

[0173] The control of the second core to execute the second interrupt processing program in the case of receiving the target interrupt signal;

[0174] The acquisition of the running state information of the system memory;

[0175] The reading of the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time;

[0176] The generation of the second system crash information based on the running temperature information of each device and the acquisition time information and the running state information of the system memory;

[0177] The saving of the second system crash information to the crash information storage of the system monitoring device.

[0178] Optionally, FIG. 6 is a processing flowchart of the second interrupt processing program provided by the application, as shown in FIG. 6, the second core will jump to execute the second interrupt processing program in the case of receiving the interrupt signal. The codes of the second interrupt processing program are all stored in the crash information storage of the system monitoring device.

[0179] The second core reads the interrupt state register of the system monitoring device, and judges whether the running temperature of any device is abnormal or whether the watchdog module receives the feed dog signal in the monitoring period through the interrupt state register. If the running temperature of any device is normal and the watchdog module receives the feed dog signal in the monitoring period, no processing is needed. If it is determined that the running temperature of any device is abnormal or the watchdog module does not receive the feed dog signal in the monitoring period, the running state information of the system memory is acquired, and the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time are read. The second core saves the running temperature information of each device and the acquisition time information and the running state information of the system memory as the second system crash information to the crash information storage of the system monitoring device.

[0180] The second system crash information is mainly used in the case of system memory failure, and thus the saved information is relatively limited compared with the first system crash information, but the running temperature information of each device and the running state information of the system memory can still be provided to facilitate the fault diagnosis of the computer system.

[0181] The system crash information saving method provided in the embodiments of the present application saves the running temperature information and the acquisition time information of each device, and the running state information of the system memory as the second system crash information to the crash information storage of the system monitoring device in the case of receiving the target interrupt signal, and thus as many relevant information of the computer system as possible can be saved when the system crash occurs.

[0182] In some embodiments, the second system crash information is generated based on the running temperature information and the acquisition time information of each device, and the running state information of the system memory, and includes:

[0183] The second system crash information is generated based on the running temperature information and the acquisition time information of each device, the power on-off information of the processor, and the running state information of the system memory.

[0184] Optionally, the power on-off information of the processor refers to the relevant information of the processor being turned on and turned off.

[0185] The user of the computer system can cause the computer system to crash by restarting or inputting a shutdown command by mistake. The power on-off information of the processor can be obtained by the power management module in the computer system, and can also be stored as the second system crash information.

[0186] The system crash information saving method provided in the embodiments of the present application stores the running temperature information and the acquisition time information of each device, the power on-off information of the processor, and the running state information of the system memory as the second system crash information, and thus as many relevant information of the computer system as possible can be saved when the system crash occurs.

[0187] In some embodiments, the method further includes:

[0188] In the case of restarting the computer system, the refresh setting information of the system memory is obtained;

[0189] In the case of the refresh setting information of the system memory being self-refresh, the system memory is configured to system refresh;

[0190] A reserved storage space is set in the system memory.

[0191] Optionally, the restarting of the computer system can be realized by a system boot program such as BIOS or U-boot.

[0192] FIG. 7 is a flowchart of a computer system restart method provided by the present application. As shown in FIG. 7, in the case of computer system restart, the system boot program checks the state of the memory (DDR) controller before loading the operating system, and obtains the refresh setting information of the system memory.

[0193] If the refresh setting information indicates that the system memory is not set to self-refresh, the system boot program reinitializes the system memory; if the refresh setting information indicates that the system memory is set to self-refresh, the system boot program cancels the self-refresh setting of the system memory, and modifies the refresh setting to system refresh, that is, the system memory is refreshed by the memory controller in the processor of the computer system.

[0194] The system boot program detects the total size of the system memory, and divides part of the storage space in the system memory as reserved storage space. The size of the reserved storage space can be set as needed. After completing the reserved storage space, the system boot program starts the operating system, and passes the address segment of the storage space in the system memory except the reserved storage space to the operating system, so that the operating system does not automatically use the reserved storage space during startup or normal operation. The user can access the reserved storage space by writing programs.

[0195] The system crash information saving method provided by the embodiments of the present application cancels the self-refresh of the system memory in the case of computer system restart, and sets the reserved storage space in the system memory, which ensures that all data in the reserved storage space in the system memory is in the state before restart, avoids being overwritten by the operating system and application programs during the subsequent operating system startup process, and realizes saving of the relevant information of the computer system when system crash occurs.

[0196] In some embodiments, the method further comprises:

[0197] In the case of computer system restart, obtaining first system crash information from the reserved storage space of the system memory;

[0198] Obtaining second system crash information from the system monitoring device;

[0199] Displaying the first system crash information and the second system crash information.

[0200] Optionally, after the computer system restarts, the system memory and the system monitoring device can be accessed, and the address of the reserved storage space of the system memory and the address of the crash information storage of the system monitoring device can be mapped to an address accessible by the processor, so that the first system crash information can be obtained from the reserved storage space of the system memory, and the second system crash information can be obtained from the crash information storage of the system monitoring device.

[0201] The first system crash information and the second system crash information are displayed in the computer system, so that a user or an engineer can perform fault diagnosis of the computer system. In addition, power-on / off information of the processor can be acquired by a power management module in the computer system and displayed together.

[0202] The user or the engineer can export the relevant information and delete the saved system crash information in the system memory and the system monitoring device respectively, so as to avoid affecting the saving of the system crash information next time.

[0203] The system crash information saving method provided in the embodiments of the present application acquires and displays the first system crash information and the second system crash information from the system memory and the system monitoring device respectively in the case of computer system restart, and improves the fault diagnosis efficiency of the computer system.

[0204] The device provided in the embodiments of the present application is described below, and the device described below can be correspondingly referred to the method described above.

[0205] FIG. 8 is a structural schematic diagram of a system crash information saving device provided in the present application, as shown in FIG. 8, the system crash information saving device comprises:

[0206] The receiving unit 810 is configured to receive the target interrupt signal sent by the system monitoring device;

[0207] The sending unit 820 is configured to send the target interrupt signal to the first core and the second core in the processor;

[0208] The first saving unit 830 is configured to control the first core to run the first interrupt processing program and save the first system crash information to the reserved storage space of the system memory;

[0209] The second saving unit 840 is configured to control the second core to run the second interrupt processing program and save the second system crash information to the system monitoring device;

[0210] The system monitoring device and the system memory are connected with the processor respectively; the first interrupt processing program is stored in the system memory; and the second interrupt processing program is stored in the system monitoring device.

[0211] The system crash information saving device provided by the embodiment of the present application receives a target interrupt signal sent by a system monitoring device; sends the target interrupt signal to a first core and a second core in a processor; controls the first core to run a first interrupt processing program and saves first system crash information to a reserved storage space in a system memory; controls the second core to run a second interrupt processing program and saves second system crash information to the system monitoring device; since the first core and the second core are used to respectively execute different interrupt processing programs, the system crash information of the computer system is saved in the system memory and the system monitoring device respectively, so that the core executing the interrupt processing program, the storage position of the interrupt processing program and the saving position of the system crash information are all independent of each other, the redundancy of the system crash information saving is improved, the system crash information can still be saved even in the case of system memory failure, the related information of the computer system when the system crash occurs is saved as much as possible, and the fault diagnosis efficiency of the computer system is improved.

[0212] In some embodiments, the apparatus is further configured to:

[0213] In the case where the running state of the processor is abnormal, stop sending a dog-feeding signal to a watchdog module in the system monitoring device;

[0214] The system monitoring device periodically monitors the running temperature of each device in the computer system; in the case where the running temperature of any device is abnormal or the watchdog module does not receive the dog-feeding signal within a monitoring period, a target interrupt signal is sent to the processor.

[0215] In some embodiments, the sending unit is configured to:

[0216] In the case where the first core and the second core support non-maskable interrupts, an interrupt controller in the processor is configured to send the target interrupt signal to the first core and the second core based on a non-maskable interrupt input interface of the first core and a non-maskable interrupt input interface of the second core.

[0217] In some embodiments, the first saving unit is configured to:

[0218] In the case where the computer system is initialized, the address of the first interrupt processing program in the system memory is set as the interrupt entry address of the first core;

[0219] Start a monitoring thread; the monitoring thread is used to monitor the running state of the processor and periodically sends a dog-feeding signal to the watchdog module in the case where the running state of the processor is normal.

[0220] In some embodiments, the first saving unit is configured to:

[0221] The first core is controlled to execute the first interrupt processing program in the case of receiving the target interrupt signal.

[0222] Call stack information of each core in the processor is acquired.

[0223] Running temperature information and acquisition time information of each device that is saved in real time in the system monitoring device are read;

[0224] First system crash information is generated based on the running temperature information and the acquisition time information of each device, and the call stack information of each core.

[0225] The first system crash information is saved to the reserved storage space of the system memory.

[0226] In some embodiments, the apparatus is further configured to:

[0227] The system memory is configured to a self-refresh state;

[0228] A restart command is called to restart the computer system.

[0229] In some embodiments, the apparatus is further configured to:

[0230] The execution state of the second interrupt processing program is determined;

[0231] In the case of the execution state of the second interrupt processing program being complete, a restart command is called to restart the computer system.

[0232] In some embodiments, the second saving unit is configured to:

[0233] In the case of the computer system being initialized, the second interrupt processing program is copied from the system memory to the crash information memory of the system monitoring device;

[0234] The address of the second interrupt processing program in the crash information memory is set as the interrupt entry address of the second core.

[0235] In some embodiments, the second saving unit is configured to:

[0236] The second core is controlled to execute the second interrupt processing program in the case of receiving the target interrupt signal.

[0237] Running state information of the system memory is acquired;

[0238] Running temperature information and acquisition time information of each device that is saved in real time in the system monitoring device are read;

[0239] Second system crash information is generated based on the running temperature information and the acquisition time information of each device, and the running state information of the system memory.

[0240] The second system crash information is saved to a crash information storage of the system monitoring device.

[0241] In some embodiments, the second saving unit is configured to:

[0242] Based on the running temperature information and the acquisition time information of each device, the power on-off information of the processor, and the running state information of the system memory, the second system crash information is generated.

[0243] In some embodiments, the device is configured to:

[0244] In the case of computer system restart, the refresh setting information of the system memory is acquired;

[0245] In the case of self-refresh of the refresh setting information of the system memory, the system memory is configured to system refresh;

[0246] A reserved storage space is set in the system memory.

[0247] In some embodiments, the device is configured to:

[0248] In the case of computer system restart, the first system crash information is acquired from the reserved storage space of the system memory;

[0249] The second system crash information is acquired from the system monitoring device;

[0250] The first system crash information and the second system crash information are displayed.

[0251] Fig. 9 is a structural schematic diagram of a computer system provided by the present application, as shown in Fig. 9, the computer system 200 at least includes a processor 210, and a system monitoring device 220 and a system memory 230 connected with the processor.

[0252] The processor 210 includes a first core 211, a second core 212, an interrupt controller 213 and a memory controller 214. The processor is configured to the system crash information saving method of the above-mentioned embodiments.

[0253] The system monitoring device 220 further comprises an I2C controller 221, a temperature collection module 222, a timing module 223, a power management module 224, a watchdog module 225 and a crash information storage 226. The system monitoring device can be implemented by a Complex Programmable Logic Device (CPLD) chip or a Field Programmable Gate Array (FPGA) chip. The crash information storage can be implemented by a Random Access Memory (RAM).

[0254] The system memory 230 is divided into a reserved storage space and a memory read-write space. The reserved storage space is specially configured to save system crash information and related interrupt handling programs.

[0255] The computer system provided by the embodiment of the present application comprises a processor, a system monitoring device and a system memory. The processor executes the system crash information saving method. Since the first core and the second core are used to execute different interrupt handling programs respectively, the system crash information of the computer system is saved in the system memory and the system monitoring device respectively. The core executing the interrupt handling program, the storage location of the interrupt handling program and the saving location of the system crash information are all independent of each other, which improves the redundancy of the system crash information saving. Even in the case of system memory failure, the system crash information can still be saved. As many relevant information of the computer system as possible when the system crashes is saved, and the fault diagnosis efficiency of the computer system is improved.

[0256] In some embodiments, the processor comprises an interrupt input interface and a bus interface.

[0257] The processor receives the target interrupt signal sent by the system monitoring device based on the interrupt input interface.

[0258] The processor reads the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time based on the bus interface.

[0259] Optionally, the processor is connected with the system monitoring device through the interrupt input interface and the bus interface. The interrupt input interface and the bus interface can be pins of the processor.

[0260] The processor receives the target interrupt signal sent by the system monitoring device through the interrupt input interface, and reads the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time through the bus interface.

[0261] The computer system provided by the embodiment of the present application is connected with the system monitoring device through the interrupt input interface and the bus interface.

[0262] In some embodiments, the temperature acquisition module is connected with the temperature sensors of the devices in the computer system and is configured to acquire the running temperature information of the devices.

[0263] Optionally, the temperature sensors of the devices in the computer system can access the I2C controller through the I2C bus. The temperature acquisition module reads the temperature sensors inside or beside the devices through the I2C controller periodically (for example, every second) to acquire the running temperature information of the devices. The devices herein include all the chips in the computer system and also include important hardware devices.

[0264] The computer system provided by the embodiment of the present application acquires the running temperature information of the devices through the temperature acquisition module in the system monitoring device, monitors the running state of the devices in the computer system, and reads the temperature by the module in the system monitoring device, which is stable and independent of the processor. Even if the software fails, the temperature acquisition will not be affected.

[0265] In some embodiments, the timing module is configured to determine the acquisition time information corresponding to the running temperature information of the devices.

[0266] Optionally, the timing module determines the acquisition time information corresponding to the running temperature information of the devices according to the acquired time information, which helps users or engineers to better diagnose the fault of the computer system.

[0267] The timing module can acquire the time information from the network time or the time of the computer system, and automatically determine the corresponding acquisition time information when the temperature acquisition module acquires the running temperature information of the devices.

[0268] In some embodiments, the power management module is configured to control the working power supply of the processor and the system memory and generate power on-off information.

[0269] Optionally, the power management module can be configured to provide the working power supply for the processor, the system memory and other chips or devices, control the working power supply, and generate the power on-off information.

[0270] After the computer system is powered on, the power management module automatically supplies power to other devices. However, the power management module can also be controlled by the power management program running in the processor to actively power on or off some chips (if the processor is powered off, the system monitoring device must automatically power on the processor immediately to restart the system), which is used to save power or restart to recover the chips.

[0271] The power management module itself can record the power on and power off operations to each device (e.g., each chip), the power off and restart operations to the processor, etc., including the user pressing the restart key or the power key (the power management module can be connected to the externally set restart key or power key), the software controlling the power management module to make the processor power off and restart or to make a certain chip power off, the watchdog timeout actively making the processor power off and restart, etc. Each operation corresponds to a specific number, and the system monitoring device saves the number of the last operation to a certain register, and the processor obtains the corresponding operation record (power on and off information) by reading the register. If there is no record, it means that the entire system (including the system monitoring device) is powered on for the first time after power off. These records are very important for investigating the system restart reason.

[0272] In some embodiments, if the watchdog module does not receive the feed signal within a first monitoring period (e.g., 30 seconds), the timer in the watchdog module times out, triggering the system monitoring device to send a target interrupt signal to the processor. If the watchdog module does not receive the feed signal within a second monitoring period (e.g., 1 minute), it will notify the power management module to power off and restart the processor (power off and then power on), preventing the system from being stuck for a long time.

[0273] In some embodiments, the crash information storage is configured to store the code of the second interrupt handler called before the processor restarts (in case the DDR is not available at that time) and the second system crash information written by the second interrupt handler.

[0274] In some embodiments, the processor configures the interrupt controller to send the interrupt from the system monitoring module to both cores at the same time. If the core supports non-maskable interrupts, the software also needs to configure the interrupt controller to send the interrupt to the non-maskable interrupt pin of the core. The two cores will run different interrupt handlers, and the codes of the handlers are saved in the DDR and the system monitoring module RAM, respectively, and are responsible for writing the live information into the DDR and the system monitoring module RAM, respectively. The interrupt handler responsible for writing the live information into the DDR is also responsible for restarting the system. If the interrupt controller of the current CPU does not support sending one external interrupt to two cores at the same time, the hardware design needs to be modified to make the system monitoring module send two interrupt signals to the two input and output (I / O) pins of the CPU, and then let the interrupt controller send them to the two cores, respectively.

[0275] FIG. 10 is a structural schematic diagram of an electronic device provided by the present application. As shown in FIG. 10, the electronic device can include a processor 1010, a communications interface 1020, a memory 1030, and a communications bus 1040, wherein the processor 1010, the communications interface 1020, and the memory 1030 can communicate with each other through the communications bus 1040. The processor 1010 can invoke a logical command in the memory 1030 to execute the method in the above-described embodiments, for example:

[0276] The target interrupt signal sent by the system monitoring device is received; the target interrupt signal is sent to the first core and the second core in the processor; the first core is controlled to run the first interrupt processing program, and the first system crash information is saved to the reserved storage space of the system memory; the second core is controlled to run the second interrupt processing program, and the second system crash information is saved to the system monitoring device; wherein the system monitoring device and the system memory are connected with the processor respectively; the first interrupt processing program is stored in the system memory; and the second interrupt processing program is stored in the system monitoring device.

[0277] In addition, the logical command in the memory described above can be implemented in the form of a software function unit and sold or used as a stand-alone product, and can be stored in a non-transitory computer-readable storage medium. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product in essence or in the form of a part of the technical solutions that make contributions to the prior art or the part of the technical solutions. The computer software product is stored in a non-transitory storage medium and includes a plurality of commands for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method of each embodiment of the present application. The aforementioned non-transitory storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various non-transitory storage media that can store program codes.

[0278] The processor in the electronic device provided by the embodiments of the present application can invoke the logical command in the memory to implement the above-described method. The optional implementation manners of the method are consistent with the aforementioned method implementation manners, and the same beneficial effects can be achieved, and thus will not be described here.

[0279] The embodiments of the present application further provide a non-transitory storage computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the method provided by the above-described embodiments is implemented.

[0280] The optional implementation is consistent with the foregoing method implementation, and the same beneficial effects can be achieved, which will not be repeated here.

[0281] The embodiment of the present application provides a computer program product, including a computer program, and the computer program is executed by a processor to realize the method provided by each of the foregoing embodiments.

[0282] The apparatus embodiments described above are merely schematic, wherein the units illustrated as separate components can or can not be physically separated, and the components illustrated as units can or can not be physical units, that is, can be located in one place, or can be distributed on multiple network units. Part or all of the modules can be selected to achieve the purpose of the embodiment scheme according to actual needs. Those skilled in the art can understand and implement without creative labor.

[0283] Through the description of the foregoing embodiments, those skilled in the art can clearly understand that each embodiment can be realized by means of software and the necessary general hardware platform, and of course, can also be realized by hardware. Based on such understanding, the foregoing technical solutions can be embodied in the form of a software product in essence or in the form of a contribution to the prior art. The computer software product can be stored in a non-transitory computer-readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the method of each embodiment or some parts of the embodiment.

[0284] Finally, it should be noted that: the foregoing embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A system crash information saving method characterized by comprising: The method comprises the following steps: receiving a target interrupt signal sent by a system monitoring device; sending the target interrupt signal to a first core and a second core in a processor; controlling the first core to run a first interrupt processing program and save first system crash information to a reserved storage space in a system memory; controlling the second core to run a second interrupt processing program and save second system crash information to the system monitoring device; wherein the system monitoring device and the system memory are connected to the processor.

2. The system crash information saving method according to Claim 1, wherein The first interrupt processing program is stored in the system memory, and the second interrupt processing program is stored in the system monitoring device.

3. The system crash information saving method according to Claim 2, wherein Before receiving the target interrupt signal sent by the system monitoring device, the method further comprises: stopping sending a feed dog signal to a watchdog module in the system monitoring device in the case that the running state of the processor is abnormal; wherein the system monitoring device periodically monitors the running temperature of each device in a computer system, and sends the target interrupt signal to the processor in the case that the running temperature of any device is abnormal or the watchdog module does not receive the feed dog signal within a monitoring period.

4. The system crash information saving method according to Claim 2, wherein The step of sending the target interrupt signal to the first core and the second core in the processor comprises: in the case that the first core and the second core support non-maskable interrupts, configuring an interrupt controller in the processor to send the target interrupt signal to the first core and the second core simultaneously based on a non-maskable interrupt input interface of the first core and a non-maskable interrupt input interface of the second core.

5. The system crash information saving method according to Claim 3, wherein Before the step of controlling the first core to run the first interrupt processing program and saving the first system crash information to the reserved storage space in the system memory, the method further comprises: in the case that the computer system is initialized, setting the address of the first interrupt processing program in the system memory as an interrupt entry address of the first core; starting a monitoring thread; the monitoring thread is used to monitor the running state of the processor and periodically sends a feed dog signal to the watchdog module in the case that the running state of the processor is normal.

6. The system crash information saving method according to Claim 5, wherein The step of controlling the first core to run the first interrupt processing program and saving the first system crash information to the reserved storage space in the system memory comprises: controlling the first core to execute the first interrupt processing program in the case that the target interrupt signal is received; obtaining call stack information of each core in the processor; reading the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time; generating the first system crash information based on the running temperature information of each device and the acquisition time information, and the call stack information of each core; saving the first system crash information to the reserved storage space in the system memory.

7. The system crash information saving method according to Claim 6, wherein After the step of saving the first system crash information to the reserved storage space in the system memory, the method further comprises: configuring the system memory to a self-refresh state; calling a restart command to restart the computer system.

8. The system crash information saving method according to Claim 7, wherein Before the step of calling the restart command to restart the computer system, the method further comprises: determining an execution state of the second interrupt handler; in the case that the execution state of the second interrupt handler is complete, calling a restart command to restart the computer system.

9. The system crash information saving method according to Claim 3, wherein Before the control of the second core running the second interrupt handler and saving the second system crash information to the system monitoring device, the method further comprises: in the case that the computer system is initialized, copying the second interrupt handler from the system memory to the crash information storage of the system monitoring device; setting the address of the second interrupt handler in the crash information storage as the interrupt entry address of the second core.

10. The system crash information saving method according to Claim 9, wherein The control of the second core running the second interrupt handler and saving the second system crash information to the system monitoring device comprises: controlling the second core to execute the second interrupt handler in the case that the target interrupt signal is received; obtaining the running state information of the system memory; reading the running temperature information of each device and the acquisition time information saved in the system monitoring device in real time; generating the second system crash information based on the running temperature information and the acquisition time information of each device and the running state information of the system memory; saving the second system crash information to the crash information storage of the system monitoring device.

11. The system crash information saving method according to Claim 10, wherein The generation of the second system crash information based on the running temperature information and the acquisition time information of each device and the running state information of the system memory comprises: generating the second system crash information based on the running temperature information and the acquisition time information of each device, the power on-off information of the processor and the running state information of the system memory.

12. The system crash information saving method according to any one of claims 1 to 11, wherein, The method further comprises: in the case that the computer system is restarted, obtaining the refresh setting information of the system memory; in the case that the refresh setting information of the system memory is self-refresh, configuring the system memory as system refresh; setting a reserved storage space in the system memory.

13. The system crash information saving method according to any one of claims 1 to 11, wherein The method further comprises: in the case that the computer system is restarted, obtaining the first system crash information from the reserved storage space of the system memory; obtaining the second system crash information from the system monitoring device; displaying the first system crash information and the second system crash information.

14. A system crash information saving apparatus characterized by comprising: Comprise: a receiving unit configured to receive a target interrupt signal sent by a system monitoring device; a sending unit configured to send the target interrupt signal to a first core and a second core in a processor; a first saving unit configured to control the first core to run a first interrupt handler and save first system crash information to a reserved storage space of a system memory; a second saving unit configured to control the second core to run a second interrupt handler and save second system crash information to a system monitoring device; wherein the system monitoring device and the system memory are connected with the processor respectively; the first interrupt handler is stored in the system memory; and the second interrupt handler is stored in the system monitoring device.

15. A computer system, characterized by Comprise a processor, a system monitoring device and a system memory; The processor is configured to execute the system crash information saving method according to any one of claims 1 to 13.

16. The computer system of claim 15, wherein, The processor comprises an interrupt input interface and a bus interface; The processor receives a target interrupt signal sent by the system monitoring device based on the interrupt input interface; The processor reads the running temperature information of each device and the acquisition time information saved in real time in the system monitoring device based on the bus interface.

17. The computer system of claim 15, wherein, The system monitoring device further comprises a temperature acquisition module; The temperature acquisition module is connected with temperature sensors of each device in the computer system and is configured to acquire the running temperature information of each device.

18. The computer system of claim 17, wherein, The system monitoring device further comprises a timing module; The timing module is configured to determine the acquisition time information corresponding to the running temperature information of each device.

19. The computer system of claim 15, wherein, The system monitoring device further comprises a power management module; The power management module is configured to control the working power supply of the processor and the system memory and generate power supply on-off information.

20. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein, The processor executes the program to implement the system crash information saving method according to any one of claims 1 to 13.

21. A non-transitory computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the system crash information saving method according to any one of claims 1 to 13.

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