Method for manufacturing semiconductor package, thermosetting adhesive for semiconductor package, semiconductor package, and semiconductor module

Abstract

Provided is a method for manufacturing a semiconductor package. The method includes: preparing a package body having a package substrate and a semiconductor member mounted on a mounting region provided within a main surface of the package substrate, while the semiconductor member includes a semiconductor chip; and adhering a reinforcing member including a portion surrounding the mounting region to the package substrate by using an adhesive layer interposed between the reinforcing member and the package substrate. The adhesive layer includes spacer particles.

Description

Method for manufacturing a semiconductor package, thermosetting adhesive for a semiconductor package, semiconductor package, and semiconductor module

[0001] The present disclosure relates to a method for manufacturing a semiconductor package, a thermosetting adhesive for a semiconductor package, a semiconductor package, and a semiconductor module.

[0002] In order to correct warpage of large flip chip ball grid array packages (FCBGA packages), it has been proposed to provide a reinforcing member such as a stiffener adhered to the package substrate so as to surround a semiconductor member including a semiconductor chip (Non-Patent Documents 1 and 2).

[0003] S. McCann et al., “Warpage and Reliability Challenges for Stacked Silicon Interconnect Technology in Large Packages,” 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), pp. 2345-2350, 2018. Mark Hoffmeyer et al., “Novel Graphite-based TIM for High Performance Computing,” IEEE ITHERM Conference, pp. 243-250, 2017. Soohyun Nam et al., “,Investigation on package warpage and reliability of the large size 2.5D molded interposer on substrate (MIoS) package,” ECTC, pp. 643-647, 2022.

[0004] Non-Patent Document 3 reports a phenomenon in which a reinforcing member peels off from a package substrate during a temperature cycle test of a semiconductor package.

[0005] One aspect of the present disclosure relates to a semiconductor package having a reinforcing member provided on a package substrate, and to suppressing peeling of the reinforcing member from the package substrate.

[0006] The present disclosure includes the following: [1] A method for manufacturing a semiconductor package, the method comprising: preparing a package body having a package substrate and a semiconductor component mounted on a mounting area provided in a main surface of the package substrate, the semiconductor component including a semiconductor chip; and adhering a reinforcing member including a portion surrounding the mounting area to the package substrate with an adhesive layer interposed between the reinforcing member and the package substrate, the adhesive layer comprising spacer particles. [2] A method for manufacturing a semiconductor package, the method comprising: preparing a package substrate having a main surface provided with a mounting area for mounting a semiconductor component including a semiconductor chip; adhering a reinforcing member including a portion surrounding the mounting area to the package substrate with an adhesive layer interposed between the reinforcing member and the package substrate; and mounting the semiconductor component on the mounting area surrounded by the reinforcing member, the adhesive layer comprising spacer particles. [3] The method according to [1] or [2], wherein adhering the reinforcing member to the package substrate includes: placing a thermosetting adhesive containing the spacer particles on the package substrate or on the reinforcing member; forming an intermediate structure having the package substrate, the thermosetting adhesive, and the reinforcing member, with the thermosetting adhesive interposed between the reinforcing member and the package substrate; and heating the thermosetting adhesive while applying pressure to the reinforcing member, thereby forming the adhesive layer which is the hardened thermosetting adhesive. [4] The method according to [1] or [2], wherein adhering the reinforcing member to the package substrate includes: arranging the spacer particles on the package substrate or on the reinforcing member; forming an intermediate structure having the package substrate, the spacer particles, a thermosetting resin portion, and the reinforcing member, and having a thermosetting adhesive containing the spacer particles and the thermosetting resin portion interposed between the reinforcing member and the package substrate; and heating the thermosetting adhesive while applying pressure to the reinforcing member, thereby forming the adhesive layer which is the hardened thermosetting adhesive.[5] The method according to any one of [1] to [4], wherein the reinforcing member is a frame-shaped member forming an opening surrounding the mounting region. [6] The method according to any one of [1] to [5], wherein the spacer particles are spherical particles having a sphericity of 0.70 to 1.00. [7] The method according to any one of [1] to [6], wherein the average particle size of the spacer particles is 100 μm to 200 μm. [8] The method according to any one of [1] to [7], wherein the standard deviation of the particle size of the spacer particles is 10 μm or less. [9] The method according to any one of [1] to [8], wherein the content of the spacer particles in the adhesive layer is 0.1 mass % to 20 mass % based on the mass of the adhesive layer.

[10] The method according to any one of [1] to [9], wherein the adhesive layer is a cured product of a thermosetting adhesive, and wherein, when the thermosetting adhesive is cured, a cured product exhibiting an elongation at break of 20% or more is formed.

[11] A thermosetting adhesive for a semiconductor package, comprising spacer particles, the spacer particles being spherical particles having a sphericity of 0.70 or more and 1.00 or less.

[12] The thermosetting adhesive for a semiconductor package according to

[11] , wherein the average particle size of the spacer particles is 100 μm or more and 200 μm or less.

[13] The thermosetting adhesive for a semiconductor package according to

[11] or

[12] , wherein the standard deviation of the particle sizes of the spacer particles is 10 μm or less.

[14] The thermosetting adhesive for a semiconductor package according to any of

[11] to

[13] , wherein the content of the spacer particles is 0.1 mass % or more and 20 mass % or less, based on the mass of the thermosetting adhesive.

[15] The thermosetting adhesive for a conductor package according to any of

[11] to

[14] , wherein when the thermosetting adhesive is cured, a cured product exhibiting an elongation at break of 20% or more is formed.

[16] A semiconductor package comprising: a package substrate having a main surface on which a mounting area is provided; a semiconductor member including a semiconductor chip mounted on the mounting area; a reinforcing member provided on the package substrate and including a portion surrounding the mounting area; and an adhesive layer interposed between the reinforcing member and the package substrate, wherein the adhesive layer contains spacer particles.

[17] The semiconductor package according to

[16] , wherein the reinforcing member is a frame-shaped member forming an opening surrounding the mounting area.

[18] The semiconductor package according to

[16] or

[17] , wherein the spacer particles are spherical particles having a sphericity of 0.70 to 1.00.

[19] The semiconductor package according to any one of

[16] to

[18] , wherein the spacer particles have an average particle size of 100 μm to 200 μm.

[20] The semiconductor package according to any one of

[16] to

[19] , wherein the standard deviation of the particle sizes of the spacer particles is 10 μm or less.

[21] The semiconductor package according to any one of

[16] to

[20] , wherein the content of the spacer particles in the adhesive layer is 0.1 mass % to 20 mass % based on the mass of the adhesive layer.

[22] The semiconductor package according to any one of

[16] to

[21] , wherein the adhesive layer is a cured product of a thermosetting adhesive, and wherein, when the thermosetting adhesive is cured, a cured product exhibiting a breaking elongation of 20% or more is formed.

[23] A semiconductor module comprising: a motherboard; and the semiconductor package according to any one of

[16] to

[22] mounted on the motherboard.

[0007] With respect to a semiconductor package having a reinforcing member provided on a package substrate, peeling of the reinforcing member from the package substrate can be suppressed.

[0008] Fig. 1 is a plan view showing an example of a semiconductor module including a semiconductor package; Fig. 2 is a cross-sectional view taken along line II-II of Fig. 1; Fig. 3 is a cross-sectional view showing an example of a semiconductor module including a semiconductor package; Fig. 4 is a process diagram showing an example of a method for manufacturing a semiconductor package; Fig. 5 is a process diagram showing an example of a method for manufacturing a semiconductor package.

[0009] The present disclosure is not limited to the following examples.

[0010] Fig. 1 is a plan view showing an example of a semiconductor module. Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1. The semiconductor module 200 shown in Figs. 1 and 2 includes a motherboard 60 and a semiconductor package 100 mounted on the motherboard 60.

[0011] The semiconductor package 100 is mainly composed of a package substrate 1, a semiconductor member 2 mounted on the package substrate 1, a reinforcing member 5 provided on the package substrate 1, and an adhesive layer 7 interposed between the reinforcing member 5 and the package substrate 1.

[0012] The package substrate 1 is a plate-shaped member (wiring substrate) having two rectangular main surfaces and includes wiring connected to a semiconductor component 2. A mounting area 2A for mounting the semiconductor component 2 is provided within one of the main surfaces of the package substrate 1. The mounting area 2A is a design target position for mounting the semiconductor component 2, and typically, no boundary indicating the mounting area 2A exists on the package substrate 1. The package substrate 1 may be, for example, a wiring substrate having a plate-shaped core material including a fiber substrate and an insulating resin, and build-up layers including wiring provided on both sides of the core material. The package substrate 1 may have connection pads arranged within the mounting area 2A and connected to the wiring in the build-up layer. The package substrate 1 may have solder resist provided around the connection pads. Conductive through-holes may be provided through the core material. Connection pads for BGA connection to a motherboard 60 may be provided within the main surface behind the mounting area 2A of the package substrate 1.

[0013] The thickness of the package substrate 1 may be, for example, 1.0 mm or more and 3.0 mm or less. The lengths of at least two of the four sides constituting the rectangular main surface of the package substrate 1 may be, for example, 55 mm or more and 300 mm or less. According to the semiconductor package according to the present disclosure, even if the size of the package substrate 1 is large, peeling of the reinforcing member 5 when the semiconductor package 100 is subjected to thermal history can be sufficiently suppressed. From this perspective, the lengths of at least two of the four sides constituting the rectangular main surface of the package substrate 1 may be 100 mm or more, or 140 mm or more.

[0014] The semiconductor member 2 includes an interposer 25, a first semiconductor chip 21 and a second semiconductor chip 22 provided on the interposer 25, and a sealing layer 30 that seals the first semiconductor chip 21 and the second semiconductor chip 22 on the interposer 25. The semiconductor member 2 is mounted on the mounting area 2A with the interposer 25 facing the package substrate 1. The first semiconductor chip 21 and the second semiconductor chip 22 may be connected to the interposer 25 via conductive bumps. An underfill material may be filled between the first semiconductor chip 21 and the second semiconductor chip 22 and the interposer 25. The semiconductor member 2 further includes conductive bumps 40 provided on the side of the interposer 25 opposite the first semiconductor chip 21 and the second semiconductor chip 22, and the semiconductor member 2 is connected to the package substrate 1 via the conductive bumps 40. An underfill material 45 is filled between the package substrate 1 and the semiconductor member 2.

[0015] 1 and 2, one first semiconductor chip 21 and four second semiconductor chips 22 arranged around the first semiconductor chip 21 are provided on one interposer 25. For example, the first semiconductor chip 21 may be a logic semiconductor chip, and the second semiconductor chip 22 may be a memory semiconductor chip. The second semiconductor chip 22 may include multiple chip components, which may be stacked with an insulating adhesive interposed therebetween. The type, number, and arrangement of the semiconductor chips provided on the interposer can be changed as desired. The semiconductor member 2 does not need to have an interposer.

[0016] The reinforcing member 5 includes a portion surrounding the mounting area 2A and the semiconductor member 2. The reinforcing member 5 may be a frame-shaped member that forms an opening 5A along a line surrounding the mounting area 2A and the semiconductor member 2 on the package substrate 1. A frame-shaped reinforcing member that does not have a portion that closes the opening 5A is sometimes called a stiffener. The reinforcing member 5 may be a frame-shaped member that completely surrounds the mounting area 2A and the semiconductor member 2 on the package substrate 1. The reinforcing member 5 may be interrupted at one or more points on the line surrounding the mounting area 2A and the semiconductor member 2. The reinforcing member 5 may be a member having high rigidity, and may be, for example, a metal molded body. The reinforcing member 5 may also be a copper molded body. The reinforcing member may further have a portion that closes the opening 5A and covers the mounting area 2A and the semiconductor member 2. A reinforcing member having such a shape is sometimes called a lid.

[0017] The thickness and width of the frame-shaped portion of the reinforcing member 5 that forms the opening 5A are adjusted taking into consideration factors such as suppression of warping. For example, the thickness of the frame-shaped portion of the reinforcing member 5 may be 0.5 mm or more and 3.0 mm or less. The width of the frame-shaped portion of the reinforcing member 5 may be 5 mm or more and 35 mm or less. The width here refers to the width in a direction perpendicular to the extension direction of the frame-shaped portion of the reinforcing member 5.

[0018] The adhesive layer 7 interposed between the package substrate 1 and the reinforcing member 5 includes a resin portion 70 and a plurality of spacer particles 71. The thickness of the adhesive layer 7 is limited by the size of the spacer particles 71. The thickness of the adhesive layer 7 may be, for example, 100 μm or more and 300 μm or less. When the thickness of the adhesive layer 7 is within this range, peeling of the reinforcing member 5 can be particularly effectively suppressed. This is thought to be because, for example, adhesive layers with a relatively large thickness tend to exhibit high fracture toughness. From the perspective of suppressing warpage of the semiconductor package, the thickness of the adhesive layer 7 may be 250 μm or less, 200 μm or less, 190 μm or less, 180 μm or less, 170 μm or less, 160 μm or less, or 150 μm or less. The thickness of the adhesive layer 7 can be easily controlled to be within these ranges based on the particle diameter of the spacer particles 71. The adhesive layer 7 may be a cured product of a thermosetting adhesive. Examples of thermosetting adhesives for forming the adhesive layer 7 will be described later.

[0019] The motherboard 60 can be any wiring board including wiring for mounting components including a semiconductor package. Solder balls 80 for BGA connection are disposed between the motherboard 60 and the package substrate 1.

[0020] As shown in another example in Figure 3, a heat sink 90 may be provided on the side of the semiconductor member 2 opposite the package substrate 1, and a thermal interface material 91 (TIM) may be provided between the heat sink 90 and the semiconductor member 2 within the opening 5A. The heat sink 90 may be fixed to the motherboard 60 with fasteners such as screws. In the example of Figure 3, heat generated by the semiconductor member 2 is conducted to the heat sink 90 via the thermal interface material 91. The material constituting the adhesive layer 7, which is not directly involved in heat conduction, is not limited to materials with excellent thermal conductivity and can be selected from a wide range of options.

[0021] 4 and 5 are process diagrams illustrating an example of a method for manufacturing a semiconductor package. The method illustrated in Fig. 4 and 5 includes preparing a package body 50 having a package substrate 1 and a semiconductor member 2, and adhering a reinforcing member 5 to the package substrate 1 with an adhesive layer 7 interposed between the reinforcing member 5 and the package substrate 1.

[0022] 4, the package body 50 is prepared by a method including: preparing a package substrate 1 having a main surface with a mounting area 2A for mounting a semiconductor member 2; preparing a semiconductor member 2 having an interposer 25, a first semiconductor chip 21, a second semiconductor chip 22, a sealing layer 30, and conductive bumps 40; mounting the semiconductor member 2 on the mounting area 2A of the package substrate 1; and filling an underfill material 45 between the semiconductor member 2 and the package substrate 1. The semiconductor member 2 may be any member including one or more semiconductor chips, and is not limited to the example of FIG.

[0023] Next, as shown in FIG. 5A , a thermosetting adhesive 7a containing a thermosetting resin portion 70a and spacer particles 71 is placed on the reinforcing member 5. Then, as shown in FIG. 5B , the reinforcing member 5 and the thermosetting adhesive 7a are placed in positions surrounding the mounting area 2A to form an intermediate structure 55 including the package substrate 1, the thermosetting adhesive 7a, and the reinforcing member 5. In the intermediate structure 55, the thermosetting adhesive 7a is interposed between the reinforcing member 5 and the package substrate 1. In this state, the thermosetting adhesive 7a is heated while applying pressure to the reinforcing member 5, thereby forming an adhesive layer 7 made of the cured thermosetting adhesive 7a. The formed adhesive layer 7 bonds the reinforcing member 5 to the package substrate 1. The pressure applied to the reinforcing member 5 includes a component in a direction compressing the thermosetting adhesive 7a. The method of heating the thermosetting adhesive 7a while applying pressure to the reinforcing member 5 is not particularly limited. For example, the intermediate structure 55 may be heated in a pressurized atmosphere, and the package substrate 1, the thermosetting adhesive 7a, and the reinforcing member 5 may be pressure-bonded by a heat press. Before forming the intermediate structure 55, the thermosetting adhesive 7a may be disposed on the package substrate 1 in a position surrounding the mounting area 2A.

[0024] Instead of mounting the semiconductor component 2 on the package substrate 1 and then bonding the reinforcing member 5 to the package substrate 1 as in the method shown in Figures 4 and 5, the reinforcing member 5 may be bonded to the package substrate 1, and then the semiconductor component 2 may be mounted on the mounting area 2A surrounded by the reinforcing member 5.

[0025] The thermosetting adhesive 7a used to bond the reinforcing member 5 to the package substrate 1 in a semiconductor package includes a thermosetting resin portion 70a and spacer particles 71. Instead of disposing the thermosetting adhesive 7a containing the spacer particles 71 on the reinforcing member 5 or the package substrate 1 as described above, the spacer particles 71 may be disposed on the reinforcing member 5 or the package substrate 1, and then the thermosetting resin portion 70a together with the spacer particles 71 may be interposed between the reinforcing member 5 and the package substrate. The thermosetting resin portion 70a can be introduced, for example, by applying a liquid thermosetting resin material onto the spacer particles 71 or by laminating a film-like thermosetting resin material on the spacer particles 71.

[0026] The spacer particles 71 may be spherical particles. Spherical particles can contribute to easy control of the thickness of the adhesive layer 7. Here, spherical particles include particles that are perfectly spherical and particles that are close to perfectly spherical. For example, the sphericity of the spherical particles serving as the spacer particles 71 may be 0.70 or more and 1.00 or less, 0.80 or more and 1.00 or less, or 0.90 or more and 1.00 or less. The sphericity is determined by the ratio of the maximum diameter of the particle D in a two-dimensional projection image of the particle. Ｌ The particle diameter (width) in the direction perpendicular to the direction in which the particle has the maximum diameter is D Ｓ When this is the case, the formula is: sphericity = D ｓ / D Ｌ For example, the average value of the sphericity of 100 randomly selected particles can be regarded as the sphericity of the particle. The two-dimensional projection image of the particle can be, for example, an electron microscope image of the particle. The particle diameter here means the distance between two parallel lines sandwiching the two-dimensional projection image of the particle, and the maximum diameter is the maximum value of the particle diameter.

[0027] The average particle diameter of the spacer particles 71 may be 100 μm or more and 300 μm or less. When the average particle diameter of the spacer particles 71 is 100 μm or more and 300 μm or less, an adhesive layer 7 controlled to a thickness within this range is easily formed, thereby particularly effectively suppressing peeling of the reinforcing member 5. From the viewpoint of suppressing warpage of the semiconductor package, the average particle diameter of the spacer particles 71 may be 250 μm or less, 200 μm or less, 190 μm or less, 180 μm or less, 170 μm or less, 160 μm or less, or 150 μm or less.

[0028] The small variation in particle diameter of the spacer particles 71 can also contribute to easy control of the thickness of the adhesive layer 7. For example, the standard deviation of the particle diameter of the spacer particles 71 may be 10 μm or less, or 0.1 μm or more and 10 μm or less. The standard deviation of the particle diameter of the spacer particles 71 may be 9.0 μm or less, 8.0 μm or less, 7.0 μm or less, 6.0 μm or less, 5.0 μm or less, or 4.0 μm or less, or may be 1.0 μm or more, 1.5 μm or more, or 2.0 μm or more.

[0029] In this specification, the average particle diameter and standard deviation of particle diameters of the spacer particles 71 refer to values ​​calculated from the above-mentioned particle diameters in a two-dimensional projected image of a plurality of spacer particles. For example, the average value of the particle diameters (maximum diameters) of 100 randomly selected spacer particles is taken as the average particle diameter, and the standard deviation can be calculated from the average particle diameter and the individual particle diameters. The mass-based cumulative 50% diameter obtained from the particle size distribution of the spacer particles 71 obtained by the Coulter method may be within the same range as the above-mentioned average particle diameter. The mass-based cumulative 50% diameter is considered to be the average particle diameter, and the standard deviation of the particle diameters calculated by considering the mass-based cumulative 50% diameter as the average particle diameter and the particle size values ​​of the individual particles as the particle diameters may be within the same range as the above-mentioned standard deviation.

[0030] The spacer particles 71 can be, for example, inorganic particles, organic particles, or a combination thereof. The spacer particles 71 may also be insulating particles. Examples of the spacer particles 71 include inorganic glass particles (glass beads, etc.) and plastic beads. The spacer particles 71 may include one or more types selected from these.

[0031] The content of the spacer particles 71 in the thermosetting adhesive 7a may be 0.1 mass % or more and 20 mass % or less, based on the mass of the thermosetting adhesive 7a. The content of the spacer particles 71 within this range may also contribute to easy control of the thickness of the adhesive layer 7. From a similar perspective, the content of the spacer particles 71 may be 0.1 mass % or more, or 0.5 mass % or more, based on the mass of the thermosetting adhesive 7a, and may be 5 mass % or less, or 20 mass % or less. The content of the spacer particles 71 in the adhesive layer 7 may also be within a similar range, based on the mass of the adhesive layer 7.

[0032] The breaking elongation of the cured product formed by curing the thermosetting adhesive 7a may be 20% or more, or 25% or more. If the adhesive layer 7 is a cured product exhibiting a high breaking elongation, peeling of the reinforcing member 5 can be further suppressed. Since the adhesive layer 7 does not need to have high thermal conductivity, a thermosetting adhesive exhibiting a high breaking elongation can be easily selected. The breaking elongation of the cured product of the thermosetting adhesive 7a may be 20% or more and 150% or less, or may be 100% or less, 90% or less, 80% or less, 70% or less, 60% or less, or 50% or less. The breaking elongation here may be a value measured by a tensile test in accordance with ISO 527 using a plate-shaped test piece of the cured product formed by curing the thermosetting adhesive 7a.

[0033] The thermosetting resin portion 70a is the portion of the thermosetting adhesive 7a excluding the spacer particles 71. The thermosetting resin portion 70a can be a normal adhesive containing a thermosetting component that forms a cross-linked polymer by a curing reaction. The thermosetting resin portion 70a may be a silicone-based adhesive. The resin portion 70 of the adhesive layer 7 is a portion formed mainly by curing the thermosetting resin portion 70a. The cured product formed by curing the thermosetting resin portion 70a may exhibit a breaking elongation within the above-mentioned range.

[0034] The present invention is not limited to the following examples.

[0035] 1. Preparation of Evaluation Device Package substrates A to D were prepared, each having a substrate main body (100 mm x 100 mm in size) including the following core material and build-up layers provided on both sides of the core material, multiple copper pads (150 μm in diameter) for flip chip connection, and multiple copper pads (700 μm in diameter) for BGA connection. Package substrate A: E-glass fiber cloth and glass fiber reinforced resin material including general-purpose resin Package substrate B: S-glass fiber cloth and glass fiber reinforced resin material including general-purpose resin Package substrate C: S-glass fiber cloth and glass fiber reinforced resin material including high-elasticity resin Package substrate D: S-glass fiber cloth and glass fiber reinforced resin material including low-elasticity resin

[0036] A silicon chip (50 mm x 50 mm in size) having copper pillars (30 μm in height) and Sn-Ag bumps (15 μm in height) for flip-chip connection was prepared and connected to the copper pads for flip-chip connection located in the center of each of package substrates A to D. An underfill material was filled between the silicon chip and the package substrate and thermally cured.

[0037] Next, glass beads were scattered on the package substrate along the square frame surrounding the silicon chip. The 50% diameter of the glass beads, measured by the Coulter method, was 150 μm by mass. A thermosetting silicone adhesive was applied to the package substrate in the area where the glass beads were located. A frame-shaped reinforcing member (2.5 mm thick, 16 mm wide) made of copper was placed on the adhesive and fixed in place by clamping it with fasteners. The adhesive was then heated to harden. The package substrate and reinforcing member were bonded together by an adhesive layer approximately 150 μm thick, which was the cured product of the adhesive.

[0038] A solder ball was placed on the copper pad for BGA connection on the package substrate, and the package substrate was mounted on a motherboard (thickness 3.2 mm) via the solder ball. A copper pad (diameter 425 μm) for BGA connection was provided on the motherboard, and this copper pad and the copper pad on the package substrate were connected via the solder ball.

[0039] Using the above method, an evaluation device including a motherboard, package substrate, silicon chip, and stiffener was obtained. Multiple evaluation devices were fabricated for each of package substrates A to D, and subjected to the following temperature cycle test. For comparison, an evaluation device was also fabricated in which the reinforcing member was adhered to the package substrate with an adhesive layer approximately 70 μm thick, without any glass beads being scattered on the package substrate.

[0040] 2. Temperature Cycle Test The evaluation device was subjected to a temperature cycle test in which one cycle consisted of heating and cooling between -55°C and 125°C in an atmospheric environment. Two cycles of heating and cooling were repeated every hour. After 1000 cycles, the evaluation device was checked for peeling of the reinforcing member from the package substrate. Of the evaluation devices subjected to the temperature cycle test, the number of devices in which peeling of the reinforcing member was not confirmed (number of passed devices) was recorded.

[0041]

[0042] The evaluation results are shown in Table 1. In the case of the evaluation devices of the Example in which the reinforcing member was bonded to the package substrate with an adhesive layer containing spacer particles, for all of the package substrates A to D, the reinforcing member did not peel off in most of the three to six evaluation devices evaluated after 1000 cycles of temperature cycling testing. In the case of the evaluation devices of the Comparative Example in which the reinforcing member was bonded to the package substrate with an adhesive layer not containing spacer particles, peeling of the reinforcing member was observed in all four evaluation devices evaluated for package substrates B to D.

[0043] 1...package substrate, 2...semiconductor member, 2A...mounting area, 5...reinforcing member, 5A...opening, 7...adhesive layer, 7a...thermosetting adhesive, 21, 22...semiconductor chip, 25...interposer, 40...conductive bump, 45...underfill material, 50...package body, 55...intermediate structure, 60...motherboard, 71...spacer particle, 80...solder ball, 90...heat sink, 91...thermal interface material, 100...semiconductor package, 200...semiconductor module. 6

Claims

1. A method for manufacturing a semiconductor package, the method comprising: preparing a package body having a package substrate and a semiconductor component mounted on a mounting area provided in a main surface of the package substrate, the semiconductor component including a semiconductor chip; and adhering a reinforcing component including a portion surrounding the mounting area to the package substrate with an adhesive layer interposed between the reinforcing component and the package substrate, wherein the adhesive layer includes spacer particles.

2. A method for manufacturing a semiconductor package, the method comprising: preparing a package substrate having a main surface with a mounting area for mounting a semiconductor component including a semiconductor chip; adhering a reinforcing member including a portion surrounding the mounting area to the package substrate with an adhesive layer interposed between the reinforcing member and the package substrate; and mounting the semiconductor component on the mounting area surrounded by the reinforcing member, wherein the adhesive layer contains spacer particles.

3. The method of claim 1 or 2, wherein adhering the reinforcing member to the package substrate comprises: placing a thermosetting adhesive containing the spacer particles on the package substrate or on the reinforcing member; forming an intermediate structure having the package substrate, the thermosetting adhesive, and the reinforcing member, with the thermosetting adhesive interposed between the reinforcing member and the package substrate; and heating the thermosetting adhesive while applying pressure to the reinforcing member, thereby forming the adhesive layer, which is the hardened thermosetting adhesive.

4. The method of claim 1 or 2, wherein bonding the reinforcing member to the package substrate includes: arranging the spacer particles on the package substrate or on the reinforcing member; forming an intermediate structure having the package substrate, the spacer particles, a thermosetting resin portion, and the reinforcing member, with a thermosetting adhesive containing the spacer particles and the thermosetting resin portion interposed between the reinforcing member and the package substrate; and heating the thermosetting adhesive while applying pressure to the reinforcing member, thereby forming the adhesive layer which is the hardened thermosetting adhesive.

5. The method according to claim 1 or 2, wherein the reinforcing member is a frame-like member that forms an opening surrounding the mounting area.

6. The method according to claim 1 or 2, wherein the spacer particles are spherical particles having a sphericity of 0.70 or more and 1.00 or less.

7. The method according to claim 1 or 2, wherein the average particle size of the spacer particles is 100 μm or more and 200 μm or less.

8. The method according to claim 1 or 2, wherein the standard deviation of the particle diameter of the spacer particles is 10 μm or less.

9. The method according to claim 1 or 2, wherein the content of the spacer particles in the adhesive layer is 0.1% by mass or more and 20% by mass or less, based on the mass of the adhesive layer.

10. The method according to claim 1 or 2, wherein the adhesive layer is a cured product of a thermosetting adhesive, and when the thermosetting adhesive is cured, a cured product exhibiting a breaking elongation of 20% or more is formed.

11. A thermosetting adhesive for semiconductor packaging, comprising spacer particles, the spacer particles being spherical particles having a sphericity of 0.70 or more and 1.00 or less.

12. The thermosetting adhesive for semiconductor packaging according to claim 11, wherein the average particle size of the spacer particles is 100 μm or more and 200 μm or less.

13. The thermosetting adhesive for semiconductor packaging according to claim 11, wherein the standard deviation of the particle diameter of the spacer particles is 10 μm or less.

14. A thermosetting adhesive for semiconductor packages according to claim 11, wherein the content of the spacer particles is 0.1% by mass or more and 20% by mass or less, based on the mass of the thermosetting adhesive.

15. A thermosetting adhesive for a conductor package according to any one of claims 11 to 14, which when cured forms a cured product that exhibits a breaking elongation of 20% or more.

16. A semiconductor package comprising: a package substrate having a main surface on which a mounting area is provided; a semiconductor member including a semiconductor chip mounted on the mounting area; a reinforcing member provided on the package substrate and including a portion surrounding the mounting area; and an adhesive layer interposed between the reinforcing member and the package substrate, wherein the adhesive layer contains spacer particles.

17. The semiconductor package according to claim 16, wherein the reinforcing member is a frame-like member that forms an opening that surrounds the mounting area.

18. The semiconductor package according to claim 16, wherein the spacer particles are spherical particles having a sphericity of 0.70 or more and 1.00 or less.

19. The semiconductor package according to claim 16, wherein the average particle size of the spacer particles is 100 μm or more and 200 μm or less.

20. The semiconductor package according to claim 16, wherein the standard deviation of the particle diameter of the spacer particles is 10 μm or less.

21. The semiconductor package according to claim 16, wherein the content of the spacer particles in the adhesive layer is 0.1% by mass or more and 20% by mass or less, based on the mass of the adhesive layer.

22. The semiconductor package according to claim 16, wherein the adhesive layer is a cured product of a thermosetting adhesive, and when the thermosetting adhesive is cured, a cured product exhibiting a breaking elongation of 20% or more is formed.

23. A semiconductor module comprising: a motherboard; and a semiconductor package according to any one of claims 16 to 22 mounted on the motherboard.

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