Durable backside layer of a semiconductor substrate

A multilayer stack of silicon oxycarbide and functional layers on semiconductor substrates addresses the durability and resistance issues of conventional backside sealing layers, enhancing chemical resistance and reducing defects, thus improving production efficiency and reducing costs.

WO2025244797A1PCT designated stage Publication Date: 2025-11-27LAM RES CORP
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Patent Information

Application Number
PCT/US2025/026879
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-21
Filing Date
2025-04-29
Publication Date
2025-11-27

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Abstract

Methods and apparatus for deposition of a backside layer on a semiconductor substrate are provided. In some embodiments, such techniques may include: depositing a first layer of material on a backside of the semiconductor substrate; and depositing a second layer of material over the first layer of material to collectively form a stack of materials on the backside of the semiconductor substrate, the second layer of material comprising a lower tensile stress or a lower compressive stress than that of the first layer of material, the stack of materials comprising a greater chemically resistive property than that of the first layer of material. In some implementations, such techniques may include: depositing a sealing layer on a backside of the semiconductor substrate in a first process chamber; and depositing a silicon oxycarbide (SiOC) layer over the sealing layer to collectively form a stack of materials on the backside.
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Citation Information

Patent Citations

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