Single-differential conversion circuit

The single-ended differential conversion circuit addresses voltage and bandwidth issues by using a branch drive amplifier, balanced resonator, and inverting amplifier design, enabling low-power, high-gain operation with consistent signal amplitudes across multiple stages.

WO2025248694A1PCT designated stage Publication Date: 2025-12-04NT T INC
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Patent Information

Application Number
PCT/JP2024/019835
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-30
Publication Date
2025-12-04

AI Technical Summary

Technical Problem

Existing single-to-differential conversion circuits face challenges in reducing power supply voltage requirements and bandwidth degradation due to the use of differential amplifier circuits and multiple-stage configurations.

Method used

A single-ended differential conversion circuit design incorporating a branch drive amplifier section, balanced resonator section, and inverting amplifier section, utilizing inductors and resistors to suppress frequency characteristics and maintain equal signal amplitudes, allowing for low-voltage operation and reduced bandwidth degradation even when connected to multi-stage amplifiers.

Benefits of technology

The circuit achieves low-voltage operation suitable for low power consumption while suppressing bandwidth degradation, maintaining consistent signal amplitudes and 0 dB crossover frequencies across multiple stages, enhancing frequency characteristics.

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Abstract

A single-differential conversion circuit (10) according to the present invention comprises: a branch drive amplification unit (11); a balanced resonance unit (12) connected to the branch drive amplification unit; and an inverting amplification unit (13) connected to the branch drive amplification unit in parallel with the balanced resonance unit. The branch drive amplification unit comprises an amplification circuit (111), a first inductor connected between the amplification circuit, and the balanced resonance unit and the inverting amplification unit, a first resistor connected to the amplification circuit in parallel with the first inductor, and a second inductor connected in series with the first resistor. The balanced resonance unit comprises a second resistor connected to the branch drive amplification unit, and a third inductor connected in series with the second resistor. The inverting amplification unit comprises an inverting amplification circuit (131) connected to the branch drive amplification unit, a third resistor connected to the inverting amplification circuit, and a fourth inductor connected in series with the third resistor. Thus, the present invention can provide a single-differential conversion circuit in which deterioration in frequency characteristics is suppressed.
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Description

Single differential conversion circuit

[0001] The present invention relates to a single-to-differential conversion circuit that converts a single-ended electrical signal into a differential signal.

[0002] In communication technologies using electrical signals or optical signals, codes such as NRZ and PAM4, which are baseband signals, are used (for example, Non-Patent Document 1). These codes make it possible to realize a transceiver circuit that can transmit and receive signals with a simple configuration and low latency.

[0003] In a receiver that receives optical signals in a transmitter / receiver circuit, a single-ended electrical signal photoelectrically converted by a single photodiode is typically amplified, converted into a differential signal, and input to a circuit that determines the sign in the next stage. A single-to-differential conversion circuit that converts a single-ended electrical signal into a differential signal uses a differential amplifier circuit consisting of positive and negative input transistors and a current source that determines the bias current supplied to these transistors.

[0004] https: / / ednjapan.com / edn / articles / 1805 / 11 / news018_4.htmlReza Samadi et.al., “Uniform Design of Multi-Peak Bandwidth Enhancement Technique for Multistage Amplifier,” IEEE Transaction on Circuits and Systems Vol. 54, No.7, pp.1489-pp.1499, 2007.

[0005] In the differential amplifier circuit used in the above-mentioned single differential conversion circuit, the current source is composed of transistors of the same type as the positive and negative input transistors. For example, when the positive and negative input transistors are NMOS-FETs, the current source is composed of NMOS-FETs, and when the positive and negative input transistors are npn transistors, the current source is composed of npn transistors. As a result, the differential amplifier circuit requires a power supply voltage that is more than twice the threshold voltage of the transistors. Therefore, it has been difficult to reduce the voltage in a single differential conversion circuit that uses a differential amplifier circuit.

[0006] In addition, when a single-ended differential converter is configured by connecting amplifier circuits in multiple stages (N stages), the bandwidth f_N is f_N=f-3dB (2 1/N -1) 0.5 As a result, the bandwidth becomes narrower (Non-Patent Document 2). Thus, there is a problem of bandwidth degradation.

[0007] In order to solve the above-mentioned problems, the single-ended differential conversion circuit of the present invention is a single-ended differential conversion circuit that converts a single-ended electrical signal into a differential signal, and includes: a branch drive amplifier section to which the electrical signal is input; a balanced resonator section connected to the branch drive amplifier section and outputting one of the differential signals; and an inverting amplifier section connected in parallel to the balanced resonator section to the branch drive amplifier section and outputting the other of the differential signals. The branch drive amplifier section includes an amplifier circuit and a first inductor connected between the amplifier circuit and the balanced resonator section and the inverting amplifier section; a first resistor connected in parallel to the first inductor and a second inductor connected in series to the first resistor, in the amplifier circuit; the balanced resonator section includes a second resistor connected to the branch drive amplifier section and a third inductor connected in series to the second resistor; and the inverting amplifier section includes an inverting amplifier circuit connected to the branch drive amplifier section, a third resistor connected to the inverting amplifier circuit, and a fourth inductor connected in series to the third resistor.

[0008] According to the present invention, it is possible to provide a single-ended differential conversion circuit in which deterioration of frequency characteristics is suppressed.

[0009] FIG. 1 is a block diagram showing the configuration of a single-ended differential conversion circuit according to a first embodiment of the present invention. FIG. 2 is a block diagram showing an application example of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 3 is a diagram showing a circuit model of an application example of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 4 is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 5 is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 6A is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 6B is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 7A is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 7B is a diagram for explaining the effects of the single-ended differential conversion circuit according to the first embodiment of the present invention. FIG. 8 is a block diagram showing an application example of a single-ended differential conversion circuit according to a second embodiment of the present invention. FIG. 9 is a diagram showing a circuit model of a preamplifier in the single-ended differential conversion circuit according to the second embodiment of the present invention. FIG. 10 is a diagram for explaining the effects of the single-ended differential conversion circuit according to the second embodiment of the present invention. FIG. 11 is a diagram for explaining the effects of the single-ended differential conversion circuit according to the second embodiment of the present invention. FIG. 12 is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 13 is a block diagram showing the configuration of an amplifier unit in the single differential conversion circuit according to the second embodiment of the present invention. FIG. 14 is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 15 is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 16A is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 16B is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 17A is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention. FIG. 17B is a diagram for explaining the effects of the single differential conversion circuit according to the second embodiment of the present invention.FIG. 18 is a block diagram showing an application example of a single differential conversion circuit according to a third embodiment of the present invention. FIG. 19 is a diagram showing a circuit model of a preamplifier unit in the single differential conversion circuit according to the third embodiment of the present invention. FIG. 20 is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 21A is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 21B is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 22A is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 22B is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 23A is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 23B is a diagram for explaining the effects of the single differential conversion circuit according to the third embodiment of the present invention. FIG. 24 is a block diagram showing the configuration of a single differential conversion circuit according to a fourth embodiment of the present invention. FIG. 25 is a block diagram showing an application example of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 26 is a diagram showing a circuit model of an inverting amplifier unit in the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 27 is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 28A is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 28B is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 29A is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 29B is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 30A is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention. FIG. 30B is a diagram for explaining the effects of the single differential conversion circuit according to the fourth embodiment of the present invention.

[0010] First Embodiment A single-ended to differential converter circuit according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 7B.

[0011] <Configuration of Single-Ended Differential Conversion Circuit> As shown in FIG. 1, a single-end differential conversion circuit 10 according to this embodiment includes a branch drive amplifier section 11, a balanced resonator section 12, and an inverting amplifier section 13.

[0012] The branch drive amplifier 11 includes a first amplifier circuit 111, an inductor Lg connected in parallel to the first amplifier circuit 111, and a resistor Rm, and further includes an inductor Lm connected in series to the resistor Rm. The inductor Lm is connected in series to a DC voltage terminal Vdc1. The balanced resonance unit 12 and the inverting amplifier unit 13, which are arranged in the next stage, are connected in parallel to the inductor Lg. The inductor Lg resonates with the input capacitance of the amplifier circuit 111 of the branch drive amplifier 11 and the inverting amplifier circuit 131 of the inverting amplifier unit 13, as well as the input capacitance of an amplifier unit (not shown) connected in the next stage to the output 1. The resistor Rm determines the gain and suppresses peaks in the frequency characteristics due to resonance.

[0013] The branch drive amplifier 11 amplifies the input signal and generates a signal that branches into an output 1 and an output 2 .

[0014] The balanced resonance unit 12 is configured by connecting a resistor R1 and an inductor L1 in series. The inductor L1 is connected to the output 1 and resonates with the input capacitance of an amplifier unit (not shown) connected in the next stage of the output 1. The resistor R1 suppresses the resonance of the inductor L1.

[0015] The inverting amplifier 13 includes an inverting amplifier circuit 131, a resistor Rs connected in parallel to the connection with the output 2 of the inverting amplifier circuit 131, and an inductor Ls connected in series with the resistor Rs. The inductor Ls is connected in series with the DC voltage terminal Vdc2. The inductor Ls resonates with the input capacitance of the amplifier circuit in the next stage of the output 2. The resistor Rs determines the gain and suppresses peaks in the frequency characteristics due to resonance.

[0016] The inverting amplifier 13 inverts the input signal (gain is −1) and outputs it.

[0017] In the differential conversion circuit 10, a single signal is input to the branch drive amplifier section 11 (input 1, Vin), one differential signal (e.g., a positive signal) is output from the balanced resonance section 12 (output 1, Vo1), and the other differential signal (e.g., a negative signal) is output from the inverting amplifier section 13 (output 2, Vo2).

[0018] 2 shows an example of connections when using the single-to-differential conversion circuit 10. Capacitive input amplifier circuits 1 and 2 are connected to output 1 (Vo1) and output 2 (Vo2), respectively. A DC voltage source 3 is connected to DC voltage terminals Vdc1 and Vdc2. Here, an example is shown in which the same voltage is applied to Vdc1 and Vdc2, but different voltages may be applied to Vdc1 and Vdc2. An amplifier circuit may be connected to either output 1 (Vo1) or output 2 (Vo2).

[0019] <Effects> The effects of the single-ended to differential conversion circuit 10 according to this embodiment will be described below. Fig. 3 shows a circuit model of the example configuration of the circuit connections shown in Fig. 2 .

[0020] In the branch drive amplifier 11, the amplifier circuit 111 has a capacitance Cd and a resistance Rd at the output, and outputs a current of −gmVi as the transconductance gm in response to the input signal Vi.

[0021] Similarly, in the inverting amplifier 13, the inverting amplifier circuit 131 has a capacitance Cd2 and a resistance Rd at its output, and outputs a current of −gm2V2 as its output in response to the input signal V2 as a transconductance gm2.

[0022] The capacitance C1 is a capacitance including the inverting amplifier circuit 131 of the inverting amplifier unit 13 and the wiring capacitance.

[0023] The input capacitance of the capacitive input amplifier circuit 1 connected to the output 1 is CL1, and the input capacitance of the capacitive input amplifier circuit 2 connected to the output 2 is CL2.

[0024] From the nodal equation at output 1, equation (1) is obtained.

[0025]

[0026] Here, ω represents the angular frequency, and the imaginary unit is j = (-1). 0.5 It states that:

[0027] From equation (1), equation (2) is obtained.

[0028]

[0029] From the nodal equation at the node of voltage V2, equation (3) is obtained.

[0030]

[0031] From equation (3), equation (4) is obtained.

[0032]

[0033] From the nodal equation at the node of voltage V1, equation (5) is obtained.

[0034]

[0035] From equation (5), equation (6) is obtained.

[0036]

[0037] When the real part of the right side of equation (6) is summarized as Hre(ω), equation (7) is obtained.

[0038]

[0039] When the imaginary part on the right side of equation (6) is summarized as Him(ω), equation (8) is obtained.

[0040]

[0041] The relationship between the input signal Vi and the output 1 signal Vo1 is expressed by equation (9).

[0042]

[0043] From the nodal equation at output 2, equation (10) is obtained.

[0044]

[0045] From equation (10), equation (11) is obtained.

[0046]

[0047] To simplify the discussion, the condition of equation (12) is set.

[0048]

[0049] In this circuit model, the input signal is first inverted and amplified by the branch drive amplifier section 11. The inverted and amplified signal is output as is to output 1. Meanwhile, the inverted and amplified signal is inverted again and output to output 2, so the signal at output 2 is in phase with the input signal. As a result, signals of opposite phases are output to outputs 1 and 2. In this way, the input single signal is output as an opposite-phase differential signal, so single-to-differential conversion can be achieved with this circuit.

[0050] Typically, in semiconductor circuits, the amplitude of the output signal is limited by factors such as the power supply voltage and the current-voltage characteristics of the transistors. The amplitude of the differential signal, defined as the difference in the amplitude of the signals at Output 1 and Output 2, becomes small when the amplitudes of the signals at Output 1 and Output 2 are uneven. Therefore, in the single-differential conversion circuit 10, the amplitudes of the signals at Output 1 and Output 2 are required to be equal. In this case, |Vo1 / Vo2| is 1. |Vo1 / Vo2| is expressed by Equation (13) from Equation (11) and Equation (2).

[0051]

[0052] The suitability of the single-to-differential conversion circuit 10 can be determined by evaluating that the evaluation function g=|Vo1 / Vo2|-1 is close to 0 in the target frequency range, for example, -0.1≦g≦0.1.

[0053] To simplify the equations, normalization is performed using the parameters of equation (14), yielding equations (15) to (17).

[0054]

[0055]

[0056]

[0057]

[0058] Furthermore, when equation (18) is normalized by the parameters, equation (19) is obtained.

[0059]

[0060]

[0061] In equations (18) and (19), α represents the ratio between the time constant R1CL1 of the balanced resonant circuit and the time constant RsCL2 of the inverting amplifier 13. β represents the ratio between the parameter L1CL1 related to the resonant frequency of the balanced resonant circuit and the parameter LsCL2 related to the resonant frequency of the inverting amplifier 13. α and β are parameters that represent the balance between the time constant and resonant frequency of the balanced resonant circuit and the inverting amplifier circuit 131. From equation (18), r1 is expressed by equation (20).

[0062]

[0063] From equations (14) and (18), the normalized frequencies Ω and Ωs are expressed by the relational expression in equation (21).

[0064]

[0065] FIG. 4 shows the calculation results of the normalized transfer function of the single-to-differential conversion circuit 10. The vertical axis shows the amplitude of the transfer function (normalized transfer function) normalized by the gain Ga. The amplitude |Vo1 / Vi| (solid line) of the normalized transfer function of output 1 and the amplitude |Vo2 / Vi| (dotted line) of the normalized transfer function of output 2 are shown. |Vo1 / Vi| was calculated from equations (15) to (17), and |Vo2 / Vi| was calculated from equations (19) and |Vo1 / Vi|. The horizontal axis shows the normalized frequency Ωs calculated from equation (21). Therefore, Ωs=1 on the horizontal axis corresponds to ω=ω 1 is equivalent to

[0066] In the calculation, α=0.49, β=0.5, klg=1.1, kl1=0.4, kc1=0.4, kcd=2, Q1=1.1, rd=5, kc2=0.1, Q1s=1, rd2=2.

[0067] As shown in FIG. 4, the amplitude frequency characteristics of the normalized transfer functions of output 1 and output 2 are almost the same.

[0068] When amplifiers having a 0 dB frequency (hereinafter referred to as the "0 dB cross frequency") where the magnitude of the transfer function normalized by the low frequency gain becomes 1 at frequencies other than DC are connected in multiple stages, the 0 dB cross frequency does not change even when multiple stages are connected, thereby suppressing degradation of the 3 dB band (International Publication No. 2023 / 089814).

[0069] In the frequency characteristics of the single-ended differential conversion circuit 10 shown in FIG. 4, a 0 dB crossover frequency exists, and by configuring a multistage amplifier with an amplifier (for example, the amplifier described in International Publication No. 2023 / 089814) with which the 0 dB crossover frequency coincides, a multistage amplifier with a single-ended differential conversion function can be configured that suppresses the 3 dB bandwidth reduction compared to the case of a single-stage amplifier and has a large gain.

[0070] Figure 5 shows the calculation results of the evaluation function that represents the difference in amplitude between output 1 and output 2. The evaluation function is calculated using equation (19). In the calculation results shown in Figure 4, the 0 dB crossover frequency is approximately 1. From the results of the evaluation function, the amplitude difference is ±0.1 or less at normalized frequencies below 1 (Figure 5). In this way, output 1 and output 2 match with an amplitude difference of ±0.1 or less at 0 dB crossover frequencies.

[0071] In the single-ended differential conversion circuit 10, the amplifier circuit of the branch drive amplifier unit and the inverting amplifier circuit of the inverting amplifier unit can be configured with an amplifier circuit that can operate at a low voltage, such as an inverter amplifier circuit. As a result, the single-ended differential conversion circuit 10 can operate at a low voltage.

[0072] According to this embodiment, it is possible to provide a single-to-differential conversion circuit 10 that can achieve low-voltage operation suitable for low power consumption and suppresses bandwidth degradation even when connected to a multi-stage amplifier for high gain.

[0073] 6A and 6B show the calculation results of the amplitude of the normalized transfer function and the evaluation function when α = 0.63 and β = 1. In Fig. 6A, the amplitude |Vo1 / Vi| (solid line) of the normalized transfer function of output 1 and the amplitude |Vo2 / Vi| (dotted line) of the normalized transfer function of output 2 are shown. The conditions were klg = 1.4, kl1 = 0.3, kc1 = 0.1, kcd = 0.7, Q1 = 1, rd = 3, kc2 = 0.1, Q1s = 1.15, and rd2 = 10.

[0074] Even when α=0.63 and β=1, the frequency characteristics of the amplitudes of output 1 and output 2 are almost the same in the frequency range up to the 0 dB cross frequency.

[0075] 7A and 7B show the amplitude of the normalized transfer function and the calculation results of the evaluation function when α = 0.76 and β = 1.5. In Fig. 7A, the amplitude |Vo1 / Vi| (solid line) of the normalized transfer function of output 1 and the amplitude |Vo2 / Vi| (dotted line) of the normalized transfer function of output 2 are shown. The conditions were klg = 1.3, kl1 = 0.3, kc1 = 0.15, kcd = 0.7, Q1 = 1, rd = 3, kc2 = 0.1, Q1s = 1.7, and rd2 = 20.

[0076] Even when α=0.76 and β=1.5, the frequency characteristics of the amplitudes of output 1 and output 2 are almost the same in the frequency range up to the 0 dB cross frequency.

[0077] From these, it can be seen that the 0 dB crossover frequency exists in the ranges of 0.49≦α≦0.76 and 0.5≦β≦1.5, and by configuring a multistage amplifier with an amplifier that matches this frequency, it is possible to suppress the 3 dB bandwidth reduction compared to the case of a single-stage amplifier, and to configure a multistage amplifier with a single-differential conversion function that has a large gain.

[0078] The amplifier circuit 111 of the branch drive amplifier unit 11 and the inverting amplifier circuit 131 of the inverting amplifier unit 13 can be configured with an amplifier circuit that can operate at a low voltage, such as an inverter amplifier circuit. As a result, the single-ended to differential conversion circuit 10 can operate at a low voltage.

[0079] According to this embodiment, it is possible to provide a single-ended differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain. Although no amplifier is inserted in the balanced resonator in FIG. 1, a non-inverting amplifier may be inserted in series with R1 and L1.

[0080] Second Embodiment A single-ended to differential converter circuit according to a second embodiment of the present invention will be described with reference to FIGS. 8 to 17B.

[0081] <Configuration of Single-Ended Differential Conversion Circuit> As shown in FIG. 8 , the single-ended differential conversion circuit 20 according to this embodiment includes a preamplifier 21 in the front stage of the branch drive amplifier 11 in the single-ended differential conversion circuit 20 according to the first embodiment. The preamplifier 21 includes a preamplifier circuit 211, an inductor Lg0 connected between the preamplifier circuit 211 and the branch drive amplifier 11, and a resistor Rg connected in parallel with the inductor Lg0 and connected to a DC voltage terminal Vdc0. The inductor Lg0 resonates with the input capacitance of the branch drive amplifier 11. The resistor Rg determines the gain. A DC voltage source (not shown) is connected to the DC voltage terminal Vdc0 and the DC voltage terminals Vdc1 and Vdc2.

[0082] <Effects> The effects of the single-ended to differential conversion circuit 10 according to this embodiment will be described below. Fig. 9 shows a circuit model of the preamplifier 21. Ci represents the input capacitance of the branch amplifier. Equation (22) is obtained from the nodal equation at Vi.

[0083]

[0084] From equation (22), equation (23) is obtained.

[0085]

[0086] The nodal equations at the node of voltage V3 give equations (24) and (25).

[0087]

[0088]

[0089] To simplify the equation, normalization is performed using the parameters of equation (26), yielding equation (27).

[0090]

[0091]

[0092] From equations (26) and (18), the relationship between the normalized angular frequencies Ωg and Ωs is expressed by equation (28).

[0093]

[0094] In the single-to-differential conversion circuit 20 according to this embodiment, when the transfer functions of the branch drive amplifier unit 11 and the balanced resonator unit 12 have ripples and are not flat (the frequency characteristics are not constant), the ripples in the overall transfer function |Vo1 / Vi0| can be reduced by combining them with the transfer function in the preamplifier unit 21.

[0095] 10 shows the calculation results of the normalized transfer function of Vo1, which is the output 1 of the single-to-differential conversion circuit 20. The vertical axis shows the amplitude of the transfer function (normalized transfer function) normalized by gain. The transfer function |Vi / Vi0| (dotted line) of the preamplifier 21, the transfer function |Vo1 / Vi| (dashed-dotted line) of the branch driver amplifier 11 and the balanced resonator 12, and the transfer function |Vo1 / Vi0| (solid line) of the configuration combining the preamplifier 21, the branch driver amplifier 11, and the balanced resonator 12 are shown. |Vi / Vi0| was calculated from equation (27), |Vo1 / Vi| was calculated from equations (15) to (17), and |Vo1 / Vi0| was calculated from |Vi / Vi0| and |Vo1 / Vi|.

[0096] In the calculation, the following were used: α = 0.55, β = 0.45, klg = 1, kl1 = 0.45, kc1 = 0.25, kcd = 0.3, Q1 = 0.8, rd = 4, kc2 = 0.2, Q1s = 1.1, rd2 = 1, wg = 0.8, kcg = 1.2, Q1g = 1.1.

[0097] In the configuration with only the branch drive amplifier section 11 and the balanced resonator section 12, the maximum value of the transfer function |Vo1 / Vi| is 1.14, the amplitude is highly frequency dependent, and the 0 dB cross frequency is low at 0.7 times the normalized frequency.

[0098] On the other hand, in the configuration combined with the preamplifier 21, the frequency dependency of the amplitude is low and constant, and the 0 dB cross frequency shows a high value at about 1 of the normalized frequency.

[0099] 11 shows the calculation results of the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 20. The amplitude of the normalized transfer function of output 1 (solid line) and the amplitude of the normalized transfer function of output 2 (dotted line) are shown. The amplitude of output 1 was calculated using equation (27) and equations (15) to (17) (the same as |Vo1 / Vi0| in FIG. 10 above), and the amplitude of output 2 was calculated using equation (27) and equations (15) to (17) and (19).

[0100] The normalized transfer function of output 1 and the normalized transfer function of output 2 are almost the same.

[0101] 12 shows an evaluation function that represents the amplitude difference between the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 20. The error is ±0.1 or less at normalized frequency 1 or less. From this, it can be seen that the normalized transfer functions at output 1 and output 2 are nearly identical, with a difference of ±0.1 or less at 0 dB crossover frequency or less.

[0102] A configuration in which the single-ended differential conversion circuit 20 and a multistage amplifier are connected will be described. As an example of the multistage amplifier, an amplifier unit having the same configuration as the preamplifier unit 21 connected in multiple stages is assumed. The multistage amplifier may be connected at least to either the stage subsequent to output 1 or the stage subsequent to output 2 of the single-ended differential conversion circuit 20.

[0103] 13, the amplifier section has an inductor Lgn that resonates with the input capacitance of the next stage and a resistor Rgn that determines the gain. The transfer function of the amplifier section has coefficients that are different from the transfer function of the preamplifier section 21. In detail, the normalized transfer function of one amplifier stage of the multi-stage amplifier is obtained by replacing the coefficients kcg, Q1g, and wg of the normalized transfer function shown in equation (27) with kcgn, Q1gn, and wgn, respectively.

[0104] When normalized by the parameters of equation (29), the relationship between the normalized frequencies Ωgn and Ωs is expressed by equation (30).

[0105]

[0106]

[0107] FIG. 14 shows the calculation results of the frequency characteristics of the normalized transfer function in a configuration in which a single-stage differential conversion circuit 20 and a multistage amplifier are connected. For multistage amplifiers configured with one, three, and six stages, calculations were performed with kcgn = 0.5, Q1gn = 1, and wgn = 1. In the calculations, the multistage amplifier was placed on the input side of the single-stage differential conversion circuit 20. The 0 dB crossover frequency of the multistage amplifier was set to 1, which is the same as the 0 dB crossover frequency of the single-stage differential conversion circuit 20, i.e., wgn = 1. In the figure, the solid line represents the normalized transfer function of a one-stage amplifier, the dotted line represents the normalized transfer function of a three-stage amplifier, and the dash-dot line represents the normalized transfer function of a six-stage amplifier. As the number of stages in the multistage amplifier increases, the 3 dB bandwidth (the frequency at which the amplitude in the normalized transfer function becomes 0.7) deteriorates.

[0108] 15 shows the normalized transfer function when a multistage amplifier is combined with the single-to-differential conversion circuit 20. Even if the number of stages in the multistage amplifier increases, the 0 dB crossover frequency is maintained at about 1, and the 3 dB band (the frequency at which the amplitude becomes 0.7 in the normalized transfer function) does not deteriorate.

[0109] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits capable of operating at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits capable of operating at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 20 can operate at low voltages.

[0110] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0111] 16A shows the calculation results of the normalized transfer functions at outputs 1 and 2 of the single-ended differential conversion circuit 20. FIG. 16B shows an evaluation function representing the amplitude difference between the normalized transfer functions at outputs 1 and 2 of the single-ended differential conversion circuit 20. Calculations were performed with α = 0.99 and β = 1. In addition, the following were set: klg = 0.5, kl1 = 1, kc1 = 0.2, kcd = 0.2, Q1 = 0.85, rd = 3, kc2 = 0.5, Q1s = 1.05, rd2 = 5, wg = 0.85, kcg = 1.3, and Q1g = 1.3.

[0112] As shown in FIGS. 16A and 16B, when α=0.99 and β=1, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB crossover frequency, and there is almost no amplitude difference.

[0113] 17A and 17B show the results of similar calculations with α = 1.4 and β = 1.5, where klg = 0.4, kl1 = 1.5, kc1 = 0.2, kcd = 0.2, Q1 = 0.8, rd = 2, kc2 = 1, Q1s = 1.3, rd2 = 5, wg = 0.65, kcg = 1, and Q1g = 1.

[0114] As shown in FIGS. 17A and 17B, when α=1.4 and β=1.5, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB cross frequency, and there is almost no amplitude difference.

[0115] From the above, it can be seen that the 0 dB crossover frequency exists within the ranges of 0.55≦α≦1.4 and 0.45≦β≦1.5, and by configuring a multi-stage amplifier with an amplifier that matches this frequency, it is possible to suppress the 3 dB bandwidth reduction compared to the case of a single-stage amplifier, and to configure a multi-stage amplifier with a single-differential conversion function that has a large gain.

[0116] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits capable of operating at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits capable of operating at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 20 can operate at low voltages.

[0117] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0118] Third Embodiment A single-ended to differential converter circuit according to a third embodiment of the present invention will be described with reference to FIGS. 18 to 23B.

[0119] <Configuration of Single-Ended Differential Conversion Circuit> As shown in Figure 18, in the single-ended differential conversion circuit 30 according to this embodiment, in the preamplifier 31 of the single-ended differential conversion circuit 30 according to the second embodiment, a resistor Rm0 and an inductor Lm0 are connected in series between the node between the output of the preamplifier circuit 211 and the inductor Lg0 and the DC voltage terminal Vdc0. The resistor Rm0 determines the gain and suppresses peaks in the frequency characteristics due to resonance. A DC voltage source (not shown) is connected to the DC voltage terminal Vdc0 and the DC voltage terminals Vdc1 and Vdc2.

[0120] <Effects> The effects of the single-ended to differential conversion circuit 10 according to this embodiment will be described below. Fig. 19 shows a circuit model of the preamplifier 31 of the single-ended to differential conversion circuit 30. Ci represents the input capacitance of the branch amplifier.

[0121] The relationship between V3 and Vi obtained by the nodal equation at Vi is the same as equation (18).

[0122] The nodal equation at the node of voltage V3 gives equation (31).

[0123]

[0124] From equation (31), equation (32) is obtained.

[0125]

[0126] When equation (32) is normalized by equation (33), equation (34) is obtained as the normalized transfer function.

[0127]

[0128]

[0129] The relationship between the normalized frequencies Ωsg and Ωs is expressed by equation (35).

[0130]

[0131] As in the second embodiment, when the transfer functions of the branch drive amplifier unit 11 and the balanced resonator unit 12 are not flat (constant), the ripple of the overall transfer function |Vo1 / Vi0| can be reduced by combining them with the transfer function in the preamplifier unit 31.

[0132] 20 shows the calculation results of the normalized transfer function of Vo1, which is the output 1 of the single-to-differential conversion circuit 30. The vertical axis shows the amplitude of the transfer function (normalized transfer function) normalized by gain. The graph shows the transfer function |Vi / Vi0| (dotted line) of the preamplifier 31, the transfer function |Vo1 / Vi| (dashed-dotted line) of the branch-driven amplifier 11 and the balanced resonator 12, and the transfer function |Vo1 / Vi0| (solid line) of the configuration combining the preamplifier 31, the branch-driven amplifier 11, and the balanced resonator 12. |Vi / Vi0| was calculated from equation (34), |Vo1 / Vi| was calculated from equations (15) to (17), and |Vo1 / Vi0| was calculated from |Vi / Vi0| and |Vo1 / Vi|.

[0133] In the calculation, the following were used: klg = 1, kl1 = 0.9, kc1 = 0.3, kcd = 0.5, Q1 = 0.9, rd = 4, kc2 = 0.1, Q1s = 0.75, rd2 = 1, α = 0.53, β = 0.45, wg = 0.85, kls2 = 0.8, kc0 = 1, Q12 = 0.65, rd2 = 4.

[0134] In the configuration with only the preamplifier 31, the maximum value of the transfer function |Vi / Vi0| is about 1.2, and the amplitude is highly frequency-dependent.

[0135] In the configuration consisting of only the branch drive amplifier section 11 and the balanced resonator section 12, the maximum value of the transfer function |Vo1 / Vi| is 1.3, and the frequency dependency of the amplitude is large.

[0136] On the other hand, in the configuration combined with the preamplifier 31, the frequency dependency of the amplitude is low and constant (flat), and the 0 dB cross frequency is 1.25 of the normalized frequency, which is higher than in the second embodiment.

[0137] Since the single-ended differential conversion circuit 30 has a 0 dB cross frequency and high amplitude flatness, when combined with a multi-stage amplifier having a 0 dB cross frequency as shown in FIG. 14, band degradation can be suppressed and a high gain can be achieved.

[0138] 21A shows the calculation results of the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 30. The amplitude of the normalized transfer function of output 1 (solid line) and the amplitude of the normalized transfer function of output 2 (dotted line) are shown. The amplitudes of output 1 and output 2 were calculated using equation (34) instead of equation (27), as in the second embodiment.

[0139] The normalized transfer function of output 1 and the normalized transfer function of output 2 are almost the same.

[0140] 21B shows an evaluation function that represents the amplitude difference between the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 30. The error is ±0.1 or less at normalized frequency 1 or less. From this, it can be seen that the normalized transfer functions at output 1 and output 2 are nearly identical, with a difference of ±0.1 or less at 0 dB crossover frequency or less.

[0141] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 30 can operate at low voltages.

[0142] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0143] 22A and 22B show the calculation results of the amplitude of the normalized transfer function and the evaluation function when α = 1.2 and β = 1. In the calculation, the following conditions were used: klg = 0.6, kl1 = 1, kc1 = 0.2, kcd = 0.2, Q1 = 1, rd = 3, kc2 = 0.7, Q1s = 1.06, rd2 = 100, wg = 0.7, kls2 = 0.4, kc0 = 1.3, Q12 = 0.85, rd2 = 4.

[0144] As shown in FIGS. 22A and 22B, when α=1.2 and β=1, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB crossover frequency, and there is almost no amplitude difference.

[0145] 23A and 23B show the calculation results of the amplitude of the normalized transfer function and the evaluation function when α = 1.2 and β = 1.5. In the calculation, the following conditions were used: klg = 0.6, kl1 = 1, kc1 = 0.2, kcd = 0.2, Q1 = 1, rd = 3, kc2 = 0.7, Q1s = 1.3, rd2 = 100, wg = 0.7, kls2 = 0.4, kc0 = 1.5, Q12 = 0.95, and rd2 = 4.

[0146] As shown in FIGS. 23A and 23B, even when α=1.2 and β=1.5, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB crossover frequency, and there is almost no amplitude difference.

[0147] From the above, it can be seen that the 0 dB crossover frequency exists in the ranges of 0.53≦α≦1.2 and 0.5≦β≦1.5, and by configuring a multi-stage amplifier with an amplifier that matches this frequency, it is possible to suppress the 3 dB bandwidth reduction compared to the case of a single-stage amplifier, and to configure a multi-stage amplifier with a single-differential conversion function that has a large gain.

[0148] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 30 can operate at low voltages.

[0149] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0150] Fourth Embodiment A single-ended to differential converter circuit according to a fourth embodiment of the present invention will be described with reference to FIGS. 24 to 30B.

[0151] <Configuration of Single-Ended Differential Conversion Circuit> As shown in FIG. 24 , in the single-ended differential conversion circuit 40 according to the present embodiment, in the inverting amplifier section 43 of the single-ended differential conversion circuit 40 according to the first embodiment, an inductor Ls2 is connected in series between the output of the inverting amplifier circuit 131 and the output terminal V02.

[0152] 25 shows an example of connections when using the single-to-differential conversion circuit 40. Capacitive input amplifier circuits 1 and 2 are connected to outputs 1 and 2, respectively, and a preamplifier is connected to the front stage of the branch drive amplifier 11. The preamplifier 21 has an inductor Lg0 that resonates with the input capacitance of the branch drive amplifier 11 and a resistor Rg that determines the gain. A DC voltage source (not shown) is connected to the DC voltage terminals Vdc0 and Vdc1 and Vdc2.

[0153] <Effects> The effects of the single-ended to differential converting circuit 10 according to this embodiment will be described below.

[0154] The transfer function between the input Vi and the output Vo1 is the same as in the first embodiment.

[0155] The transfer function of the preamplifier 21 is the same as equation (27).

[0156] Next, the transfer function on the output 2Vo2 side is calculated.

[0157] 26 shows a circuit model of the inverting amplifier 43. The nodal equation at output 2 gives Equation (36).

[0158]

[0159] From equation (36), equation (37) is obtained.

[0160]

[0161] The nodal equation at voltage V4 gives equation (38).

[0162]

[0163] From equation (38), equation (39) is obtained.

[0164]

[0165] By applying equation (12) to equation (39), equation (40) is obtained.

[0166]

[0167] From equation (31) and equation (1), equation (41) is obtained.

[0168]

[0169] By normalizing with the parameters shown in equation (42), equations (42) and (43) are obtained.

[0170]

[0171]

[0172]

[0173] The normalized transfer function can be calculated using equation (43), and the evaluation function can be calculated using equation (44).

[0174] As in the second and third embodiments, when the transfer functions of the branch drive amplifier unit 11 and the balanced resonator unit 12 are not flat (constant), the ripple of the overall transfer function |Vo1 / Vi0| can be reduced by combining them with the transfer function in the preamplifier unit 21.

[0175] 27 shows the calculation results of the normalized transfer function of Vo1, which is the output 1 of the single-ended differential conversion circuit 40. The transfer function |Vi / Vi0| (dotted line) of the preamplifier 21, the transfer function |Vo1 / Vi| (dashed line) of the branch drive amplifier 11 and the balanced resonator 12, and the transfer function |Vo1 / Vi0| (solid line) of the configuration combining the preamplifier 21, the branch drive amplifier 11, and the balanced resonator 12 are shown. |Vi / Vi0| was calculated from equation (34), |Vo1 / Vi| was calculated from equations (15) to (17), and |Vo1 / Vi0| was calculated from |Vi / Vi0| and |Vo1 / Vi|.

[0176] In the calculation, the following conditions were used: α = 0.5, β = 0.45, klg = 1, kl1 = 1, kc1 = 0.3, kcd = 0.5, Q1 = 0.81, rd = 4, kl2 = 0.3, kc2 = 0.2, Q1s = 0.6, rd2 = 1, wg = 1, kcg = 0.7, Q1g = 0.8.

[0177] In the configuration with only the preamplifier 21, the maximum value of the transfer function |Vi / Vi0| is about 1.35, and the amplitude is highly frequency-dependent.

[0178] In the configuration consisting of only the branch drive amplifier section 11 and the balanced resonator section 12, the maximum value of the transfer function |Vo1 / Vi| is 1.2, and the frequency dependency of the amplitude is large.

[0179] On the other hand, in the configuration combined with the preamplifier 21, the frequency dependency of the amplitude is low and constant (flat), and the 0 dB cross frequency is 1.4 of the normalized frequency, which is higher than that of the second embodiment.

[0180] Since the single-ended differential conversion circuit 40 has a 0 dB crossover frequency and high amplitude flatness, when combined with a multi-stage amplifier having a 0 dB crossover frequency as shown in FIG. 14, band degradation can be suppressed and a high gain can be achieved.

[0181] 28A shows the calculation results of the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 40. The amplitude of the normalized transfer function of output 1 (solid line) and the amplitude of the normalized transfer function of output 2 (dotted line) are shown. The amplitude of output 1 is the same as |Vo1 / Vi0| shown above (FIG. 27). The amplitude of output 2 was calculated using equation (44) and |Vo1 / Vi0| (the amplitude of output 1).

[0182] The normalized transfer function of output 1 and the normalized transfer function of output 2 are almost the same.

[0183] 28B shows an evaluation function that represents the amplitude difference between the normalized transfer functions at output 1 and output 2 of the single-to-differential conversion circuit 40. The error is ±0.1 or less at normalized frequency 1 or less. From this, it can be seen that the normalized transfer functions at output 1 and output 2 are nearly identical, with a difference of ±0.1 or less at 0 dB crossover frequency or less.

[0184] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 40 can operate at low voltages.

[0185] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0186] 29A and 29B show the calculation results of the amplitude of the normalized transfer function and the evaluation function when α = 1 and β = 1. In the calculation, the following conditions were used: klg = 1, kl1 = 1, kc1 = 0.5, kcd = 0.5, Q1 = 0.81, rd = 4, kl2 = 0.6, kc2 = 0.5, Q1s = 0.8, rd2 = 10, wg = 0.75, kcg = 0.8, and Q1g = 1.05.

[0187] As shown in FIGS. 29A and 29B, when α=1 and β=1, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB crossover frequency, and there is almost no amplitude difference.

[0188] 30A and 30B show the calculation results of the amplitude of the normalized transfer function and the evaluation function when α = 1.3 and β = 1.5. In the calculation, the following conditions were used: klg = 0.5, kl1 = 3, kc1 = 0.2, kcd = 0.5, Q1 = 0.81, rd = 4, kl2 = 0.2, kc2 = 0.9, Q1s = 0.8, rd2 = 4, wg = 0.8, kcg = 0.9, and Q1g = 0.85.

[0189] As shown in FIGS. 30A and 30B, even when α=1.3 and β=1.5, the frequency characteristics of the amplitudes of Output 1 and Output 2 are almost the same in the frequency range up to the 0 dB crossover frequency, and there is almost no amplitude difference.

[0190] From the above, it can be seen that the 0 dB crossover frequency exists in the ranges of 0.5≦α≦1.3 and 0.45≦β≦1.5, and by configuring a multi-stage amplifier with an amplifier that matches this frequency, it is possible to suppress the 3 dB bandwidth reduction compared to the case of a single-stage amplifier, and to configure a multi-stage amplifier with a single-differential conversion function that has a large gain.

[0191] The amplifier circuit of the branch drive amplifier section, the inverting amplifier circuit of the inverting amplifier section, and the preamplifier circuit of the preamplifier section can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. Similarly, the amplifier circuits of the multistage amplifier can be configured with amplifier circuits that can operate at low voltages, such as inverter amplifier circuits. As a result, the single-to-differential conversion circuit 40 can operate at low voltages.

[0192] According to this embodiment, it is possible to provide a single-to-differential conversion circuit that can achieve low-voltage operation suitable for low power consumption and that suppresses bandwidth degradation even when connected to a multistage amplifier for high gain.

[0193] In the present embodiment, an example in which a preamplifier is provided has been shown, but the present invention is not limited to this. It may also be applied to a configuration that does not include a preamplifier, for example, the configuration of the first embodiment. Furthermore, although an example in which the third embodiment is provided with a preamplifier has been shown, it may also be applied to the second embodiment.

[0194] In the embodiments of the present invention, examples of the structure, dimensions, materials, etc. of each component in the configuration of the single-ended differential conversion circuit are shown, but the present invention is not limited to these examples. Anything that can demonstrate the functions and effects of the single-ended differential conversion circuit may be used.

[0195] It should be noted that the present invention is not limited to the above-described embodiments, and it is apparent that many modifications and combinations can be made by those skilled in the art within the technical spirit of the present invention. For example, the fourth embodiment may be combined with the second or third embodiment.

[0196] A part or all of the above-described embodiment or an example thereof can be described as, but is not limited to, the following supplementary notes.

[0197] (Supplementary Note 1) A single-end differential conversion circuit that converts a single-ended electrical signal into a differential signal comprises: a branch drive amplifier unit to which the electrical signal is input; a balanced resonator unit connected to the branch drive amplifier unit and outputting one of the differential signals; and an inverting amplifier unit connected in parallel to the balanced resonator unit to the branch drive amplifier unit and outputting the other of the differential signals; the branch drive amplifier unit comprises an amplifier circuit and a first inductor connected between the amplifier circuit and the balanced resonator unit and the inverting amplifier unit; a first resistor connected in parallel to the first inductor and a second inductor connected in series to the first resistor, in the amplifier circuit; the balanced resonator unit comprises a second resistor connected to the branch drive amplifier unit and a third inductor connected in series to the second resistor; and the inverting amplifier unit comprises an inverting amplifier circuit connected to the branch drive amplifier unit, a third resistor connected to the inverting amplifier circuit, and a fourth inductor connected in series to the third resistor.

[0198] (Supplementary Note 2) The single-to-differential conversion circuit described in Supplementary Note 1 further includes a preamplifier connected in a stage preceding the branch drive amplifier, the preamplifier comprising a preamplifier circuit, a fifth inductor connected between the preamplifier circuit and the branch drive amplifier, and a fourth resistor connected in parallel to the fifth inductor in the preamplifier circuit.

[0199] (Supplementary Note 3) The single-ended to differential conversion circuit according to Supplementary Note 2, further comprising a sixth inductor connected in series with the fourth resistor.

[0200] (Supplementary Note 4) The single-ended to differential conversion circuit according to Supplementary Note 1 or Supplementary Note 2, further comprising a seventh inductor connected in parallel to the third resistor in the inverting amplifier circuit.

[0201] (Appendix 5) A single-to-differential conversion circuit according to any one of Appendices 1 to 4, wherein an amplifier is connected to at least one of the first output of the balanced resonant section and the second output of the inverting amplifier circuit, and a DC voltage source is connected to a first DC voltage terminal to which the second inductor is connected and a second DC voltage terminal to which the fourth inductor is connected.

[0202] (Supplementary Note 6) A single-to-differential conversion circuit as described in Supplementary Note 5, wherein a first ratio of the product of the input capacitance of the amplifier connected to the first output and the second resistor to the product of the input capacitance of the amplifier connected to the second output and the third resistor is set to a predetermined value, and a second ratio of the product of the input capacitance of the amplifier connected to the first output and the third inductor to the product of the input capacitance of the amplifier connected to the second output and the fourth inductor is set to a predetermined value.

[0203] (Supplementary Note 7) The single-to-differential conversion circuit according to Supplementary Note 6, wherein the first ratio is equal to or greater than 0.55 and equal to or less than 1.4, and the second ratio is equal to or greater than 0.45 and equal to or less than 1.5.

[0204] (Supplementary Note 8) The single-ended to differential conversion circuit according to Supplementary Note 6, wherein the first ratio is equal to or greater than 0.49 and equal to or less than 0.76, and the second ratio is equal to or greater than 0.5 and equal to or less than 1.5.

[0205] (Supplementary Note 9) The single-to-differential conversion circuit according to Supplementary Note 6, wherein the first ratio is equal to or greater than 0.53 and equal to or less than 1.2, and the second ratio is equal to or greater than 0.5 and equal to or less than 1.5.

[0206] (Supplementary Note 10) The single-ended to differential conversion circuit according to Supplementary Note 6, wherein the first ratio is equal to or greater than 0.5 and equal to or less than 1.3, and the second ratio is equal to or greater than 0.45 and equal to or less than 1.5.

[0207] The present invention relates to a single-to-differential conversion circuit that converts a single-ended electrical signal into a differential signal, and can be applied to communication devices and communication systems.

[0208] 10 Single-to-differential conversion circuit 11 Branch drive amplifier section 111 Amplifier circuit 12 Balanced resonance section 13 Inverting amplifier section 131 Inverting amplifier circuit

Claims

1. A single-end differential conversion circuit that converts a single-ended electrical signal into a differential signal, comprising: a branch-driven amplifier unit to which the electrical signal is input; a balanced resonator unit connected to the branch-driven amplifier unit and outputting one of the differential signals; and an inverting amplifier unit connected in parallel to the balanced resonator unit to the branch-driven amplifier unit and outputting the other of the differential signals, wherein the branch-driven amplifier unit comprises an amplifier circuit and a first inductor connected between the amplifier circuit and the balanced resonator unit and the inverting amplifier unit; a first resistor connected in parallel to the first inductor and a second inductor connected in series to the first resistor, wherein the balanced resonator unit comprises a second resistor connected to the branch-driven amplifier unit and a third inductor connected in series to the second resistor; and the inverting amplifier unit comprises an inverting amplifier circuit connected to the branch-driven amplifier unit, a third resistor connected to the inverting amplifier circuit, and a fourth inductor connected in series to the third resistor.

2. The single-ended to differential conversion circuit according to claim 1, further comprising a preamplifier connected in a stage preceding said branch driving amplifier, said preamplifier comprising: a preamplifier circuit; a fifth inductor connected between said preamplifier circuit and said branch driving amplifier; and a fourth resistor connected in parallel with said fifth inductor to said preamplifier circuit.

3. The single-to-differential conversion circuit according to claim 2, further comprising a sixth inductor connected in series with the fourth resistor.

4. The single-ended to differential conversion circuit according to claim 1 or 2, further comprising a seventh inductor connected in parallel with the third resistor to the inverting amplifier circuit.

Citation Information

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