Distance image imaging element and distance image imaging device

Abstract

A distance image imaging element comprises a plurality of pixel circuits (321) and a pixel driving circuit, wherein the plurality of pixel circuits are provided with: one photoelectric conversion element (PD), a plurality of charge accumulation units (CS1 to CS4), a plurality of transfer transistors (G1 to G4) that transfer a charge from the photoelectric conversion element to each of the charge accumulation units; a plurality of switch transistors (SW1 to SW4) that switch between and connect the plurality of charge accumulation units and a common signal line (CL), and that output a charge from the plurality of charge accumulation units to the common signal line; a reset transistor (RT0) that resets the plurality of charge accumulation units to a prescribed potential via the common signal line and the switch transistors; and one source follower transistor (SF) that is connected to the common signal line and that converts charge amounts of the charge accumulation units to a voltage signal via the common signal line and the switch transistors.

Description

Distance image pickup element and distance image pickup device

[0001] This application claims priority to Japanese Patent Application No. 2024-086122, filed May 28, 2024, the contents of which are incorporated herein by reference.

[0002] Time-of-Flight (hereinafter referred to as "TOF") distance imaging devices have been realized that utilize the known speed of light to measure the distance between a measuring device and an object based on the time of flight of light in space, i.e., a measurement space (see, for example, Patent Document 1). Among TOF distance imaging devices, there is also known a TOF distance imaging device that includes a photoelectric conversion element that converts the amount of incident light into electric charges, and a distance imaging element that distributes and accumulates the electric charges converted by the photoelectric conversion element in multiple charge accumulation units (see, for example, Patent Document 2).

[0003] In such conventional distance imaging devices, the delay time from when a light pulse, which is a pulsed near-infrared light, is emitted until the light pulse is reflected off the subject and returns is determined by accumulating the electric charges generated by the photoelectric conversion element in multiple charge accumulation units, and the distance to the subject is calculated using the delay time and the speed of light.

[0004] Japanese Patent No. 4235729 Japanese Patent Application Laid-Open No. 2022-71539

[0005] However, in the conventional distance imaging element described above, the amount of charge in each of the multiple charge accumulation units is read out using a source follower transistor (SF) provided for each charge accumulation unit, as shown in Fig. 10. Therefore, in the conventional distance imaging element, there are cases where the amount of charge cannot be detected accurately due to variations in the performance of the source follower transistors, which can reduce the accuracy of distance measurement.

[0006] The present invention has been made to solve the above problems, and an object of the present invention is to provide a distance image pickup element and a distance image pickup device that can improve the accuracy of distance measurement.

[0007] A first aspect of the present invention is a pixel circuit including a photoelectric conversion element that generates charges according to incident light and a charge accumulation portion that accumulates the charges, and a pixel drive circuit that drives each of the pixel circuits, wherein each of the pixel circuits includes one of the photoelectric conversion elements, a plurality of the charge accumulation portions, and transfer transistors corresponding to each of the charge accumulation portions, the transfer transistor transferring the charges from the photoelectric conversion element to each of the charge accumulation portions, and switching transistors corresponding to each of the charge accumulation portions, switching between and connecting each of the charge accumulation portions and a common signal line, and transferring the charges from each of the charge accumulation portions to the common signal line. a switching transistor connected to the common signal line and outputting a voltage signal corresponding to the amount of charge in each of the charge storage sections; a reset transistor connected to the common signal line and configured to reset each of the charge storage sections to a predetermined potential via the common signal line and the switching transistor; and one source follower transistor connected to the common signal line and configured to convert the amount of charge in each of the charge storage sections into a voltage signal via the common signal line and the switching transistor, wherein the pixel drive circuit uses the transfer transistor to distribute and store charge in each of the charge storage sections in each of the plurality of pixel circuits, and uses the switching transistor to output a voltage signal corresponding to the amount of charge in each of the plurality of charge storage sections.

[0008] In a second aspect of the present invention, in the range image pickup device of the first aspect, the switching transistor and the reset transistor may be depletion-type NMOS transistors.

[0009] In a third aspect of the present invention, in the range image pickup element of the first aspect, the switching transistor and the reset transistor may be depletion-type PMOS transistors.

[0010] Furthermore, a fourth aspect of the present invention is such that, in the distance image pickup element of the first to third aspects, the plurality of charge accumulation sections are four or more charge accumulation sections, and four or more sets of one charge accumulation section, one transfer transistor, and one switching transistor are connected to one photoelectric conversion element.

[0011] Furthermore, a fifth aspect of the present invention is such that, in the distance image pickup element of the fourth aspect, the plurality of charge accumulation sections are four charge accumulation sections, and four sets of one charge accumulation section, one transfer transistor, and one switching transistor are connected to one photoelectric conversion element.

[0012] A sixth aspect of the present invention may be such that, in the range image pickup device according to any one of the first to fifth aspects, each of the plurality of pixel circuits includes a drain transistor that drains the charge from the photoelectric conversion element.

[0013] Furthermore, a seventh aspect of the present invention is such that, in the distance image pickup element of any one of the first to sixth aspects, the pixel drive circuit simultaneously turns on two or more of the switching transistors, and outputs a voltage signal according to the amount of charge in two or more of the charge accumulation sections.

[0014] An eighth aspect of the present invention is a pixel circuit including a photoelectric conversion element that generates charges according to incident light and a charge accumulation portion that accumulates the charges; and a pixel drive circuit that drives each of the plurality of pixel circuits, wherein each of the plurality of pixel circuits includes one of the photoelectric conversion elements, a plurality of the charge accumulation portions, and transfer transistors corresponding to each of the plurality of charge accumulation portions, the transfer transistor transferring the charges from the photoelectric conversion element to each of the plurality of charge accumulation portions, switching transistors corresponding to each of the plurality of charge accumulation portions, the switching transistors switching and connecting each of the plurality of charge accumulation portions to a common signal line and outputting the charges from each of the plurality of charge accumulation portions to the common signal line, and a switching transistor connected to the common signal line, the switching transistor transferring the charges from each of the plurality of charge accumulation portions to the common signal line via the common signal line and the switching transistor. to a predetermined potential, and one source follower transistor connected to the common signal line and converting the amount of charge in each of the plurality of charge accumulation units into a voltage signal via the common signal line and the switching transistor; the pixel drive circuit uses the transfer transistor to distribute and accumulate charge in each of the charge accumulation units in each of the plurality of pixel circuits, and uses the switching transistor to output a voltage signal corresponding to the amount of charge in each of the plurality of charge accumulation units; the plurality of charge accumulation units are four charge accumulation units, and four sets of one charge accumulation unit, the transfer transistor, and the switching transistor are connected to one photoelectric conversion element; and each of the plurality of pixel circuits is equipped with a drain transistor that drains the charge from the photoelectric conversion element.

[0015] In addition, a ninth aspect of the present invention is a distance imaging device comprising: a light source unit that irradiates a measurement space, which is a space to be measured, with a light pulse; a light receiving unit that has a distance image imaging element of any of the first to seventh aspects and distributes and accumulates charge in each of the charge accumulation units in each of the plurality of pixel circuits at a timing synchronized with the irradiation of the light pulse; and a distance image processing unit that controls the irradiation timing of the light pulse and the accumulation timing of the distribution and accumulation of charge in each of the charge accumulation units, measures the distance to a subject present in the measurement space based on the amount of charge accumulated in each of the charge accumulation units, and generates a distance image.

[0016] According to the present invention, the accuracy of distance measurement can be improved.

[0017] FIG. 1 is a block diagram showing an example of a distance image pickup device according to the present embodiment. FIG. 2 is a block diagram showing an example of a distance image sensor according to the present embodiment. FIG. 3 is a block diagram showing an example of a pixel circuit according to the present embodiment. FIG. 4 is a timing chart showing an example of control of the pixel circuit according to the present embodiment. FIG. 5 is a diagram showing an equivalent model of the pixel circuit according to the present embodiment. FIG. 6 is a first diagram explaining an example of operation of the pixel circuit according to the present embodiment. FIG. 7 is a second diagram explaining an example of operation of the pixel circuit according to the present embodiment. FIG. 8 is a diagram showing an example of the effect of the distance image sensor according to the present embodiment. FIG. 9 is a diagram showing a modified example of operation of the pixel circuit according to the present embodiment. FIG. 10 is a block diagram showing an example of a pixel circuit in the prior art.

[0018] A distance image pickup element and a distance image pickup device according to an embodiment of the present invention will be described below with reference to the drawings.

[0019] Fig. 1 is a block diagram showing an example of a distance image pickup device 1 according to this embodiment. As shown in Fig. 1, the distance image pickup device 1 includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. Fig. 1 also shows an object OB, which is an object to measure the distance to using the distance image pickup device 1. The distance image pickup element is, for example, a distance image sensor 32 (described below) in the light receiving unit 3.

[0020] The light source unit 2 irradiates a light pulse PO into a space to be photographed, in which a subject OB, the distance of which is to be measured by the distance image capturing device 1, is present, under the control of the distance image processing unit 4. The light source unit 2 is, for example, a surface-emitting semiconductor laser module such as a vertical cavity surface-emitting laser (VCSEL). The light source unit 2 also includes a light source device 21 and a diffuser plate 22.

[0021] The light source device 21 is a light source that emits laser light in a near-infrared wavelength band (for example, a wavelength band of 850 nm to 940 nm) that becomes the light pulse PO that is irradiated onto the subject OB. The light source device 21 is, for example, a semiconductor laser light-emitting element. The light source device 21 emits pulsed laser light in response to control from the measurement control unit 43.

[0022] The diffuser plate 22 is an optical component that diffuses the laser light in the near-infrared wavelength band emitted by the light source device 21 to the extent of the surface that is irradiated onto the subject OB. The pulsed laser light diffused by the diffuser plate 22 is emitted as a light pulse PO and irradiated onto the subject OB.

[0023] The light receiving unit 3 receives reflected light RL of the light pulse PO reflected by the object OB, the distance of which is to be measured in the range image pickup device 1, and outputs a pixel signal corresponding to the received reflected light RL. The light receiving unit 3 includes a lens 31 and a range image sensor 32.

[0024] The lens 31 is an optical lens that guides the incident reflected light RL to the range image sensor 32. The lens 31 emits the incident reflected light RL toward the range image sensor 32, and causes the light to be received (incident) by pixel circuits 321 provided in a light receiving region 320 (see FIG. 2 ) of the range image sensor 32.

[0025] The distance image sensor 32 (an example of a distance image capturing element) is an image capturing element used in the distance image capturing device 1. The distance image sensor 32 includes a plurality of pixel circuits 321 in a two-dimensional light receiving area 320 (see FIG. 2 ) and a pixel drive circuit 322 that controls each of the pixel circuits 321.

[0026] The pixel circuit 321 is provided with one photoelectric conversion element (for example, a photoelectric conversion element PD described later), a plurality of charge storage units (for example, charge storage units CS (CS1 to CS4) described later) corresponding to this one photoelectric conversion element, and components that distribute charges to each charge storage unit.

[0027] The pixel drive circuit 322 is a drive circuit that drives the pixel circuits 321. The pixel drive circuit 322 conducts a transfer transistor G (described later) in each of the charge accumulation units CS (CS1 to CS4) at a predetermined accumulation timing synchronized with the irradiation of the light pulse PO, thereby distributing and accumulating the charges. Details of the range image sensor 32, which includes the pixel circuits 321 and the pixel drive circuit 322, will be described later with reference to FIG. 2.

[0028] The distance image sensor 32 distributes the charges generated by the photoelectric conversion elements to the respective charge accumulation units CS in accordance with control from the measurement control unit 43. The distance image sensor 32 also outputs pixel signals according to the amounts of charges distributed to the charge accumulation units CS. The distance image sensor 32 has a plurality of pixel circuits 321 arranged in a two-dimensional matrix, and outputs pixel signals for one frame corresponding to each pixel circuit 321.

[0029] The detailed configuration of the range image sensor 32 will now be described with reference to Fig. 2. Fig. 2 is a block diagram showing an example of the range image sensor 32 in this embodiment.

[0030] 2 , the distance image sensor 32 includes, for example, a light receiving area 320 in which a plurality of pixel circuits 321 are arranged, and a pixel drive circuit 322. The pixel drive circuit 322 also includes a transfer control circuit 327 having a distribution operation, a vertical scanning circuit 323, a horizontal scanning circuit 324, a pixel signal processing circuit 325, and a control circuit 326.

[0031] The light receiving region 320 is a region in which a plurality of pixel circuits 321 are arranged, and in FIG. 2, an example is shown in which the pixel circuits are arranged in a two-dimensional matrix of 8 rows and 8 columns.

[0032] A plurality of pixel circuits 321 are arranged in a two-dimensional matrix, and accumulate electric charges corresponding to the amount of light received. The detailed configuration of the pixel circuits 321 will be described later with reference to FIG.

[0033] The control circuit 326 comprehensively controls the range image sensor 32. The control circuit 326 controls the operation of the components of the range image sensor 32, for example, in response to instructions from the measurement control unit 43 of the range image processing unit 4. Note that the components of the range image sensor 32 may be directly controlled by the measurement control unit 43, in which case the control circuit 326 may be omitted.

[0034] The vertical scanning circuit 323 is a circuit that controls the pixel circuits 321 arranged in the light receiving region 320 for each row in accordance with control from the control circuit 326. The vertical scanning circuit 323 outputs a voltage signal corresponding to the amount of charge accumulated in each charge accumulation unit CS of the pixel circuit 321 to the pixel signal processing circuit 325.

[0035] The transfer control circuit 327 distributes and stores the electric charges converted by the photoelectric conversion elements in the respective charge storage units CS of the pixel circuits 321. That is, the transfer control circuit 327 conducts a transfer transistor G (described later) to each of the charge storage units CS (CS1 to CS4), and distributes and stores the electric charges.

[0036] The pixel signal processing circuit 325 performs predetermined signal processing (for example, noise suppression processing, A / D conversion processing, etc.) on the voltage signals output from the pixel circuits 321 of each column in accordance with control from the control circuit 326.

[0037] Horizontal scanning circuit 324 is a circuit that sequentially outputs signals output from pixel signal processing circuit 325 in time series under control of control circuit 326. As a result, pixel signals corresponding to the amount of charge accumulated for one frame are sequentially output to distance image processing unit 4. In the following explanation, it is assumed that pixel signal processing circuit 325 performs A / D conversion processing and that the pixel signals are digital signals.

[0038] Next, the configuration of the pixel circuit 321 arranged in the light receiving region 320 of the distance image sensor 32 will be described with reference to FIG.

[0039] Fig. 3 is a block diagram showing an example of a pixel circuit 321 according to this embodiment. The pixel circuit 321 shown in Fig. 3 is an example configuration including four pixel signal readout units RU (RU1 to RU4).

[0040] As shown in FIG. 3, the pixel circuit 321 includes one photoelectric conversion element PD, a charge discharging transistor GD, four pixel signal readout units RU (RU1 to RU4) that output voltage signals from corresponding output terminals, a reset transistor RT0, a source follower transistor SF, and a selection transistor SL.

[0041] Each pixel signal readout unit RU includes a transfer transistor G, a floating diffusion FD, a capacitor C, and a switch transistor SW. The floating diffusion FD and the capacitor C form a charge storage unit CS.

[0042] The transfer transistors G are, for example, NMOS (N-Channel Metal-Oxide Semiconductor) transistors, and are provided corresponding to each of the multiple charge storage units CS. The transfer transistors G transfer charges from the photoelectric conversion elements PD to the respective charge storage units CS. The transfer transistors G are driven by a storage drive signal TX, and their conduction states are controlled.

[0043] The capacitor C is, for example, a capacitor that utilizes the electrostatic capacitance between the source terminal and the drain terminal of an NMOS transistor and the gate terminal, and stores the charge transferred from the photoelectric conversion element PD.

[0044] The switch transistors SW (an example of switching transistors) are, for example, depletion-type NMOS transistors, and are provided corresponding to each of the multiple charge storage units CS. The switch transistors SW switch between and connect each charge storage unit CS to the common signal line CL (node ​​FD0), and output charge from the charge storage unit CS to the common signal line CL (node ​​FD0). The switch transistors SW are driven by a switch drive signal RX, and their conduction state is controlled. When the switch transistors SW are placed in a conductive state by the switch drive signal RX, they bring the charge storage unit CS (floating diffusion FD) and the common signal line CL (node ​​FD0) into conduction.

[0045] 3, the pixel signal readout unit RU1, which outputs a signal to a node FD0 that is a common signal line CL, includes a transfer transistor G1, a floating diffusion FD1, a capacitor C1, and a switch transistor SW1. In the pixel signal readout unit RU1, the floating diffusion FD1 and the capacitor C1 form a charge storage unit CS1. The pixel signal readout units RU2 to RU4 have a similar configuration.

[0046] The photoelectric conversion element PD is a buried photodiode that photoelectrically converts incident light to generate charges corresponding to the incident light (incident light), and accumulates the generated charges. In this embodiment, the incident light is incident from the space to be measured.

[0047] The charge drain transistor GD is, for example, an NMOS transistor, and drains charge from the photoelectric conversion element PD. The charge drain transistor GD is driven by a drive signal RSTD, and its conduction state is controlled. When the drive signal RSTD turns the charge drain transistor GD into a conduction state, the charge generated in the photoelectric conversion element PD flows to the power supply VDD, thereby discharging the charge (erasing the charge).

[0048] The reset transistor RT0 is, for example, a depletion-type NMOS transistor, and is connected between the power supply line of the power supply VDD and the common signal line CL (node ​​FD0). The reset transistor RT0 resets the charge storage unit CS to a predetermined potential (the potential of the power supply VDD) via the common signal line CL (node ​​FD0) and the switch transistor SW. The reset transistor RT0 is driven by a drive signal RST0, and its conduction state is controlled. When the reset transistor RT0 becomes conductive due to the drive signal RST0, the charge stored in the common signal line CL (node ​​FD0) and the charge storage unit CS flows to the power supply VDD, resetting the transistor (erasing the charge).

[0049] The source follower transistor SF is, for example, an NMOS transistor, and is connected to the common signal line CL (node ​​FD0), and converts the amount of charge in the charge storage unit CS into a voltage signal via the common signal line CL (node ​​FD0) and the switch transistor SW. Note that one source follower transistor SF is provided for one pixel circuit 321 (plurality of charge storage units CS).

[0050] The selection transistor SL is, for example, an NMOS transistor, and selects the pixel circuit 321. The selection transistor SL is driven by a drive signal SEL, and its conduction state is controlled. When the selection transistor SL is made conductive by the drive signal SEL, it outputs the voltage signal converted by the source follower transistor SF to the output signal line V_PIXOUT.

[0051] In the pixel circuit 321, the photoelectric conversion element PD photoelectrically converts incident light to generate electric charges, which are then distributed to each of the four charge storage sections CS (CS1 to CS4), and voltage signals corresponding to the amount of electric charge distributed are output to the pixel signal processing circuit 325.

[0052] Furthermore, the configuration of the pixel circuits 321 arranged in the distance image sensor 32 is not limited to the configuration having four pixel signal readout units RU (RU1 to RU4) as shown in Fig. 3, but may have four or more pixel signal readout units RU. By having four or more pixel signal readout units RU, it becomes possible to measure the distance to a target that is further away.

[0053] Furthermore, in driving the pixel circuit 321, a light pulse PO is emitted at an emission time To, and reflected light RL is received by the distance image sensor 32 after a delay time Td. Under the control of the measurement control unit 43, the pixel drive circuit 322 synchronizes with the emission of the light pulse PO according to a frame period, and distributes the charges generated in the photoelectric conversion element PD by supplying accumulation drive signals TX1 to TX4 to the transfer transistors G (G1, G2, G3, G4) at their respective timings, causing the charges to be accumulated in the charge accumulation units CS1, CS2, CS3, CS4 in that order. Note that a light pulse is emitted multiple times within one frame.

[0054] The pixel drive circuit 322 controls the reset transistor RT0, the switch transistor SW, and the selection transistor SL using a drive signal RST, a switch drive signal RX, and a drive signal SEL, respectively, converts the charges accumulated in the charge storage unit CS into an electrical signal (voltage signal) using a source follower transistor SF, reads out the generated electrical signal (voltage signal) via an output signal line V_PIXOUT, and outputs a pixel signal based on the electrical signal (voltage signal) to the distance calculation unit 42.

[0055] Furthermore, under the control of the measurement control unit 43, the pixel driving circuit 322 causes the charges generated in the photoelectric conversion element PD to flow to the power supply VDD in response to the driving signal RSTD, thereby discharging the charges (erasing the charges).

[0056] 1 , the distance image processor 4 controls the distance image capture device 1 and calculates the distance to the object OB. Based on the amount of charge stored in each charge storage unit CS, the distance image processor 4 measures the distance to the object OB present in the measurement space as the measured distance. The distance image processor 4 also includes a timing controller 41, a distance calculator 42, and a measurement controller 43.

[0057] The timing control unit 41 controls the timing of outputting various control signals required for measurement in accordance with the control of the measurement control unit 43. The various control signals here include, for example, a signal that controls the irradiation of the light pulse PO, a signal that distributes and accumulates the reflected light RL in multiple charge accumulation units CS, and a signal that controls the number of accumulations per frame. The number of accumulations is the number of times that the process of distributing and accumulating electric charge in the charge accumulation units CS is repeated, and is a predetermined number of distributions per frame period. The product of this number of accumulations and the time duration (accumulation time duration) for accumulating electric charge in each charge accumulation unit CS per process of distributing and accumulating electric charge is the exposure time.

[0058] The distance calculation unit 42 outputs distance information calculated based on the pixel signals output from the distance image sensor 32. The distance calculation unit 42 calculates the delay time from when the light pulse PO is emitted until when the reflected light RL is received based on the amount of charge accumulated in the multiple charge accumulation units CS. The distance calculation unit 42 calculates the distance to the object OB according to the calculated delay time.

[0059] The distance calculation unit 42 calculates the delay time Td using the following formula (1) by utilizing the fact that the amount of charge corresponding to the reflected light RL component is divided and stored in the two charge storage units CS at a ratio corresponding to the delay time Td until the reflected light RL is incident on the distance image capturing device 1. The distance calculation unit 42 calculates the round-trip distance to the subject OB by multiplying the delay time Td calculated using formula (1) by the speed of light (velocity). The distance calculation unit 42 then calculates the distance to the subject OB by dividing the calculated round-trip distance by 1 / 2. Note that formula (1) assumes that the amount of charge corresponding to the external light (light pulse PO) component is accumulated in the charge storage unit CS1, and the amount of charge corresponding to the reflected light RL component is divided and stored in the two charge storage units CS2 and CS3.

[0060] Td=To×(Q3−Q1) / (Q2+Q3−2×Q1) (1) where To is the period during which the light pulse PO is irradiated. Q1 is the amount of charge accumulated in the charge accumulation unit CS1. Q2 is the amount of charge accumulated in the charge accumulation unit CS2. Q3 is the amount of charge accumulated in the charge accumulation unit CS3.

[0061] The example shown in formula (1) shows an example in which the amount of charge of the reflected light RL is divided and stored in two charge storage units CS2 and CS3, with the amount of charge corresponding to the reflected light RL component being distributed. Therefore, for example, if the reflected light RL is stored in two charge storage units CS1 and CS2 or two charge storage units CS3 and CS4, the basic method for calculating the delay time Td from the ratio of the amount of charge stored in the two charge storage units CS is the same, although the results are slightly different.

[0062] The measurement control unit 43 controls the timing control unit 41. For example, the measurement control unit 43 sets the number of accumulations and accumulation time width for one frame, and controls the timing control unit 41 so that imaging is performed according to the set contents. In other words, the measurement control unit 43 sets a frame period including multiple subframe periods, and controls the timing control unit 41 so that imaging is performed according to the set contents.

[0063] With this configuration, in the distance image capturing device 1, the light source unit 2 irradiates a light pulse PO in the near-infrared wavelength band onto the subject OB, and the light receiving unit 3 receives the reflected light RL reflected by the subject OB, and the distance image processing unit 4 outputs distance information (distance image) measuring the distance to the subject OB.

[0064] Next, the operation of the distance image sensor 32 according to this embodiment will be described with reference to the drawings. Fig. 4 is a timing chart showing an example of control of the pixel circuit 321 according to this embodiment.

[0065] 4, waveforms W1 to W7 indicate the states of the charge discharging transistor GD, transfer transistor G1, transfer transistor G2, selection transistor SL, reset transistor RT0, switch transistor SW1, and switch transistor SW2, respectively. In waveforms W1 to W7, the H (High) state indicates the ON state (conductive state), and the L (Low) state indicates the OFF state (non-conductive state).

[0066] Waveforms W8 to W11 represent the voltages of the floating diffusion FD1, the floating diffusion FD2, the node FD0 (common signal line CL), and the output signal line V_PIXOUT, respectively. The horizontal axis of each of the waveforms W1 to W11 represents time.

[0067] First, during a period TR1 from time T1 to time T2, the pixel drive circuit 322 drives the charge discharging transistor GD, transfer transistor G1, and transfer transistor G2 (see waveforms W1 to W3) under the control of the timing control unit 41 to distribute charge from the photoelectric conversion element PD and accumulate it in the charge accumulation unit CS (CS1, CS2) (see waveforms W8 and W9). Here, the period TR1 is an exposure period.

[0068] Next, at time T3, the pixel drive circuit 322 turns on the selection transistor SL (see waveform W4), connects the output of the source follower transistor SF to the output signal line V_PIXOUT, and resets the node FD0 (common signal line CL) using the reset transistor RT0, which was previously turned on.

[0069] Next, at time T4, the pixel drive circuit 322 turns off the reset transistor RT0 (see waveform W5), completing the initialization of the node FD0 (common signal line CL). Note that the period TR2 from time T3 to time T4 is the initialization period.

[0070] Next, at time T5, the pixel drive circuit 322 turns on the switch transistor SW1 (see waveform W6) and connects the floating diffusion FD1 to the node FD0 (common signal line CL) (see waveform W10). This causes the source follower transistor SF to output a voltage signal corresponding to the amount of charge in the floating diffusion FD1 to the output signal line V_PIXOUT via the selection transistor SL (see waveform W11).

[0071] Next, at time T6, the pixel drive circuit 322 turns on the reset transistor RT0 (see waveform W5) and resets the floating diffusion FD1 (see waveform W8).

[0072] Next, at time T7, the pixel drive circuit 322 turns off the reset transistor RT0 (see waveform W5), and at time T8, the pixel drive circuit 322 turns off the switch transistor SW1 (see waveform W6), ending the readout period of the floating diffusion FD1. Note that the period TR3 from time T5 to time T6 is the signal readout period of the floating diffusion FD1, and the period TR4 from time T6 to time T7 is the reset period of the floating diffusion FD1. Furthermore, the period TR5 from time T7 to time T8 is the reset readout period of the floating diffusion FD1. The pixel signal processing circuit 325 reads out, as the pixel output, the difference between the voltage signal level of the signal readout of the floating diffusion FD1 during period TR3 and the reset level of the reset readout during period TR5.

[0073] Next, at time T9, the pixel drive circuit 322 turns on the reset transistor RT0 (see waveform W5), and at time T10, turns off the reset transistor RT0 (see waveform W5) to initialize the node FD0 (common signal line CL). Note that a period TR6 from time T9 to time T10 is an initialization period.

[0074] Next, at time T11, the pixel drive circuit 322 turns on the switch transistor SW2 (see waveform W7) and connects the floating diffusion FD2 to the node FD0 (common signal line CL) (see waveform W10). This causes the source follower transistor SF to output a voltage signal corresponding to the amount of charge in the floating diffusion FD2 to the output signal line V_PIXOUT via the selection transistor SL (see waveform W11).

[0075] Next, at time T12, the pixel drive circuit 322 turns on the reset transistor RT0 (see waveform W5) and resets the floating diffusion FD2 (see waveform W9).

[0076] Next, at time T13, the pixel drive circuit 322 turns off the reset transistor RT0 (see waveform W5), and at time T14, the pixel drive circuit 322 turns off the switch transistor SW2 (see waveform W7), ending the readout period of the floating diffusion FD2. Note that the period TR7 from time T11 to time T12 is the signal readout period of the floating diffusion FD2, and the period TR8 from time T12 to time T13 is the reset period of the floating diffusion FD2. Furthermore, the period TR9 from time T13 to time T14 is the reset readout period of the floating diffusion FD2. The pixel signal processing circuit 325 reads out, as the pixel output, the difference between the voltage signal level of the signal readout of the floating diffusion FD2 during period TR7 and the reset level of the reset readout during period TR9.

[0077] Although FIG. 4 only shows the readout of the floating diffusions FD1 and FD2, the readout of the floating diffusions FD3 and FD4 is similar, and therefore the description thereof will be omitted here.

[0078] 5 to 7, the operation of the pixel circuit 321 will be described in detail using an equivalent model MD1 of the pixel circuit 321. Fig. 5 is a diagram showing the equivalent model MD1 of the pixel circuit 321 in this embodiment.

[0079] 5, a partial circuit SP1 of the pixel circuit 321 can be expressed as an equivalent model MD1. The partial circuit SP1 includes a floating diffusion FD1 and a capacitor C1, a switch transistor SW1, a floating diffusion FD2 and a capacitor C2, a switch transistor SW2, a floating diffusion FD3 and a capacitor C3, a switch transistor SW3, a floating diffusion FD4 and a capacitor C4, a switch transistor SW4, a node FD0 (common signal line CL), and a reset transistor RT0.

[0080] In the equivalent model MD1, the capacitor C ＦＤ０ indicates a parasitic capacitance such as a wiring capacitance at the node FD0 (common signal line CL).

[0081] 6 is a first diagram illustrating an example of the operation of the pixel circuit 321 according to this embodiment. The readout operation of the floating diffusion FD1 of the pixel circuit 321 will be described with reference to FIG.

[0082] 6A shows the state of initialization processing of node FD0 (common signal line CL) during readout of floating diffusion FD1 of pixel circuit 321. In initialization processing of node FD0 (common signal line CL), pixel drive circuit 322 turns switch transistors SW1 to SW4 off and turns reset transistor RT0 on. This connects node FD0 (common signal line CL) to the power supply line of power supply VDD, and node FD0 (common signal line CL) is initialized to the potential of power supply VDD.

[0083] 6(b) shows the state of the signal readout process of the floating diffusion FD1 of the pixel circuit 321. In the signal readout process of the floating diffusion FD1, the pixel drive circuit 322 turns on the switch transistor SW1 and turns off the switch transistors SW2 to SW4 and the reset transistor RT0. This connects the node FD0 (common signal line CL) and the floating diffusion FD1, the node FD0 (common signal line CL) becomes the signal of the floating diffusion FD1, and the source follower transistor SF outputs a voltage signal corresponding to the amount of charge in the floating diffusion FD1.

[0084] 6(c) shows the state of the reset process of the floating diffusion FD1 of the pixel circuit 321. In the reset process of the floating diffusion FD1, the pixel drive circuit 322 turns on the switch transistor SW1 and the reset transistor RT0, and turns off the switch transistors SW2 to SW4. This connects the node FD0 (common signal line CL), the floating diffusion FD1, and the power supply line of the power supply VDD, and the floating diffusion FD1 is reset to the potential of the power supply VDD via the node FD0 (common signal line CL) and the switch transistor SW1.

[0085] 6(d) shows the state of the reset readout process of the floating diffusion FD1 of the pixel circuit 321. In the reset readout process of the floating diffusion FD1, the pixel drive circuit 322 turns on the switch transistor SW1 and turns off the switch transistors SW2 to SW4 and the reset transistor RT0. This connects the node FD0 (common signal line CL) and the floating diffusion FD1, and the source follower transistor SF outputs a voltage signal corresponding to the reset state of the floating diffusion FD1 and the node FD0 (common signal line CL).

[0086] The level of the voltage signal acquired by reset readout of the floating diffusion FD1 is used to correct the amount of charge of the floating diffusion FD1. The distance calculation unit 42 can obtain an accurate pixel output by calculating the difference between the voltage signal level of the floating diffusion FD1 and the reset level of the reset readout.

[0087] 7 is a second diagram illustrating an example of the operation of the pixel circuit 321 according to this embodiment. The readout operation of the floating diffusion FD2 of the pixel circuit 321 will be described with reference to FIG.

[0088] 7A shows the state of initialization processing of node FD0 (common signal line CL) during readout of floating diffusion FD2 of pixel circuit 321. In initialization processing of node FD0 (common signal line CL), pixel drive circuit 322 turns switch transistors SW1 to SW4 off and turns reset transistor RT0 on. This connects node FD0 (common signal line CL) to the power supply line of power supply VDD, and node FD0 (common signal line CL) is initialized to the potential of power supply VDD.

[0089] 7(b) shows the state of the signal readout process of the floating diffusion FD2 of the pixel circuit 321. In the signal readout process of the floating diffusion FD2, the pixel drive circuit 322 turns on the switch transistor SW2 and turns off the switch transistors SW1, SW3, SW4, and reset transistor RT0. This connects the node FD0 (common signal line CL) and the floating diffusion FD2, the node FD0 (common signal line CL) becomes the signal of the floating diffusion FD2, and the source follower transistor SF outputs a voltage signal corresponding to the amount of charge of the floating diffusion FD2.

[0090] 7(c) shows the state of the reset process of the floating diffusion FD2 of the pixel circuit 321. In the reset process of the floating diffusion FD2, the pixel drive circuit 322 turns on the switch transistor SW2 and the reset transistor RT0, and turns off the switch transistors SW1, SW3, and SW4. This connects the node FD0 (common signal line CL), the floating diffusion FD2, and the power supply line of the power supply VDD, and the floating diffusion FD2 is reset to the potential of the power supply VDD via the node FD0 (common signal line CL) and the switch transistor SW2.

[0091] 7(d) shows the state of the reset readout process of the floating diffusion FD2 of the pixel circuit 321. In the reset readout process of the floating diffusion FD2, the pixel drive circuit 322 turns on the switch transistor SW2 and turns off the switch transistors SW1, SW3, SW4, and reset transistor RT0. This connects the node FD0 (common signal line CL) and the floating diffusion FD2, and the source follower transistor SF outputs a voltage signal corresponding to the reset state of the floating diffusion FD2 and the node FD0 (common signal line CL).

[0092] 6 and 7, the floating diffusion FD1 and the floating diffusion FD2 have been described, but the same applies to the floating diffusion FD3 and the floating diffusion FD4, and therefore the description thereof will be omitted here.

[0093] Furthermore, although omitted in the above equivalent model MD1, a read select transistor SL is connected to node FD0 (common signal line CL), and the voltage signals of floating diffusions FD1 to FD4 can be read out using the select transistor SL common to floating diffusions FD1 to FD4.

[0094] Next, the effect of the range image sensor 32 according to this embodiment will be described with reference to Fig. 8. Fig. 8 is a diagram showing an example of the effect of the range image sensor 32 according to this embodiment.

[0095] The graph shown in FIG. 8 shows a histogram of the ratio of sensitivities when reading out the floating diffusion FD2 and the floating diffusion FD3.

[0096] In Fig. 8, histogram HG1 shows a histogram of the sensitivity ratio in the range image sensor 32 according to this embodiment, and histogram HG2 shows, for comparison, a histogram of the sensitivity ratio in the range image sensor of the prior art shown in Fig. 10. In the graph shown in Fig. 8, the horizontal axis represents the sensitivity ratio, and the vertical axis represents the frequency.

[0097] 8, the range image sensor 32 according to this embodiment uses a single source follower transistor SF that is switchable between the floating diffusions FD1 and FD2, so the variation D1 in the sensitivity ratio of the range image sensor 32 is significantly smaller than the variation D2 in the sensitivity ratio of range image sensors of the prior art. As a result, the range image sensor 32 according to this embodiment reduces the variation between the floating diffusions FD due to the source follower transistor SF, making it possible to accurately detect the amount of charge and improve the accuracy of distance measurement.

[0098] Next, a modified example of the operation of the pixel circuit 321 in this embodiment will be described with reference to Fig. 9. Fig. 9 is a diagram showing a modified example of the operation of the pixel circuit 321 in this embodiment.

[0099] FIG. 9 illustrates a modified example in which two or more switch transistors SW are simultaneously turned on to read out the charge amounts of two or more charge storage sections CS.

[0100] Part (a) of FIG. 9 shows the state of initialization processing of the node FD0 (common signal line CL) when the floating diffusion FD1 and the floating diffusion FD2 of the pixel circuit 321 are simultaneously read out.

[0101] In the initialization process for node FD0 (common signal line CL), the pixel drive circuit 322 turns off the switch transistors SW1 to SW4 and turns on the reset transistor RT0, thereby connecting node FD0 (common signal line CL) to the power supply line of the power supply VDD, and the node FD0 (common signal line CL) is initialized to the potential of the power supply VDD.

[0102] 9(b) shows the state of the signal readout process of the floating diffusion FD1 and the floating diffusion FD2 of the pixel circuit 321. In the signal readout process of the floating diffusion FD1, the pixel drive circuit 322 turns on the switch transistors SW1 and SW2 and turns off the switch transistors SW3, SW4, and the reset transistor RT0. As a result, the node FD0 (common signal line CL) is connected to the floating diffusion FD1 and the floating diffusion FD2, the node FD0 (common signal line CL) becomes equal to the average potential of the floating diffusion FD1 and the floating diffusion FD2 (a potential corresponding to the added amount of charge), and the source follower transistor SF outputs a voltage signal (average voltage signal) corresponding to the added amount of charge of the floating diffusion FD1 and the floating diffusion FD2.

[0103] 9(c) shows the state of the reset process of the floating diffusion FD1 and the floating diffusion FD2 of the pixel circuit 321. In the reset process of the floating diffusion FD1 and the floating diffusion FD2, the pixel drive circuit 322 turns on the switch transistor SW1, the switch transistor SW2, and the reset transistor RT0, and turns off the switch transistor SW3 and the switch transistor SW4. This connects the node FD0 (common signal line CL), the floating diffusion FD1, the floating diffusion FD2, and the power supply line of the power supply VDD, and the floating diffusion FD1 and the floating diffusion FD2 are reset to the potential of the power supply VDD via the node FD0 (common signal line CL), the switch transistor SW1, and the switch transistor SW2.

[0104] 9(d) shows the state of the reset readout process of the floating diffusion FD1 and the floating diffusion FD2 of the pixel circuit 321. In the reset readout process of the floating diffusion FD1 and the floating diffusion FD2, the pixel drive circuit 322 turns on the switch transistors SW1 and SW2 and turns off the switch transistors SW3, SW4, and the reset transistor RT0. This connects the node FD0 (common signal line CL) to the floating diffusion FD1 and the floating diffusion FD2, and the source follower transistor SF outputs a voltage signal corresponding to the reset state of the floating diffusion FD1, the floating diffusion FD2, and the node FD0 (common signal line CL).

[0105] In this way, the pixel driving circuit 322 may simultaneously turn on two or more switch transistors SW to output voltage signals according to the amounts of charge in two or more charge storage sections CS.

[0106] As described above, the distance image sensor 32 (distance image pickup element) according to this embodiment includes a plurality of pixel circuits 321 each having a photoelectric conversion element PD that generates charge in response to incident light and a charge storage unit CS that stores the charge, and a pixel drive circuit 322 that drives the pixel circuits 321. Each pixel circuit 321 includes one photoelectric conversion element PD, multiple charge storage units CS, a transfer transistor G, a switch transistor SW (switching transistor), a reset transistor RT0, and one source follower transistor SF. The transfer transistor G corresponds to each of the multiple charge storage units CS and transfers charge from the photoelectric conversion element PD to the respective charge storage unit CS. The switch transistor SW (switching transistor) corresponds to each charge storage unit CS and switches between the respective charge storage units CS and the common signal line CL (node ​​FD0), outputting charge from the charge storage unit CS to the common signal line CL (node ​​FD0). The reset transistor RT0 is connected to the common signal line CL (node ​​FD0) and resets the charge storage unit CS to a predetermined potential (e.g., the potential of the power supply VDD) via the common signal line and the switch transistor SW. The source follower transistor SF is connected to the common signal line CL (node ​​FD0) and converts the amount of charge in the charge storage unit CS into a voltage signal via the common signal line CL (node ​​FD0) and the switch transistor SW. The pixel drive circuit 322 uses the transfer transistor G to distribute and store charge in each of the charge storage units CS in the pixel circuit 321, and uses the switch transistor SW to output a voltage signal corresponding to the amount of charge in each charge storage unit CS.

[0107] As a result, the range image sensor 32 (distance image pickup element) according to this embodiment uses a single source follower transistor SF in common for multiple charge accumulation units CS (floating diffusions FD) (as multiple source follower transistors SF are not used), and therefore can accurately detect the amount of charge without being affected by variations in performance of the source follower transistors SF. As shown in Figure 8 above, the range image sensor 32 (distance image pickup element) according to this embodiment can reduce measurement variations (variations in sensitivity) of the charge accumulation units CS (floating diffusions FD), and can improve the accuracy of distance measurement.

[0108] Furthermore, in this embodiment, the switch transistor SW and the reset transistor RT0 are depletion-type NMOS transistors. By using depletion-type NMOS transistors, the range image sensor 32 according to this embodiment can reduce the voltage drop caused by the NMOS transistors when reading and resetting the charge in the charge storage unit CS (floating diffusion FD). Therefore, the range image sensor 32 according to this embodiment can increase the dynamic range and improve the accuracy of distance measurement.

[0109] In this embodiment, the plurality of charge storage units CS may be four or more charge storage units CS. In this case, four or more sets of a charge storage unit CS, a transfer transistor G, and a switch transistor SW are connected to one photoelectric conversion element PD.

[0110] The distance image sensor 32 according to this embodiment can accurately detect the amount of charge even if there are four or more charge storage sections CS, because it uses a common source follower transistor SF, thereby improving the accuracy of distance measurement.

[0111] In this embodiment, the pixel circuit 321 also includes a charge drain transistor GD that drains charge from the photoelectric conversion element PD, which allows the range image sensor 32 according to this embodiment to properly initialize (reset) the photoelectric conversion element PD.

[0112] In this embodiment, the pixel driving circuit 322 may simultaneously turn on two or more switch transistors SW to output voltage signals according to the amounts of charge in two or more charge storage sections CS.

[0113] As a result, the range image sensor 32 according to this embodiment can increase the amount of charge to be measured by simultaneously turning on two or more switch transistors SW, and can reduce the effect of shot noise contained in the charge converted by the photoelectric conversion element PD. Therefore, the range image sensor 32 according to this embodiment can improve the S / N ratio and further improve the accuracy of distance measurement.

[0114] The distance image capturing device 1 according to this embodiment includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. The light source unit 2 irradiates a measurement space, which is the space to be measured, with a light pulse PO. The light receiving unit 3 has the above-described distance image sensor 32, and distributes and accumulates electric charge in each charge accumulation unit CS in the pixel circuit 321 at timing synchronized with the irradiation of the light pulse PO. The distance image processing unit 4 controls the irradiation timing of the light pulse PO and the accumulation timing of the distribution of electric charge in each charge accumulation unit CS, and measures the distance to an object OB present in the measurement space based on the amount of electric charge accumulated in each charge accumulation unit CS, thereby generating a distance image. As a result, the distance image capturing device 1 according to this embodiment achieves the same effects as the above-described distance image sensor 32, improving the accuracy of distance measurement.

[0115] The present invention is not limited to the above-described embodiments and may be modified within the scope of the present invention as defined in the claims. For example, in the above-described embodiments, the photoelectric conversion element PD is an embedded photodiode that photoelectrically converts incident light to generate electric charges and stores the generated electric charges. However, the present invention is not limited to this. It is desirable to select a structure for the photoelectric conversion element PD that has high photoelectric conversion efficiency in terms of the distance measurement accuracy of the distance image capture element. The photoelectric conversion element PD may be, for example, a PN photodiode having a structure in which a P-type semiconductor and an N-type semiconductor are joined together, or a PIN photodiode having a structure in which an I-type semiconductor is sandwiched between a P-type semiconductor and an N-type semiconductor. Furthermore, the photoelectric conversion element PD is not limited to a photodiode and may be, for example, a photogate-type photoelectric conversion element.

[0116] In the above embodiment, the reset transistor RT0, the source follower transistor SF, the transfer transistor G, the selection transistor SL, the switch transistor SW, and the charge discharging transistor GD are each an NMOS transistor, but this is not limitative and other transistors such as a PMOS transistor may also be used.

[0117] In the above embodiment, the switch transistor SW and the reset transistor RT0 are depletion-mode NMOS transistors, but the present invention is not limited to this and may be enhancement-mode NMOS transistors. Furthermore, in the above embodiment, the switch transistor SW and the reset transistor RT0 may be depletion-mode PMOS transistors or enhancement-mode PMOS transistors.

[0118] In the above embodiment, the capacitors C (C1 to C4) are implemented using NMOS transistors, but the present invention is not limited to this and other types of capacitors may be used.

[0119] Furthermore, in the above embodiment, an example has been described in which the pixel circuit 321 includes the charge discharging transistor GD, but this is not limitative, and the pixel circuit 321 may be configured not to include the charge discharging transistor GD.

[0120] Each component of the distance image capturing device 1 or pixel drive circuit 322 described above has an internal computer system. A program for realizing the functions of each component of the distance image capturing device 1 or pixel drive circuit 322 described above may be recorded on a computer-readable recording medium, and the program recorded on the recording medium may be read into a computer system and executed to perform processing in each component of the distance image capturing device 1 or pixel drive circuit 322 described above. Here, "reading a program recorded on a recording medium into a computer system and executing it" includes installing the program into a computer system. The "computer system" referred to here includes hardware such as an OS and peripheral devices.

[0121] Furthermore, a "computer system" may include multiple computer devices connected via a network, including communication lines such as the Internet, WAN, LAN, and dedicated lines. Furthermore, a "computer-readable recording medium" refers to portable media such as flexible disks, optical magnetic disks, ROMs, and CD-ROMs, as well as storage devices such as hard disks built into a computer system. Thus, the recording medium storing the program may be a non-transitory recording medium such as a CD-ROM.

[0122] The recording medium also includes internal or external recording media accessible from a distribution server for distributing the program. The program may be divided into multiple parts, downloaded at different times, and then combined into components of the range image capture device 1 or pixel drive circuit 322. Alternatively, each divided program may be distributed by a different distribution server. Furthermore, the term "computer-readable recording medium" also includes recording media that retain a program for a certain period of time, such as volatile memory (RAM) within a computer system that serves as a server or client when a program is transmitted over a network. The program may also be a program for implementing part of the above-described functions. Furthermore, the program may be a so-called differential file (differential program) that can realize the above-described functions in combination with a program already stored in the computer system.

[0123] Furthermore, some or all of the above-described functions may be realized as an integrated circuit such as an LSI (Large Scale Integration). Each of the above-described functions may be individually implemented as a processor, or some or all of the functions may be integrated into a processor. Furthermore, the integrated circuit implementation method is not limited to LSI, and may be implemented using a dedicated circuit or a general-purpose processor. Furthermore, if an integrated circuit implementation technology that can replace LSI emerges due to advances in semiconductor technology, an integrated circuit based on that technology may be used.

[0124] DESCRIPTION OF SYMBOLS 1...Distance image capturing device 2...Light source unit 3...Light receiving unit 4...Distance image processing unit 21...Light source device 22...Diffuser 31...Lens 32...Distance image sensor 41...Timing control unit 42...Distance calculation unit 43...Measurement control unit 320...Light receiving area 321...Pixel circuit 322...Pixel drive circuit 323...Vertical scanning circuit 324...Horizontal scanning circuit 325...Pixel signal processing circuit 326...Control circuit 327...Transfer control circuit C1, C2, C3, C4...Capacitor CL...Common signal line CS, CS1, CS2, CS3, CS4...Charge storage unit FD, FD1, FD2, FD3, FD4...Floating diffusion G, G1, G2, G3, G4...Transfer transistor GD...Charge discharge transistor OB...Object PD...Photoelectric conversion element PO...Light pulse RL...Reflected light RT0: Reset transistor SF, SF1, SF2, SF3, SF4: Source follower transistors SL: Select transistor SW, SW1, SW2, SW3, SW4: Switch transistors

Claims

1. A pixel driving circuit for driving each of the pixel circuits, the pixel circuits including a photoelectric conversion element that generates a charge according to incident light and a charge accumulation section that accumulates the charge, and a pixel driving circuit for driving each of the pixel circuits, wherein each of the pixel circuits includes: one of the photoelectric conversion elements; a plurality of the charge accumulation sections; a plurality of transfer transistors corresponding to each of the charge accumulation sections, the transfer transistors transferring the charge from the photoelectric conversion element to each of the charge accumulation sections; a plurality of switching transistors corresponding to each of the charge accumulation sections, the switching transistors connecting each of the charge accumulation sections to a common signal line and outputting the charge from each of the charge accumulation sections to the common signal line; a reset transistor connected to the common signal line, resetting the charge accumulation section to a predetermined potential via the common signal line and each of the switching transistors; and one source follower transistor connected to the common signal line, converting the amount of charge in the charge accumulation section into a voltage signal via the common signal line and each of the switching transistors. the pixel drive circuit uses each of the plurality of transfer transistors to distribute and store charge in each of the plurality of charge accumulation sections in the pixel circuit, and uses each of the plurality of switching transistors to output a voltage signal according to the amount of charge in each of the plurality of charge accumulation sections.

2. The distance imaging device according to claim 1, wherein each of the plurality of switching transistors and the reset transistor is a depletion-type NMOS transistor.

3. The distance imaging device according to claim 1, wherein each of the plurality of switching transistors and the reset transistor is a depletion-type PMOS transistor.

4. The distance image pickup element according to claim 1, wherein the plurality of charge accumulation sections are four or more charge accumulation sections, and four or more sets of the charge accumulation section, the transfer transistor, and the switching transistor are connected to one photoelectric conversion element.

5. The distance image pickup element according to claim 4, wherein the plurality of charge accumulation sections are four charge accumulation sections, and four sets of the charge accumulation section, the transfer transistor, and the switching transistor are connected to one photoelectric conversion element.

6. The distance imaging element according to claim 1, wherein each of the plurality of pixel circuits includes a charge drain transistor that drains the charge from the photoelectric conversion element.

7. The distance imaging element according to claim 1, wherein the pixel driving circuit simultaneously turns on two or more of the switching transistors to output a voltage signal according to the amount of charge in two or more of the charge storage sections.

8. A pixel circuit comprising: a photoelectric conversion element that generates a charge according to incident light and a charge accumulation section that accumulates the charge; and a pixel drive circuit that drives each of the pixel circuits, wherein each of the pixel circuits comprises: one of the photoelectric conversion elements; a plurality of the charge accumulation sections; a plurality of transfer transistors corresponding to each of the charge accumulation sections, each transferring the charge from the photoelectric conversion element to each of the charge accumulation sections; a plurality of switching transistors corresponding to each of the charge accumulation sections, each switching transistor connecting each of the charge accumulation sections to a common signal line and outputting the charge from each of the charge accumulation sections to the common signal line; a reset transistor connected to the common signal line and resetting the charge accumulation section to a predetermined potential via the common signal line and each of the switching transistors; and one source follower transistor connected to the common signal line and converting the amount of charge in the charge accumulation section into a voltage signal via the common signal line and each of the switching transistors. a pixel driving circuit that uses each of the plurality of transfer transistors to distribute and store charge in each of the plurality of charge accumulation sections in the pixel circuit, and that uses each of the plurality of switching transistors to output a voltage signal corresponding to the amount of charge in each of the plurality of charge accumulation sections; the plurality of charge accumulation sections are four charge accumulation sections; four sets of the charge accumulation section, the transfer transistor, and the switching transistor are connected to one photoelectric conversion element; and each of the plurality of pixel circuits includes a charge discharge transistor that discharges the charge from the photoelectric conversion element.

9. A distance imaging device comprising: a light source unit that irradiates a measurement space, which is a space to be measured, with a light pulse; a light receiving unit that has a distance imaging element according to any one of claims 1 to 5 and distributes and accumulates charge in each of the plurality of charge accumulation units in the plurality of pixel circuits at a timing synchronized with the irradiation of the light pulse; and a distance image processing unit that controls the irradiation timing of the light pulse and the accumulation timing of the distribution and accumulation of charge in each of the plurality of charge accumulation units, and measures the distance to a subject present in the measurement space based on the amount of charge accumulated in each of the plurality of charge accumulation units, and generates a distance image.

Images