Devices and methods of making and use thereof

Abstract

Disclosed herein are devices and methods of making and use thereof. For example, disclosed herein are devices comprising a dielectric layer comprising a first dielectric material, a semiconductor layer comprising a semiconductor material, a first and second electrode, and one or more trenches within the dielectric layer, the trenches being at least partially filled with a second dielectric material that is different than the first dielectric material. The dielectric layer is deposited on the semiconductor layer; the dielectric layer has a top surface opposite the semiconductor layer; the semiconductor layer has a bottom surface opposite the dielectric layer; and the first and second electrodes are arranged such that the device is a lateral device or a vertical device. Parameters of the devices are selected to control the electric field distribution when a bias is applied between the first and second electrodes.

Description

[0001] DEVICES AND METHODS OF MAKING AND USE THEREOF

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 567,705 filed March 20, 2024, which is hereby incorporated herein by reference in its entirety.

[0004] STATEMENT OF GOVERNMENT SUPPORT

[0005] This invention was made with government support under grant / contract no. FA9550-18- 1-0479 awarded by the Air Force Office of Scientific Research. The government has certain rights in the invention.

[0006] BACKGROUND

[0007] Devices with improved properties, such as improved breakdown performance and tunability of the device electrostatics. The compositions, methods, and devices discussed herein addresses these and other needs.

[0008] SUMMARY

[0009] In accordance with the purposes of the disclosed compositions, methods, and devices as embodied and broadly described herein, the disclosed subject matter relates to devices and methods of making and use thereof.

[0010] For example, disclosed herein are devices comprising a dielectric layer comprising a first dielectric material and having a first permittivity. The devices further comprise a semiconductor layer comprising a semiconductor material having a second permittivity. The devices further comprise a first electrode and a second electrode. The devices further comprise one or more trenches within the dielectric layer, the trenches being at least partially filled with a second dielectric material. The dielectric layer is deposited on the semiconductor layer. The dielectric layer has a top surface, the top surface of the dielectric layer being opposite the semiconductor layer. The semiconductor layer has a bottom surface, the bottom surface of the semiconductor layer being opposite the dielectric layer. The first and second electrodes are arranged such that the device is a lateral device or a vertical device. The second dielectric material is different than the first dielectric material, and the second dielectric material has a third permittivity. Parameters of the devices, such as parameters of the one or more trenches and / or the second dielectric material, are selected to control the electric field distribution when a bias is applied between the first and second electrodes, for example to provide a favorable electric field distribution.

[0011] In some examples, the semiconductor has p- or n-type conductivity. In some examples, the semiconductor material comprises a III-V or II- VI semiconductor material. In some examples, the semiconductor material comprises Ga2Ch, (Al,Ga)2O3, AlGaN, GaN, AIN, InGaN, SiC. Diamond, Boron nitride, Silicon, Germanium, SiGe, or a combination thereof. In some examples, the semiconductor material comprises Ga2Ch, (Al,Ga)2O3, or a combination thereof. In some examples, the semiconductor material comprises Ga2Ch. In some examples, the semiconductor material comprises P-Ga20s.

[0012] In some examples, the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof. In some examples, the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof. In some examples, the first dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof. In some examples, the first dielectric material comprises a high permittivity dielectric, such as BaTiCh. In some examples, the first dielectric material comprises a low permittivity dielectric, such as AI2O3.

[0013] In some examples, the dielectric layer has an average thickness of from 1 Angstrom (A) to 1 millimeter (mm). In some examples, the dielectric layer has an average thickness of from 10 nanometers to 10 micrometers.

[0014] In some examples, the first permittivity is higher than the second permittivity. In some examples, the first permittivity is higher than the second permittivity by a factor of 2 or more.

[0015] In some examples, the first permittivity is similar to the second permittivity.

[0016] In some examples, the first electrode and the second electrode are each independently be deposited on the dielectric layer and / or the semiconductor layer.

[0017] In some examples, the device has a top and a bottom, the bottom being opposite and spaced apart from the top. The top includes the dielectric layer and optionally portions of the semiconductor layer not covered by the dielectric layer. The bottom includes the bottom of the semiconductor layer (e.g., the opposite the dielectric layer).

[0018] In some examples, the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode and the second electrode are each located towards the top of the device (e.g., wherein the device is a lateral device).

[0019] In some examples, the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode is located towards the top of the device and the second electrode is located on the bottom of the device (e.g., wherein the device is a vertical device). In some examples, the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof. In some examples, the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof. In some examples, the second dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof. In some examples, the second dielectric material comprises a high permittivity dielectric, such as BaTiCh. In some examples, the second dielectric material comprises a low permittivity dielectric, such as AI2O3.

[0020] In some examples, the first dielectric material and the second dielectric material independently comprise BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof. In some examples, the first dielectric material comprises BaTiCh and the second dielectric material comprises AI2O3. In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises BaTiCh. In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises SiCh. In some examples, the first dielectric material comprises SiCh and the second dielectric material comprises AI2O3. In some examples, the first dielectric material comprises SiNx and the second dielectric material comprises SiCh. In some examples, the first dielectric material comprises SiCh and the second dielectric material comprises SiNx. In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises SiNx. In some examples, the first dielectric material comprises SiNx and the second dielectric material comprises AI2O3. In some examples, the first dielectric material comprises HfCh and the second dielectric material comprises AI2O3. In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises HfCh

[0021] In some examples, the first permittivity is higher than the third permittivity.

[0022] In some examples, the first permittivity is higher than both the second permittivity and the third permittivity.

[0023] In some examples, the first permittivity is higher than both the second permittivity and the third permittivity, and the second permittivity is similar to the third permittivity.

[0024] In some examples, the third permittivity is higher than the first permittivity and / or the second permittivity. In some examples, the third permittivity is higher than both the first permittivity and the second permittivity. In some examples, the third permittivity is higher than both the first permittivity and the second permittivity, and the first permittivity is similar to the second permittivity.

[0025] In some examples, each of the one or more trenches extends from the top surface of the dielectric layer to a depth within the dielectric layer, wherein the depth of each of the one or more trenches are the same or different from each other. In some examples, the depth of the trenches varies, such as wherein the depth of the trenches varies across the device. In some examples, the depth of each of the one or more trenches independently is from 1 Angstrom (A) to 1 millimeter (mm). In some examples, the depth of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

[0026] In some examples, each of the one or more trenches has a shape within a plane substantially parallel to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

[0027] In some examples, the one or more trenches are stripes, lines, curves, dots, hexagons, concentric shapes such as concentric circles, etc.

[0028] In some examples, each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 1 nanometer to 1 millimeter. In some examples, each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

[0029] In some examples, each of the one or more trenches has a cross-sectional shape within a plane substantially perpendicular to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

[0030] In some examples, the device comprises a plurality of trenches (e.g., 2 or more trenches), spaced apart from each other by a distance along the top of the dielectric layer.

[0031] In some examples, the parameters include the thickness of the dielectric layer, the composition of the first dielectric material, the composition of the second dielectric material, the composition of the semiconductor layer, the first permittivity, the second permittivity, the third permittivity, the depth of each of the one or more trenches, the average characteristic dimension of each of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the shape of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the cross-sectional shape of each of the one or more trenches within a plane substantially perpendicular to the top of the dielectric layer, the distance between each of the neighboring trenches along the top of the dielectric layer, or a combination thereof.

[0032] In some examples, the favorable electric field distribution between the first and second electrodes is one that is more uniform when a voltage bias is applied between the first and second electrodes.

[0033] In some examples, the favorable electric field distribution at an electrode edge is one that has a more uniform edge field termination when a voltage bias is applied between the first and second electrodes.

[0034] In some examples, parameters of the one or more trenches and / or the second dielectric material is selected to create peaks in the electric field distribution at specific regions when a voltage bias is applied between the first and second electrodes.

[0035] In some examples, the device exhibits improved performance.

[0036] In some examples, the device has increased breakdown voltage, reduced off-state capacitance, reduced stored charge, improved switching frequency, or a combination thereof.

[0037] In some examples, the device has enhanced breakdown performance and tunability of the device electrostatics while lowering the amount of stored charge.

[0038] Also disclosed herein are methods of making any of the devices disclosed herein. In some examples, the method comprises: depositing the first dielectric material to form the dielectric layer; depositing the semiconductor material to form the semiconductor layer; forming the one or more trenches in the dielectric layer; and depositing the second dielectric material within the one or more trenches.

[0039] Also disclosed herein are methods of use of any of the devices disclosed herein.

[0040] Additional advantages of the disclosed compositions, devices, and methods will be set forth in part in the description which follows, and in part will be obvious from the description. The advantages of the disclosed compositions, devices, and methods will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed devices and methods, as claimed.

[0041] The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE FIGURES

[0042] The accompanying figures, which are incorporated in and constitute a part of this specification, illustrate several aspects of the disclosure, and together with the description, serve to explain the principles of the disclosure. However, the present disclosure is not limited to the precise arrangements shown, and the drawings are not necessarily drawn to scale.

[0043] Figure 1. A schematic diagram of an example lateral device showing (a) formation of trenches in high-permittivity dielectrics (b) filling of these trenches with a low-permittivity dielectric and (c) the inverted structure in which trenches are etched in a low-permittivity dielectric and filled with a high permittivity dielectric.

[0044] Figure 2. A schematic diagram of an example vertical device showing (a) formation of trenches in high-permittivity dielectrics (b) filling of these trenches with a low-permittivity dielectric and (c) the inverted structure in which trenches are etched in a low-permittivity dielectric and filled with a high permittivity dielectric.

[0045] Figure 3. Device schematic of (a) control lateral device with uniform high-k BaTiCh dielectric and (b) with lower permittivity AI2O3 trenches introduced. Comparison of simulated electric field profiles for both devices along (c) the anode edge cutline A- A’ (d) the semiconductor channel B-B’. (e) The capacitance between the two electrodes as a function of anode bias and estimated stored charge.

[0046] Figure 4. Schematic of dielectric permittivity variation by (a) inserting low-k dielectric trenches in the form of concentric circles in a high-k dielectric (b) inserting high-k dielectric trenches in the form of / concentric circles in a low-k dielectric.

[0047] Figure 5. Schematic diagrams of example devices.

[0048] Figure 6. Top view schematic of device where the dielectric permittivity is varied by introducing etched holes in a high permittivity dielectric (a) of increasing density (b) or increasing diameter and filling with a dielectric of lower permittivity. Top view schematic of device where the dielectric permittivity is varied by introducing etched holes in a low permittivity dielectric (c) of increasing density (d) or increasing diameter and filling with a dielectric of higher permittivity.

[0049] DETAILED DESCRIPTION

[0050] The compositions, methods, and devices described herein may be understood more readily by reference to the following detailed description of specific aspects of the disclosed subject matter and the Examples included therein.

[0051] Before the present compositions, methods, and devices are disclosed and described, it is to be understood that the aspects described below are not limited to specific synthetic methods or specific reagents, as such may, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular aspects only and is not intended to be limiting.

[0052] Also, throughout this specification, various publications are referenced. The disclosures of these publications in their entireties are hereby incorporated by reference into this application in order to more fully describe the state of the art to which the disclosed matter pertains. The references disclosed are also individually and specifically incorporated by reference herein for the material contained in them that is discussed in the sentence in which the reference is relied upon.

[0053] In this specification and in the claims that follow, reference will be made to a number of terms, which shall be defined to have the following meanings.

[0054] Throughout the description and claims of this specification the word “comprise” and other forms of the word, such as “comprising” and “comprises,” means including but not limited to, and is not intended to exclude, for example, other additives, components, integers, or steps.

[0055] As used in the description and the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a composition” includes mixtures of two or more such compositions, reference to “an agent” includes mixtures of two or more such agents, reference to “the component” includes mixtures of two or more such components, and the like.

[0056] “Optional” or “optionally” means that the subsequently described event or circumstance can or cannot occur, and that the description includes instances where the event or circumstance occurs and instances where it does not.

[0057] Ranges can be expressed herein as from “about” one particular value, and / or to “about” another particular value. By “about” is meant within 5% of the value, e.g., within 4, 3, 2, or 1% of the value. When such a range is expressed, another aspect includes from the one particular value and / or to the other particular value. Similarly, when values are expressed as approximations, by use of the antecedent “about,” it will be understood that the particular value forms another aspect. It will be further understood that the endpoints of each of the ranges are significant both in relation to the other endpoint, and independently of the other endpoint.

[0058] Values can be expressed herein as an “average” value. “Average” generally refers to the statistical mean value.

[0059] By “substantially” is meant within 5%, e.g., within 4%, 3%, 2%, or 1%. “Exemplary” means “an example of’ and is not intended to convey an indication of a preferred or ideal embodiment. “Such as” is not used in a restrictive sense, but for explanatory purposes.

[0060] It is understood that throughout this specification the identifiers “first” and “second” are used solely to aid in distinguishing the various components and steps of the disclosed subject matter. The identifiers “first” and “second” are not intended to imply any particular order, amount, preference, or importance to the components or steps modified by these terms.

[0061] References in the specification and concluding claims to parts by weight of a particular element or component in a composition denotes the weight relationship between the element or component and any other elements or components in the composition or article for which a part by weight is expressed. Thus, in a compound containing 2 parts by weight of component X and 5 parts by weight component Y, X and Y are present at a weight ratio of 2:5, and are present in such ratio regardless of whether additional components are contained in the compound.

[0062] A weight percent (wt. %) of a component, unless specifically stated to the contrary, is based on the total weight of the formulation or composition in which the component is included.

[0063] The term “or combinations thereof’ as used herein refers to all permutations and combinations of the listed items preceding the term. For example, “A, B, C, or combinations thereof’ is intended to include at least one of A, B, C, AB, AC, BC, or ABC, and if order is important in a particular context, also BA, CA, CB, CBA, BCA, ACB, BAC, or CAB. Continuing with this example, expressly included are combinations that contain repeats of one or more item or term, such as BB, AAA, AB, BBC, AAABCCCC, CBBAAA, CAB ABB, and so forth. The skilled artisan will understand that typically there is no limit on the number of items or terms in any combination, unless otherwise apparent from the context.

[0064] Devices

[0065] Described herein are devices comprising a dielectric layer comprising a first dielectric material and having a first permittivity, the dielectric layer being deposited on a semiconductor layer comprising a semiconductor material and having a second permittivity. The dielectric layer having a top surface, the top surface of the dielectric layer being opposite the semiconductor layer. The semiconductor layer having a bottom surface, the bottom surface of the semiconductor layer being opposite the dielectric layer.

[0066] The semiconductor material can comprise any suitable semiconductor material. In some examples, the semiconductor can have p- or n-type conductivity. In some examples, the semiconductor material comprises a III-V or II- VI semiconductor material. In some examples, the semiconductor material comprises Ga2Ch, (Al,Ga)2O3, AlGaN, GaN, AIN, InGaN, SiC. Diamond, Boron nitride, Silicon, Germanium, SiGe, or a combination thereof. In some examples, the semiconductor material comprises Ga2Ch, (Al,Ga)2Os, or a combination thereof. In some examples, the semiconductor material comprises Ga2Ch. In some examples, the semiconductor material comprises P-Ga20s.

[0067] The first dielectric material can comprise any suitable dielectric material. In some examples, the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof. In some examples, the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof. In some examples, the first dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0068] In some examples, the first dielectric material can comprise a high permittivity dielectric, such as BaTiCh.

[0069] In some examples, the first dielectric material can comprise a low permittivity dielectric, such as AI2O3.

[0070] In some examples, the first permittivity is higher than the second permittivity. In some examples, the first permittivity is higher than the second permittivity by a factor of 2 or more (e.g., 5 or more, 10 or more, 25 or more, 50 or more, 100 or more, 250 or more, 500 or more, 1000 or more, 2500 or more, or 5000 or more).

[0071] In some examples, the first permittivity is similar to the second permittivity.

[0072] The dielectric layer can have an average thickness. The average thickness of the dielectric layer can, for example, be 1 Angstrom (A) or more (e.g., 5 A or more, 1 nanometer (nm) or more, 5 nm or more, 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (pm) or more, 1.25 pm or more, 1.5 pm or more, 1.75 pm or more, 2 pm or more, 2.25 pm or more, 2.5 pm or more, 3 pm or more, 3.5 pm or more, 4 pm or more, 4.5 pm or more, 5 pm or more, 6 pm or more, 7 pm or more, 8 pm or more, 9 pm or more, 10 pm or more, 15 pm or more, 20 pm or more, 25 pm or more, 30 pm or more, 35 pm or more, 40 pm or more, 45 pm or more, 50 pm or more, 60 pm or more, 70 pm or more, 80 pm or more, 90 pm or more, 100 pm or more, 125 pm or more, 150 pm or more, 175 pm or more, 200 pm or more, 225 pm or more, 250 pm or more, 300 pm or more, 350 pm or more, 400 pm or more, 450 pm or more, 500 pm or more, 600 pm or more, 700 pm or more, 800 pm or more, or 900 pm or more). In some examples, the average thickness of the dielectric layer can, for example, be 10 nanometers (nm) or more (e.g., 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (pm) or more, 1.25 pm or more, 1.5 pm or more, 1.75 pm or more, 2 pm or more, 2.25 pm or more, 2.5 pm or more, 3 pm or more, 3.5 pm or more, 4 pm or more, 4.5 pm or more, 5 pm or more, 6 pm or more, 7 pm or more, 8 pm or more, 9 pm or more).

[0073] In some examples, the average thickness of the dielectric layer can be 1 millimeter (mm) or less (e.g., 900 micrometers (pm) or less, 800 pm or less, 700 pm or less, 600 pm or less, 500 pm or less, 450 pm or less, 400 pm or less, 350 pm or less, 300 pm or less, 250 pm or less, 225 pm or less, 200 pm or less, 175 pm or less, 150 pm or less, 125 pm or less, 100 pm or less, 90 pm or less, 80 pm or less, 70 pm or less, 60 pm or less, 50 pm or less, 45 pm or less, 40 pm or less, 35 pm or less, 30 pm or less, 25 pm or less, 20 pm or less, 15 pm or less, 10 pm or less, 9 pm or less, 8 pm or less, 7 pm or less, 6 pm or less, 5 pm or less, 4.5 pm or less, 4 pm or less, 3.5 pm or less, 3 pm or less, 2.5 pm or less, 2.25 pm or less, 2 pm or less, 1.75 pm or less, 1.25 pm or less, 1 pm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, 20 nm or less, 10 nm or less, 5 nm or less, or 1 nm or less). In some examples, the average thickness of the dielectric layer can be 10 micrometers (pm) or less (e.g., 9 pm or less, 8 pm or less, 7 pm or less, 6 pm or less, 5 pm or less, 4.5 pm or less, 4 pm or less, 3.5 pm or less, 3 pm or less, 2.5 pm or less, 2.25 pm or less, 2 pm or less, 1.75 pm or less, 1.25 pm or less, 1 pm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, or 20 nm or less).

[0074] The average thickness of the dielectric layer can range from any of the minimum values described above to any of the maximum values described above. For example, the dielectric layer can have an average thickness of from 1 Angstrom (A) to 1 millimeter (mm) (e.g., from 1 Angstrom to 1 micrometer, from 1 micrometer to 1 millimeter, from 1 Angstrom to 1 nanometer, from 1 nanometer to 10 nanometers, from 10 nanometers to 100 nanometers, from 100 nanometers to 1 micrometer, from 1 micrometer to 10 micrometers, from 10 micrometers to 100 micrometers, from 100 micrometers to 1 millimeter, from 1 Angstrom to 100 micrometers, from 1 nanometer to 1 millimeter, from 1 nanometer to 100 micrometers, or from 10 nanometers to 10 micrometers). In some examples, the dielectric layer can have an average thickness of from 10 nanometers to 10 micrometers (e.g., from 10 nm to 500 nm, from 500 nm to 10 pm, from 10 nm to 100 nm, from 100 nm to 1 pm, from 1 pm to 10 pm, from 10 nm to 5 pm, from 10 nm to 1 pm, from 10 nm to 750 nm, from 10 nm to 250 nm, from 25 nm to 10 pm, from 50 nm to 10 pm, from 100 nm to 10 pm, from 250 nm to 10 pm, from 750 nm to 10 pm, from 15 nm to 9 pm, or from 25 nm to 8 pm).

[0075] The device further comprises a first electrode and a second electrode, wherein the first and second electrodes can be arranged such that the device is a lateral device or a vertical device.

[0076] For example, the first electrode and the second electrode can each independently be deposited on the dielectric layer and / or the semiconductor layer.

[0077] In some examples, the device can have a top and a bottom, the bottom being opposite and spaced apart from the top. The top can, for example, include the dielectric layer and optionally portions of the semiconductor layer not covered by the dielectric layer. The bottom can, for example, include the bottom of the semiconductor layer (e.g., the opposite the dielectric layer).

[0078] In some examples, the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode and the second electrode are each located towards the top of the device (e.g., wherein the device is a lateral device).

[0079] In some examples, the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode is located towards the top of the device and the second electrode is located on the bottom of the device (e.g., wherein the device is a vertical device).

[0080] In some examples, the devices can further include one or more additional electrodes. For example, the device can comprise a transistor with three electrodes (e.g., source, gate, or drain). In some examples, the device can comprise a bi-directional switch.

[0081] In some examples, the device can include multiple electrodes in the form of field plates.

[0082] The device further comprises one or more trenches within the dielectric layer, wherein the trenches are at least partially filled with a second dielectric material, the second dielectric material being different than the first dielectric material, the second dielectric material having a third permittivity.

[0083] The second dielectric material can comprise any suitable dielectric material. In some examples, the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof. In some examples, the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof. In some examples, the second dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0084] In some examples, the second dielectric material can comprise a high permittivity dielectric, such as BaTiCh. In some examples, the second dielectric material can comprise a low permittivity dielectric, such as AI2O3.

[0085] In some examples, the first dielectric material and the second dielectric material independently comprise BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0086] In some examples, the first dielectric material comprises BaTiCh and the second dielectric material comprises AI2O3.

[0087] In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises BaTiCh.

[0088] In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises SiCh.

[0089] In some examples the first dielectric material comprises SiCh and the second dielectric material comprises AI2O3.

[0090] In some examples, the first dielectric material comprises SiNx and the second dielectric material comprises SiCh.

[0091] In some examples, the first dielectric material comprises SiCh and the second dielectric material comprises SiNx.

[0092] In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises SiNx. In some examples, the first dielectric material comprises SiNx and the second dielectric material comprises AI2O3.

[0093] In some examples, the first dielectric material comprises HfCh and the second dielectric material comprises AI2O3.

[0094] In some examples, the first dielectric material comprises AI2O3 and the second dielectric material comprises HfCh.

[0095] In some examples, the first permittivity is higher than the third permittivity. In some examples, the first permittivity is higher than both the second permittivity and the third permittivity. In some examples, the first permittivity is higher than both the second permittivity and the third permittivity, and the second permittivity is similar to the third permittivity.

[0096] In some examples, the third permittivity is higher than the first permittivity. In some examples, the third permittivity is higher than the second permittivity. In some examples, the third permittivity is higher than both the first permittivity and the second permittivity. In some examples, the third permittivity is higher than both the first permittivity and the second permittivity, and the first permittivity is similar to the second permittivity.

[0097] Each of the one or more trenches extends from the top surface of the dielectric layer to a depth within the dielectric layer. The depth of each of the one or more trenches can be the same or different from each other. For example, the depth of the trenches can vary across the device.

[0098] In some examples, the depth of each of the one or more trenches can independently be 1 Angstrom (A) or more (e.g., 5 A or more, 1 nanometer (nm) or more, 5 nm or more, 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (pm) or more, 1.25 pm or more, 1.5 pm or more, 1.75 pm or more, 2 pm or more, 2.25 pm or more, 2.5 pm or more, 3 pm or more, 3.5 pm or more, 4 pm or more, 4.5 pm or more, 5 pm or more, 6 pm or more, 7 pm or more, 8 pm or more, 9 pm or more, 10 pm or more, 15 pm or more, 20 pm or more, 25 pm or more, 30 pm or more, 35 pm or more, 40 pm or more, 45 pm or more, 50 pm or more, 60 pm or more, 70 pm or more, 80 pm or more, 90 pm or more, 100 pm or more, 125 pm or more, 150 pm or more, 175 pm or more, 200 pm or more, 225 pm or more, 250 pm or more, 300 pm or more, 350 pm or more, 400 pm or more, 450 pm or more, 500 pm or more, 600 pm or more, 700 pm or more, 800 pm or more, or 900 pm or more). In some examples, the depth of each of the one or more trenches can independently be 5 nanometers (nm) or more (e.g., 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (gm) or more, 1.25 gm or more, 1.5 gm or more, 1.75 gm or more, 2 gm or more, 2.25 gm or more, 2.5 gm or more, 3 gm or more, 3.5 gm or more, 4 gm or more, 4.5 gm or more, 5 gm or more, 6 gm or more, 7 gm or more, 8 gm or more, or 9 gm or more).

[0099] In some examples, the depth of each of the one or more trenches can independently be 1 millimeter (mm) or less (e.g., 900 micrometers (gm) or less, 800 gm or less, 700 gm or less, 600 gm or less, 500 gm or less, 450 gm or less, 400 gm or less, 350 gm or less, 300 gm or less, 250 gm or less, 225 gm or less, 200 gm or less, 175 gm or less, 150 gm or less, 125 gm or less, 100 gm or less, 90 gm or less, 80 gm or less, 70 gm or less, 60 gm or less, 50 gm or less, 45 gm or less, 40 gm or less, 35 gm or less, 30 gm or less, 25 gm or less, 20 gm or less, 15 gm or less, 10 gm or less, 9 gm or less, 8 gm or less, 7 gm or less, 6 gm or less, 5 gm or less, 4.5 gm or less, 4 gm or less, 3.5 gm or less, 3 gm or less, 2.5 gm or less, 2.25 gm or less, 2 gm or less, 1.75 gm or less, 1.25 gm or less, 1 gm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, 20 nm or less, 15 nm or less, 10 nm or less, 5 nm or less, or 1 nm or less). In some examples, the depth of each of the one or more trenches can independently be 10 micrometers (gm) or less (e.g., 9 gm or less, 8 gm or less, 7 gm or less, 6 gm or less, 5 gm or less, 4.5 gm or less, 4 gm or less, 3.5 gm or less, 3 gm or less, 2.5 gm or less, 2.25 gm or less, 2 gm or less, 1.75 gm or less, 1.25 gm or less, 1 gm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less).

[0100] The depth of each of the one or more trenches can independently range from any of the minimum values described above to any of the maximum values described above. For example, the depth of each of the one or more trenches can independently be from 1 Angstrom (A) to 1 millimeter (mm) (e.g., from 1 Angstrom to 1 micrometer, from 1 micrometer to 1 millimeter, from 1 Angstrom to 1 nanometer, from 1 nanometer to 10 nanometers, from 10 nanometers to 100 nanometers, from 100 nanometers to 1 micrometer, from 1 micrometer to 10 micrometers, from 10 micrometers to 100 micrometers, from 100 micrometers to 1 millimeter, from 1 Angstrom to 100 micrometers, from 1 nanometer to 1 millimeter, from 1 nanometer to 100 micrometers, or from 5 nanometers to 10 micrometers). In some examples, the depth of each of the one or more trenches can independently be from 5 nanometers to 10 micrometers (e.g., from 5 nm to 500 nm, from 500 nm to 10 pm, from 5 nm to 100 nm, from 100 nm to 1 pm, from 1 pm to 10 pm, from 5 nm to 5 pm, from 5 nm to 1 pm, from 5 nm to 750 nm, from 5 nm to 250 nm, from 10 nm 10 pm, to 25 nm to 10 pm, from 50 nm to 10 pm, from 100 nm to 10 pm, from 250 nm to 10 pm, from 750 nm to 10 pm, from 10 nm to 9 pm, or from 25 nm to 8 pm).

[0101] Each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer. The shape can be any suitable shape (e.g., circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.). For example, the one or more trenches can be stripes, lines, curves, dots, hexagons, concentric shapes such as concentric circles, etc.

[0102] In some examples, the shape and / or the average characteristic dimension can vary along the depth of the trench.

[0103] Each of the one or more trenches independently has an average characteristic dimension. The term “characteristic dimension,” as used herein refers to the largest straight line distance between two points in a plane substantially parallel to the top of the dielectric layer. “Average characteristic dimension” and “mean characteristic dimension” are used interchangeably herein, and generally refer to the statistical mean characteristic dimension. For example, trench with a circular shape in a plane substantially parallel to the top of the dielectric layer, the average characteristic dimension can refer to the average diameter.

[0104] In some examples, the average characteristic dimension of each of the one or more trenches can independently be 1 nanometer (nm) or more (e.g., 5 nm or more, 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (pm) or more, 1.25 pm or more, 1.5 pm or more, 1.75 pm or more, 2 pm or more, 2.25 pm or more, 2.5 pm or more, 3 pm or more, 3.5 pm or more, 4 pm or more, 4.5 pm or more, 5 pm or more, 6 pm or more, 7 pm or more, 8 pm or more, 9 pm or more, 10 pm or more, 15 pm or more, 20 pm or more, 25 pm or more, 30 pm or more, 35 pm or more, 40 pm or more, 45 pm or more, 50 pm or more, 60 pm or more, 70 pm or more, 80 pm or more, 90 pm or more, 100 pm or more, 125 pm or more, 150 pm or more, 175 pm or more, 200 pm or more, 225 pm or more, 250 pm or more, 300 pm or more, 350 pm or more, 400 pm or more, 450 pm or more, 500 pm or more, 600 pm or more, 700 pm or more, 800 pm or more, or 900 pm or more). In some examples, the average characteristic dimension of each of the one or more trenches can independently be 5 nanometers (nm) or more (e.g., 10 nm or more, 15 nm or more, 20 nm or more, 25 nm or more, 30 nm or more, 35 nm or more, 40 nm or more, 45 nm or more, 50 nm or more, 60 nm or more, 70 nm or more, 80 nm or more, 90 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1 micrometer (pm) or more, 1.25 pm or more, 1.5 pm or more, 1.75 pm or more, 2 pm or more, 2.25 pm or more, 2.5 pm or more, 3 pm or more, 3.5 pm or more, 4 pm or more, 4.5 pm or more, 5 pm or more, 6 pm or more, 7 pm or more, 8 pm or more, or 9 pm or more).

[0105] In some examples, the average characteristic dimension of each of the one or more trenches can independently be 1 millimeter (mm) or less (e.g., 900 micrometers (pm) or less, 800 pm or less, 700 pm or less, 600 pm or less, 500 pm or less, 450 pm or less, 400 pm or less, 350 pm or less, 300 pm or less, 250 pm or less, 225 pm or less, 200 pm or less, 175 pm or less, 150 pm or less, 125 pm or less, 100 pm or less, 90 pm or less, 80 pm or less, 70 pm or less, 60 pm or less, 50 pm or less, 45 pm or less, 40 pm or less, 35 pm or less, 30 pm or less, 25 pm or less, 20 pm or less, 15 pm or less, 10 pm or less, 9 pm or less, 8 pm or less, 7 pm or less, 6 pm or less, 5 pm or less, 4.5 pm or less, 4 pm or less, 3.5 pm or less, 3 pm or less, 2.5 pm or less, 2.25 pm or less, 2 pm or less, 1.75 pm or less, 1.25 pm or less, 1 pm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, 20 nm or less, 15 nm or less, 10 nm or less, or 5 nm or less). In some examples, the average characteristic dimension of each of the one or more trenches can independently be 10 micrometers (pm) or less (e.g., 9 pm or less, 8 pm or less, 7 pm or less, 6 pm or less, 5 pm or less, 4.5 pm or less, 4 pm or less, 3.5 pm or less, 3 pm or less, 2.5 pm or less, 2.25 pm or less, 2 pm or less, 1.75 pm or less, 1.25 pm or less, 1 pm or less, 900 nanometers (nm) or less, 800 nm or less, 700 nm or less, 600 nm or less, 500 nm or less, 450 nm or less, 400 nm or less, 350 nm or less, 300 nm or less, 250 nm or less, 225 nm or less, 200 nm or less, 175 nm or less, 150 nm or less, 125 nm or less, 100 nm or less, 90 nm or less, 80 nm or less, 70 nm or less, 60 nm or less, 50 nm or less, 45 nm or less, 40 nm or less, 35 nm or less, 30 nm or less, 25 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less).

[0106] The average characteristic dimension of each of the one or more trenches can independently range from any of the minimum values described above to any of the maximum values described above. For example, the average characteristic dimension of each of the one or more trenches can independently be from 1 nanometer to 1 millimeter (e.g., from 1 nanometer to 1 micrometer, from 1 micrometer to 1 millimeter, from 1 nanometer to 10 nanometers, from 10 nanometers to 100 nanometers, from 100 nanometers to 1 micrometer, from 1 micrometer to 10 micrometers, from 10 micrometers to 100 micrometers, from 100 micrometers to 1 millimeter, from 1 nanometer to 100 micrometers, from 5 nanometers to 1 millimeter, from 5 nanometers to 100 micrometers, or from 5 nanometers to 10 micrometers). In some examples, the average characteristic dimension of each of the one or more trenches can independently be from 5 nanometers to 10 micrometers (e.g., from 5 nm to 500 nm, from 500 nm to 10 pm, from 5 nm to 100 nm, from 100 nm to 1 pm, from 1 pm to 10 pm, from 5 nm to 5 pm, from 5 nm to 1 pm, from 5 nm to 750 nm, from 5 nm to 250 nm, from 10 nm 10 pm, to 25 nm to 10 pm, from 50 nm to 10 pm, from 100 nm to 10 pm, from 250 nm to 10 pm, from 750 nm to 10 pm, from 10 nm to 9 pm, or from 25 nm to 8 pm).

[0107] Each of the one or more trenches has a cross-sectional shape within a plane substantially perpendicular to the top of the dielectric layer. The shape can be any suitable shape (e.g., circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.).

[0108] Each of the one or more trenches can be present at an angle from 0° to 90° relative to the top surface of the dielectric layer.

[0109] In some examples, the device comprises a plurality of trenches (e.g., 2 or more trenches), spaced apart from each other by a distance along the top of the dielectric layer.

[0110] Parameters of the devices, such as parameters of the one or more trenches and / or the second dielectric material, can be selected to control the electric field distribution when a bias is applied between the first and second electrodes, for example to provide a favorable electric field distribution.

[0111] Parameters include, for example, the thickness of the dielectric layer, the composition of the first dielectric material, the composition of the second dielectric material, the composition of the semiconductor layer, the first permittivity, the second permittivity, the third permittivity, the depth of each of the one or more trenches, the average characteristic dimension of each of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the shape of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the cross-sectional shape of each of the one or more trenches within a plane substantially perpendicular to the top of the dielectric layer, the distance between each of the neighboring trenches along the top of the dielectric layer, the angle of the trenches within the dielectric layer, or a combination thereof. In some examples, parameters include the thickness of the dielectric layer, the composition of the first dielectric material, the composition of the second dielectric material, the composition of the semiconductor layer, the first permittivity, the second permittivity, the third permittivity, the depth of each of the one or more trenches, the average characteristic dimension of each of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the shape of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the cross-sectional shape of each of the one or more trenches within a plane substantially perpendicular to the top of the dielectric layer, the distance between each of the neighboring trenches along the top of the dielectric layer, or a combination thereof

[0112] In some examples, the favorable electric field distribution between the first and second electrodes can be one that is more uniform when a voltage bias is applied between the first and second electrodes.

[0113] In some examples, the favorable electric field distribution at an electrode edge can be one that has a more uniform edge field termination when a voltage bias is applied between the first and second electrodes.

[0114] In some examples, parameters of the one or more trenches and / or the second dielectric material can be selected to create peaks in the electric field distribution at specific regions when a voltage bias is applied between the first and second electrodes.

[0115] In some examples, the devices exhibit improved performance.

[0116] In some examples, the devices can have increased breakdown voltage, reduced off-state capacitance, reduced stored charge, improved switching frequency, or a combination thereof.

[0117] In some examples, the devices can have enhanced breakdown performance and tunability of the device electrostatics while lowering the amount of stored charge.

[0118] Methods of Making

[0119] Also disclosed herein are methods of making any of the devices disclosed herein. For example, the method can comprise depositing, in any order, the first dielectric material to form the dielectric layer and the semiconductor material to form the semiconductor layer. In some examples, the methods can further comprise forming the one or more trenches. In some examples, the one or more trenches can be formed by etching, such as wet chemical etching, dry etching (e.g., plasma etching), suboxide etching of atomic layers, gaseous etching, or a combination thereof. The one or more trenches can, for example, be formed by etching, such as reactive ion etching.

[0120] In some examples, the methods can further comprise depositing the second dielectric material within the one or more trenches.

[0121] In some examples, depositing the first dielectric material, the second dielectric material, and / or the semiconductor material each independently comprises electroplating, lithographic deposition, electron beam deposition, thermal deposition, spin coating, drop-casting, zone casting, dip coating, blade coating, spraying, vacuum filtration, chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), sputtering, pulsed laser deposition, molecular beam epitaxy, evaporation (e.g., thermal evaporation), three- dimensional (3D) particle printing such as aerosol jet printing, metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), Hydride Vapor Phase Epitaxy (HVPE), melt growth, or a combination thereof.

[0122] In some examples, the methods can comprise depositing the semiconductor material and subsequently oxidizing the semiconductor (e.g., by wet oxidation, dry oxidation, or a combination thereof) to thereby grow a native dielectric layer (e.g., thereby growing the first dielectric material and / or second dielectric material).

[0123] Methods of Use

[0124] Also disclosed herein are methods of use of any of the devices disclosed herein.

[0125] For example, the methods can comprise using any of the devices herein to engineer a specific electric field profile, capacitance profile, stored charge between any electrodes versus applied voltage, or a combination thereof.

[0126] A number of embodiments of the invention have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the invention. Accordingly, other embodiments are within the scope of the following claims.

[0127] The examples below are intended to further illustrate certain aspects of the devices and methods described herein, and are not intended to limit the scope of the claims.

[0128] EXAMPLES

[0129] The following examples are set forth below to illustrate the methods and results according to the disclosed subject matter. These examples are not intended to be inclusive of all aspects of the subject matter disclosed herein, but rather to illustrate representative methods and results. These examples are not intended to exclude equivalents and variations of the present invention which are apparent to one skilled in the art.

[0130] Efforts have been made to ensure accuracy with respect to numbers (e.g., amounts, temperature, etc.) but some errors and deviations should be accounted for. Unless indicated otherwise, parts are parts by weight, temperature is in °C or is at ambient temperature, and pressure is at or near atmospheric. There are numerous variations and combinations of measurement conditions, e.g., component concentrations, temperatures, pressures and other measurement ranges and conditions that can be used to optimize the described process.

[0131] Example 1 - Engineering Electric Field Profiles for Power Semiconductor Devices Using Effective Permittivity Variation ?-Ga2O3 is an ultrawide bandgap semiconductor with promising material properties including its high theoretical breakdown field of 8 MV / cm, ease of n-type doping, and native melt-grown substrates, making it a promising candidate for low-cost, efficient power switching devices [1], Current ?-Ga2Ch lateral transistors are limited to breakdown electric fields below the theoretical value due to the non-uniform field profile in between the gate and the drain in the off- state. Researchers have shown that integration of high-k BaTiCh (& = 200) images the depleted channel charge as bound polarization charge and reduces the electric field peak at the gate edge, leading to a more uniform electric field profile [2], Despite this, the electric field still peaks underneath the gate edge in the BaTiCh and causes premature breakdown.

[0132] Herein, it is shown that by formation of trench-like structures into the high-k insulator film (such as BaTiCh) and filling it with a lower permittivity insulator provides a method to engineer the off-state electric field profiles in the device and increase the breakdown voltage while simultaneously reducing the off-state capacitance and stored charge, resulting in enhanced device performance. This method is not only valid for the specific case of fi-GaiO lateral devices integrated with BaTiCh, but for all wide bandgap power devices and combinations of high and low permittivity dielectrics.

[0133] Figure 1 shows example device schematics for lateral devices in which trenches are etched into the first dielectric (of either high or low permittivity) and filled with a second dielectric with significantly lower or higher permittivity. Figure 2 shows how this same concept can also be applied to vertical power devices, in which the electrodes are present at the bottom and top of the device.

[0134] The 2D device simulation software Silvaco Atlas was used to show the effect on the off- state electrostatics of a lateral power device of introducing trenches in which the high-k dielectric is etched away and filled with a lower permittivity material. In this specific case, a two-terminal lateral device with a fixed anode to cathode length of 4 gm, a channel sheet charge density of 5xl012cm’2, an insulator stack of 20 nm AI2O3 and 100 nm BaTiCh, and a 150 nm thick BaTiCh passivation layer was considered. For comparison, a control structure where a uniform layer of BaTiCh is maintained (shown in Figure 3(a)) and a structure in which low-k trenches are formed in the BaTiCh passivation layer and replaced with AI2O3 (shown in Figure 3(b)) were also investigated.

[0135] The simulated electric field profiles along two lateral cutlines of interest are contrasted for the two cases. In the case of an anode bias of -2 kV, the control structure experiences electric field peaks of >8 MV / cm at the anode edge within the BaTiOi insulator layer, which would result in breakdown of the device. In the case of the structure with the AI2O3 trenches, the anode edge electric field peak is suppressed to 7 MV / cm and further increases breakdown performance. These two electric field profiles are plotted and compared in Figure 3(c).

[0136] Additionally, the electric field profile in the channel is considered. The introduction of the low-k trenches into the high-k dielectric allows for tuning of the off-state electric field profile to produce peaks and valleys in regions of interest when compared to the control case where a uniform high-k dielectric layer is preserved. The channel electric field profile for the two cases is plotted and compared in Figure 3(d).

[0137] Another important quantity for power devices is the stored charge in the off state, which determines the frequency at which the device can switch. The anode to cathode capacitance is compared for both the control structure and the one with low-k trenches in Figure 3(e). As can be observed, the introduction of the low-k trenches results in lower capacitance and therefore a smaller amount of stored charge. For the control structure, the stored charge is 0.26 nC / mm. For the structure of interest with low-k trenches, this charge is 0.21 nC / mm.

[0138] Thus, the structure with low-k trenches results in both enhanced breakdown performance and tunability of the device electrostatics while lowering the amount of stored charge.

[0139] Additionally, the geometry of such trenches can be varied and is not limited to the pluglike structures presented in this simulation.

[0140] Figure 4 depicts a lateral device in which the dielectric trenches can take the form of concentric circles, which could further improve the off-state electric field profiles within such a device.

[0141] Figure 5 and Figure 6 shows another possible geometry, in which the top view of a device is depicted where the spacing or density of holes are filled with a second dielectric of significantly different permittivity compared to the first dielectric. The devices are not limited to the precise arrangements shown in Figure 1 - Figure 6, and the drawings are not necessarily drawn to scale. For example, the dimensions (e.g., length, width, height) of each individual layer can vary and may be the same or different than any of the other layers.

[0142] References:

[0143] [1] M. Higashiwaki et al., Semicond. Sci. Technol. 31(3) 034001 (2016).

[0144] [2] N.K. Kalarickal et. al., IEEE Electron Device Lett., vol. 42, no. 6, pp. 899-902 (2021).

[0145] EXEMPLARY ASPECTS

[0146] In view of the described compositions and methods, herein below are described certain more particularly described aspects of the inventions. The particularly recited aspects should not, however, be interpreted to have any limiting effect on any different claims containing different or more general teachings described herein or that the “particular” aspects are somehow limited in some way other than the inherent meanings of the language and formulas literally used therein.

[0147] Example 1 : A device comprising: a dielectric layer comprising a first dielectric material and having a first permittivity; and a semiconductor layer comprising a semiconductor material having a second permittivity; a first electrode and a second electrode; one or more trenches within the dielectric layer, the trenches being at least partially filled with a second dielectric material; wherein the dielectric layer is deposited on the semiconductor layer; wherein dielectric layer has a top surface, the top surface of the dielectric layer being opposite the semiconductor layer; wherein the semiconductor layer has a bottom surface, the bottom surface of the semiconductor layer being opposite the dielectric layer; wherein the first and second electrodes are arranged such that the device is a lateral device or a vertical device; wherein the second dielectric material is different than the first dielectric material, and the second dielectric material has a third permittivity; wherein parameters of the devices, such as parameters of the one or more trenches and / or the second dielectric material, are selected to control the electric field distribution when a bias is applied between the first and second electrodes, for example to provide a favorable electric field distribution.

[0148] Example 2: The device of any examples herein, particularly example 1, wherein the semiconductor has p- or n-type conductivity.

[0149] Example 3 : The device of any examples herein, particularly example 1 or example 2, wherein the semiconductor material comprises a III-V or II- VI semiconductor material. Example 4: The device of any examples herein, particularly examples 1-3, wherein the semiconductor material comprises Ga2Ch, (Al,Ga)2O3, AlGaN, GaN, AIN, InGaN, SiC. Diamond, Boron nitride, Silicon, Germanium, SiGe, or a combination thereof.

[0150] Example 5: The device of any examples herein, particularly examples 1-4, wherein the semiconductor material comprises Ga2Ch, (Al,Ga)2Os, or a combination thereof.

[0151] Example 6: The device of any examples herein, particularly examples 1-5, wherein the semiconductor material comprises Ga2Ch.

[0152] Example 7: The device of any examples herein, particularly examples 1-6, wherein the semiconductor material comprises P-Ga20s.

[0153] Example 8: The device of any examples herein, particularly examples 1-7, wherein the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof.

[0154] Example 9: The device of any examples herein, particularly examples 1-8, wherein the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof.

[0155] Example 10: The device of any examples herein, particularly examples 1-9, wherein the first dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0156] Example 11 : The device of any examples herein, particularly examples 1-10, wherein the first dielectric material comprises a high permittivity dielectric, such as BaTiCh.

[0157] Example 12: The device of any examples herein, particularly examples 1-11, wherein the first dielectric material comprises a low permittivity dielectric, such as AI2O3.

[0158] Example 13: The device of any examples herein, particularly examples 1-12, wherein the dielectric layer has an average thickness of from 1 Angstrom (A) to 1 millimeter (mm).

[0159] Example 14: The device of any examples herein, particularly examples 1-13, wherein the dielectric layer has an average thickness of from 10 nanometers to 10 micrometers.

[0160] Example 15: The device of any examples herein, particularly examples 1-14, wherein the first permittivity is higher than the second permittivity.

[0161] Example 16: The device of any examples herein, particularly examples 1-15, wherein the first permittivity is higher than the second permittivity by a factor of 2 or more.

[0162] Example 17: The device of any examples herein, particularly examples 1-14, wherein the first permittivity is similar to the second permittivity. Example 18: The device of any examples herein, particularly examples 1-17, wherein the first electrode and the second electrode are each independently be deposited on the dielectric layer and / or the semiconductor layer.

[0163] Example 19: The device of any examples herein, particularly examples 1-18, wherein: the device has a top and a bottom, the bottom being opposite and spaced apart from the top; the top includes the dielectric layer and optionally portions of the semiconductor layer not covered by the dielectric layer; the bottom includes the bottom of the semiconductor layer (e.g., the opposite the dielectric layer).

[0164] Example 20: The device of any examples herein, particularly examples 1-19, wherein the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode and the second electrode are each located towards the top of the device (e.g., wherein the device is a lateral device).

[0165] Example 21 : The device of any examples herein, particularly examples 1-20, wherein the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode is located towards the top of the device and the second electrode is located on the bottom of the device (e.g., wherein the device is a vertical device).

[0166] Example 22: The device of any examples herein, particularly examples 1-21, wherein the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof.

[0167] Example 23: The device of any examples herein, particularly examples 1-22, wherein the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof.

[0168] Example 24: The device of any examples herein, particularly examples 1-23, wherein the second dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0169] Example 25: The device of any examples herein, particularly examples 1-24, wherein the second dielectric material comprises a high permittivity dielectric, such as BaTiCh.

[0170] Example 26: The device of any examples herein, particularly examples 1-25, wherein the second dielectric material comprises a low permittivity dielectric, such as AI2O3. Example 27: The device of any examples herein, particularly examples 1-26, wherein the first dielectric material and the second dielectric material independently comprise BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

[0171] Example 28: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises BaTiCh and the second dielectric material comprises AI2O3.

[0172] Example 29: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises BaTiCh.

[0173] Example 30: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises SiCh.

[0174] Example 31 : The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises SiCh and the second dielectric material comprises AI2O3.

[0175] Example 32: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises SiNx and the second dielectric material comprises SiCh.

[0176] Example 33: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises SiCh and the second dielectric material comprises SiNx.

[0177] Example 34: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises SiNx.

[0178] Example 35: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises SiNx and the second dielectric material comprises AI2O3.

[0179] Example 36: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises HfCh and the second dielectric material comprises AI2O3.

[0180] Example 37: The device of any examples herein, particularly examples 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises HfCh

[0181] Example 38: The device of any examples herein, particularly examples 1-37, wherein the first permittivity is higher than the third permittivity.

[0182] Example 39: The device of any examples herein, particularly examples 1-38, wherein the first permittivity is higher than both the second permittivity and the third permittivity.

[0183] Example 40: The device of any examples herein, particularly examples 1-39, wherein the first permittivity is higher than both the second permittivity and the third permittivity, and the second permittivity is similar to the third permittivity.

[0184] Example 41 : The device of any examples herein, particularly examples 1-37, wherein the third permittivity is higher than the first permittivity and / or the second permittivity.

[0185] Example 42: The device of any examples herein, particularly example 41, wherein the third permittivity is higher than both the first permittivity and the second permittivity. Example 43: The device of any examples herein, particularly example 41 or example 42, wherein the third permittivity is higher than both the first permittivity and the second permittivity, and the first permittivity is similar to the second permittivity.

[0186] Example 44: The device of any examples herein, particularly examples 1-43, wherein each of the one or more trenches extends from the top surface of the dielectric layer to a depth within the dielectric layer, wherein the depth of each of the one or more trenches are the same or different from each other.

[0187] Example 45: The device of any examples herein, particularly example 44, wherein the depth of the trenches varies, such as wherein the depth of the trenches varies across the device.

[0188] Example 46: The device of any examples herein, particularly example 44 or example 45, wherein the depth of each of the one or more trenches independently is from 1 Angstrom (A) to 1 millimeter (mm).

[0189] Example 47: The device of any examples herein, particularly examples 44-46, wherein the depth of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

[0190] Example 48: The device of any examples herein, particularly examples 1-47, wherein each of the one or more trenches has a shape within a plane substantially parallel to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

[0191] Example 49: The device of any examples herein, particularly examples 1-48, wherein the one or more trenches are stripes, lines, curves, dots, hexagons, concentric shapes such as concentric circles, etc.

[0192] Example 50: The device of any examples herein, particularly examples 1-49, wherein each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 1 nanometer to 1 millimeter.

[0193] Example 51 : The device of any examples herein, particularly examples 1-50, wherein each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

[0194] Example 52: The device of any examples herein, particularly examples 1-51, wherein each of the one or more trenches has a cross-sectional shape within a plane substantially perpendicular to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

[0195] Example 53: The device of any examples herein, particularly examples 1-52, wherein the device comprises a plurality of trenches (e.g., 2 or more trenches), spaced apart from each other by a distance along the top of the dielectric layer.

[0196] Example 54: The device of any examples herein, particularly examples 1-53, wherein the parameters include the thickness of the dielectric layer, the composition of the first dielectric material, the composition of the second dielectric material, the composition of the semiconductor layer, the first permittivity, the second permittivity, the third permittivity, the depth of each of the one or more trenches, the average characteristic dimension of each of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the shape of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the cross-sectional shape of each of the one or more trenches within a plane substantially perpendicular to the top of the dielectric layer, the distance between each of the neighboring trenches along the top of the dielectric layer, or a combination thereof.

[0197] Example 55: The device of any examples herein, particularly examples 1-54, wherein the favorable electric field distribution between the first and second electrodes is one that is more uniform when a voltage bias is applied between the first and second electrodes.

[0198] Example 56: The device of any examples herein, particularly examples 1-55, wherein the favorable electric field distribution at an electrode edge is one that has a more uniform edge field termination when a voltage bias is applied between the first and second electrodes.

[0199] Example 57: The device of any examples herein, particularly examples 1-56, parameters of the one or more trenches and / or the second dielectric material is selected to create peaks in the electric field distribution at specific regions when a voltage bias is applied between the first and second electrodes.

[0200] Example 58: The device of any examples herein, particularly examples 1-57, wherein the device exhibits improved performance.

[0201] Example 59: The device of any examples herein, particularly examples 1-58, wherein the device has increased breakdown voltage, reduced off-state capacitance, reduced stored charge, improved switching frequency, or a combination thereof.

[0202] Example 60: The device of any examples herein, particularly examples 1-59, wherein the device has enhanced breakdown performance and tunability of the device electrostatics while lowering the amount of stored charge. Example 61 : A method of making the device of any examples herein, particularly examples 1-60.

[0203] Example 62: The method of any examples herein, particularly example 61, wherein the method comprises: depositing the first dielectric material to form the dielectric layer; depositing the semiconductor material to form the semiconductor layer; forming the one or more trenches in the dielectric layer; and depositing the second dielectric material within the one or more trenches.

[0204] Example 63 : A method of use of the device of any examples herein, particularly examples 1-60.

[0205] Other advantages which are obvious and which are inherent to the invention will be evident to one skilled in the art. It will be understood that certain features and sub-combinations are of utility and may be employed without reference to other features and sub-combinations. This is contemplated by and is within the scope of the claims. Since many possible embodiments may be made of the invention without departing from the scope thereof, it is to be understood that all matter herein set forth or shown in the accompanying drawings is to be interpreted as illustrative and not in a limiting sense.

[0206] The methods of the appended claims are not limited in scope by the specific methods described herein, which are intended as illustrations of a few aspects of the claims and any methods that are functionally equivalent are intended to fall within the scope of the claims. Various modifications of the methods in addition to those shown and described herein are intended to fall within the scope of the appended claims. Further, while only certain representative method steps disclosed herein are specifically described, other combinations of the method steps also are intended to fall within the scope of the appended claims, even if not specifically recited. Thus, a combination of steps, elements, components, or constituents may be explicitly mentioned herein or less, however, other combinations of steps, elements, components, and constituents are included, even though not explicitly stated.

Claims

CLAIMSWhat is claimed is:

1. A device comprising: a dielectric layer comprising a first dielectric material and having a first permittivity; and a semiconductor layer comprising a semiconductor material having a second permittivity; a first electrode and a second electrode; one or more trenches within the dielectric layer, the trenches being at least partially filled with a second dielectric material; wherein the dielectric layer is deposited on the semiconductor layer; wherein the dielectric layer has a top surface, the top surface of the dielectric layer being opposite the semiconductor layer; wherein the semiconductor layer has a bottom surface, the bottom surface of the semiconductor layer being opposite the dielectric layer; wherein the first and second electrodes are arranged such that the device is a lateral device or a vertical device; wherein the second dielectric material is different than the first dielectric material, and the second dielectric material has a third permittivity; wherein parameters of the devices, such as parameters of the one or more trenches and / or the second dielectric material, are selected to control the electric field distribution when a bias is applied between the first and second electrodes, for example to provide a favorable electric field distribution.

2. The device of claim 1, wherein the semiconductor has p- or n-type conductivity.

3. The device of claim 1 or claim 2, wherein the semiconductor material comprises a III-V or II- VI semiconductor material.

4. The device of any one of claims 1-3, wherein the semiconductor material comprises Ga2Os, (Al,Ga)2O3, AlGaN, GaN, AIN, InGaN, SiC. Diamond, Boron nitride, Silicon, Germanium, SiGe, or a combination thereof.

5. The device of any one of claims 1-4, wherein the semiconductor material comprises Ga2O3, (Al,Ga)2O3, or a combination thereof.

6. The device of any one of claims 1-5, wherein the semiconductor material comprises Ga2O3.

7. The device of any one of claims 1-6, wherein the semiconductor material comprises P-Ga2O3.

8. The device of any one of claims 1-7, wherein the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof.

9. The device of any one of claims 1-8, wherein the first dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof.

10. The device of any one of claims 1-9, wherein the first dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

11. The device of any one of claims 1-10, wherein the first dielectric material comprises a high permittivity dielectric, such as BaTiCh.

12. The device of any one of claims 1-11, wherein the first dielectric material comprises a low permittivity dielectric, such as AI2O3.

13. The device of any one of claims 1-12, wherein the dielectric layer has an average thickness of from 1 Angstrom (A) to 1 millimeter (mm).

14. The device of any one of claims 1-13, wherein the dielectric layer has an average thickness of from 10 nanometers to 10 micrometers.

15. The device of any one of claims 1-14, wherein the first permittivity is higher than the second permittivity.

16. The device of any one of claims 1-15, wherein the first permittivity is higher than the second permittivity by a factor of 2 or more.

17. The device of any one of claims 1-14, wherein the first permittivity is similar to the second permittivity.

18. The device of any one of claims 1-17, wherein the first electrode and the second electrode are each independently be deposited on the dielectric layer and / or the semiconductor layer.

19. The device of any one of claims 1-18, wherein: the device has a top and a bottom, the bottom being opposite and spaced apart from the top; the top includes the dielectric layer and optionally portions of the semiconductor layer not covered by the dielectric layer; the bottom includes the bottom of the semiconductor layer (e.g., the opposite the dielectric layer).

20. The device of any one of claims 1-19, wherein the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode and the second electrode are each located towards the top of the device (e.g., wherein the device is a lateral device).

21. The device of any one of claims 1-20, wherein the first electrode and the second electrode are each independently deposited on the dielectric layer and / or the semiconductor layer, wherein the first electrode is located towards the top of the device and the second electrode is located on the bottom of the device (e.g., wherein the device is a vertical device).

22. The device of any one of claims 1-21, wherein the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride (e.g., hydrogenated silicon nitride), aluminum oxide, aluminum nitride, magnesium oxide, silicon dioxide, tantalum pentoxide, or a combination thereof.

23. The device of any one of claims 1-22, wherein the second dielectric material comprises hafnium silicate, zirconium silicate, hafnium oxide, barium titanate, barium-strontium titanate, zirconium dioxide, titanium dioxide, silicon nitride, aluminum oxide, aluminum nitride, magnesium oxide, or a combination thereof.

24. The device of any one of claims 1-23, wherein the second dielectric material comprises BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

25. The device of any one of claims 1-24, wherein the second dielectric material comprises a high permittivity dielectric, such as BaTiCh.

26. The device of any one of claims 1-25, wherein the second dielectric material comprises a low permittivity dielectric, such as AI2O3.

27. The device of any one of claims 1-26, wherein the first dielectric material and the second dielectric material independently comprise BaTiCh, AI2O3, SiCh, SiNx, HfCh, or a combination thereof.

28. The device of any one of claims 1-27, wherein the first dielectric material comprises BaTiCh and the second dielectric material comprises AI2O3.

29. The device of any one of claims 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises BaTiCh.

30. The device of any one of claims 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises SiCh.

31. The device of any one of claims 1-27, wherein the first dielectric material comprises SiCh and the second dielectric material comprises AI2O3.

32. The device of any one of claims 1-27, wherein the first dielectric material comprises SiNx and the second dielectric material comprises SiCh.

33. The device of any one of claims 1-27, wherein the first dielectric material comprises SiCh and the second dielectric material comprises SiNx.

34. The device of any one of claims 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises SiNx.

35. The device of any one of claims 1-27, wherein the first dielectric material comprises SiNx and the second dielectric material comprises AI2O3.

36. The device of any one of claims 1-27, wherein the first dielectric material comprises HfCh and the second dielectric material comprises AI2O3.

37. The device of any one of claims 1-27, wherein the first dielectric material comprises AI2O3 and the second dielectric material comprises HfCh.

38. The device of any one of claims 1-37, wherein the first permittivity is higher than the third permittivity.

39. The device of any one of claims 1-38, wherein the first permittivity is higher than both the second permittivity and the third permittivity.

40. The device of any one of claims 1-39, wherein the first permittivity is higher than both the second permittivity and the third permittivity, and the second permittivity is similar to the third permittivity.

41. The device of any one of claims 1-37, wherein the third permittivity is higher than the first permittivity and / or the second permittivity.

42. The device of claim 41, wherein the third permittivity is higher than both the first permittivity and the second permittivity.

43. The device of claim 41 or claim 42, wherein the third permittivity is higher than both the first permittivity and the second permittivity, and the first permittivity is similar to the second permittivity.

44. The device of any one of claims 1-43, wherein each of the one or more trenches extends from the top surface of the dielectric layer to a depth within the dielectric layer, wherein the depth of each of the one or more trenches are the same or different from each other.

45. The device of claim 44, wherein the depth of the trenches varies, such as wherein the depth of the trenches varies across the device.

46. The device of claim 44 or claim 45, wherein the depth of each of the one or more trenches independently is from 1 Angstrom (A) to 1 millimeter (mm).

47. The device of any one of claims 44-46, wherein the depth of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

48. The device of any one of claims 1-47, wherein each of the one or more trenches has a shape within a plane substantially parallel to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

49. The device of any one of claims 1-48, wherein the one or more trenches are stripes, lines, curves, dots, hexagons, concentric shapes such as concentric circles, etc.

50. The device of any one of claims 1-49, wherein each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top ofthe dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 1 nanometer to 1 millimeter.

51. The device of any one of claims 1-50, wherein each of the one or more trenches has a shape and an average characteristic dimension within a plane substantially parallel to the top of the dielectric layer, wherein the average characteristic dimension of each of the one or more trenches independently is from 5 nanometers to 10 micrometers.

52. The device of any one of claims 1-51, wherein each of the one or more trenches has a cross-sectional shape within a plane substantially perpendicular to the top of the dielectric layer, wherein the shape is circular, ovate, ovoid, elliptic, annular, triangular, rectangular, hexagonal, polygonal, etc.

53. The device of any one of claims 1-52, wherein the device comprises a plurality of trenches (e.g., 2 or more trenches), spaced apart from each other by a distance along the top of the dielectric layer.

54. The device of any one of claims 1-53, wherein the parameters include the thickness of the dielectric layer, the composition of the first dielectric material, the composition of the second dielectric material, the composition of the semiconductor layer, the first permittivity, the second permittivity, the third permittivity, the depth of each of the one or more trenches, the average characteristic dimension of each of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the shape of the one or more trenches within a plane substantially parallel to the top of the dielectric layer, the cross-sectional shape of each of the one or more trenches within a plane substantially perpendicular to the top of the dielectric layer, the distance between each of the neighboring trenches along the top of the dielectric layer, or a combination thereof.

55. The device of any one of claims 1-54, wherein the favorable electric field distribution between the first and second electrodes is one that is more uniform when a voltage bias is applied between the first and second electrodes.

56. The device of any one of claims 1-55, wherein the favorable electric field distribution at an electrode edge is one that has a more uniform edge field termination when a voltage bias is applied between the first and second electrodes.

57. The device of any one of claims 1-56, parameters of the one or more trenches and / or the second dielectric material is selected to create peaks in the electric field distribution at specific regions when a voltage bias is applied between the first and second electrodes.

58. The device of any one of claims 1-57, wherein the device exhibits improved performance.

59. The device of any one of claims 1-58, wherein the device has increased breakdown voltage, reduced off-state capacitance, reduced stored charge, improved switching frequency, or a combination thereof.

60. The device of any one of claims 1-59, wherein the device has enhanced breakdown performance and tunability of the device electrostatics while lowering the amount of stored charge.

61. A method of making the device of any one of claims 1-60.

62. The method of claim 61, wherein the method comprises: depositing the first dielectric material to form the dielectric layer; depositing the semiconductor material to form the semiconductor layer; forming the one or more trenches in the dielectric layer; and depositing the second dielectric material within the one or more trenches.

63. A method of use of the device of any one of claims 1-60.

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