Display substrate and display panel

Abstract

A display substrate and a display panel. The display substrate comprises a substrate and a plurality of reflective electrodes located on one side of the substrate; each reflective electrode comprises a reflective layer and a transparent conductive layer, the reflective layer and the transparent conductive layer are sequentially stacked in the direction away from the substrate, and a first insulating layer is arranged between the reflective layer and the transparent conductive layer; distances from the surfaces on the sides of the transparent conductive layers of the plurality of reflective electrodes facing away from the substrate to the substrate are equal; distances from the surfaces on the sides of the reflective layers of at least some of the reflective electrodes facing away from the substrate to the substrate are unequal; the orthographic projections of the transparent conductive layers of the plurality of reflective electrodes on the substrate do not overlap; and the orthographic projections of reflective layers of adjacent reflective electrodes on the substrate are stitched at edges or overlap in edge regions. The display substrate maximizes the aperture ratio of any light-emitting unit corresponding to respective different reflective electrodes, thereby maximizing the utilization of the microcavity effect to improve light efficiency.

Description

Display substrate and display panel Technical Field

[0001] This disclosure pertains to the field of display technology, specifically relating to a display substrate and a display panel. Background Technology

[0002] In silicon-based Micro OLED (Organic Light-Emitting Diode) micro-display products, the optimal matching wavelengths for OLED light-emitting units of different colors (such as red, green, and blue OLED light-emitting units) vary due to their wavelength differences.

[0003] Currently, silicon-based Micro OLED microdisplay products have two structures: weak microcavity structures and strong microcavity structures. A weak microcavity structure refers to OLED light-emitting units of different colors (such as red, green, and blue OLED light-emitting units) having their reflective anodes on the same plane, and the microcavity length between the reflective anodes and cathodes of different colored OLED light-emitting units being the same. A strong microcavity structure refers to OLED light-emitting units of different colors not having their reflective anodes on the same plane, and the microcavity length between the reflective anodes and cathodes of different colored OLED light-emitting units being different. Summary of the Invention

[0004] This disclosure provides a display substrate, comprising a substrate,

[0005] Multiple reflective electrodes are located on one side of the substrate;

[0006] The reflective electrode includes a reflective layer and a transparent conductive layer, the reflective layer and the transparent conductive layer are stacked sequentially in a direction away from the substrate, and a first insulating layer is disposed between the reflective layer and the transparent conductive layer;

[0007] The distance between the transparent conductive layer of the plurality of reflective electrodes on the side facing away from the substrate and the substrate is equal.

[0008] At least some of the reflective layers of the reflective electrodes are at unequal distances from the substrate on the side facing away from the substrate;

[0009] The orthographic projections of the transparent conductive layers of the plurality of reflective electrodes onto the substrate do not overlap;

[0010] The edges of the reflective layers of adjacent reflective electrodes projecting onto the substrate are joined together or their edge regions overlap.

[0011] In some embodiments, the orthographic projections of the reflective layer and the transparent conductive layer of the reflective electrode onto the substrate at least partially overlap.

[0012] In some embodiments, a gap is formed between the transparent conductive layers of adjacent reflective electrodes.

[0013] The orthographic projection of the gap on the substrate lies within the overlapping area of ​​the orthographic projections of the reflective layers of the adjacent reflective electrodes on the substrate.

[0014] In some embodiments, the substrate includes a substrate, a pixel circuit, a first conductive structure, and a second conductive structure.

[0015] The first conductive structure and the second conductive structure are disposed in the same layer;

[0016] The pixel circuit is located on one side of the substrate, and the first conductive structure and the second conductive structure are located on the side of the pixel circuit opposite to the substrate.

[0017] The second conductive structure is electrically connected to the pixel circuit; the first conductive structure is electrically connected to the ground terminal.

[0018] The reflective layer of the reflective electrode is electrically connected to the first conductive structure; the transparent conductive layer of the reflective electrode is electrically connected to the second conductive structure.

[0019] In some embodiments, a second insulating layer is further included, located between the reflective electrode and the substrate.

[0020] The reflective layer is electrically connected to the first conductive structure through a first via formed in the second insulating layer, and the transparent conductive layer is electrically connected to the second conductive structure through a second via formed in the first insulating layer and the second insulating layer.

[0021] In some embodiments, the orthogonal projection of the first via on the substrate is located within the orthogonal projection region of the reflective layer on the substrate;

[0022] The orthographic projection of the second via on the substrate is located within the orthographic projection area of ​​the transparent conductive layer on the substrate, and the orthographic projection of the second via on the substrate does not overlap with the orthographic projection of the reflective layer on the substrate.

[0023] In some embodiments, the plurality of reflective electrodes includes a plurality of first reflective electrodes, a plurality of second reflective electrodes, and a plurality of third reflective electrodes.

[0024] The first reflective electrode, the second reflective electrode, and the third reflective electrode are distributed adjacent to each other;

[0025] The distance between the surface of the reflective layer of the first reflective electrode facing away from the substrate and the substrate is less than the distance between the surface of the reflective layer of the second reflective electrode facing away from the substrate and the substrate.

[0026] The distance between the surface of the reflective layer of the second reflective electrode facing away from the substrate and the substrate is less than the distance between the surface of the reflective layer of the third reflective electrode facing away from the substrate and the substrate.

[0027] In some embodiments, the distance between the orthographic projections of the same side edge of the reflective layer and the transparent conductive layer of the first reflective electrode onto the substrate is greater than the width of the gap;

[0028] The distance between the orthographic projections of the same side edge of the reflective layer and the transparent conductive layer of the second reflective electrode onto the substrate is greater than the width of the gap;

[0029] The distance between the orthographic projections of the same side boundary of the reflective layer and the transparent conductive layer of the third reflective electrode onto the substrate is greater than the width of the gap.

[0030] In some embodiments, the width of the gap ranges from 0.25 to 0.3 μm.

[0031] In some embodiments, the minimum distance between the boundary of the reflective layer of the reflective electrode near its second via and the second via ranges from 0.1 to 0.13 μm; the radial dimension of the second via ranges from 0.25 to 0.3 μm.

[0032] In some embodiments, a pixel defining layer is further included, located on the side of the reflective electrode opposite to the substrate.

[0033] The orthogonal projection of the pixel defining layer on the substrate covers the orthogonal projection of the gap on the substrate.

[0034] In some embodiments, the distance between the pixel defining layer and the corresponding side edge of the gap it covers projected onto the substrate ranges from 0.38 to 0.46 μm.

[0035] In some embodiments, the orthographic projection of the pixel defining layer on the substrate further covers the orthographic projection of the second via on the substrate;

[0036] The distance between the orthographic projection of the edge of the pixel defining layer near the second via on the substrate and the orthographic projection of the second via on the substrate is greater than 0.03 μm.

[0037] In some embodiments, the pixel defining layer includes a first sub-layer, a second sub-layer, and a third sub-layer, wherein the first sub-layer, the second sub-layer, and the third sub-layer are stacked sequentially away from the substrate.

[0038] The orthographic projection of the third sublayer on the substrate covers the orthographic projection of the second sublayer on the substrate, and the orthographic projection area of ​​the third sublayer on the substrate is greater than the orthographic projection area of ​​the second sublayer on the substrate.

[0039] The orthographic projections of the third sublayer and the second sublayer onto the substrate are located within the orthographic projection area of ​​the first sublayer onto the substrate, and the orthographic projection area of ​​the third sublayer onto the substrate is smaller than the orthographic projection area of ​​the first sublayer onto the substrate.

[0040] This disclosure also provides a display panel, which includes the aforementioned display substrate. Attached Figure Description

[0041] The accompanying drawings are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the disclosure and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0042] Figure 1 is a top view of the structure of the display substrate in an embodiment of this disclosure.

[0043] Figure 2a is a schematic cross-sectional view of a structure along the AA' section line in Figure 1.

[0044] Figure 2b is a schematic cross-sectional view of another structure along the AA' section line in Figure 1.

[0045] Figure 2c is a schematic cross-sectional view of the structure along the BB' section line in Figure 1.

[0046] Figures 3a-3l are cross-sectional schematic diagrams showing the fabrication process of a display substrate according to an embodiment of the present disclosure. Detailed Implementation

[0047] To enable those skilled in the art to better understand the technical solutions of the embodiments of this disclosure, a display substrate and a display panel provided in the embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0048] Embodiments of this disclosure will be described more fully below with reference to the accompanying drawings; however, the embodiments shown may be embodied in different forms and should not be construed as limited to the embodiments set forth in this disclosure. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this disclosure.

[0049] This disclosure is not limited to the embodiments shown in the accompanying drawings, but includes modifications to the configuration based on the manufacturing process. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown illustrate specific shapes of the areas, but are not intended to be limiting.

[0050] In related technologies, in Micro OLED microdisplays with weak microcavity structures, the reflective anodes of different colored OLED light-emitting units are on the same plane, and the microcavity lengths between the reflective anodes and cathodes of different colored OLED light-emitting units are the same. This makes it impossible to adjust the microcavity effect of different colored OLED light-emitting units separately. Therefore, the weak microcavity structure cannot maximize the use of the microcavity effect to improve luminous efficiency, and microlenses need to be added to the color filter on the light-emitting side of the OLED light-emitting unit to achieve focused light emission and increase light intensity. In Micro OLED microdisplays with strong microcavity structures, the reflective anodes of different colored OLED light-emitting units are not on the same plane, and the microcavity lengths between the reflective anodes and cathodes of different colored OLED light-emitting units are different. Therefore, the microcavity lengths of different colored OLED light-emitting units can be adjusted separately to achieve optimal gain. Micro OLED microdisplays with strong microcavity structures have better luminous efficiency and color purity than those with weak microcavity structures. Micro OLED microdisplays with strong microcavity structures can also achieve high-intensity light emission without adding microlenses to the color filter.

[0051] In related technologies, there are two types of reflective anode structures for different color OLED light-emitting units in Micro OLED microdisplay products with strong microcavity structures: multi-level reflective anode structures and flat reflective anode structures. In a multi-level reflective anode structure, the reflective anodes of different color OLED light-emitting units are not on the same plane, but have a height difference; in a flat reflective anode structure, the reflective anodes of different color OLED light-emitting units are on the same plane. Flat reflective anode structures can effectively reduce defects such as cathode puncture caused by the height difference of the reflective anodes in the light-emitting functional layers of different color OLED light-emitting units. However, the flat reflective anode structure and the scheme of limiting the opening of the OLED light-emitting unit (i.e., pixel) through a pixel delimiting layer in related technologies will lead to the compression of the OLED light-emitting unit opening (i.e., the pixel opening size is limited by the size of the reflective anode and the size of the pixel delimiting layer). This compression of the OLED light-emitting unit opening leads to a reduction in the opening area, which in turn reduces the efficiency of the OLED light-emitting unit.

[0052] To address the aforementioned problems in the related technologies, this disclosure provides a display substrate, as shown in Figures 1, 2a, and 2b. The display substrate includes a substrate 1 and a plurality of reflective electrodes 2 located on one side of the substrate 1. Each reflective electrode 2 includes a reflective layer 21 and a transparent conductive layer 22, which are sequentially stacked along a direction away from the substrate 1, and a first insulating layer 3 is disposed between the reflective layer 21 and the transparent conductive layer 22. The distance between the surface of the transparent conductive layer 22 of the plurality of reflective electrodes facing away from the substrate 1 and the substrate 1 is equal. The distance between the surface of the reflective layer 21 of at least some of the reflective electrodes facing away from the substrate 1 and the substrate 1 is unequal. The orthographic projections of the transparent conductive layers 22 of the plurality of reflective electrodes on the substrate 1 do not overlap. The edges of the orthographic projections of the reflective layers 21 of adjacent reflective electrodes on the substrate 1 are joined or their edge regions overlap.

[0053] The reflective electrode 2 can serve as the anode of a Micro OLED light-emitting unit, a Mini OLED light-emitting unit, or an OLED light-emitting unit. The surface of the substrate 1 closest to the reflective electrode 2 is planar, and the distance between the transparent conductive layer 22 of the multiple reflective electrodes and the substrate 1 is equal, meaning that the transparent conductive layer 22 of the multiple reflective electrodes and the substrate 1 are located on the same plane.

[0054] In this embodiment, by splitting the reflective electrode 2 into a reflective layer 21 and a transparent conductive layer 22, and making the side surfaces of the transparent conductive layers 22 of multiple reflective electrodes facing away from the substrate 1 located on the same plane, it is possible to realize Micro OLED, Mini OLED or OLED display products with strong microcavity structure and flat anode structure, thereby improving or avoiding mis-layering of subsequent vapor-deposited materials (mainly light-emitting materials) caused by the height difference of different transparent conductive layers 22, and further improving or avoiding defects such as cathode puncture caused by the height difference of different transparent conductive layers 22. At the same time, it can also improve or avoid the problem of foreign objects in the subsequent vapor-deposited materials causing puncture to the electrode (such as cathode) located above the light-emitting material layer caused by the height difference of different transparent conductive layers 22.

[0055] In this embodiment, by splitting the reflective electrode 2 into a reflective layer 21 and a transparent conductive layer 22, and making the distance between the surface of the reflective layer 21 of at least some of the reflective electrodes facing away from the substrate 1 and the substrate 1 unequal, it is possible to realize Micro OLED, Mini OLED or OLED display products with strong microcavity structure and multi-level reflective anode structure. In this way, the microcavity length of Micro OLED, Mini OLED or OLED light-emitting units of different colors can be adjusted to achieve the best gain.

[0056] In this embodiment, by splicing the edges of the orthographic projections of the reflective layers 21 of adjacent reflective electrodes 2 onto the substrate 1 or by overlapping the edge regions, the orthographic projections of the reflective layers 21 of multiple reflective electrodes 2 onto the substrate 1 form a whole surface. This ensures that the light emitted by any light-emitting unit corresponding to different reflective electrodes 2 in the display product using this display substrate will be reflected after it shines on the reflective layer 21. This maximizes the aperture ratio of any light-emitting unit corresponding to different reflective electrodes 2, thereby maximizing the utilization of the microcavity effect to improve the light efficiency and achieve the best gain.

[0057] In some embodiments, the orthographic projections of the reflective layer 21 and the transparent conductive layer 22 of the reflective electrode 2 onto the substrate 1 at least partially overlap.

[0058] In some embodiments, a gap is formed between the transparent conductive layers 22 of adjacent reflective electrodes 2, and the orthographic projection of the gap on the substrate 1 is located in the overlapping area of ​​the orthographic projection of the reflective layers 21 of adjacent reflective electrodes 2 on the substrate 1.

[0059] In some embodiments, the substrate 1 includes a base 10, a pixel circuit 11, a first conductive structure 12, and a second conductive structure 13, wherein the first conductive structure 12 and the second conductive structure 13 are disposed on the same layer; the pixel circuit 11 is located on one side of the base 10, and the first conductive structure 12 and the second conductive structure 13 are located on the side of the pixel circuit 11 opposite to the base 10; the second conductive structure 13 is electrically connected to the pixel circuit 11; the first conductive structure 12 is electrically connected to a ground terminal (not shown in the figure); the reflective layer 21 of the reflective electrode 2 is electrically connected to the first conductive structure 12; and the transparent conductive layer 22 of the reflective electrode 2 is electrically connected to the second conductive structure 13.

[0060] In some embodiments, there are multiple pixel circuits 11, multiple first conductive structures 12, and multiple second conductive structures 13. Each pixel circuit 11 is electrically connected to a corresponding second conductive structure 13, and each second conductive structure 13 is electrically connected to a corresponding transparent conductive layer 22 of the reflective electrode 2. In some embodiments, there may also be only one first conductive structure 12.

[0061] In this embodiment, the transparent conductive layer 22 of the reflective electrode 2 serves as the actual anode of the Micro OLED light-emitting unit, Mini OLED light-emitting unit, or OLED light-emitting unit. The reflective layer 21 of the reflective electrode 2 only serves to reflect light. The reflective layer 21 is connected to the ground terminal through the first conductive structure 12, which can prevent the accumulation of charge on the reflective layer 21 from forming a capacitance with other conductive layers, thereby avoiding the adverse effect of the capacitance on the display product using the display substrate.

[0062] In some embodiments, the reflective layer 21 is made of an opaque metal material, which can be a single layer of opaque metal material, such as gold, silver, copper, aluminum, etc.; or it can be a stack of multiple opaque metal material layers, such as a titanium-aluminum-titanium stack. The transparent conductive layer 22 is made of a light-transmitting conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), etc. The first conductive structure 12 and the second conductive structure 13 can be a single layer of metal or a stack of multiple metal layers. The pixel circuit 11 is a traditional pixel circuit, such as a 7T (transistor) 1C (capacitor) circuit, an 8T 1C circuit, or a 9T 2C circuit, etc., which will not be described in detail here.

[0063] In some embodiments, as shown in FIG2a, FIG2b and FIG2c, the display substrate further includes a second insulating layer 4 located between the reflective electrode 2 and the substrate 1. The reflective layer 21 is electrically connected to the first conductive structure 12 through a first via 40 formed in the second insulating layer 4, and the transparent conductive layer 22 is electrically connected to the second conductive structure 13 through a second via 41 formed in the first insulating layer 3 and the second insulating layer 4.

[0064] In some embodiments, the orthographic projection of the first via 40 on the substrate 10 is located within the orthographic projection region of the reflective layer 21 on the substrate 10; the orthographic projection of the second via 41 on the substrate 10 is located within the orthographic projection region of the transparent conductive layer 22 on the substrate 10, and the orthographic projection of the second via 41 on the substrate 10 does not overlap with the orthographic projection of the reflective layer 21 on the substrate 10.

[0065] In some embodiments, a cutout pattern can be formed in the reflective layer 21 corresponding to the area of ​​the second via 41. The orthographic projection of the second via 41 onto the substrate 10 falls within the orthographic projection area of ​​the cutout pattern onto the substrate 10, thereby preventing electrical connection between the reflective layer 21 and the transparent conductive layer 22. That is, the orthographic projection of the reflective layer 21 of the multiple reflective electrodes onto the substrate 10, excluding the orthographic projection area of ​​the cutout pattern onto the substrate 10, is a whole surface area.

[0066] In some embodiments, the conductive material in the first via 40 can be the same as the material of the reflective layer 21, or it can be another conductive material with low impedance, such as tungsten. The conductive material in the second via 41 can be the same as the material of the transparent conductive layer 22, or it can be a conductive material with low impedance, such as tungsten.

[0067] In some embodiments, as shown in FIG2a, the plurality of reflective electrodes 2 include a plurality of first reflective electrodes 201, a plurality of second reflective electrodes 202, and a plurality of third reflective electrodes 203, wherein the first reflective electrodes 201, the second reflective electrodes 202, and the third reflective electrodes 203 are distributed adjacent to each other; the distance s1 between the side surface of the reflective layer 21 of the first reflective electrode 201 facing away from the substrate 1 and the substrate 1 is less than the distance s2 between the side surface of the reflective layer 21 of the second reflective electrode 202 facing away from the substrate 1 and the substrate 1; the distance s2 between the side surface of the reflective layer 21 of the second reflective electrode 202 facing away from the substrate 1 and the substrate 1 is less than the distance s3 between the side surface of the reflective layer 21 of the third reflective electrode 203 facing away from the substrate 1 and the substrate 1.

[0068] In some embodiments, the first reflective electrode 201 can serve as the anode of a blue Micro OLED light-emitting unit, a Mini OLED light-emitting unit, or an OLED light-emitting unit; the second reflective electrode 202 can serve as the anode of a red Micro OLED light-emitting unit, a Mini OLED light-emitting unit, or an OLED light-emitting unit; and the third reflective electrode 203 can serve as the anode of a green Micro OLED light-emitting unit, a Mini OLED light-emitting unit, or an OLED light-emitting unit. The distances between the reflective layers 21 of the first reflective electrode 201, the second reflective electrode 202, and the third reflective electrode 203 and the substrate 1 are configured to allow for separate adjustment of the microcavity lengths of the red, green, and blue Micro OLED, Mini OLED, or OLED light-emitting units, thereby optimizing their gain.

[0069] In some embodiments, as shown in FIG2b, the adjacent edges of the reflective layers 21 of the first reflective electrode 201, the second reflective electrode 202, and the third reflective electrode 203 projected onto the substrate 1 are joined together.

[0070] In some embodiments, as shown in FIG2a, the adjacent edge regions of the reflective layers 21 of the first reflective electrode 201, the second reflective electrode 202, and the third reflective electrode 203 projected onto the substrate 1 overlap.

[0071] In this embodiment, the reflective layers 21 of the first reflective electrode 201, the second reflective electrode 202, and the third reflective electrode 203 are projected onto the substrate 1 to form a whole surface. This allows light emitted by different colored light-emitting units in the display product using this display substrate to be reflected after hitting the reflective layer 21, thereby maximizing the aperture ratio of different colored light-emitting units. This allows the microcavity effect to be utilized to the maximum extent to improve the light efficiency and achieve the best gain.

[0072] In some embodiments, as shown in FIG2a, the distance b between the orthographic projections of the same side edges of the reflective layer 21 and the transparent conductive layer 22 of the first reflective electrode 201 onto the substrate 1 is greater than the width a of the gap; the distance c between the orthographic projections of the same side edges of the reflective layer 21 and the transparent conductive layer 22 of the second reflective electrode 202 onto the substrate 1 is greater than the width a of the gap; and the distance d between the orthographic projections of the same side boundaries of the reflective layer 21 and the transparent conductive layer 22 of the third reflective electrode 203 onto the substrate 1 is greater than the width a of the gap. This arrangement ensures that any side edge region of the reflective layer 21 of each reflective electrode 2 can completely block its corresponding gap, thereby allowing light incident on the reflective layer 21 from the gap region to be reflected and utilized. This maximizes the aperture ratio of different color light-emitting units, thereby maximizing the luminous efficacy of the display product using this display substrate.

[0073] In some embodiments, the width 'a' of the gap ranges from 0.25 to 0.3 μm.

[0074] In some embodiments, as shown in FIG2c, the minimum distance h between the boundary of the reflective layer 21 of the reflective electrode 2 near its second via 41 and the second via 41 ranges from 0.1 to 0.13 μm. This configuration, on the one hand, prevents a short circuit between the reflective layer 21 of the reflective electrode 2 and its second via 41, thereby preventing electrical connection between the reflective layer 21 of the reflective electrode 2 and the transparent conductive layer 22; on the other hand, it maximizes the coverage area of ​​the reflective layer 21 of each reflective electrode 2, thereby maximizing the reflection of light emitted by the light-emitting unit by the reflective layer 21 of each reflective electrode 2.

[0075] In some embodiments, as shown in FIG2c, the radial dimension i of the second via 41 ranges from 0.25 to 0.3 μm. This configuration ensures a reliable electrical connection between the transparent conductive layer 22 and the second conductive structure 13, and minimizes the projected area of ​​the second via 41 on the substrate 10, thereby maximizing the coverage of the reflective layer 21 of each reflective electrode 2, and further maximizing the reflection of light emitted by the light-emitting unit by each reflective layer 21 of the reflective electrode 2.

[0076] In some embodiments, as shown in Figures 2a, 2b, and 2c, the display substrate further includes a pixel defining layer 5 located on the side of the reflective electrode 2 facing away from the substrate 1. The orthographic projection of the pixel defining layer 5 onto the substrate 1 covers the orthographic projection of the gap onto the substrate 1. The pixel defining layer 5 is used to define the opening area where the light-emitting unit is located.

[0077] In some embodiments, the distance g between the pixel defining layer 5 and the corresponding side edge of the gap it covers projected onto the substrate 1 ranges from 0.38 to 0.46 μm. This configuration allows the pixel defining layer 5 to define the size of the opening area where the light-emitting unit is located, and also allows the pixel defining layer 5 to disconnect the light-emitting functional layers of adjacent light-emitting units, thereby preventing light or color mixing between adjacent light-emitting units.

[0078] In some embodiments, the orthographic projection of the pixel defining layer 5 onto the substrate 10 also covers the orthographic projection of the second via 41 onto the substrate 10. This configuration avoids the second via 41 occupying the area of ​​the opening region defined by the pixel defining layer 5 and the area of ​​the reflective layer 21 corresponding to the opening region, thereby increasing the aperture ratio.

[0079] In some embodiments, the distance j between the orthographic projection of the side edge of the pixel defining layer 5 near the second via 41 onto the substrate 10 and the orthographic projection of the second via 41 onto the substrate 10 is greater than 0.03 μm.

[0080] In some embodiments, as shown in Figures 2a, 2b, and 2c, the pixel defining layer 5 includes a first sub-layer 51, a second sub-layer 52, and a third sub-layer 53. The first sub-layer 51, the second sub-layer 52, and the third sub-layer 53 are stacked sequentially away from the substrate 1. The orthographic projection of the third sub-layer 53 on the substrate 1 covers the orthographic projection of the second sub-layer 52 on the substrate 1, and the orthographic projection area of ​​the third sub-layer 53 on the substrate 1 is larger than the orthographic projection area of ​​the second sub-layer 52 on the substrate 1. The orthographic projections of the third sub-layer 53 and the second sub-layer 52 on the substrate 1 are located within the orthographic projection area of ​​the first sub-layer 51 on the substrate 1, and the orthographic projection area of ​​the third sub-layer 53 on the substrate 1 is smaller than the orthographic projection area of ​​the first sub-layer 51 on the substrate 1.

[0081] In some embodiments, the distance e between the orthographic projections of the same side edges of the first sublayer 51 and the third sublayer 53 onto the substrate 1 ranges from 0.01 to 0.03 μm; the distance f between the orthographic projections of the same side edges of the first sublayer 51 and the second sublayer 52 onto the substrate 1 ranges from 0.08 to 0.11 μm. That is, the second sublayer 52 on the edge end face of the pixel defining layer 5 forms a concave structure relative to the first sublayer 51 and the third sublayer 53.

[0082] The pixel defining layer 5 with a concave structure on the edge end face can disconnect the light-emitting functional layers of adjacent light-emitting units at the concave structure on the edge end face, thereby preventing light mixing or color mixing between adjacent light-emitting units.

[0083] In some embodiments, the first insulating layer 3 and the second insulating layer 4 are made of light-transmitting insulating material; the pixel defining layer 5 is made of light-transmitting insulating material.

[0084] In some embodiments, the first insulating layer 3 and the second insulating layer 4 may be made of materials such as silicon oxide, silicon nitride, or silicon oxynitride. Each sublayer of the pixel defining layer 5 is made of materials such as silicon oxide, silicon nitride, or silicon oxynitride.

[0085] In this embodiment, the pixel defining layer 5 is made of a light-transmitting insulating material. Under the premise that the reflective layer 21 of the reflective electrode 2 achieves full-area reflection of the light emitted by the light-emitting unit, the light-transmitting pixel defining layer 5 can work with the full-area reflective layer 21 to further maximize the aperture ratio of different color light-emitting units, thereby maximizing the light efficiency of the display product using this display substrate.

[0086] It should be noted that the light transmitted through the pixel boundary layer 5 can be blocked at the overlapping positions of different color films (such as red, green, and blue) above the light-emitting unit, so it will not cause color mixing or cross-coloring between adjacent light-emitting units of different colors.

[0087] In some embodiments, the pixel defining layer 5 may also be made of an opaque insulating material, such as a black organic resin material.

[0088] Based on the above-described structure of the display substrate, this disclosure also provides a method for fabricating the display substrate, comprising: fabricating a substrate; fabricating a plurality of reflective electrodes on one side of the substrate; fabricating the reflective electrodes includes sequentially fabricating a reflective layer and a transparent conductive layer, and after completing the fabrication of the reflective layer and before fabricating the transparent conductive layer, further comprising fabricating a first insulating layer; the distance between the surface of the transparent conductive layer of the plurality of reflective electrodes facing away from the substrate and the substrate is equal; the distance between the surface of the reflective layer of at least some of the reflective electrodes facing away from the substrate and the substrate is unequal; the orthographic projections of the transparent conductive layers of the plurality of reflective electrodes on the substrate do not overlap; the edges of the orthographic projections of the reflective layers of adjacent reflective electrodes on the substrate are joined or their edge regions overlap.

[0089] In some embodiments, fabricating a plurality of reflective electrodes includes fabricating a plurality of first reflective electrodes, a plurality of second reflective electrodes, and a plurality of third reflective electrodes. Fabricating a plurality of first reflective electrodes, a plurality of second reflective electrodes, and a plurality of third reflective electrodes includes: fabricating a reflective layer for a plurality of first reflective electrodes; fabricating a reflective layer for a plurality of second reflective electrodes; fabricating a reflective layer for a plurality of third reflective electrodes; and fabricating a transparent conductive layer for a plurality of first reflective electrodes, a plurality of second reflective electrodes, and a plurality of third reflective electrodes.

[0090] In some embodiments, as shown in Figures 3a-3l, the specific process of display substrate fabrication is as follows: Step S1: As shown in Figure 3a, a first conductive structure 12 and a second conductive structure 13 are fabricated on one side of the substrate 10 where the pixel circuit 11 has been fabricated.

[0091] In this step, a metal film layer is first deposited on one side of the substrate 10 after the pixel circuit 11 has been fabricated using a PVD (Physical Vapor Deposition) process. Then, the first conductive structure 12 and the second conductive structure 13 are formed by coating photoresist, exposure, development, and etching. A first gap is formed between the first conductive structure 12 and the second conductive structure 13.

[0092] Step S2: As shown in Figure 3b, a third insulating layer (such as SiOx, silicon oxide) 6 is deposited on the substrate 10 after step S1 using HDP (High Density PECVD (Plasma Enhanced Chemical Vaporized Deposition) process. Then, the first gap between the first conductive structure 12 and the second conductive structure 13 is filled by CMP (Chemical Mechanical Polishing) process, that is, the side surface of the third insulating layer 6 facing away from the substrate 10 is flush with the side surfaces of the first conductive structure 12 and the second conductive structure 13 facing away from the substrate 10.

[0093] Step S3: As shown in Figure 3c, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S2 using HDP (High Density PECVD) process. After photoresist coating, exposure, development and dry etching processes, a pattern of a first via 40 (corresponding to the first reflective electrode) is formed in the second insulating layer 4. Conductive material (such as tungsten) is filled into the first via 40 using patterning or printing processes, and CMP (Chemical Mechanical Polishing) process is performed to ensure that the side surface of the conductive material in the first via 40 facing away from the substrate 10 is flush with the side surface of the second insulating layer 4 facing away from the substrate 10. Then, a reflective layer film of the first reflective electrode (such as a Ti, Al, Ti stacked structure) is formed using PVD (hysical vapor deposition) process. After photoresist coating, exposure, development and etching processes, a pattern of reflective layer 21 of the first reflective electrode is formed.

[0094] Step S4: As shown in Figure 3d, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S3 by HDP process (same as above), and then by CMP process (same as above) to ensure that the surface of the second insulating layer 4 and the reflective layer 21 of the first reflective electrode facing away from the substrate 10 is flush.

[0095] Step S5: As shown in Figure 3e, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S4 using HDP (High Density PECVD) process. After photoresist coating, exposure, development and dry etching processes, a first via 40 (corresponding to the second reflective electrode) pattern is formed in the second insulating layer 4. Conductive material (such as tungsten) is filled into the first via 40 using patterning or printing processes, and CMP (Chemical Mechanical Polishing) process is performed to ensure that the surface of the conductive material in the first via 40 facing away from the substrate 10 is flush with the surface of the second insulating layer 4 facing away from the substrate 10. Then, a reflective layer film of the second reflective electrode (such as a Ti, Al, Ti stacked structure) is formed using PVD (hysical vapor deposition) process. After photoresist coating, exposure, development and etching processes, a reflective layer 21 pattern of the second reflective electrode is formed.

[0096] Step S6: As shown in Figure 3f, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S5 by HDP process (same as above), and then by CMP process (same as above) to ensure that the surface of the second insulating layer 4 and the reflective layer 21 of the second reflective electrode facing away from the substrate 10 is flush.

[0097] Step S7: As shown in Figure 3g, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S6 using HDP (High Density PECVD) process. After photoresist coating, exposure, development and dry etching processes, a first via 40 (corresponding to the third reflective electrode) pattern is formed in the second insulating layer 4. Conductive material (such as tungsten) is filled into the first via 40 using patterning or printing processes, and CMP (Chemical Mechanical Polishing) process is performed to ensure that the side surface of the conductive material in the first via 40 facing away from the substrate 10 is flush with the side surface of the second insulating layer 4 facing away from the substrate 10. Then, a reflective layer film of the third reflective electrode (such as a Ti, Al, Ti stacked structure) is formed using PVD (hysical vapor deposition) process. After photoresist coating, exposure, development and etching processes, a reflective layer 21 pattern of the third reflective electrode is formed.

[0098] Step S8: As shown in Figure 3h, a second insulating layer (such as SiOx) 4 is deposited on the substrate 10 after step S7 by HDP process (same as above), and then by CMP process (same as above) to ensure that the surface of the second insulating layer 4 and the reflective layer 21 of the third reflective electrode facing away from the substrate 10 is flush.

[0099] Step S9: As shown in Figure 3i, a first insulating layer (such as SiOx) 3 is deposited on the substrate 10 after step S8 using HDP process (same as above). Then, CMP process (same as above) is used to ensure that the surface of the first insulating layer 3 facing away from the substrate 10 is flush. Then, through photoresist coating, exposure, development and dry etching processes, a pattern of the second via 41 is formed in the first insulating layer 3 and the second insulating layer 4. Conductive material (such as tungsten) is filled into the second via 41 through patterning process or printing process, and CMP (Chemical Mechanical Polishing) process is performed to ensure that the surface of the conductive material in the second via 41 facing away from the substrate 10 is flush with the surface of the first insulating layer 3 facing away from the substrate 10.

[0100] Step S10: As shown in Figure 3j, a transparent conductive layer film of the first reflective electrode, the second reflective electrode, and the third reflective electrode is formed on the substrate 10 after step S9 by PVD (physical vapor deposition) process (e.g., the transparent conductive layer film is made of ITO material). Then, the transparent conductive layer 22 of the first reflective electrode, the second reflective electrode, and the third reflective electrode is formed by photoresist coating, exposure, development, and etching processes.

[0101] Step S11: As shown in Figure 3k, a fourth insulating layer (such as SiOx) 7 is deposited on the substrate 10 after step S10 by HDP process (same as above). Then, the gap between adjacent transparent conductive layers 22 is filled by CMP process (same as above), that is, the side surface of the fourth insulating layer 7 facing away from the substrate 10 is flush with the side surface of the transparent conductive layer 22 facing away from the substrate 10.

[0102] Step S12: As shown in Figure 31, the first sublayer film (SiOx), the second sublayer film (SiNx), and the third sublayer film (SiOx) of the pixel defining layer are sequentially deposited on the substrate 10 after step S11 using a CVD (Chemical Vaporized Deposition) process. Then, after coating with photoresist, exposure, and development, the patterns of the third sublayer 53, the second sublayer 52, and the first sublayer 51 are sequentially etched by adjusting the etching selectivity. At this point, the display substrate fabrication is complete.

[0103] The display substrate provided in this embodiment splits the reflective electrodes into a reflective layer and a transparent conductive layer, and splices or overlaps the edges of the orthographic projections of the reflective layers of adjacent reflective electrodes on the substrate. This allows the orthographic projections of the reflective layers of multiple reflective electrodes on the substrate to form a whole surface. As a result, the light emitted by any light-emitting unit corresponding to different reflective electrodes in the display product using this display substrate will be reflected after shining on the reflective layer. This maximizes the aperture ratio of any light-emitting unit corresponding to different reflective electrodes, thereby maximizing the utilization of the microcavity effect to improve the light efficiency and achieve optimal gain.

[0104] This disclosure also provides a display panel, including the display substrate described in the above embodiments.

[0105] In some embodiments, the display panel further includes a light-emitting functional layer and a cathode, which are stacked sequentially on the side of the pixel defining layer of the display substrate away from the substrate. Within the opening area defined by the pixel defining layer, the reflective electrode, the light-emitting functional layer, and the cathode are stacked to form a light-emitting unit, which may be a Micro OLED light-emitting unit, a Mini OLED light-emitting unit, or an OLED light-emitting unit.

[0106] In this embodiment, the light-emitting functional layer is provided on the entire surface, and the light-emitting functional layer is broken at the concave structure of the edge end face of the pixel delimiting layer, thereby preventing light mixing or color mixing between adjacent light-emitting units.

[0107] In some embodiments, the light-emitting functional layer can be composed of a set of light-emitting layers of different colors (such as red, green, and blue) stacked together, or it can be composed of multiple sets of light-emitting layers of different colors stacked together, with a charge generation layer disposed between any two adjacent sets of light-emitting layer stacks. The concave structure of the edge end face of the pixel defining layer can separate a set of light-emitting layer stacks, or it can separate the charge generation layer between multiple sets of light-emitting layer stacks, thereby preventing light mixing or color mixing between adjacent light-emitting units.

[0108] By using the display substrate in the above embodiments, not only can a display panel with a strong microcavity structure be realized, but also defects such as cathode puncture caused by misalignment of the light-emitting functional layer can be improved or avoided, and the problem of foreign objects in the light-emitting functional layer causing puncture to the cathode can be improved or avoided; moreover, the aperture ratio of the light-emitting unit can be maximized, thereby improving the light efficiency of the display panel.

[0109] The display panel can be an AR (Augmented Reality) or VR (Virtual Reality) display panel.

[0110] The display panel provided in this disclosure can be any product or component with display function, such as a Micro OLED panel, Mini OLED panel, OLED panel, OLED TV, OLED billboard, monitor, mobile phone, or navigator.

[0111] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A display substrate, wherein, The substrate comprises a substrate, A plurality of reflective electrodes are located on one side of the substrate; The reflective electrode comprises a reflective layer and a transparent conductive layer, the reflective layer and the transparent conductive layer are sequentially stacked in the direction away from the substrate, and a first insulating layer is arranged between the reflective layer and the transparent conductive layer; The distance between the side surface of the transparent conductive layer of the plurality of reflective electrodes away from the substrate and the substrate is equal; The distance between the side surface of the reflective layer of at least part of the reflective electrode away from the substrate and the substrate is not equal; The orthogonal projection of the transparent conductive layer of the plurality of reflective electrodes on the substrate does not overlap; The edges of the orthogonal projection of the reflective layer of adjacent reflective electrodes on the substrate are spliced or the edge regions overlap. 2.The display substrate of claim 1, wherein, The orthogonal projection of the reflective layer and the transparent conductive layer of the reflective electrode on the substrate at least partially overlaps. 3.The display substrate of claim 2, wherein, The gap between the transparent conductive layers of adjacent reflective electrodes, The orthogonal projection of the gap on the substrate is located in the overlapping area of the orthogonal projection of the reflective layer of adjacent reflective electrodes on the substrate. 4.The display substrate of claim 3, wherein, The substrate comprises a substrate, a pixel circuit, a first conductive structure and a second conductive structure, The first conductive structure and the second conductive structure are arranged in the same layer; The pixel circuit is located on one side of the substrate, and the first conductive structure and the second conductive structure are located on the side of the pixel circuit away from the substrate; The second conductive structure is electrically connected with the pixel circuit, and the first conductive structure is electrically connected with a ground terminal; The reflective layer of the reflective electrode is electrically connected with the first conductive structure, and the transparent conductive layer of the reflective electrode is electrically connected with the second conductive structure. 5.The display substrate of claim 4, wherein, Further comprising a second insulating layer between the reflective electrode and the substrate, The reflective layer is electrically connected with the first conductive structure through a first via hole opened in the second insulating layer, and the transparent conductive layer is electrically connected with the second conductive structure through a second via hole opened in the first insulating layer and the second insulating layer. 6.The display substrate of claim 5, wherein, The orthogonal projection of the first via hole on the substrate is located in the orthogonal projection area of the reflective layer on the substrate; The orthogonal projection of the second via hole on the substrate is located in the orthogonal projection area of the transparent conductive layer on the substrate, and the orthogonal projection of the second via hole on the substrate does not overlap with the orthogonal projection of the reflective layer on the substrate.

7. The display substrate according to any one of claims 3-6, wherein, The plurality of reflective electrodes comprise a plurality of first reflective electrodes, a plurality of second reflective electrodes and a plurality of third reflective electrodes, The first reflective electrode, the second reflective electrode and the third reflective electrode are distributed adjacent to each other; The distance between the side surface of the reflective layer of the first reflective electrode away from the substrate and the substrate is smaller than the distance between the side surface of the reflective layer of the second reflective electrode away from the substrate and the substrate; The distance between the side surface of the reflective layer of the second reflective electrode away from the substrate and the substrate is smaller than the distance between the side surface of the reflective layer of the third reflective electrode away from the substrate and the substrate. 8.The display substrate of claim 7, wherein, The distance between the orthographic projections on the substrate of the same side edges of the reflective layer and the transparent conductive layer of the first reflective electrode is greater than the width of the gap; The distance between the orthographic projections on the substrate of the same side edges of the reflective layer and the transparent conductive layer of the second reflective electrode is greater than the width of the gap; The distance between the orthographic projections on the substrate of the same side edges of the reflective layer and the transparent conductive layer of the third reflective electrode is greater than the width of the gap. 9.The display substrate of claim 8, wherein, The width of the gap ranges from 0.25 to 0.3 μm. 10.The display substrate of claim 6, wherein, The minimum distance between the side edge of the reflective layer of the reflective electrode close to the second via and the second via ranges from 0.1 to 0.13 μm; The radial dimension of the second via ranges from 0.25 to 0.3 μm. 11.The display substrate of claim 6, wherein, Further comprising a pixel defining layer on the side of the reflective electrode facing away from the substrate, The orthographic projection on the substrate of the pixel defining layer covers the orthographic projection on the substrate of the gap. 12.The display substrate of claim 11, wherein, The distance between the respective side edges of the orthographic projections on the substrate of the pixel defining layer and the gap covered thereby ranges from 0.38 to 0.46 μm. 13.The display substrate of claim 11, wherein, The orthographic projection on the substrate of the pixel defining layer further covers the orthographic projection on the substrate of the second via; The distance between the orthographic projection on the substrate of the side edge of the pixel defining layer close to the second via and the orthographic projection on the substrate of the second via is greater than 0.03 μm. 14.The display substrate of claim 13, wherein, The pixel defining layer comprises a first sub-layer, a second sub-layer and a third sub-layer, the first sub-layer, the second sub-layer and the third sub-layer being stacked away from the substrate in turn, The orthographic projection on the substrate of the third sub-layer covers the orthographic projection on the substrate of the second sub-layer, and the area of the orthographic projection on the substrate of the third sub-layer is greater than the area of the orthographic projection on the substrate of the second sub-layer; The orthographic projections on the substrate of the third sub-layer and the second sub-layer are located within the area of the orthographic projection on the substrate of the first sub-layer, and the area of the orthographic projection on the substrate of the third sub-layer is less than the area of the orthographic projection on the substrate of the first sub-layer.

15. A display panel, wherein, The display substrate of any one of claims 1-14 is included.

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