Method and apparatus for bonding substrates

The substrate bonding apparatus with electrostatic clamps and actuators addresses substrate deformations and mismatches in wafer-to-wafer bonding, enhancing the accuracy and efficiency of the bonding process.

WO2025261694A1PCT designated stage Publication Date: 2025-12-26ASML NETHERLANDS BV
View PDF 19 Cites 0 Cited by

Patent Information

Application Number
PCT/EP2025/063931
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-19
Filing Date
2025-05-21
Publication Date
2025-12-26

AI Technical Summary

Technical Problem

Existing process control methods in the manufacture of integrated devices, particularly in wafer-to-wafer bonding, fail to account for substrate deformations and mismatches, leading to sub-optimal bonding and inefficiencies.

Method used

A substrate bonding apparatus utilizing electrostatic clamps with embedded actuators that displace and deform substrates to align and bond them accurately, coupled with measurement and control mechanisms to determine and adjust displacements for precise bonding.

Benefits of technology

Enhances the accuracy and efficiency of substrate bonding by compensating for deformations and mismatches, improving the quality and yield of integrated devices.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure EP2025063931_26122025_PF_FP_ABST
    Figure EP2025063931_26122025_PF_FP_ABST
Patent Text Reader

Abstract

Disclosed is a substrate bonding apparatus, comprising: a first clamp for securely holding a first substrate comprising a first bonding surface; and a second clamp for securely holding a second substrate comprising a second bonding surface arranged to face the first bonding surface and to be bonded therewith; wherein at least one of the clamps comprises a plurality of embedded actuators operable to displace along at least a direction perpendicular to a transversal plane in which the corresponding substrate is held; and wherein the first clamp and / or the second clamp are configured such that displacement of one or more of the actuators of the first clamp causes a deformation of the first bonding surface of the first substrate and / or displacement of one or more of the actuators of the second clamp causes a deformation of the second bonding surface of the second substrate.
Need to check novelty before this filing date? Find Prior Art

Description

METHOD AND APPARATUS FOR BONDING SUBSTRATESCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of EP application 24183097.5 which was filed on June 19, 2024 and which is incorporated herein in its entirety by reference.FIELD

[0002] The present invention relates to a method and apparatus for bonding two or more substrates together, in particular how to improve the performance of bonding processes.BACKGROUND

[0003] A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”- direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.

[0004] In order to monitor the lithographic process, parameters of the patterned substrate are measured. Parameters may include, for example, the overlay error between successive layers formed in or on the patterned substrate and critical line width (CD) of developed photosensitive resist. This measurement may be performed on a product substrate and / or on a dedicated metrology target. There are various techniques for making measurements of the microscopic structures formed in lithographic processes, including the use of scanning electron microscopes and various specialized tools. A fast and non-invasive form of specialized inspection tool is a scatterometer in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered or reflected beam are measured. Two main types of scatterometer are known. Spectroscopic scatterometers direct a broadband radiation beam onto the substrate and measure the spectrum (intensity as a function of wavelength) of the radiation scattered into a particular narrow angular range. Angularly resolvedscatterometers use a monochromatic radiation beam and measure the intensity of the scattered radiation as a function of angle.

[0005] Examples of known scatterometers include angle -resolved scatterometers of the type described in US2006033921A1 and US2010201963A1. The targets used by such scatterometers are relatively large, e.g., 40pm by 40pm, gratings and the measurement beam generates a spot that is smaller than the grating (i.e., the grating is underfilled). In addition to measurement of feature shapes by reconstruction, diffraction based overlay can be measured using such apparatus, as described in published patent application US2006066855A1. Diffraction-based overlay metrology using dark-field imaging of the diffraction orders enables overlay measurements on smaller targets. Examples of dark field imaging metrology can be found in international patent applications WO 2009 / 078708 and WO 2009 / 106279 which documents are hereby incorporated by reference in their entirety. Further developments of the technique have been described in published patent publications US20110027704A, US20110043791 A, US2011102753A1, US20120044470A, US20120123581A, US20130258310A, US20130271740A and WO2013178422A1. These targets can be smaller than the illumination spot and may be surrounded by product structures on a wafer. Multiple gratings can be measured in one image, using a composite grating target. The contents of all these applications are also incorporated herein by reference.

[0006] Process control methods are used in the manufacture of integrated devices to monitor and control the processes of application of a pattern on a substrate or measurement of such a pattern. Such process control techniques are typically performed to obtain corrections for control of the process. Subsequently, it is sometimes required (for certain devices) to bond substrates together. Bonding processes include die-to-die, die-to-wafer and wafer-to-wafer. Wafer-to- wafer bonding, where whole wafers are permanently bonded together prior to dicing, has the potential of providing a high accuracy and high throughput bonding solution.

[0007] It would be desirable to improve process control methods in the manufacture of integrated devices.SUMMARY OF THE INVENTION

[0008] In a first aspect of the invention, there is provided a substrate bonding apparatus, comprising: a first electrostatic clamp for securely holding a first substrate comprising a first bonding surface; and a second electrostatic clamp for securely holding a second substrate comprising a second bonding surface arranged to face the first bonding surface and to be bonded therewith; wherein the first electrostatic clamp comprises a plurality of first actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the first substrate is held and / or the second electrostatic clamp comprises a plurality of second actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the second substrate is held; and wherein the first electrostatic clamp and / or the second electrostatic clampare configured such that displacement of one or more of the plurality of first actuators of the first electrostatic clamp causes a deformation of the first bonding surface of the first substrate and / or displacement of one or more of the plurality of second actuators of the second electrostatic clamp causes a deformation of the second bonding surface of the second substrate.

[0009] In a second aspect of the invention, there is provided a method of bonding a first substrate to a second substrate in a substrate bonding apparatus according to the first aspect, the method comprising: placing the first substrate and the second substrate onto the first electrostatic clamp and the second electrostatic clamp, respectively; measuring the first substrate and the second substrate to obtain a first set of measurement data and a second set of measurement data, respectively; determining an amount of displacement for each of the plurality of first actuators of the first electrostatic clamp and / or for each of the plurality of second actuators of the second electrostatic clamp based on the first set of measurement data and the second set of measurement data, respectively; controlling the plurality of first actuators of the first electrostatic clamp based on the determined amounts of displacement to deform first bonding surface of the first substrate and / or the plurality of second actuators of the second electrostatic clamp based on the determined amounts of displacement to deform the second bonding surface of the second substrate; and bonding the first bonding surface of the first substrate to the second bonding surface of the second substrate to obtain a bonded substrate.

[0010] Further aspects, features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings in which:Figure 1 depicts a lithographic apparatus together with other apparatuses forming a production facility for semiconductor devices;Figure 2 comprises a schematic diagram of a scatterometer for use in measuring targets according to embodiments of the invention;Figure 3 is a schematic overview of control mechanisms in a lithographic process utilizing a scanner stability module.Figure 4 is a flow diagram describing an existing method of manufacturing integrated devices which utilizes wafer-to-wafer bonding;Figure 5 is a flow diagram describing existing methods for manufacturing integrated devices which utilize wafer-to-wafer bonding;Figure 6 illustrates a flow for a further example implementation for determining a post-bonding lithography correction; andFigure 7A schematically depicts a substrate bonding apparatus and a side cross-sectional view of a first (top) electrostatic clamp and a second (bottom) electrostatic clamp, in accordance with an embodiment;Figure 7B schematically depicts a top view of the first (top) electrostatic clamp used in the substrate bonding apparatus shown in Figure 7A;Figure 7C schematically depicts a central region and two concentric ring regions of the deformable layer of the first (top) electrostatic clamp;Figure 8 is a flowchart of a method of bonding a first substrate to a second substrate in a substrate bonding apparatus (e.g., as shown in Figure 7A), in accordance with an embodiment;Figure 9 schematically depicts an example implementation of the method step of applying a precorrection deformation to the second (bottom) electrostatic clamp; andFigures 10A-10C schematically depict an example implementation of the method step of bonding the first substrate to the second substrate.DETAILED DESCRIPTION

[0012] Before describing embodiments of the invention in detail, it is instructive to present an example environment in which embodiments of the present invention may be implemented.

[0013] Figure 1 at 200 shows a lithographic apparatus LA as part of an industrial production facility implementing a high-volume, lithographic manufacturing process. In the present example, the manufacturing process is adapted for the manufacture of for semiconductor products (integrated circuits) on substrates such as semiconductor wafers. The skilled person will appreciate that a wide variety of products can be manufactured by processing different types of substrates in variants of this process. The production of semiconductor products is used purely as an example which has great commercial significance today.

[0014] Within the lithographic apparatus (or “litho tool” 200 for short), a measurement station MEA is shown at 202 and an exposure station EXP is shown at 204. A control unit LACU is shown at 206. In this example, each substrate visits the measurement station and the exposure station to have a pattern applied. In an optical lithographic apparatus, for example, a projection system is used to transfer a product pattern from a patterning device MA onto the substrate using conditioned radiation and a projection system. This is done by forming an image of the pattern in a layer of radiation-sensitive resist material.

[0015] The term “projection system” used herein should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. The patterningMA device may be a mask or reticle, which imparts a pattern to a radiation beam transmitted or reflected by the patterning device. Well-known modes of operation include a stepping mode and a scanning mode. As is well known, the projection system may cooperate with support and positioning systems for the substrate and the patterning device in a variety of ways to apply a desired pattern to many target portions across a substrate. Programmable patterning devices may be used instead of reticles having a fixed pattern. The radiation for example may include electromagnetic radiation in the deep ultraviolet (DUV) or extreme ultraviolet (EUV) wavebands. The present disclosure is also applicable to other types of lithographic process, for example imprint lithography and direct writing lithography, for example by electron beam.

[0016] The lithographic apparatus control unit LACU which controls all the movements and measurements of various actuators and sensors to receive substrates W and reticles MA and to implement the patterning operations. . LACU also includes signal processing and data processing capacity to implement desired calculations relevant to the operation of the apparatus. In practice, control unit LACU will be realized as a system of many sub-units, each handling the real-time data acquisition, processing and control of a subsystem or component within the apparatus.

[0017] Before the pattern is applied to a substrate at the exposure station EXP, the substrate is processed in at the measurement station MEA so that various preparatory steps may be carried out. The preparatory steps may include mapping the surface height of the substrate using a level sensor and measuring the position of alignment marks on the substrate using an alignment sensor. The alignment marks are arranged nominally in a regular grid pattern. However, due to inaccuracies in creating the marks and also due to deformations of the substrate that occur throughout its processing, the marks deviate from the ideal grid. Consequently, in addition to measuring position and orientation of the substrate, the alignment sensor in practice must measure in detail the positions of many marks across the substrate area, if the apparatus is to print product features at the correct locations with very high accuracy. The apparatus may be of a so-called dual stage type which has two substrate tables, each with a positioning system controlled by the control unit LACU. While one substrate on one substrate table is being exposed at the exposure station EXP, another substrate can be loaded onto the other substrate table at the measurement station MEA so that various preparatory steps may be carried out. The measurement of alignment marks is therefore very time-consuming and the provision of two substrate tables enables a substantial increase in the throughput of the apparatus. If the position sensor IF is not capable of measuring the position of the substrate table while it is at the measurement station as well as at the exposure station, a second position sensor may be provided to enable the positions of the substrate table to be tracked at both stations. Lithographic apparatus LA may for example is of a so-called dual stage type which has two substrate tables and two stations - an exposure station and a measurement station- between which the substrate tables can be exchanged.

[0018] Within the production facility, apparatus 200 forms part of a “litho cell” or “litho cluster” that contains also a coating apparatus 208 for applying photosensitive resist and other coatings to substratesW for patterning by the apparatus 200. At an output side of apparatus 200, a baking apparatus 210 and developing apparatus 212 are provided for developing the exposed pattern into a physical resist pattern. Between all of these apparatuses, substrate handling systems take care of supporting the substrates and transferring them from one piece of apparatus to the next. These apparatuses, which are often collectively referred to as the track, are under the control of a track control unit which is itself controlled by a supervisory control system SCS, which also controls the lithographic apparatus via lithographic apparatus control unit LACU. Thus, the different apparatus can be operated to maximize throughput and processing efficiency. Supervisory control system SCS receives recipe information R which provides in great detail a definition of the steps to be performed to create each patterned substrate.

[0019] Once the pattern has been applied and developed in the litho cell, patterned substrates 220 are transferred to other processing apparatuses such as are illustrated at 222, 224, 226. A wide range of processing steps is implemented by various apparatuses in a typical manufacturing facility. For the sake of example, apparatus 222 in this embodiment is an etching station, and apparatus 224 performs a post-etch annealing step. Further physical and / or chemical processing steps are applied in further apparatuses, 226, etc.. Numerous types of operation can be required to make a real device, such as deposition of material, modification of surface material characteristics (oxidation, doping, ion implantation etc.), chemical-mechanical polishing (CMP), and so forth. The apparatus 226 may, in practice, represent a series of different processing steps performed in one or more apparatuses. As another example, apparatus and processing steps may be provided for the implementation of selfaligned multiple patterning, to produce multiple smaller features based on a precursor pattern laid down by the lithographic apparatus.

[0020] As is well known, the manufacture of semiconductor devices involves many repetitions of such processing, to build up device structures with appropriate materials and patterns, layer-by-layer on the substrate. Accordingly, substrates 230 arriving at the litho cluster may be newly prepared substrates, or they may be substrates that have been processed previously in this cluster or in another apparatus entirely. Similarly, depending on the required processing, substrates 232 on leaving apparatus 226 may be returned for a subsequent patterning operation in the same litho cluster, they may be destined for patterning operations in a different cluster, or they may be finished products to be sent for dicing and packaging.

[0021] Each layer of the product structure requires a different set of process steps, and the apparatuses 226 used at each layer may be completely different in type. Further, even where the processing steps to be applied by the apparatus 226 are nominally the same, in a large facility, there may be several supposedly identical machines working in parallel to perform the step 226 on different substrates. Small differences in set-up or faults between these machines can mean that they influence different substrates in different ways. Even steps that are relatively common to each layer, such as etching (apparatus 222) may be implemented by several etching apparatuses that are nominally identical but working in parallel to maximize throughput. In practice, moreover, different layers require different etch processes, forexample chemical etches, plasma etches, according to the details of the material to be etched, and special requirements such as, for example, anisotropic etching.

[0022] The previous and / or subsequent processes may be performed in other lithography apparatuses, as just mentioned, and may even be performed in different types of lithography apparatus. For example, some layers in the device manufacturing process which are very demanding in parameters such as resolution and overlay may be performed in a more advanced lithography tool than other layers that are less demanding. Therefore some layers may be exposed in an immersion type lithography tool, while others are exposed in a ‘dry’ tool. Some layers may be exposed in a tool working at DUV wavelengths, while others are exposed using EUV wavelength radiation.

[0023] In order that the substrates that are exposed by the lithographic apparatus are exposed correctly and consistently, it is desirable to inspect exposed substrates to measure properties such as overlay errors between subsequent layers, line thicknesses, critical dimensions (CD), etc. Accordingly a manufacturing facility in which litho cell LC is located also includes metrology system which receives some or all of the substrates W that have been processed in the litho cell. Metrology results are provided directly or indirectly to the supervisory control system SCS. If errors are detected, adjustments may be made to exposures of subsequent substrates, especially if the metrology can be done soon and fast enough that other substrates of the same batch are still to be exposed. Also, already exposed substrates may be stripped and reworked to improve yield, or discarded, thereby avoiding performing further processing on substrates that are known to be faulty. In a case where only some target portions of a substrate are faulty, further exposures can be performed only on those target portions which are good.

[0024] Also shown in Figure 1 is a metrology apparatus 240 which is provided for making measurements of parameters of the products at desired stages in the manufacturing process. A common example of a metrology station in a modern lithographic production facility is a scatterometer, for example a dark-field scatterometer, an angle -resolved scatterometer or a spectroscopic scatterometer, and it may be applied to measure properties of the developed substrates at 220 prior to etching in the apparatus 222. Using metrology apparatus 240, it may be determined, for example, that important performance parameters such as overlay or critical dimension (CD) do not meet specified accuracy requirements in the developed resist. Prior to the etching step, the opportunity exists to strip the developed resist and reprocess the substrates 220 through the litho cluster. The metrology results 242 from the apparatus 240 can be used to maintain accurate performance of the patterning operations in the litho cluster, by supervisory control system SCS and / or control unit LACU 206 making small adjustments over time, thereby minimizing the risk of products being made out-of-specification, and requiring re-work.

[0025] Additionally, metrology apparatus 240 and / or other metrology apparatuses (not shown) can be applied to measure properties of the processed substrates 232, 234, and incoming substrates 230. The metrology apparatus can be used on the processed substrate to determine important parameters such as overlay or CD.

[0026] A metrology apparatus suitable for use in embodiments of the invention is shown in Figure 2(a). A target T and diffracted rays of measurement radiation used to illuminate the target are illustrated in more detail in Figure 2(b). The metrology apparatus illustrated is of a type known as a dark field metrology apparatus. The metrology apparatus may be a stand-alone device or incorporated in either the lithographic apparatus LA, e.g., at the measurement station, or the lithographic cell LC. An optical axis, which has several branches throughout the apparatus, is represented by a dotted line O. In this apparatus, light emitted by source 11 (e.g., a xenon lamp) is directed onto substrate W via a beam splitter 15 by an optical system comprising lenses 12, 14 and objective lens 16. These lenses are arranged in a double sequence of a 4F arrangement. A different lens arrangement can be used, provided that it still provides a substrate image onto a detector, and simultaneously allows for access of an intermediate pupil-plane for spatial-frequency filtering. Therefore, the angular range at which the radiation is incident on the substrate can be selected by defining a spatial intensity distribution in a plane that presents the spatial spectrum of the substrate plane, here referred to as a (conjugate) pupil plane. In particular, this can be done by inserting an aperture plate 13 of suitable form between lenses 12 and 14, in a plane which is a back-projected image of the objective lens pupil plane. In the example illustrated, aperture plate 13 has different forms, labeled 13N and 13S, allowing different illumination modes to be selected. The illumination system in the present examples forms an off-axis illumination mode. In the first illumination mode, aperture plate 13N provides off-axis from a direction designated, for the sake of description only, as ‘north’. In a second illumination mode, aperture plate 13S is used to provide similar illumination, but from an opposite direction, labeled ‘south’. Other modes of illumination are possible by using different apertures. The rest of the pupil plane is desirably dark as any unnecessary light outside the desired illumination mode will interfere with the desired measurement signals.

[0027] As shown in Figure 2(b), target T is placed with substrate W normal to the optical axis O of objective lens 16. The substrate W may be supported by a support (not shown). A ray of measurement radiation I impinging on target T from an angle off the axis O gives rise to a zeroth order ray (solid line 0) and two first order rays (dot-chain line +1 and double dot-chain line -1). It should be remembered that with an overfilled small target, these rays are just one of many parallel rays covering the area of the substrate including metrology target T and other features. Since the aperture in plate 13 has a finite width (necessary to admit a useful quantity of light, the incident rays I will in fact occupy a range of angles, and the diffracted rays 0 and +1 / -1 will be spread out somewhat. According to the point spread function of a small target, each order +1 and -1 will be further spread over a range of angles, not a single ideal ray as shown. Note that the grating pitches of the targets and the illumination angles can be designed or adjusted so that the first order rays entering the objective lens are closely aligned with the central optical axis. The rays illustrated in Figure 2(a) and 2(b) are shown somewhat off axis, purely to enable them to be more easily distinguished in the diagram.

[0028] At least the 0 and +1 orders diffracted by the target T on substrate W are collected by objective lens 16 and directed back through beam splitter 15. Returning to Figure 2(a), both the first and secondillumination modes are illustrated, by designating diametrically opposite apertures labeled as north (N) and south (S). When the incident ray I of measurement radiation is from the north side of the optical axis, that is when the first illumination mode is applied using aperture plate 13N, the +1 diffracted rays, which are labeled +1 (N), enter the objective lens 16. In contrast, when the second illumination mode is applied using aperture plate 13S the -1 diffracted rays (labeled - 1 (S)) are the ones which enter the lens 16.

[0029] A second beam splitter 17 divides the diffracted beams into two measurement branches. In a first measurement branch, optical system 18 forms a diffraction spectrum (pupil plane image) of the target on first sensor 19 (e.g. a CCD or CMOS sensor) using the zeroth and first order diffractive beams. Each diffraction order hits a different point on the sensor, so that image processing can compare and contrast orders. The pupil plane image captured by sensor 19 can be used for many measurement purposes such as reconstruction used in methods described herein. The pupil plane image can also be used for focusing the metrology apparatus and / or normalizing intensity measurements of the first order beam.

[0030] In the second measurement branch, optical system 20, 22 forms an image of the target T on sensor 23 (e.g. a CCD or CMOS sensor). In the second measurement branch, an aperture stop 21 is provided in a plane that is conjugate to the pupil-plane. Aperture stop 21 functions to block the zeroth order diffracted beam so that the image of the target formed on sensor 23 is formed only from the -1 or +1 first order beam. The images captured by sensors 19 and 23 are output to processor PU which processes the image, the function of which will depend on the particular type of measurements being performed. Note that the term ‘image’ is used here in a broad sense. An image of the grating lines as such will not be formed, if only one of the -1 and +1 orders is present.

[0031] The particular forms of aperture plate 13 and field stop 21 shown in Figure 2 are purely examples. In another embodiment of the invention, on-axis illumination of the targets is used and an aperture stop with an off-axis aperture is used to pass substantially only one first order of diffracted light to the sensor. In yet other embodiments, 2nd, 3rdand higher order beams (not shown in Figure 2) can be used in measurements, instead of or in addition to the first order beams.

[0032] The target T may comprise a number of gratings, which may have differently biased overlay offsets in order to facilitate measurement of overlay between the layers in which the different parts of the composite gratings are formed. The gratings may also differ in their orientation, so as to diffract incoming radiation in X and Y directions. In one example, a target may comprise two X-direction gratings with biased overlay offsets +d and -d, and Y-direction gratings with biased overlay offsets +d and -d. Separate images of these gratings can be identified in the image captured by sensor 23. Once the separate images of the gratings have been identified, the intensities of those individual images can be measured, e.g., by averaging or summing selected pixel intensity values within the identified areas. Intensities and / or other properties of the images can be compared with one another. These results can be combined to measure different parameters of the lithographic process

[0033] Various techniques may be used to improve the accuracy of reproduction of patterns onto a substrate. Accurate reproduction of patterns onto a substrate is not the only concern in the production of ICs. Another concern is the yield, which generally measures how many functional devices a device manufacturer or a device manufacturing process can produce per substrate. Various approaches can be employed to enhance the yield. One such approach attempts to make the production of devices (e.g., imaging a portion of a design layout onto a substrate using a lithographic apparatus such as a scanner) more tolerant to perturbations of at least one of the processing parameters during processing a substrate, e.g., during imaging of a portion of a design layout onto a substrate using a lithographic apparatus. The concept of overlapping process window (OPW) is a useful tool for this approach. The production of devices (e.g., ICs) may include other steps such as substrate measurements before, after or during imaging, loading or unloading of the substrate, loading or unloading of a patterning device, positioning of a die underneath the projection optics before exposure, stepping from one die to another, etc. Further, various patterns on a patterning device may have different process windows (i.e., a space of processing parameters under which a pattern will be produced within specification). Examples of pattern specifications that relate to a potential systematic defect include checks for necking, line pull back, line thinning, CD, edge placement, overlapping, resist top loss, resist undercut and / or bridging. The process window of all or some (usually patterns within a particular area) of the patterns on a patterning device may be obtained by merging (e.g., overlapping) process windows of each individual pattern. The process window of these patterns is thus called an overlapping process window. The boundary of the OPW may contain boundaries of process windows of some of the individual patterns. In another words, these individual patterns limit the OPW. These individual patterns can be referred to as "hot spots" or "process window limiting patterns (PWLPs)," which are used interchangeably herein. When controlling a lithography process, it is possible, and typically economical, to focus on the hot spots. When the hot spots are not defective, it is likely that all the patterns are not defective. The imaging becomes more tolerant to perturbations when values of the processing parameters are closer to the OPW if the values of the processing parameters are outside the OPW, or when the values of the processing parameters are farther away from the boundary of the OPW if the values of the processing parameters are inside the OPW.

[0034] The values of the processing parameters may be selected such that they stay away from the boundary of the OPW or the fitted OPW, in order to decrease the chance that the processing parameters shift outside the OPW and thereby cause defects and decrease the yield. One approach of selecting the values of the processing parameters includes, before actual imaging, (1) optimizing the lithographic apparatus (e.g., optimizing the source and projection optics) and optimizing the design layout, (2) determining the OPW or fitted OPW (e.g., by simulation), and (3) determining a point in the space of the processing parameters (i.e., determining the values of the processing parameters) that is as far away as possible from the boundary of the OPW or fitted OPW (this point may be called the "center" of the OPW or fitted OPW).

[0035] During or before the actual imaging, the processing parameters may have a perturbation that causes them to deviate from the point that is as far away as possible from the boundary of the OPW or fitted OPW. For example, the focus may change due to topography of a substrate to be exposed, drift in the substrate stage, deformation of the projection optics, etc.; the dose may change to due drift in the source intensity, dwell time, etc. The perturbation may be large enough to cause processing parameters to be outside the OPW, and thus may lead to defects. Various techniques may be used to identify a processing parameter that is perturbed and to correct that processing parameter. For example, if the focus is perturbed, e.g., because an area of the substrate that is slightly raised from the rest of the substrate is being exposed, the substrate stage may be moved or tilted to compensate for the perturbation.

[0036] Control of the lithographic process are typically based on measurements fed back or fed forward and then modelled using, for example interfield (across-substrate fingerprint) or intrafield (across-field fingerprint) models. Within a die, there may be separate functional areas such as memory areas, logic areas, contact areas etc. Each different functional area, or different functional area type may have a different process window, each with a different processes window center. For example, different functional area types may have different heights, and therefore different best focus settings. Also, different functional area types may have different structure complexities and therefore different focus tolerances (focus process windows) around each best focus. However, each of these different functional areas will typically be formed using the same focus (or dose or position etc.) setting due to control grid resolution limitations.

[0037] Figure 3 depicts the overall lithography and metrology method incorporating a stability module 300 (essentially an application running on a server, in this example). Shown are three main process control loops, labeled LP1, LP2, LP3. The first loop LP1 provides recurrent monitoring for stability control of the lithography apparatus using the stability module 300 and monitor wafers. Immediately after a lithographic apparatus calibration, a baseline wafer or wafer set is exposed on the lithographic apparatus or scanner 310 and measured by a metrology tool 315 to set baseline parameters e.g., for focus and / or overlay (e.g., the scanner’s overlay and / or focus baseline fingerprints). At a later time (e.g., periodically), a monitor wafer 305 is exposed on scanner 310 and measured by metrology tool 315. The stability module 300 compares the parameters from the monitor wafer 305 measurements (e.g., the scanner’s present overlay and / or focus fingerprints) and compares these to the (stored) baseline parameters. Based on the comparison, stability module 300 calculates correction routines 350 to correct for drift in these parameters which is fed back to the scanner 310 and used when performing further exposures. This can be repeated periodically to control scanner drift, e.g., to determine corrections which return the scanner operation to (or near) the baseline parameters. The exposure of the monitor wafer may involve printing a pattern of marks on top of reference marks. By measuring overlay error between the top and bottom marks, deviations in performance of the lithographic apparatus can bemeasured, even when the wafers have been removed from the apparatus and placed in the metrology tool. Such monitor wafer may also comprise focus marks for monitoring of focus.

[0038] In some embodiments, the monitor wafers are dedicated to a particular lithographic apparatus. In other embodiments, a “golden reference” baseline monitor wafer is defined which can be used for all lithographic apparatuses, along with an associated difference set to adapt the baseline parameters for each individual lithographic apparatus. The stability module 300 calculates the difference (as a difference set or correction set) between the golden reference wafer and a standard monitor wafer exposed on each scanner. The standard monitor wafer plus the difference set acts as a new copy of the reference. In this manner, every scanner in a fabrication site (fab), regardless of scanner type or model and of grid differences, can be matched to this golden reference, increasing fab efficiency significantly.

[0039] The second (APC) loop is for local scanner control on-product (determining focus, dose, and overlay on product wafers). The exposed product wafer 320 is passed to metrology unit 315 where information relating for example to parameters such as critical dimension, sidewall angles and overlay is determined and passed onto the Advanced Process Control (APC) module 325. This data is also passed to the stability module 300. Process corrections 340 are made before the Manufacturing Execution System (MES) 335 takes over, providing control of the scanner 310, in communication with the scanner stability module 300.

[0040] The third control loop is to allow metrology integration into the second (APC) loop (e.g., for double patterning). The post etched wafer 330 is passed to metrology unit 315 which again measures parameters such as critical dimensions, sidewall angles and overlay, read from the wafer. These parameters are passed to the Advanced Process Control (APC) module 325. The loop continues the same as with the second loop.

[0041] Figure 4 shows a device manufacturing arrangement for making bonded substrates (and therefore ICs based on bonded substrates) comprising a first manufacturing lithocell LC1 and a second manufacturing lithocell LC2. Within each lithocell is a pair of lithographic processing systems 400a, 400b and first metrology systems 410a, 410b. The lithographic processing system 400a, 400b, may comprise a full patterning system. Such a system may comprise, for example, an optical lithographic apparatus or scanner such as described in respect of Figure 1 , a track tool, a deposition tool, an etch tool, any other apparatus used in the patterning process, or any combination selected therefrom. The systems may also each comprise a software application 420a, 420b in communication with its respective lithographic processing system 400a, 400b and metrology system 410a, 410b, so that results, designs, data, etc. of the lithographic processing system 400a, 400b and / or the metrology apparatus 410a, 410b may be stored and analyzed by the software application 420a, 420b at the same time or different times.

[0042] Once pairs of substrates or wafers are completed from each of lithocell LC1 and lithocell LC2, they may be bonded within a bonding tool 440 to obtain a bonded wafer. Bonding in this context is wafer-to-wafer bonding where whole wafers are aligned and bonded together such that individual dies on each wafer are aligned. The concept of wafer-to-wafer bonding is known and used in many ICmanufacturing processes. The bonding tool 440 may comprise a bonding alignment device for aligning the wafers together for bonding. For example, the bonding tool 440 may perform pre-align using box- in-box marks provided to wafers (e.g., one box on each wafer), with visual inspection of marks used for alignment quality / position control. Another method uses two imaging sensors (e.g., face to face) which are first calibrated together to find their relative positions; each sensor is then used to separately align a respective wafer to be bonded.

[0043] Lithocell LC1 and lithocell LC2 may be the same lithocell, different lithocells but comprising one or more shared tools and elements, or be completely different lithocells having completely different sets of apparatuses and tools, possibly even at different sites or fabs. For example, one or more of the tools or apparatuses of the lithographic processing systems 400a and 400b may comprise different tools or the same tools within each respective system. Similarly metrology apparatuses 410 and 410b may be the same apparatus or different apparatuses. The software application 420a, 420b may be comprised within one or both of the respective lithographic processing systems 400a, 400b and / or one or both of the first metrology systems 410a, 410b, or elsewhere.

[0044] As mentioned above, the lithographic processing system 400a, 400b may be configured to include the lithographic apparatus LA in Figure 1. The lithographic processing system 400a, 400b may be setup for executing the patterning aspect of the patterning process and optionally, may be configured to correct for deviations occurring within the lithographic processing system 400a, 400b or in one or more other processes or apparatuses in the patterning process. The lithographic processing system 400a, 400b may be able to apply a correction of an error (e.g., imaging error, focus error, dose error, etc.) by adjusting one or more modification apparatuses of the lithographic processing system 400a, 400b. That is, correction may be made by any manufacturing processing tool in the lithographic processing system 400a, 400b that can purposefully modify a patterning error. In present systems, however, these corrections (scanner corrections and other processing tool corrections) do not take into account any of the bonding processes performed by the bonding tool 440.

[0045] For example, the correction of an error can be made by adjusting one or more modification apparatuses of the lithographic apparatus, e.g., by employing the adjustment mechanism AM to correct for or apply an optical aberration, by employing the adjuster AD to correct or modify an illumination intensity distribution, by employing the positioner PM of the patterning device support structure MT and / or the positioner PW of the wafer table WT to correct or modify the position of the patterning device support structure MT and / or the wafer table WT respectively, etc. Where, for example, the lithographic processing system 400a, 400b comprises a track tool, correction of an error can be made by adjusting one or more modification apparatuses of the track tool, e.g., modifying a bake temperature of a bake tool of the track, modifying a development parameter of a development tool of the track, etc. Similarly, where, for example, the lithographic processing system 400a, 400b comprises an etch tool, correction of an error can be made by adjusting one or more modification apparatuses of the etch tool, e.g., modifying an etch parameter, such as etchant type, etchant rate, etc. Similarly, where, for example,the lithographic processing system 400a, 400b comprises a planarization tool, correction of an error can be made by adjusting one or more modification apparatuses of the planarization tool, e.g., modifying a planarization parameter. Similarly, where, for example, the lithographic processing system 400a, 400b comprises a deposition tool, correction of an error can be made by adjusting one or more modification apparatuses of the deposition tool, e.g., modifying a deposition parameter.

[0046] One or more modification apparatuses of the lithographic processing system 400a, 400b may be able to apply up to third order polynomial correction of errors (e.g., imaging error, focus error, dose error, etc.).

[0047] The metrology apparatus 410a, 410b may be configured to obtain measurements related to wafers printed with patterns by the lithographic processing system 400a, 400b. The metrology apparatus 410a, 410b may be configured to measure or determine one or more parameters (e.g., overlay error, dose, focus, CD, etc.) of the patterns printed by the lithographic processing system 400a, 400b. The metrology apparatus 410a, 410b may be a diffraction-based overlay metrology tool that can measure, e.g., overlay, critical dimension and / or other parameters. The metrology apparatus 410a, 410b may be an alignment apparatus used to measure relative position between two objects, such as between a patterning device and a wafer. The metrology apparatus 410a, 410b may be a level sensor to measure a position of a surface, e.g., a height and / or rotational position of a wafer surface. The metrology apparatus 410a, 410b may be a plurality of metrology apparatuses including any combination of these devices.

[0048] The metrology apparatus 410a, 410b may measure and / or determine one or more values of one or more parameters (e.g., overlay error, CD, focus, dose, etc.) associated with an error in the patterning process. After the metrology apparatus 410a, 410b finishes the measurement or determination, the software application 420a, 420b creates modification information based on the measurement data (e.g., overlay error, CD, focus, dose, etc.). The software application 420a, 420b may evaluate the one or more values of the one or more parameters to determine if they are within a tolerance range. If not, the software application 420a, 420b determines modification information to correct an error reflected by the out of tolerance one or more values of the one or more parameters. The software application 420a, 420b may use one or more mathematical models to determine error correctable by one or more modification apparatuses of the lithographic processing system 400a, 400b and to provide information for one or more parameters (e.g. modification information) of the one or more modification apparatuses of the lithographic processing system 400a, 400b, which one or more parameters enable configuration of the one or more modification apparatuses of the lithographic processing system 400a, 400b to correct (e.g., eliminate or reduce to within a tolerance range) the error. One or more of the mathematical models may define a set of basis functions that fit the data once parameterized. The one or more mathematical models may comprise a model configured to simulate correctable error for the lithographic processing system 400a, 400b. The model may specify a range of modifications that one or more of the modification apparatuses of the lithographic processing system 400a, 400b can make anddetermines correctable error within the range. That is, the range may specify an upper limit, a lower limit, and / or both on the amount of modifications that a particular modification apparatus of the lithographic processing system 400a, 400b can make.

[0049] There are a number of drawbacks with the method described in relation to Figure 4. Such scanner control methods are unaware of, and therefore do not take into account of, potential bonding steps with other wafers. Wafers may be bonded together which have incompatible or poorly optimized grids / shapes / dead die locations. For example, a first wafer may have a bowl shaped fingerprint with dead (or out of spec) dies being found at the edge and a second wafer may have a fingerprint with the inverse bowl shape such that dead dies are found near the center. Bonding of these wafers would be sub-optimal and wasteful compared to bonding wafers which have similar fingerprints. For bonding use cases a wafer may be paired with another wafer having a specific grid which is not necessarily matched to the grid of the current wafer.

[0050] A number of methods will now be described to improve upon the manufacturing techniques which use wafer-to-wafer bonding of two or more wafers together. The methods comprise the following:• Overlay feedforward correction of a bonding fingerprint induced by wafer bonding-process;• Co-optimization of correction capabilities of scanner and wafer bonder control capabilities;• Application of reference scanner monitoring wafer to enable grid matching of to-be-bonded wafers;

[0051] Figure 5 is a flow diagram which illustrates examples of these concepts in a single flow. However, it should be appreciated that all these concepts can be implemented individually, and / or a method disclosed herein may comprise any two or more in any combination. Each concept will now be described individually. The flow diagram of Figure 5 is based upon that of Figure 4, and the same elements have the same labels and therefore will not be necessarily described further. As represented in Figure 5, the bonding apparatus 440 may have an associated bonding metrology tool 450 and bonding software application 460. As before, the bonding metrology tool 450 may be separate to the other metrology tools in the Figure, or it may be that the same metrology tool is represented by any two or all three of metrology tools 450, 410a, 410b. Similarly, the software application 460 may be the same (or run on the same apparatus) as one or both of software applications 420a, 420b, and may be run on any of the apparatuses represented in the Figure, and / or one or more separate processing apparatuses (not shown). Also note that the description below describes the bonding process as that bonding two wafers. However, the concepts are equally applicable to bonding of more than two wafers, and as such any reference to terms such as “wafer pair” is to be understood to encompass sets of wafers greater than 2, which are to be bonded together.

[0052] As with Figure 4, lithocell LC1 and lithocell LC2 may be the same lithocell, different lithocells but comprising one or more shared tools and elements, or be completely different lithocells having completely different sets of apparatuses and tools, possibly even at different sites or fabs.Overlay feedforward correction of a bonding fingerprint induced by wafer bonding-process

[0053] In this concept, it is proposed to measure the across wafer parameter (e.g., overlay) fingerprint after bonding, and using this fingerprint as an input for determining a correction or optimization for the bonding process for bonding of subsequent wafers. For example, after bonding of first and second wafers Wl, W2, the fingerprint may be measured by metrology tool 450 and a correction or bonding optimization determined by software application 460 for bonding third and fourth wafers W3 and W4. The correction may be determined based also on the individual fingerprints of each wafer (e.g., as measured by metrology tools 410a, 410b), such that software application deduces the bonding tool fingerprint contribution from the final bonded fingerprint and the two pre -bonding wafer fingerprints. The software application 460 can then actively actuate (e.g., via a correction and / or optimization) the bonding tool 440 to optimize overlay for bonding the next wafer pair. Therefore, this concept may be represented in Figure 5, by the loop of elements 440, 450, 460 and the feedforward of data from metrology devices 410a, 410b to software application 460.

[0054] In an example, this concept may be implemented within and by the APC control loop (e.g., loop LP2 of Figure 3). In an example, the feedforward may be more comprehensive (e.g. via APC controller or otherwise) by taking a larger set of historic overlay data (pre-bonding and post-bonding fingerprints) into account; e.g., to prevent unstable control (for example, where the fingerprint data for an immediately preceding wafer pair is non-representative of the process generally).Co-optimization of correction capabilities of scanner and wafer bonder control capabilities

[0055] Based on knowledge of the bonding tool fingerprint (e.g., using methods described above) cooptimized corrections for the bonding tool fingerprint and one or both of the scanner fingerprints can be determined. The co-optimization may therefore determine co-optimized corrections for one or both exposure processes for each wafer pair to be bonded and for the bonding process, which together minimize overlay in the final bonded wafer. The co-optimization may also include corrections for other tools, such as an etching tool (which also induces its own fingerprint contribution). It can be appreciated, for example, that such a co-optimization method may actually worsen overlay (or even dies-in-spec) for one or both of the unbonded wafers, but in a manner which minimizes overlay across the bonded wafer and / or maximizes dies-in spec of the bonded wafer. Any co-optimization strategy may be used, including a die-in-spec co-optimization, a max-abs optimization, a least-squares co-optimization or any other suitable optimization. Co-optimization concepts are described, for example, in US2018 / 0252998 and WO2019 / 110261 both of which are incorporated herein by reference. Any of the co-optimization concepts described herein, but extended to the bonding process is envisaged in this concept.

[0056] For example, the co-optimization may comprise controlling the bonding tool and one or both scanner fingerprints such that the scanner corrections pre-correct for the bonding tool contribution tothe overall bonded wafer overlay fingerprint. For example, such an optimization may comprise finding scanner and / or bonding tool (and / or etch tool or other tool) corrections which minimize the difference between the second wafer (pre -bonding) fingerprint and the sum of the first wafer (pre -bonding) fingerprint and the bonding tool fingerprint (for a to-be -bonded wafer pair of said first wafer and second wafer). The co-optimization may also include co-optimizing a patterning device or reticle pattern (e.g., via a reticle patterning apparatus) used for patterning the first and / or second wafer.

[0057] Such a co-optimization may be based on the correction capabilities of the relevant tools (e.g., scanners, bonding tool and / or etch tool), so as to distribute the correction across these tools to achieve lowest non-correctable error (NCE) for the parameter of interest (e.g., overlay); e.g., using a pattern fidelity control (PFC) type approach. This distribution between scanner and bonder (and possible other tool) correction capabilities can be based, not only on the type of correction capability (e.g., per spatial frequency, order, field), but also on the range of this correction capability. By way of specific example, by adding an offset to the scanner actuation, the resulting fingerprint can be brought closer to the center of the correction range of the bonding tool (or vice versa). Such concepts are described, for example in the aforementioned US2018 / 0252998.

[0058] In such an example, the co-optimization may comprise (e.g., using one or more mathematical models) determining an error correctable by one or more apparatuses of the lithographic processing systems 400a, 400b and / or the bonding tool 440, and adding an offset (e.g., deliberate error) to one of the processes performed by one of these apparatuses (or to the reticle pattern itself). For example, the offset may result in a transformation of a non-correctable error by an apparatus of the lithographic processing systems 400a, 400b or bonding tool 440 to a correctable error by one or more other apparatuses of the lithographic processing systems 400a, 400b, the bonding tool 440 and / or the reticle pattern. As an example of such transformation, an error having an uncorrectable spatial resolution for a particular apparatus of one or both lithographic processing systems 400a, 400b and / or bonding tool 440 can be enabled for correction by adding further error such that the total error has a spatial resolution correctable by the apparatus of one or both lithographic processing systems 400a, 400b and / or bonding tool 440. In an example, the added error may be divided among a plurality of the relevant apparatuses and / or the reticle pattern (e.g., via a reticle modification tool).

[0059] The co-optimization may further comprise determining a control recipe for one or both of the first lithographic processing system 400a and lithographic processing system 400b from a first control grid (e.g., measured using a scatterometer and / or alignment sensor) associated with the first lithographic processing system 400a and a second control grid (e.g., measured using a scatterometer and / or alignment sensor) associated with the second lithographic processing system 400b so as to optimize matching of first control grid and second control grid.Reference scanner monitoring wafer to enable grid matching of to-be -bonded wafers

[0060] The concept of scanner stability monitoring using monitor wafers was described above in combination with Figure 3 (loop LP1). It is proposed that similar methods be used to match the controlgrids for each wafer of a wafer pair (or larger wafer set). As already stated, the first and second wafers may come from different scanners 400a, 400b. These different scanners may be located within different fabs and may comprise completely different systems or platforms (e.g., one might be an EUV scanner and another may be a DUV scanner). As such, the scanners may comprise completely different control and alignment strategies and therefore may have different, incompatible, control grid definitions. While this scanner grid difference may be budgeted for the overall overlay budget of the bonded wafers, its impact may be reduced or minimized by using a common grid definition.

[0061] In a first implementation, this may be achieved by using matched or copied monitor wafers such as those already described. A suitable processing module (e.g. a module such as stability module 300, which may be represented in Figure 5 by software application 460) may calculate the difference (as a difference set or correction set) between a golden reference wafer and a standard monitor wafer exposed on each scanner. The respective monitor wafers plus the difference sets will be matched, so as to define a common grid which may be used as the control grid for the bonding process by bonding tool 440.

[0062] Figure 6 illustrates a flow for a further implementation for determining a post -bonding lithography correction of a grid delta (grid difference) between the grids of the bonded wafers using the delta of monitor wafer grids. After bonding and grinding / thinning the top silicon substrate, the postbonding lithography layers may be a target for overlay improvement. Such a method controls delta / drift of grids in wafer stack by controlling them with respect to a monitor wafer grid. The method assumes that there is a single set of matched monitor wafers for each fab or scanner involved in manufacturing a wafer for the wafer stack and for the post bonding lithography. Alternatively, if this is not possible or feasible, a calculated delta grid (correction set) between the monitor wafers can be added to the process flow (e.g., at step 620 of the illustrated flow).

[0063] Step 600a relates to a first fab, FAB A comprising a first scanner, TL A on which a first wafer W1 is to be processed. A monitor wafer (e.g., from the matched set) has had a monitor wafer grid MWGA exposed thereon. Following this, the scanner TL A is used in to perform a lithography step on the monitor wafer, imposing thereon its respective scanner grid SGAA. The monitor wafer is then measured to obtain the overlay fingerprint OVLAA resultant from both grids. Based on this a correction grid is CGAA is determined (e.g., as the inverse of the scanner grid SGAA).

[0064] Step 600b relates to a second fab, FAB B comprising a second scanner, TL X on which a second wafer W2 is to be processed. A monitor wafer (e.g., from the matched set) has had a monitor wafer grid MWGB exposed thereon. Following this, the scanner TL X is used in to perform a lithography step on the monitor wafer, imposing thereon its respective scanner grid SGBX. The monitor wafer is then measured to obtain the overlay fingerprint OVLBX resultant from both grids. Based on this a correction grid is CGBX is determined (e.g., as the inverse of the scanner grid SGBX).

[0065] Step 610 relates to a third fab, FAB C comprising a third scanner, TL Y on which the wafer stack WS comprising bonded wafer pair Wl, W2 is to be processed in a post -bonding lithography step.A monitor wafer (e.g., from the matched set) has had a monitor wafer grid MWGc exposed thereon. Following this, the scanner TL C is used in to perform a lithography step on the monitor wafer, imposing thereon its respective scanner grid SGCY. The monitor wafer is then measured to obtain the overlay fingerprint OVLCY resultant from both grids. Based on this a correction grid is CGCY is determined (e.g., as the inverse of the scanner grid SGCY).

[0066] At step 620, a bonding scanner correction grid CGBond is determined from the correction grids CGAA, CGBX, CGCY, as determined in the previous steps. For example, the bonding scanner correction grid CGsond may be determined as a combination (e.g., the sum) of the correction grids CGAA, CGBX, CGCY. Therefore the bonding scanner correction grid CGBond may be determined as a combination (e.g., the sum) of the inverses of the related scanner grids (e.g. a combination of -SGAA, -SGBX, -SGCY). The bonding scanner correction grid CGBond may also include contributions from one or more calculated delta grids for respective correction grids where no suitably matched monitor wafer was used in determining the correction grid. The bonding scanner correction grid CGB<>H<I may be applied when processing the wafer stack at third fab FAB C, when using scanner TL Y for post-bonding lithography. This may be accomplished by adding it to the stability module control loop at the third fab FAB C or via an external interface (e.g., controlled by a user at the third fab).

[0067] In this manner scanner grid drift (for scanners TL A, TL X, TL Y) is taken into account by updating the bonding scanner correction grid CGBond at the same frequency as the scanner correction grids in each separate Fabs (e.g., every few days). It will be readily appreciated that this method can be extended to post-bonding lithography steps on bonded stacks comprising more than two wafers.

[0068] While the above-described methods have been successfully implemented to improve the performance of the wafer-to-wafer bonding process, these methods may not be able to meet the increasingly stringent requirements for the precision of wafer-to-wafer or die-to-wafer bonding, in particular high precision hybrid bonding (e.g. , transistor-level bonding) where a bonding overlay of less than 2 nm is needed. To further improve the bonding precision, it is desirable to have a method and apparatus that would enable an active control of the grids of two or more bonding wafers during bonding and a dynamic and real-time control of the bonding wave initiation and propagation.

[0069] Accordingly, one aspect of the present disclosure provides a substrate bonding apparatus which comprises a first electrostatic clamp for securely holding a first substrate comprising a first bonding surface and a second electrostatic clamp for securely holding a second substrate comprising a second bonding surface. The first bonding surface of the first substrate and the second bonding surface of the second substrate are arranged to face each other and to be bonded together. The first electrostatic clamp comprises a plurality of first actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the first substrate is held and / or the second electrostatic clamp comprises a plurality of second actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the second substrate is held. The first electrostatic clamp and / or the second electrostatic clamp are configured such thatdisplacement of one or more of the plurality of first actuators of the first electrostatic clamp causes a deformation of the first bonding surface of the first substrate and / or displacement of one or more of the plurality of second actuators of the second electrostatic clamp causes a deformation of the second bonding surface of the second substrate.

[0070] In some embodiments, the first substrate and the second substrate may both be a semiconductor wafer. In some embodiments, the first substrate may be a die and the second substrate may be a semiconductor wafer.

[0071] In some embodiments, each of the first electrostatic clamp and the second electrostatic clamp may comprise a plurality of actuators. As such, both the first substrate and the second substrate may be controllably deformed. Figure 7A schematically depicts a substrate bonding apparatus 700 and a side cross-sectional view of a first (top) electrostatic clamp ECI (excluding the first wafer Wl) and a second (bottom) electrostatic clamp EC2 (excluding the second wafer W2) in accordance with an embodiment. The top electrostatic clamp ECI may be configured to securely hold a first wafer Wl comprising a first bonding surface BS1 and the bottom electrostatic clamp EC2 may be configured to securely hold a second wafer W2 comprising a second bonding surface BS2 arranged to face the first bonding surface BS1 and to be bonded therewith.

[0072] With reference to Figure 7A, the top electrostatic clamp ECI may comprise a plurality of first actuators ACT1 which may be embedded within a body of the top electrostatic clamp ECI and the bottom electrostatic clamp EC2 may comprise a plurality of second actuators ACT1 which may be embedded within a body of the bottom electrostatic clamp ECI. The plurality of first actuators ACT1 and the plurality of second actuators ACT2 may be operable to displace along at least a direction (e.g., along the Y-axis according to the local coordinate system shown in Figure 7A) perpendicular to a transversal plane Pl or P2 (e.g., the X-Z plane according to the local coordinate system shown in Figure 7 A) in which the first wafer Wl or the second wafer W2 is held.

[0073] In this embodiment, the top electrostatic clamp ECI may comprise a first clamp support CS1, a first deformable layer DF1 which may comprise a first upper surface US1 (or the surface facing the first wafer Wl) and a plurality of first burls BL1 arranged on the first upper surface USE The plurality of first burls BL1 may be configured to be in direct contact with (a lower surface (or the surface facing the first clamp support CS1) of) the first wafer Wl. The top electrostatic clamp ECI may further comprise a plurality of first actuators ACT1 sandwiched between the first clamp support CS1 and the first deformable layer DF1. Each of the first actuators ACT1 may comprise a stationary section (not shown) and a moveable section (not shown) respectively fixed to the first clamp support CS 1 and the first deformable layer DF1. The first deformable layer DF1 of the top electrostatic clamp ECI may comprise a plurality of embedded electrodes (not shown) configured to apply an electrostatic force for securely holding the first wafer W 1.

[0074] In operation, displacements of one or more of the first actuators ACT1 of the top electrostatic clamp ECI may cause the first deformable layer DF1 to deform in a controlled manner. The deformationof the first deformable layer DF1 may in turn result in a deformation of the first bonding surface BS1 of the first wafer Wl. The deformation imposed onto the first bonding surface BS1 by the first deformable layer DF1 may be substantially identical to the deformation imposed onto the first deformable layer DF1 by the displacements of one or more of the first actuators ACT1.

[0075] Figure 7B schematically depicts a top view of the first (top) electrostatic clamp used in the substrate bonding apparatus 700 shown in Figure 7A. Note that the first (top) electrostatic clamp shown in Figure 7A is mounted upside down to allow the first bonding surface BS1 of the first wafer Wl to face the second bonding surface BS2 of the second wafer W2. With reference to Figure 7B, the plurality of first actuators ACT1 may be distributed across a majority area of the first deformable layer DF1 and may be equally spaced apart. The first actuators ACT1 may be arranged in a one-to-one correspondence with the first burls BL1. It may be that each of the first actuators ACT1 is arranged under a respective one of the first burls BL1 (with the first deformable layer DF1 sitting in-between). In an alternative embodiment, a central region of the first deformable layer DF1 may have a higher density of the first actuators ACT1 than a peripheral region of the first deformable layer DF1, or vice versa. As such, the first actuators ACT1 may or may not be arranged in a one-to-one correspondence with the first burls BL1.

[0076] The first actuators ACT1 may be controlled in various ways. In an embodiment, the first actuators ACT1 may be individually addressable and controllable. In other embodiments, at least some of the first actuators ACT1 may be actuated in parallel, e.g., to reduce the required number of connections and driving signals. In an embodiment, the first actuators ACT1 of the top electrostatic clamp ECI may be arranged to form a plurality of concentric actuating zones or regions. Within each concentric actuating zone, the first actuators ACT1 may be actuated in parallel. Figure 7C schematically depicts three concentric actuating zones Rl, R2 and R3 of the first deformable layer DF1 of the first (top) electrostatic clamp ECI. Within each concentric actuating zone Rl or R2 or R3, there may comprise a certain number of the first actuators ACT1, each of which may be arranged under a respective one of the first burls BL1 (with the first deformable layer DF1 sitting in-between). Within each concentric actuating zone Rl or R2 or R3, the first actuators ACT1 may be actuated in parallel to allow the entire actuating zone to deform at the same time.

[0077] Similar to the top electrostatic clamp ECI, the bottom electrostatic clamp EC2 may comprise a second clamp support CS2, a second deformable layer DF2 which may comprise a second upper surface US2 (or the surface facing the second wafer W2) and a plurality of second burls BL2 arranged on the second upper surface US2. The second burls BL2 may be configured to be in direct contact with (a lower surface or the surface facing the second clamp support CS2 of) the second wafer W2. The bottom electrostatic clamp EC2 may further comprise a plurality of second actuators ACT2 sandwiched between the second clamp support CS2 and the second deformable layer DF2. Each of the second actuators ACT2 may comprise a stationary section (not shown) and a moveable section (not shown) respectively fixed to the second clamp support CS2 and the second deformable layer DF2. The seconddeformable layer DF2 of the bottom electrostatic clamp EC2 may comprise a plurality of embedded electrodes (not shown) configured to apply an electrostatic force for securely holding the second wafer W2.

[0078] In operation, displacements of one or more of the second actuators ACT2 of the bottom electrostatic clamp EC2 may cause the second deformable layer DF2 to deform in a controlled manner. The deformation of the second deformable layer DF2 may in turn result in a deformation of the second bonding surface BS2 of the second wafer W2. The deformation imposed onto the second bonding surface BS2 by the second deformable layer DF2 may be substantially identical to the deformation imposed onto the second deformable layer DF2 by the displacements of one or more of the second actuators ACT2.

[0079] The arrangement (e.g., the distribution and the control) of the second actuators ACT2 of the second electrostatic clamp EC2 may be same or similar to the arrangement of the first actuators ACT1 of the first electrostatic clamp ECI and thus will not be repeated.

[0080] Further information about the top electrostatic clamp ECI or the bottom electrostatic clamp EC2 can be found in the published PhD Thesis: Steur, M. M. A., “Design of an active wafer clamp for wafer machines". Technische Universiteit Eindhoven, 2017, which is incorporated herein by reference. It will be appreciated that other configurations of active electrostatic clamps may be equally suitable for use in the substrate bonding apparatus 700 as long as they can securely hold a substrate (e.g., a wafer) and impose a controllable deformation onto a bonding surface of the substrate.

[0081] Referring back to Figure 7A, the substrate bonding apparatus 700 may further comprise a processing unit PU (e.g. a module such as stability module 300, which may be represented in Figure 5 by software application 460) which may be connected to both the top electrostatic clamp ECI and the second electrostatic clamp EC2. The processing unit PU may be a computing device comprised within the substrate bonding apparatus 700. In a different embodiment, the processing unit PU may be external to the substrate bonding apparatus 700. The external processing unit may comprise cloud-based computing resources. In another different embodiment, the processing unit may be formed by a combination of internal and external computing devices.

[0082] The substrate bonding apparatus 700 may further comprise at least one metrology sensor (e.g., the bonding metrology tool 450 shown in Figure 5) operable to measure the first wafer W1 and the second wafer W2 to obtain a first set of measurement data and a second set of measurement data. The at least one metrology sensor may comprise an alignment sensor and / or a level sensor (e.g., as described above). In an embodiment, the first set of measurement data may comprise a first measured grid representing a first surface profile of the first bonding surface BS1 and the second set of measurement data may comprise a second measured grid representing a second surface profile of the second bonding surface BS2.

[0083] In an embodiment, the processing unit PU may be operable to determine an amount of displacement for each of the first actuators ACT1 of the top electrostatic clamp ECI based on the firstset of measurement data and each of the second actuators ACT2 of the bottom electrostatic clamp EC2 based on the second set of measurement data. Based on the determined amounts of displacement, the processing unit PU may be operable to control the first actuators ACT1 of the top electrostatic clamp ECI and / or the second actuators ACT2 of the bottom electrostatic clamp EC2 so as to deform one or both of the first bonding surface BS1 of the first wafer W1 and the second bonding surface BS2 of the second wafer W2.

[0084] Another aspect of the present disclosure provides a method of bonding two substrates (e.g., two semiconductor wafers) in the proposed substrate bonding apparatus (e.g., the substrate bonding apparatus 700 as shown in Figure 7A). The use of two active wafer clamps (e.g., the top electrostatic clamp ECI and the bottom electrostatic clamp EC2 shown in Figure 7 A) may further enhance cooptimization of correction capabilities of scanner and wafer bonder control capabilities. The dynamic and real-time control of the active wafer clamps may also allow the bonding parameters to be optimized which may improve the propagation of the bonding wave during bonding and thus the overall bonding performance.

[0085] Figure 8 shows a flowchart of the proposed bonding method 800 in accordance with an embodiment. The proposed bonding method 800 may comprise for example the following five main steps 810 to 850 and may be implemented in the substrate bonding apparatus 700 shown in Figure 7A.

[0086] At step 810, the first wafer W1 and the second wafer W2 may be placed onto the top electrostatic clamp ECI and the bottom electrostatic clamp EC2, respectively.

[0087] At step 820, the first wafer W1 and the second wafer W2 may be measured to obtain a first set of measurement data and a second set of measurement data, respectively. The two wafers W1 and W2 may be measured using an alignment sensor and / or a level sensor comprised within the substrate bonding apparatus 700.

[0088] At step 830, the processing unit PU of the substrate bonding apparatus 700 may be operable to determine an amount of displacement for each of the plurality of first actuators ACT1 of the top electrostatic clamp ECI and each of the plurality of first actuators ACT2 of the bottom electrostatic clamp EC2 based on the first set of measurement data and the second set of measurement data.

[0089] In an embodiment, the first measurement data may comprise a first measured grid representing a first surface profile of the first bonding surface BS1 and the second set of measurement data may comprise a second measured grid representing a second surface profile of the second bonding surface BS2. The processing unit PU may determine a first grid difference between the first measured grid to a first target grid and a second grid difference between the second measured grid and a second target grid. Based on the first grid difference and the second grid difference, the processing unit PU may further determine an amount of displacement for each of the plurality of first actuators ACT1 of the top electrostatic clamp ECI and each of the plurality of first actuators ACT2 of the bottom electrostatic clamp EC2.

[0090] In an embodiment, the first target grid and the second target grid may be defined to optimize at least one parameter of the bonded substrate, which may comprise for example an overall overlay fingerprint. In an embodiment, the first target grid may be identical to the second target grid. As such, the first wafer grid and the second wafer grid are controllably deformed, respectively by the first electrostatic clamp ECI and the second electrostatic clamp EC2, to a common grid.

[0091] In an embodiment, where a post-bonding lithography process is required, the first target grid and the second target grid may be defined to pre-correct for a (e.g., overlay) fingerprint of a lithographic apparatus within which the post -bonding lithography process is to be performed on the bonded wafer.

[0092] At step 840, the processing unit PU of the substrate bonding apparatus 700 may be operable to control (e.g., actuate) the plurality of first actuators ACT1 of the top electrostatic clamp ECI and the plurality of second actuators ACT2 of the bottom electrostatic clamp EC2 based on the determined amounts of displacement to deform one or both of the first bonding surface BS1 of the first wafer W1 and the second bonding surface BS2 of the second wafer W2. Figure 9 schematically depicts an example implementation of the method step 840. As shown in Figure 9, the plurality of second actuators ACT2 are controlled (or actuated) to impose a deformation onto the second bonding surface BS2 of the second wafer W2. In this specific example, the plurality of first actuators ACT1 are not actuated and thus the first bonding surface ACT1 of the first wafer W1 is not deformed by the first electrostatic clamp ECI.

[0093] In such a case, the deformation applied to the second bonding surface BS2 may be configured to pre-correct for a fingerprint of the substrate bonding apparatus 700, a fingerprint of a first pre-bonding lithographic apparatus within which the first wafer W1 was processed (e.g., exposed), and a fingerprint of a second pre -bonding lithographic apparatus within which the second wafer W2 was processed. The first pre -bonding lithographic apparatus and the second pre -bonding lithographic apparatus may be the same apparatus. Where a post-bonding lithography may be performed on the bonded wafer, the deformation applied to the second bonding surface BS2 may additionally pre -correct for a fingerprint of a post-bonding lithographic apparatus within which the bonded wafer is to be processed (e.g., exposed).

[0094] Note that in other example implementations, the first electrostatic clamp ECI may impose a first deformation onto the first bonding surface BS1 of the first substrate W1 and in the meantime, the second electrostatic clamp EC2 may impose a second deformation onto the second bonding surface BS2 of the second substrate W2. As such, the first deformation may be configured to pre-correct for a fingerprint of a first pre -bonding lithographic apparatus within which the first wafer W 1 was processed (e.g., exposed) and the second deformation may be configured to pre-correct for a fingerprint of a second pre -bonding lithographic apparatus within which the second wafer W2 was processed (e.g., exposed), a fingerprint of the substrate bonding apparatus 700, and optionally a fingerprint of a postbonding lithographic apparatus within which the bonded wafer is to be processed (e.g., exposed). Note also that it is not necessary that the first electrostatic claim ECI and the second electrostatic claim EC2 both comprise a plurality of actuators ACT1, ACT2. In some embodiments, only one of the firstelectrostatic claim ECI and the second electrostatic claim EC2 may comprise a plurality of actuators ACT1 or ACT2 and the other one of the first electrostatic claim ECI and the second electrostatic claim EC2 may comprise no actuators.

[0095] At step 850, the first bonding surface BS1 of the first wafer W1 may be bonded to the second bonding surface BS2 of the second W2 to obtain a bonded wafer (see the bonded wafer W12 shown in Figure 10C).

[0096] The use of active clamps with actuators not only enables a better matching between the grids of the bonding wafers, but also allows the bonding process and the bonding wave propagation control to be optimized. With reference to Figures 10A to 10C, in an embodiment, the bonding step may comprise the following three steps.

[0097] At step 850-1, some of the first actuators ACT1 of the top electrostatic clamp ECI may be controlled (e.g., actuated) to bend a first region of the first bonding surface BS1 of the first wafer W1 towards the second bonding surface BS2 of the second wafer W2.

[0098] In an embodiment, the first region may comprise a central region of the first bonding surface of the first substrate. The other regions of the first bonding surface of the first substrate may comprise regions outside the central region of the first bonding surface of the first substrate.

[0099] At step 850-2, the top electrostatic clamp ECI may be moved down towards the bottom electrostatic clamp EC2 until the first region (e.g., the central region) of the first bonding surface BS1 of the first wafer W1 is in contact with (a corresponding region of) the second bonding surface BS2 of the second wafer W2 to form a central contact region CCP. The contact of the first bonding surface BS1 and the second bonding surface BS2 may initiate a bonding wave which may propagate from the central contact region CCP of the two bonding surfaces BS1 and BS2 towards the peripheral region or edge thereof.

[0100] At step 850-3, the other first actuators ACT1 of the top electrostatic clamp ECI may be controlled (e.g., actuated) to bring the other regions (e.g., the non-central regions) of the first bonding surface BS1 of the first wafer W1 into contact with the second bonding surface BS2 of the second wafer W2 to obtain a bonded wafer W12.

[0101] In an example implementation, the non-central regions of the first bonding surface BS1 of the first wafer W 1 may be in the form of one or more concentric rings surrounding the central region. The actuators within each region (either the central region or any of the non-central regions) may be actuated in parallel. The one or more concentric rings of the first bonding surface BS1 of the first wafer W 1 may be sequentially brought into contact with the second bonding surface BS2 of the second wafer W2 from the most inner ring to the most outer ring (e.g., from the region R1 to the region R2 shown in Figure 7C). As such, the bonding wave may be controlled with optimized bonding parameters which may be generated by the control loops run on the process unit PU.

[0102] It will be appreciated that once the bonding wave is initiated, the other regions (e.g., the non- central regions) of the first bonding surface BS1 of the first wafer W1 may be brought into contact withthe second bonding surface BS2 of the second wafer W2 in other different ways. In an example implementation, each actuator in those other regions (e.g., non-central regions) may be individually actuated. The actuating sequence and order of those actuators may depend on how best the bonding wave propagation can be optimally controlled.

[0103] Although reference is made to electrostatic clamps is made in the previous paragraphs it is not essential for the general principle of having actuators controlling the bond wave propagation. In particular in higher pressure (non-vacuum) environments it may be preferred to have a clamp provided with vacuum suction elements (e.g. vacuum clamping). The previously described embodiments for an electrostatic clamping based system apply mutatis mutandis also for systems having clamps using vacuum suction to hold the bottom (acceptor) and / or upper (donor) substrate.

[0104] Further embodiments of the invention are disclosed in the list of numbered clauses below:1. A substrate bonding apparatus, comprising: a first clamp for securely holding a first substrate comprising a first bonding surface; and a second clamp for securely holding a second substrate comprising a second bonding surface arranged to face the first bonding surface and to be bonded therewith; wherein the first clamp comprises a plurality of first actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the first substrate is held and / or the second clamp comprises a plurality of second actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the second substrate is held; and wherein the first clamp and / or the second clamp are configured such that displacement of one or more of the plurality of first actuators of the first clamp causes a deformation of the first bonding surface of the first substrate and / or displacement of one or more of the plurality of second actuators of the second clamp causes a deformation of the second bonding surface of the second substrate.2. A substrate bonding apparatus according to clause 1 , wherein the first clamp comprises a first clamp support, a first deformable layer comprising a first surface and a plurality of first burls arranged on the first surface, the plurality of first burls configured to be in direct contact with the first substrate, and a plurality of first actuators arranged between the first clamp support and the first deformable layer, wherein displacement of one or more of the plurality of first actuators of the first clamp causes a deformation of the first deformable layer which in turn causes a deformation of the first bonding surface of the first substrate; and / or the second clamp comprises a second clamp support, a second deformable layer comprising a second surface and a plurality of second burls arranged on the second surface, the plurality of second burls configured to be in direct contact with the second substrate, and a plurality of second actuators arranged between the second clamp support and the second deformable layer, wherein displacement of one or more of the plurality of second actuators of the second clamp causes a deformation of the second deformable layer which in turn causes a deformation of the second bonding surface of the second substrate.3. A substrate bonding apparatus according to clause 2, wherein each of the plurality of first actuators of the first clamp comprises a first stationary section and a first moveable section fixed to the first clamp support and the first deformable layer, respectively; and / or each of the plurality of second actuators of the second clamp comprises a second stationary section and a second moveable section fixed to the second clamp support and the second deformable layer, respectively.4. A substrate bonding apparatus according to clause 2 or 3, wherein the first deformable layer of the first clamp comprises a plurality of first embedded electrodes configured to apply an electrostatic force for securely holding the first substrate; and / or the second deformable layer of the second clamp comprises a plurality of second embedded electrodes configured to apply an electrostatic force for securely holding the second substrate.5. A substrate bonding apparatus according to any of clauses 2 to 4, wherein the plurality of first actuators of the first clamp are distributed across a majority of a first surface area of the first deformable layer; and / or the plurality of second actuators of the second clamp are distributed across a majority of a second surface area of the second deformable layer.6. A substrate bonding apparatus according to any of clauses 2 to 5, wherein each of the plurality of first actuators of the first clamp is arranged under a respective one of the plurality of first burls; and / or each of the plurality of second actuators of the second clamp is arranged under a respective one of the plurality of second burls.7. A substrate bonding apparatus according to any of clauses 2 to 5, wherein the plurality of first actuators of the first clamp are distributed in such a manner that a central region of the first deformable layer contains a higher density of first actuators than a peripheral region of the first deformable layer; and / or the plurality of second actuators of the second clamp are distributed in such a manner that a central region of the second deformable layer contains a higher density of second actuators than a peripheral region of the second deformable layer.8. A substrate bonding apparatus according to any preceding clause, wherein the plurality of first actuators of the first clamp and / or the plurality of second actuators of the second clamp are individually controllable.9. A substrate bonding apparatus according to any of clauses 1 to 7, wherein at least some of the plurality of first actuators of the first clamp and / or at least some of the plurality of second actuators of the second clamp are actuated in parallel.10. A substrate bonding apparatus according to clause 9, wherein the plurality of first actuators of the first clamp are arranged to form a plurality of first concentric actuating zones, the actuators within each of the first concentric actuating zones being actuated in parallel; and / or the plurality of second actuators of the second clamp are arranged to form a plurality of second concentric actuating zones, the actuators within each of the second concentric actuating zones being actuated in parallel.11. A substrate bonding apparatus according to any preceding clause, wherein the plurality of first actuators and / or the plurality of second actuators are piezo actuators.12. A substrate bonding apparatus according to any preceding clause, further comprising at least one metrology sensor operable to measure the first substrate and the second substrate to obtain a first set of measurement data and a second set of measurement data.13. A substrate bonding apparatus according to clause 12, wherein the at least one metrology sensor comprises an alignment sensor.14. A substrate bonding apparatus according to clause 12 or 13, wherein the at least one metrology sensor comprises a level sensor.15. A substrate bonding apparatus according to any of clauses 12 to 14, wherein the first set of measurement data comprises a first measured grid representing a first surface profile of the first bonding surface and the second set of measurement data comprises a second measured grid representing a second surface profile of the second bonding surface.16. A substrate bonding apparatus according to any of clauses 12 to 15, further comprising a processing unit operable to determine an amount of displacement for each of the plurality of first actuators of the first clamp and / or for each of the plurality of second actuators of the second clamp based on the first set of measurement data and the second set of measurement data, respectively.17. A substrate bonding apparatus according to clause 16, wherein the processing unit is operable to control the plurality of first actuators of the first clamp based on the determined amounts of displacement so as to deform the first bonding surface of the first substrate; and / or the plurality of second actuators of the second clamp based on the determined amounts of displacement so as to deform the second bonding surface of the second substrate.18. A substrate bonding apparatus according to any preceding clause, wherein the first substrate is a wafer or a die.19. A substrate bonding apparatus according to any preceding clause, wherein the second substrate is a wafer.20. A method of bonding a first substrate to a second substrate in a substrate bonding apparatus according to any preceding clause, the method comprising: placing the first substrate and the second substrate onto the first clamp and the second clamp, respectively; measuring the first substrate and the second substrate to obtain a first set of measurement data and a second set of measurement data, respectively; determining an amount of displacement for each of the plurality of first actuators of the first clamp and / or for each of the plurality of second actuators of the second clamp based on the first set of measurement data and the second set of measurement data, respectively; controlling the plurality of first actuators of the first clamp based on the determined amounts of displacement to deform first bonding surface of the first substrate and / or the plurality of second actuators of the second clamp based on the determined amounts of displacement to deform the second bonding surface of the second substrate; andbonding the first bonding surface of the first substrate to the second bonding surface of the second substrate to obtain a bonded substrate.21. A method according to clause 20, wherein the first measurement data comprises a first measured grid representing a first surface profile of the first bonding surface and the second set of measurement data comprises a second measured grid representing a second surface profile of the second bonding surface.22. A method according to clause 21, wherein the determining step comprises: determining a first grid difference between the first measured grid to a first target grid; determining a second grid difference between the second measured grid and a second target grid; and determining an amount of displacement for each of the plurality of first actuators of the first clamp based on the first grid difference and / or for each of the plurality of second actuators of the second clamp based on the second grid difference.23. A method according to clause 22, wherein the first target grid and the second target grid are defined to optimize at least one parameter of the bonded substrate.24. A method according to clause 23, wherein the at least one parameter of the bonded substrate comprises an overall overlay fingerprint of the bonded substrate.25. A method according to clause 23 or 24, wherein the first target grid is identical to the second target grid.26. A method according to any of clauses 23 to 25, wherein the first target grid and the second target grid are defined to pre-correct for a fingerprint of a post-bonding lithography step to be performed on the bonded substrate.27. A method according to any of clauses 20 to 26, wherein the bonding step comprises: controlling some of the plurality of first actuators of the first clamp to bend a first region of the first bonding surface of the first substrate towards the second bonding surface of the second substrate; moving one or both of the first clamp and the second clamp to bring the first region of the first bonding surface of the first substrate into contact with the second bonding surface of the second substrate so as to initiate bonding; and controlling other actuators of the first clamp to bring other regions of the first bonding surface of the first substrate into contact with the second bonding surface of the second substrate to obtain a bonded substrate.28. A method according to clause 27, wherein the first region comprises a central region of the first bonding surface of the first substrate.29. A method according to clause 28, wherein the other regions of the first bonding surface of the first substrate comprise regions outside the central region of the first bonding surface of the first substrate.30. A method according to clause 29, wherein the non-central regions of the first bonding surface of the first substrate are in the form of one or more concentric rings surrounding the central region.31. A method according to clause 30, wherein the one or more concentric rings of the first bonding surface of the first substrate are sequentially brought into contact with the second bonding surface of the second substrate from the most inner ring to the most outer ring.32. A method according to any of clauses 27 to 31 , further comprising determining the first region of the first bonding surface of the first substrate for bonding initiation based on measurements performed on the first substrate and the second substrate.

[0105] The terms “radiation” and “beam” used in relation to the lithographic apparatus encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having a wavelength of or about 365, 355, 248, 193, 157 or 126 nm) and extreme ultra-violet (EUV) radiation (e.g., having a wavelength in the range of 5-20 nm), as well as particle beams, such as ion beams or electron beams.

[0106] The term “lens”, where the context allows, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic and electrostatic optical components.

[0107] The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying knowledge within the skill of the art, readily modify and / or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present invention. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description by example, and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0108] The breadth and scope of the present invention should not be limited by any of the above - described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

CLAIMS1. A substrate bonding apparatus, comprising: a first clamp for securely holding a first substrate comprising a first bonding surface; and a second clamp for securely holding a second substrate comprising a second bonding surface arranged to face the first bonding surface and to be bonded therewith; wherein the first clamp comprises a plurality of first actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the first substrate is held and / or the second clamp comprises a plurality of second actuators embedded therewithin and operable to displace along at least a direction perpendicular to a transversal plane in which the second substrate is held; and wherein the first clamp and / or the second clamp are configured such that displacement of one or more of the plurality of first actuators of the first clamp causes a deformation of the first bonding surface of the first substrate and / or displacement of one or more of the plurality of second actuators of the second clamp causes a deformation of the second bonding surface of the second substrate.

2. A substrate bonding apparatus as claimed in claim 1 , wherein the first clamp comprises a first clamp support, a first deformable layer comprising a first surface and a plurality of first burls arranged on the first surface, the plurality of first burls configured to be in direct contact with the first substrate, and a plurality of first actuators arranged between the first clamp support and the first deformable layer, wherein displacement of one or more of the plurality of first actuators of the first clamp causes a deformation of the first deformable layer which in turn causes a deformation of the first bonding surface of the first substrate; and / or the second clamp comprises a second clamp support, a second deformable layer comprising a second surface and a plurality of second burls arranged on the second surface, the plurality of second burls configured to be in direct contact with the second substrate, and a plurality of second actuators arranged between the second clamp support and the second deformable layer, wherein displacement of one or more of the plurality of second actuators of the second clamp causes a deformation of the second deformable layer which in turn causes a deformation of the second bonding surface of the second substrate.

3. A substrate bonding apparatus as claimed in claim 2, wherein each of the plurality of first actuators of the first clamp comprises a first stationary section and a first moveable section fixed to the first clamp support and the first deformable layer, respectively; and / or each of the plurality of second actuators of the second clamp comprises a second stationary section and a second moveable section fixed to the second clamp support and the second deformable layer, respectively.

4. A substrate bonding apparatus as claimed in claim 2 or 3, wherein the first deformable layer of the first clamp comprises a plurality of first embedded electrodes configured to apply an electrostatic force for securely holding the first substrate; and / or the second deformable layer of the second clamp comprises a plurality of second embedded electrodes configured to apply an electrostatic force for securely holding the second substrate.

5. A substrate bonding apparatus as claimed in claim 2, wherein the plurality of first actuators of the first clamp are distributed across a majority of a first surface area of the first deformable layer; and / or the plurality of second actuators of the second clamp are distributed across a majority of a second surface area of the second deformable layer.

6. A substrate bonding apparatus as claimed in claim 2, wherein each of the plurality of first actuators of the first clamp is arranged under a respective one of the plurality of first burls; and / or each of the plurality of second actuators of the second clamp is arranged under a respective one of the plurality of second burls.

7. A substrate bonding apparatus as claimed in claim 2, wherein the plurality of first actuators of the first clamp are distributed in such a manner that a central region of the first deformable layer contains a higher density of first actuators than a peripheral region of the first deformable layer; and / or the plurality of second actuators of the second clamp are distributed in such a manner that a central region of the second deformable layer contains a higher density of second actuators than a peripheral region of the second deformable layer.

8. A substrate bonding apparatus as claimed in claim 1, wherein the plurality of first actuators and / or the plurality of second actuators are piezo actuators.

9. A substrate bonding apparatus as claimed in claim 1, further comprising at least one metrology sensor operable to measure the first substrate and the second substrate to obtain a first set of measurement data and a second set of measurement data.

10. A substrate bonding apparatus as claimed in claim 9, wherein the first set of measurement data comprises a first measured grid representing a first surface profile of the first bonding surface and the second set of measurement data comprises a second measured grid representing a second surface profile of the second bonding surface.

11. A substrate bonding apparatus as claimed in claim 9, further comprising a processing unit operable to determine an amount of displacement for each of the plurality of first actuators of the firstclamp and / or for each of the plurality of second actuators of the second clamp based on the first set of measurement data and the second set of measurement data, respectively, wherein the processing unit is operable to control the plurality of first actuators of the first clamp based on the determined amounts of displacement so as to deform the first bonding surface of the first substrate; and / or the plurality of second actuators of the second clamp based on the determined amounts of displacement so as to deform the second bonding surface of the second substrate.

12. A method of bonding a first substrate to a second substrate in a substrate bonding apparatus as claimed in any preceding claim, the method comprising: placing the first substrate and the second substrate onto the first clamp and the second clamp, respectively; measuring the first substrate and the second substrate to obtain a first set of measurement data and a second set of measurement data, respectively; determining an amount of displacement for each of the plurality of first actuators of the first clamp and / or for each of the plurality of second actuators of the second clamp based on the first set of measurement data and the second set of measurement data, respectively; controlling the plurality of first actuators of the first clamp based on the determined amounts of displacement to deform first bonding surface of the first substrate and / or the plurality of second actuators of the second clamp based on the determined amounts of displacement to deform the second bonding surface of the second substrate; and bonding the first bonding surface of the first substrate to the second bonding surface of the second substrate to obtain a bonded substrate.

13. A method as claimed in claim 12, wherein the first measurement data comprises a first measured grid representing a first surface profile of the first bonding surface and the second set of measurement data comprises a second measured grid representing a second surface profile of the second bonding surface.

14. A method as claimed in claim 13, wherein the determining step comprises: determining a first grid difference between the first measured grid to a first target grid; determining a second grid difference between the second measured grid and a second target grid; and determining an amount of displacement for each of the plurality of first actuators of the first clamp based on the first grid difference and / or for each of the plurality of second actuators of the second clamp based on the second grid difference.

15. A method as claimed in claim 12, wherein the bonding step comprises:controlling some of the plurality of first actuators of the first clamp to bend a first region of the first bonding surface of the first substrate towards the second bonding surface of the second substrate; moving one or both of the first clamp and the second clamp to bring the first region of the first bonding surface of the first substrate into contact with the second bonding surface of the second substrate so as to initiate bonding; and controlling other actuators of the first clamp to bring other regions of the first bonding surface of the first substrate into contact with the second bonding surface of the second substrate to obtain a bonded substrate.

Citation Information

Patent Citations

  • Method and apparatus for angular-resolved spectroscopic lithography characterization

    US20060033921A1

  • Method and apparatus for angular-resolved spectroscopic lithography characterization

    US20060066855A1

  • Inspection Apparatus, Lithographic Apparatus, Lithographic Processing Cell and Inspection Method

    US20100201963A1

  • Methods and Scatterometers, Lithographic Systems, and Lithographic Processing Cells

    US20110027704A1

  • Metrology Method and Apparatus, Lithographic Apparatus, Device Manufacturing Method and Substrate

    US20110043791A1