Laser devices and methods for producing thereof

Abstract

A vertical-cavity surface-emitting laser (VCSEL) includes a first reflector structure; a second reflector structure; and an active region arranged between the first reflector structure and the second reflector structure. The active region comprises a multi-quantum-well (MQW) structure; a spacer arranged above the MQW structure; an electron blocking layer arranged above the spacer layer; and a p-type structure doped with p-type dopants, the p-type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer. The spacer and / or the p-type structure comprises Indium Gallium Nitride (InGaN).

Description

[0001] LASER DEVICES AND METHODS FOR PRODUCING THEREOF

[0002] Field

[0003] This present disclosure generally relates to semiconductor-based lasers and methods for producing thereof .

[0004] Background

[0005] Vertical-Cavity Surface-Emitting Lasers (VCSELs ) are known to operate at high current densities , making them particularly sensitive to series resistance . High series resistance , especially in p-type regions , results in a signi ficant voltage drop, leading to elevated operating temperatures and reduced ef ficiency .

[0006] Moreover, the quality of the active regions in VCSELs can be compromised by the growth of subsequent layers at high temperatures . This is especially problematic for active regions containing high levels of Indium, such as those used for green emission, as they are more susceptible to degradation due to the elevated temperatures during the deposition of additional layers .

[0007] FIG . 1 shows cross-section diagrams of known vertical cavity surface emitting lasers (VCSELs ) 100a and 100b that can have the issues described above . The VCSELs 100a and 100b each include a p-type distributed Bragg reflector ( DBR) , which can include layers of niobium pentoxide (Nb2O5) or silicon oxide SiO2. The VCSELS 100a and 100b can include an n-type DBR at the bottom which can include aluminum indium nitride (Al lnN) or gallium nitride ( GaN) .

[0008] In the VCSEL cavity, the VCSELs 100a and 100b can each include an active region that is principally made of a p-i-n j unction . The active region which can include a multiple quantum-wells (MQWs ) region that generate photons . The MQW region may include multi-quantum-well (MQW) layers which may be include one or more Gallium Indium Nitride ( GalnN) layers that alternate with barrier layers .

[0009] Further, in the active region, the MQW region may be arranged between a between a p-type layer and a n-type layer . The p-type layer can include one or more p-doped GaN layers and the n-doped layer or n-side semiconductor layer ( s ) can include one or more n-doped GaN layers . The n-side structure may have a moderate (n) or heavy (n++ ) n-dopant concentration .

[0010] A spacer layer and an electron blocking layer (both not shown) may be arranged between the MQW region and the p-doped layer or region . The spacer layer may be a semiconductor layer, e . g . , including at least one GaN layer .

[0011] Brief Description of the Drawings

[0012] In the drawings , like reference characters generally refer to the same parts throughout the di f ferent views . The drawings are not necessarily to scale , emphasis instead generally being placed upon illustrating the principles of the disclosure . In the following description, various aspects of the disclosure are described with reference to the following drawings , in which :

[0013] FIG . 1 shows cross-section diagrams of known vertical cavity surface emitting lasers ;

[0014] FIG . 2 a VCSEL 200 according to at least one example or aspect of the present disclosure ; FIG . 3 a cross-sectional diagram of a layer stack of a VCSEL according to at least one aspect of the present disclosure ;

[0015] FIG . 4 shows a flow diagram of a method according to at least one aspect of the present disclosure .

[0016] Description

[0017] The following detailed description refers to the accompanying drawings that show, by way of illustration, speci fic details and aspects in which the disclosure may be practiced . One or more aspects are described in suf ficient detail to enable those skilled in the art to practice the disclosure . Other aspects may be utili zed and structural , logical , and electrical changes may be made without departing from the scope of the disclosure . The various aspects described herein are not necessarily mutually exclusive , as some aspects can be combined with one or more other aspects to form new aspects . Various aspects are described in connection with methods and various aspects are described in connection with devices . However, it may be understood that aspects described in connection with methods may similarly apply to the devices , and vice versa . Throughout the drawings , it should be noted that like reference numbers are used to depict the same or similar elements , features , and structures . Throughout the drawings , it should be noted that proportions are not necessary to scale and that the si ze of features may be emphasi zed for ease of illustration .

[0018] FIG . 2 shows a VCSEL 200 according to at least one example or aspect of the present disclosure . In FIG . 2 , the VCSEL 200 may be similar in some aspects to the VCSELs 100a and 100b of FIG . 1 . The VCSEL 200 can be a front-side emitter in which light can be emitted as shown . The VCSEL 200 includes a first reflector 105, an oxide layer 110 defining an aperture opening, an active region 120, and a second reflector 130. These elements or components are formed above (e.g., in vertical / Z-direction / growth direction) the substrate 140, e.g., on or above a main surface of the substrate 140, e.g. a semiconductor substrate. For instance, the substrate may be a gallium nitride (GaN) substrate.

[0019] In at least on example, the first reflector or first reflector structure 105 and the second reflector or second reflector structure 100 may each be a distributed Bragg reflector (DBR) .

[0020] Further, the first reflector structure 105 can have a first conductivity type, e.g., p-type while the second reflector structure 110 has the opposite conductivity type, e.g., n-type.

[0021] The active region 120 include a p-i-n junction. The active region 120 can include one or more MQW layers 150. For example, in FIG. 2, a MQW layer or region 150 (or layers) can be arranged between an p-doped (e.g., p / p++) structure, e.g., a p-doped semiconductor layer 160 and n-doped (e.g., n / n++) doped semiconductor layer 165. The p-doped structure 160, which may be also referred to as a p-side structure, may be doped with dopants such as magnesium. The p-side structure may have a moderate (p) or heavy (p++) p- dopant concentration.

[0022] The VCSEL 200 includes an electron blocking layer 170 and a spacer layer 175, which can be arranged, e.g., along the z-direction between the p-doped structure 160 the MQW region 150. For example, along the z-direction the electron blocking layer 170 can arranged between the spacer layer 175 and the p-doped layer 160.

[0023] Further, an electrode, e.g., a p-electrode 180 can be arranged or disposed on the active region, e.g., on the oxide layer 110. Also an electrode, e.g., an n-electrode 185 can be formed on the n- doped layer 165. The electrodes 180 and 185 may be formed or include indium tin oxide (ITO) .

[0024] In at least one example, the spacer layer 175 and / or the p-doped layer 160 of the VCSEL 200 can include an indium gallium nitride (InGaN) layer. Said differently, the spacer layer 175, the p- doped layer, or both the spacer layer 175 and the p-doped layer 160 can include one or more InGaN layers.

[0025] For instance, the p-type structure 160 or the spacer layer 175 may be a layer stack or configuration that includes one or a plurality of InGaN layers. The layer may be stacked in the vertical or Z-direction.

[0026] For example, in a layer stack for the p-type structure 160 or the spacer layer 175, the InGaN layers can be stacked directly or indirectly on each other.

[0027] Further, the plurality of stacked InGaN layers, the content or concentration of the InGaN in each of the layers may be (substantially) the same or may in other instances vary. In other cases of varying concentration of InGaN, the InGaN concentration along the plurality of layers of the layer stack for a p-type structure 160 and / or spacer layer 175 may vary as a gradient, e.g., from a higher to low concentration. For example, a top layer (e.g., along Z-direction) may have a highest concentration InGaN which than gradually transition to a lowest concentration at the lowest layer, or vice versa.

[0028] Further, in at least one example, the p-type structure 160 may also be implemented as a layer stack that includes one or more layers of gallium nitride (GaN) stacked directly or indirectly on each other. FIG. 3 shows a diagram of a layer stack 300 according to at least one aspect of the present disclosure. The layer stack 300 may be included in a VCSEL, e.g., in a cavity or active region of a VCSEL.

[0029] The layer stack 300 includes a MQW structure 310. The MQW structure can include one or a plurality of MQW layers 312 or regions. Further, the MQW structure 310 can include one or more barrier layers 316. The layers of the MQW structure 310 may be grown epitaxially, e.g., on a n-type layer, in at least one example .

[0030] The layer stack 300 further includes a spacer layer 320. The spacer layer 320 may also be grown epitaxially, e.g., on the MQW structure 310. In one example the spacer layer 320 may be or may include at least one layer of indium gallium nitride (InGaN) .

[0031] In at least one example, the spacer layer 320 may be multilayered. In such a case, one or more layers may be InGaN layers. Further, in the multilayer example, at least one layer may be or include gallium nitride gallium nitride (GaN) .

[0032] As shown in the example of FIG. 3, an electron blocking layer 330 is formed and arranged on or over the spacer layer 320. The electron blocking layer 330 may also be epitaxially grown, e.g., on the spacer layer 320. In at least one instance, the electron blocking layer 330 be one or more (stacked) layers of or including aluminum gallium nitride (AlGaN) .

[0033] Further in the example of FIG. 3, a p-type semiconductor structure 340 can be formed on or over the electron blocking layer 330.

[0034] The p-type semiconductor structure 340 can include one or more semiconductor layers. The semiconductor layers can be doped with a dopant, e.g., p-type dopant such as magnesium. The semiconductor layers may be GaN layers.

[0035] The one or more semiconductor layers of the p-type semiconductor structure can include one or more InGaN layers. Further, in the case where the p-type semiconductor structure 340 is multilayered, one or more layers may be GaN layers, e.g., in a stacked configuration, e.g., along Z-direction.

[0036] The one or more semiconductor layers (e.g., GaN layers) of the semiconductor structure 340 formed through epitaxial growing processes .

[0037] For the layer stack 300, as described in other examples herein, the spacer layer 320, the p-type semiconductor structure / p-side structure, or both the p-type semiconductor and the spacer layer can include at least one InGaN layer.

[0038] The use of an InGaN layer or layers, e.g, for p-side semiconductor structure, in VCSELs, instead of, for example GaN or AlGaN layers improves VCSEL performance. This can be due to the lower activation energy in p-type InGaN which results in some cases in approximately four times better p-type conductivity in comparison to GaN. Furthermore, the use of InGaN layer (s) improves reduces series resistance and contact resistance, which also results in improved efficiency.

[0039] In addition, the use of InGaN layer or layers, e.g., for a spacer layer in a VCSEL also improve VCSEL performance. This is because InGaN or InGaN layers can be grown at much lower temperatures, especially in comparison to GaN layers. For example, the InGaN can be grown at temperatures in a range from approximately or substantially 700 degrees Celsius to approximately or substantially 900 degrees Celsius. This low growth temperature of InGaN does not deteriorate the quality of the active region of a VCSEL. This can result in better threshold current and allowing for longer wavelength emission.

[0040] Furthermore, by using aluminum (Al) content in an electron blocking layer of a VCSEL EBL (e.g., AlGaN) the electron blocking properties are improved with magnesium (Mg) carry over / transport into p-InGaN being reduced.

[0041] In general, conductivity in InGaN layers are higher than in corresponding GaN due to lower activation energy.

[0042] FIG. 4 shows a flow diagram of a method 400 for forming a VCSEL according to at least one example of the present disclosure.

[0043] The method 400 includes at 410 forming a first reflector structure. The first reflector structure can be a distributed Bragg reflector, e.g., with p-type conductivity.

[0044] At 420, the method 400 includes forming an active region that includes a multi-quantum-well (MQW) structure; a spacer arranged above the MQW structure; an electron blocking layer arranged above the spacer layer, and a p-type structure doped with p-type dopants, the p-type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer.

[0045] That is, method 420 includes forming the active region by forming MQW structure, the spacer, the electron blocking layer, and p- type structure, e.g., through known semiconductor processes. For example, the formation of the active regions described herein may be done, at least in part, by epitaxial growing layers.

[0046] For instance, forming the p-type structure can include epitaxially growing the one or more semiconductors layers that form the p-type structure and then doping said grown layers, e.g., with p-dopants. In at least one case, this can include epitaxially growing one or more InGaN layers. Further, forming the p-type structure may also include epitaxially growing one or more GaN layers. The p-type structure may be epitaxially grown on (e.g., directly on) or over an electron blocking layer.

[0047] The p-type structure or p-side structure can be a semiconductor layer that is doped with p-dopants, which can be magnesium, in at least one example.

[0048] The electron blocking layer may also be formed by being epitaxially grown on a spacer layer. For instance, the electron blocking layer may be formed by epitaxially growing one or more layers, e.g., one or more layers of AlGaN on or over a spacer layer .

[0049] Similarly, the spacer layer may also be formed by being epitaxially grown on or over a MQW structure. In the case where the spacer layer includes at least one layer of InGaN, epitaxially rowing one or more layers of InGaN on or over the MQW structure. Further, the spacer layer may include one or more other layers, e.g., GaN. These layer (s) can also be epitaxially grown on over the MQW.

[0050] For the method 400, the spacer and / or the p-type structure includes Indium Gallium Nitride (InGaN) . For example, for -p-p- type InGaN, may include magnesium (Mg) concentrations in a range of approximately or substantially 5E17 l / cm-3 to approximately or substantially 5E19 l / cm-3. This may be realized in layers such as element 340.

[0051] In examples herein, for p-type layers, e.g., p-type layers that may serve as a contact or are close to the p-contact (e.g., adjacent) the Mg concentration can be in a range from approximately or substantially 5E19 1 / cm-3to approximately or substantially 5E21 1 / cm-3.

[0052] For the VCSELs described herein, indium content of outside the QWs may be less than ten percent (< 10 % ) , and in some instances less than seven percent (< 7 % ) to achieve suitable transparency for the wavelength of the light emitted by the VCSEL . This indium content can be lower than the indium content for the light generating QWs themselves , e . g . 50% lower ) .

[0053] The following examples pertain to further aspects of the present disclosure :

[0054] Example 1 is a vertical-cavity surface-emitting laser (VCSEL ) including : a first reflector structure ; a second reflector structure ; an active region arranged between the first reflector structure and the second reflector structure , the active region including : a multi-quantum-well (MQW) structure , a spacer arranged above the MQW structure , an electron blocking layer arranged above the spacer layer, and a p-type structure doped with p-type dopants , the p-type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer ; wherein the spacer and / or the p-type structure comprises Indium Gallium Nitride ( InGaN) .

[0055] Example 2 is the subj ect matter of Example 1 , wherein the spacer may optionally include at least one layer comprising or including InGaN .

[0056] Example 3 is the subj ect matter of Example 1 , wherein the spacer may optionally include a plurality of layers inlcuding or comprising InGaN . Example 4 is the subj ect matter of Example 3 , wherein the plurality of layers of the spacer each including InGaN may respectively have varying concentrations of InGaN .

[0057] Example 5 is the subj ect matter of Example 4 , wherein the plurality of layers of the spacer each including / comprising InGaN may have varying concentrations of InGaN according to a gradient .

[0058] Example 6 is the subj ect matter of any of Examples 2 to 5 , wherein the spacer may include or comprise at least one layer including / comprising gallium nitride ( GaN) .

[0059] Example 7 is the subj ect matter of any of Examples 1 to 6 , wherein the p-type structure may include / comprise at least one layer including / comprising InGaN .

[0060] Example 8 is the subj ect matter of Example 7 , wherein the p-type structure may include / comprise a plurality of layers including / comprising InGaN .

[0061] Example 9 is the subj ect matter of Example 8 , wherein the plurality of layers of the p-type structure including / comprising InGaN can respectively have varying concentrations of InGaN in each layer .

[0062] Example 10 is the subj ect matter of Example 8 , wherein the plurality of InGaN layers of the p-type structure have varying concentrations of InGaN according to a gradient .

[0063] Example 11 is the subj ect matter of any of Examples 7 to 10 , wherein the p-type structure may include or comprise at least one layer including / comprising gallium nitride ( GaN) . Example 12 is the subj ect matter of any of Examples 1 to 11 , wherein the electron blocking layer may optionally include or comprise aluminum gallium nitride (AlGaN) .

[0064] Example 13 is the subj ect matter of any of Examples 1 to 12 , wherein the MQW structure may optionally include / comprise at least one MQW region and at least one barrier layer .

[0065] Example 14 is the subj ect matter of any of Examples 1 to 13 , wherein the p-type structure is doped with p-type dopants which optionally may be magnesium .

[0066] Example 15 is the subj ect matter of any of Examples 1 to 14 , wherein the active region may optionally further include or comprise an n-type structure doped with n-type dopants , wherein the n-type structure arranged between the MQW structure and the second reflector structure .

[0067] Example 16 is the subj ect matter of any of Examples 1 to 15 , wherein the first reflector structure and the second reflector structure may each be or include a distributed Bragg reflector ( DBR) .

[0068] Example 17 is the subj ect matter of any of Examples 1 to 16 , wherein the first reflector structure may have a p-type conductivity and the second reflector structure can have an n- type conductivity .

[0069] Example 18 is the subj ect matter of any of Examples 1 to 17 , which may further include a semiconductor substrate that is attached to the second reflector structure .

[0070] Example 19 is the subj ect matter of any of Examples 1 to 18 , which may further include an oxide layer including or defining an aperture and wherein the oxide layer is arranged between the first reflector structure and the active region .

[0071] Example 1A is a method for forming a vertical-cavity surfaceemitting laser (VCSEL ) , the method including : forming a first reflector structure ; forming an active region including forming : a multi-quantum-well (MQW) structure , a spacer arranged above the MQW structure , an electron blocking layer arranged above the spacer layer, and a p-type structure doped with p-type dopants , the p-type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer ; the method further including forming a second reflector structure so that the active region is arranged between the first reflector structure and the second reflector structure ; wherein the spacer and / or the p-type structure includes / comprises Indium Gallium Nitride ( InGaN) .

[0072] Example 2A is the subj ect matter of Example 1A, wherein at least the spacer may include / comprise Indium Gal lium Nitride , and wherein forming the spacer comprises epitaxially growing at least one a semiconductor layer comprising Indium Gallium Nitride .

[0073] Example 3A is the subj ect matter of Example 2A, wherein epitaxially growing at least one a semiconductor layer including / comprising Indium Gallium Nitride may optionally include epitaxially growing a plurality of semiconductor layers each including / comprising Indium Gallium Nitride .

[0074] Example 4A is the subj ect matter of Example 3A, wherein the plurality of semiconductor layers may respectively have varying concentrations of InGaN .

[0075] Example 5A is the subj ect matter of Example 4A, wherein the plurality of semiconductor layers may have varying concentrations of InGaN according to a gradient . Example 6A is the subj ect matter of any of Examples 1A to 5A, wherein forming the p-type structure may include / comprise epitaxially growing at least one semiconductor layer comprising InGaN .

[0076] Example 7A is the subj ect matter of Example 6A, wherein forming the p-type structure may include / comprise epitaxially growing a plurality of semiconductor layers comprising InGaN .

[0077] Example 8A is the subj ect matter of Example 7A, wherein the plurality of semiconductor layers of the p-type structure each including / comprising InGaN may respectively have varying concentrations of InGaN .

[0078] Example 9A is the subj ect matter of Example 8A, wherein the plurality of semiconductor layers of the p-type structure may have varying concentrations of InGaN according to a gradient .

[0079] Example 10A is the subj ect matter of any of Example 6A to 9A, wherein forming the p-type structure may include doping the at least one epitaxially grown semiconductor layer with p-type dopants .

[0080] Example 11A is the subj ect matter of any of Example 1A to 10A, wherein the spacer and / or the p-type structure may include / comprise at least one layer comprising gallium nitride ( GaN) .

[0081] Example 12A is the subj ect matter of any of Examples 1A to 12A, wherein the electron blocking layer includes / comprises aluminum gallium nitride (AlGaN) . Example 13A is the subj ect matter of any of Examples 1A to 12A, wherein the MQW structure includes / comprises at least one MQW layer region and at least one barrier layer .

[0082] Example 14A is the subj ect matter of any of Examples 1A to 14A, wherein forming the active region may further include forming an n-type structure doped with n-type dopants , wherein the n-type structure arranged between the MQW structure and the second reflector structure .

[0083] Example 15A is the subj ect matter of any of Examples 1A to 14A, wherein the first reflector structure and the second reflector structure may each include or be a distributed Bragg reflector ( DBR) .

[0084] Example 16A is the subj ect matter of any of Examples 1A to 15A, wherein the first reflector structure may have p-type conductivity and the second reflector structure may have an n- type conductivity .

[0085] Example 17A is the subj ect matter of any of Examples 1A to 16A, wherein the first reflector structure , the active region, and the second reflector structure may be formed on or over a semiconductor substrate so that the semiconductor substrate is attached to the second reflector structure .

[0086] Example 18A is the subj ect matter of any of Examples 1A to 18A, which may further include forming an oxide layer including or defining an aperture , wherein the oxide layer is arranged between the first reflector structure and the active region .

[0087] Any of the aspects , examples , and / or embodiments described herein may be suitable or appropriately combined .

[0088] The word "exemplary" is used herein to mean " serving as an example , instance , or illustration . " Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs.

[0089] For the purposes of the present disclosure, the phrase "A and / or B" means (A) , (B) , or (A and B) . For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A) , (B) , (C) , (A and B) , (A and C) , (B and C) , or (A, B, and C) .

[0090] Reference to "one embodiment" or "an embodiment" in the present disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment. The appearances of the phrase "for example," "in an example," or "in some examples" are not necessarily all referring to the same example.

[0091] The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of) ", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one.

[0092] The term "connected" can be understood in the sense of a (e.g. mechanical, optical and / or electrical) , e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) . As used herein, unless otherwise specified the use of the ordinal adjectives "first", "second", "third" etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

[0093] As utilized herein, terms "module", "component," "system," "circuit, " "element, " "slice, " "circuitry, " and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution) , and / or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and / or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and / or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term "set" can be interpreted as "one or more."

[0094] Such electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, circuitry can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute executable instructions stored in computer readable storage medium and / or firmware that confer (s) , at least in part, the functionality of the electronic components. As another example, circuitry or similar term can be implemented in hardware such as application specific integrated circuit (ASIC) , programmable gate array (PGA) , discrete digital circuits, etc.) or in a combination of hardware and software (e.g., a software model executed by a corresponding processor) .

[0095] The term "semiconductor substrate" can mean any construction comprising semiconductor material, for example, a silicon substrate with or without an epitaxial layer, a silicon-on- insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer.

[0096] A lateral direction is understood to mean a direction that runs, in particular, parallel to a main extension surface of the component, in particular of a layer. A vertical direction is understood to mean a direction that is oriented, in particular, perpendicular to the main extension surface of the component and / or layer. The vertical direction and the lateral direction are approximately orthogonal to each other.

[0097] Further, spatially relative terms, such as "beneath, " "below, " "lower, " "above, " "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element (s) or feature (s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0098] The term "data" as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term "data" may also be used to mean a reference to information, e.g., in form of a pointer. The term data, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art .

[0099] As used herein, a signal that is " indicative of" a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and / or cause a responsive action in a component receiving the signal . The signal may be stored or buf fered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium . Further, a "value" that is " indicative of" some quantity, state , or parameter may be physically embodied as a digital signal , an analog signal , or stored bits that encode or otherwise communicate the value .

[0100] Unless otherwise stated, the words "about" and " substantially" as used herein are to be construed as meaning the normal measuring and / or fabrication limitations related to the value or condition which the word "about" or " substantially" modi fies . Unless expressly stated otherwise , the term "embodiment" is used herein to mean an embodiment of the present disclosure .

[0101] As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase , amplitude , frequency, and so on . The signal may be referred to as the same signal even as such characteristics are adapted . In general , so long as a signal continues to encode the same information, the signal may be considered as the same signal . For example , a transmit signal may be considered as referring to the transmit signal in baseband, intermediate , and radio frequencies .

[0102] While the above descriptions and connected figures may depict device components as separate elements , skilled persons will appreciate the various possibilities to combine or integrate discrete features , functions into a single element . Such may include combining two or more components into a single component . Conversely, skilled persons will recogni ze the possibility to separate a single element into two or more discrete elements , such as splitting a single component into two or more separate components .

[0103] It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

[0104] All acronyms defined in the above description additionally hold in all claims included herein .

[0105] While embodiments of the present disclosure have been described above , it is obvious that further embodiments may be implemented . For example , further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above . Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein .

[0106] While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced .

[0107] Reference Numeral List a , 100b VCSEL first reflector structure / p-type DBR oxide layer active region second reflector structure / n-type DBR semiconductor substrate / GaN substrate MQW region / MQW layer ( s ) p-doped semiconductor structure / p-side structure n-doped semiconductor structure / n-side structure electron blocking layer spacer layer first electrode / p-electrode second electrode / n-electrode VCSEL VCSEL layer stack MQW structure or region ( s ) MQW layer barrier layer spacer layer electron blocking layer p-type semiconductor structure / p-side structure method -430 method steps

Claims

CLAIMS1. A vertical-cavity surface-emitting laser (VCSEL) comprising: a first reflector structure; a second reflector structure; an active region arranged between the first reflector structure and the second reflector structure, the active region comprising : a multi-quantum-well (MQW) structure; a spacer arranged above the MQW structure; an electron blocking layer arranged above the spacer layer; a p-type structure doped with p-type dopants, the p- type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer; wherein the spacer and / or the p-type structure comprises Indium Gallium Nitride (InGaN) .

2. The VCSEL of claim 1, wherein the spacer comprises at least one layer comprising InGaN.

3. The VCSEL of claim 1, wherein the spacer comprises a plurality of layers comprising InGaN.

4. The VCSEL of claim 3, wherein the plurality of layers of the spacer each comprising InGaN respectively have varying concentrations of InGaN.

5. The VCSEL of claim 4,wherein the plurality of layers of the spacer each comprising InGaN have varying concentrations of InGaN according to a gradient .6 . The VCSEL of claim 5 , wherein the spacer comprises at least one layer comprising gallium nitride ( GaN) .7 . The VCSEL of claim 6 , wherein the p-type structure comprises at least one layer comprising InGaN .8 . The VCSEL of claim 7 , wherein the p-type structure comprises a plurality of layers comprising InGaN .9 . The VCSEL of claim 8 , wherein the plurality of layers of the p-type structure comprising InGaN respectively have varying concentrations of InGaN in each layer .10 . The VCSEL of claim 8 , wherein the plurality of InGaN layers of the p-type structure have varying concentrations of InGaN according to a gradient .11 . The VCSEL of any of claims 7 to 10 , wherein the p-type structure comprises at least one layer comprising gallium nitride ( GaN) .12 . The VCSEL of any of claims 1 to 6 , wherein the electron blocking layer comprises aluminum gallium nitride (AlGaN) .13 . The VCSEL of any of claims 1 to 6 , wherein the MQW structure comprises at least one MQW region and at least one barrier layer .14 . The VCSEL of any of claims 1 to 6 , wherein the p-type structure is doped with p-type dopants comprising magnesium .15 . The VCSEL of any of claims 1 to 6 , wherein the active region comprises an n-type structure doped with n-type dopants , wherein the n-type structure arranged between the MQW structure and the second reflector structure .16 . The VCSEL of any of claims 1 to 6 , wherein the first reflector structure and the second reflector structure comprises a distributed Bragg reflector ( DBR) .17 . The VCSEL of any of claims 1 to 6 , wherein the first reflector structure comprises a p-type conductivity and the second reflector structure has an n-type conductivity .18 . The VCSEL of any of claims 1 to 6 , further comprises a semiconductor substrate that is attached to the second reflector structure .19 . The VCSEL of any of claims 1 to 6 , further comprising an oxide layer including or defining an aperture and wherein the oxide layer is arranged between the first reflector structure and the active region .20 . A method for forming a vertical-cavity surface-emitting laser (VCSEL ) , the method comprising : forming a first reflector structure ; forming an active region comprisinga multi-quantum-well (MQW) structure , a spacer arranged above the MQW structure , an electron blocking layer arranged above the spacer layer, and a p-type structure doped with p-type dopants , the p- type structure arranged above the electron blocking layer and between the first reflector structure and the electron blocking layer ; forming a second reflector structure so that the active region is arranged between the first reflector structure and the second reflector structure ; wherein the spacer and / or the p-type structure comprises Indium Gallium Nitride ( InGaN) .21 . The method of claim 20 , wherein the at least the spacer comprises Indium Gallium Nitride , and wherein forming the spacer comprises epitaxially growing at least one a semiconductor layer comprising Indium Gallium Nitride .22 . The method of claim 21 , wherein epitaxially growing at least one a semiconductor layer comprising Indium Gallium Nitride comprises epitaxially growing a plurality of semiconductor layers each comprising Indium Gallium Nitride .23 . The method of claim 22 , wherein the plurality of semiconductor layers has varying concentrations of InGaN .24 . The method of claim 23 , wherein the plurality of semiconductor layers has varying concentrations of InGaN according to a gradient .25 . The method of any claim 24 , wherein forming the p-type structure comprises epitaxially growing at least one semiconductor layer comprising InGaN .26 . The method of claim 25 , wherein forming the p-type structure comprises epitaxially growing a plurality of semiconductor layers comprising InGaN .27 . The method of claim 26 , wherein the plurality of semiconductor layers of the p-type structure each comprising InGaN respectively have varying concentrations of InGaN .28 . The method of claim 27 , wherein the plurality of semiconductor layers of the p-type structure have varying concentrations of InGaN according to a gradient .29 . The method of any of claims 25 to 28 , wherein forming the p- type structure comprises doping the at least one epitaxially grown semiconductor layer with p-type dopants .30 . The method of any of claims 20 to 24 , wherein the spacer and / or the p-type structure comprise at least one layer comprising gallium nitride ( GaN) .31 . The method of any of claims 20 to 24 , wherein the electron blocking layer comprises aluminum gallium nitride (AlGaN) .32 . The method of any of claims 20 to 24 , wherein the MQW structure comprises at least one MQW layer region and at least one barrier layer .33 . The method of any of claims 20 to 24 , wherein forming the active region comprises forming an n-type structure doped with n- type dopants , wherein the n-type structure arranged between the MQW structure and the second reflector structure .34 . The method of any of Examples 20 to 24 , wherein the first reflector structure and the second reflector structure each comprises a distributed Bragg reflector ( DBR) .35 . The method of any of claims 20 to 24 , wherein the first reflector structure has p-type conductivity, and the second reflector structure has an n-type conductivity .36 . The method of any of claims 20 to 24 , wherein the first reflector structure , the active region, and the second reflector structure is formed on or over a semiconductor substrate so that the semiconductor substrate is attached to the second reflector structure .37 . The method of any of claims 20 to 24 , further comprising forming an oxide layer including or defining an aperture , wherein the oxide layer is arranged between the first reflector structure and the active region .

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