Method for controlling a power converter

Abstract

The invention relates to a method for controlling a converter comprising bidirectional switches, the input of the converter being connected to a three-phase LF electrical grid and the output of the converter being connected to an inductive circuit operating at HF, the frequency of the HF currents of the inductive circuit being equal to the switching frequency of the switches, the method comprising sampling or injecting a reference current from or into each phase of the grid, the switches adopting, during a switching period, successive states resulting from application of a control sequence for which the ratio of the average values over a switching period of the two smallest instantaneous LF currents of the currents in absolute value is substantially equal to the ratio of the corresponding reference currents.

Description

[0001] Description Title: Method for controlling a power converter Technical field The present invention relates to the field of power converters, and more particularly to a method for controlling a matrix AC / AC power converter. Prior art Until now, on-board chargers essentially had a charging function (unidirectional). The issue of power reversibility is recent and has mainly focused on active power transfer (with a unity power factor). Conventional converters are of the AC / DC + DAB (Dual Active Bridge) type, where the DAB is actually a DC / AC + high-frequency (HF) transformer + AC / DC. They therefore consist of an AC / DC + DC / AC (HF) + HF transformer + AC (HF) / DC cascade.They can operate at arbitrary power factors, but are subject to space constraints due to the coils necessarily placed in series across the network phases, and to thermal constraints related in particular to the switching of the power semiconductors in the AC / DC stage connected to the network. The DAB stage in these structures only handles active power transfer (reactive power is managed by the AC / DC connected to the network) and achieves high efficiency and high power density. On-board chargers currently on the market typically employ a structure of this type.More recently published conversion structures (matrix + DAB type, or more precisely AC / AC + HF transformer + AC / DC) save a conversion stage and the bulky inductors in series on the AC network phases compared to conventional structures, thanks to the use of a direct AC / AC (HF) converter—also called a matrix converter—connected on one side to the low-frequency AC network and on the other to the primary winding of the HF transformer. However, it should be noted that this type of converter uses more complex semiconductor components or combinations of such components to achieve bidirectional switching functionality in both current and voltage, and is not necessarily more efficient in terms of conduction losses since two components must be placed in series to ensure the voltage bidirectionality of the equivalent switch thus obtained.Indeed, the passage of current causes a voltage drop across each of the semiconductor components connected in series to withstand the alternating voltage. However, scientific literature and currently published patents demonstrate the possibility of controlling these switches in such a way as to reduce switching losses by implementing soft switching techniques developed for unity power factor operation. In particular, Zero Voltage Switching (ZVS) allows a transistor to be turned on when the voltage across its terminals is already almost zero due to the current flowing through its antiparallel diode (structural or external) prior to the transistor's turn-on command. The turn-off, on the other hand, can be controlled by the presence of an inter-electrode capacitor acting as a switching aid circuit ("snubber"), reducing the losses when the transistor turns on.Due to their properties on the evolution of switched voltages and currents, these switching smoothing techniques are very beneficial for: - greatly reducing switching losses; - enabling higher frequencies (and therefore using smaller passive components); - shifting the trade-off between conduction and switching losses in favor of conduction to further increase efficiency by using more semiconductor surface area; - reducing the speed of switching transients and the associated electromagnetic interference problems (electromagnetic compatibility (EMC) standards may require costly and bulky passive filtering).Current performance gains are primarily achieved through the use of recent power semiconductor component technologies based on wide bandgap (WBG) materials, typically silicon carbide (SiC) or gallium nitride (GaN), replacing conventional silicon (Si) components. These WBG components reduce both conduction and switching losses, improving efficiency and consequently lowering thermal stresses, and enabling higher frequencies that allow for smaller passive components (particularly magnetic ones). Thermal management of onboard chargers generally relies on liquid cooling, which can be costly.Improving efficiency and compactness are issues generally encountered in power electronic converters and which guide a number of design choices concerning component technologies (semiconductors, passive components, cooling), conversion structures (arrangement of components constituting a circuit topology adapted to the constraints of the application), as well as remote control (development of setpoints for electrical quantities to be controlled, in average value over the switching period) and close control (development of instantaneous ON / OFF control commands for transistors to satisfy these setpoints).Efficiency and power density are particularly important criteria in embedded systems such as AC / DC chargers in electric vehicles (saving space, weight, and range, and allowing the converter to be removed from the liquid cooling loop, thus reducing integration constraints). Regarding AC / DC conversion isolated by an HF transformer, simple active power transfer (including bidirectional) is already fairly well understood, particularly through the use of recent topologies employing a direct conversion stage (of the matrix converter type) between the first AC network (low frequency) and the primary of a transformer operating at high frequency (in DAB mode), although this type of converter remains complex (especially its control) and is the subject of ongoing research.However, extending reactive power absorption challenges existing techniques for optimizing efficiency and compactness, thus requiring further development. Nevertheless, such functionality may prove necessary and will constitute a new application for next-generation automotive chargers. Indeed, recent work demonstrates the potential of harnessing energy stored in batteries when vehicles are stationary to power loads at various scales (Vehicle2Load: V2L, Vehicle2Home: V2H) or to provide services to the electrical grid (Vehicle2Grid: V2G), facilitating, for example, the integration of renewable energies, power shaving, or grid frequency control.These Vehicle-to-Everything (V2X) applications, broadly defined, require advanced on-board charger features, including not only bidirectional active power transfer but also the ability to supply or consume reactive power (necessary, for example, for grid-forming and voltage control in V2G), while ensuring galvanic isolation. Regarding three-phase connection to the low-frequency AC network (typically 50 Hz or 60 Hz), this is an alternative to single-phase domestic connections that allows for increased battery charging power and therefore faster charging speeds. Typical power ratings for on-board chargers are 7 kW for single-phase and 22 kW for three-phase. Three-phase is also more suitable for V2G functionalities.The main challenges associated with implementing isolated AC / DC converters are: - conversion efficiency (impacted by losses, particularly from power semiconductors); - the size of passive components required for the structure's operation; - thermal management (heat extraction) and integration constraints with the cooling system; - control complexity, especially for matrix converter-based structures; and - reliability and fault tolerance. Description of the invention: There is therefore a need to improve electronic power converters, particularly in terms of efficiency and compactness.The invention aims to meet this objective and relates, according to one of its aspects, to a method of controlling a matrix AC / AC power converter, the converter comprising a matrix of bidirectional current and voltage switches, the converter being able to be connected at input to a low frequency RST three-phase electrical network LF and at output to an inductive circuit operating at high frequency HF, the frequency of the HF currents of the inductive circuit being equal to the switching frequency of the switches, the method comprising the extraction or injection on each phase (R, S, T) of this network of a determined reference current ^. ^ ^^^, k Є {R, S, T}, the switches of the matrix converter taking successive states during a switching period resulting from the application of a control sequence for which the ratio of the average values ​​over a switching period of the two smallest instantaneous currents BF of the currents ^ ^ , k Є {R, S, T} generated by the converter on said phase (R, S, T) of the network, denoted ^ ^ and ^ ^ , in absolute value is approximately equal to the ratio of the corresponding reference currents, i.e. 〈 ^^〉 ^^^^ ^ ^ ^ being the instantaneous BF current of which ^ ^ ^^^ has the smallest absolute value among the three reference currents and ^ ^ being the instantaneous BF current whose reference ^ ^ ^^^is intermediate in absolute value among the three reference currents. By "approximately equal", we mean equal with a tolerance margin of less than 10%, or even 5%, better 3%, even better 1%. The power electronic converter considered is of the AC / AC type (alternating low frequency / alternating high frequency), being connected on one side to a three-phase alternating voltage system at low frequency (LF, typically 50 Hz or 60 Hz for applications connected to the electrical distribution network), and on the other side to a stage exhibiting inductive behavior and operating at high frequency (HF, typically between a few tens of kilohertz and a few megahertz).The fact that the frequency of the high-frequency (HF) currents in the inductive circuit is equal to the switching frequency of the switches corresponds to a specific operating mode on the HF side, classically called "full wave." This allows the circuit to take advantage of the current's sign changes within a switching period to perform smooth switching, drastically reducing switching losses. This simultaneously increases efficiency, decreases thermal stress, and increases the switching frequency (which allows for a reduction in the size of passive components: inductors and capacitors). Thus, the switch control is synchronous with the current oscillation; that is, a change in the period of one switch will be followed by an equivalent change in the other to maintain synchronism, namely, the positioning of the switch control signals relative to the alternating current waveform.The invention provides a general and systematic control method for the matrix converter, enabling the control of low-frequency (LF) currents flowing in the R, S, and T phases of the network, and consequently the active power (P) and reactive power (Q) exchanged with the low-frequency AC network. The invention allows the LF currents to be reconstructed from the available high-frequency (HF) currents. Advantageously, the LF currents are homothetic to the reference currents, up to a multiplicative constant (due to compliance with the aforementioned ratio). The method according to the invention operates advantageously regardless of the desired phase shift between network currents and voltages, which can also be described as an arbitrary power factor. Thanks to the invention, it is possible to achieve smooth switching conditions in zero-voltage switching (ZVS), thus significantly reducing switching losses.In particular, these switching operations are ensured regardless of the phase shift between network currents and voltages. The invention allows the amplitude of the high-frequency (HF) currents to be reduced to the minimum necessary to ensure the operation described above, thereby reducing power losses and optimizing the converter's efficiency. Preferably, the switching of the switches is performed using a soft switching method, such that an HF voltage rise occurs when the corresponding HF current is negative, and an HF voltage fall occurs when the corresponding HF current is positive. An "HF voltage rise" is understood to mean an increase in the electrical potential of a phase on the HF side, and a "negative HF current" refers to the fact that the current on that same phase flows from the inductive circuit to the matrix converter (the "incoming" current) at the moment of switching.The term "HF voltage drop" refers to a decrease in the electrical potential of a phase on the HF side, and "positive HF current" refers to the fact that the current on this same phase flows from the matrix converter to the inductive circuit (outgoing current) at the moment of switching. In one embodiment, a safety time δ equal to at least a minimum difference between the switching moment and the moment of sign change of the HF current associated with the switching switch is present in the control sequence between two successive states of this switch, to ensure that switching occurs under a current value and with a time margin sufficient for smooth switching.A low-pass filter is preferably applied between the matrix converter and the audio frequency (AF) power grid to attenuate harmonics with frequencies higher than or equal to the switching frequency and to allow the AF component to flow to the grid. The low-pass filter can be of the LC type, with each AF phase (R, S, T) having a capacitor in parallel with that phase and an inductor in series between the capacitor and the power grid. This inductor can be a parasitic capacitor or inductor, or added components.Preferably, the LF voltages are ordered according to a sorting by voltage value at each instant and noted such that: - M refers to the phase among R, S or T which has the greatest electric potential; - m refers to the phase among R, S or T which has the smallest electric potential; - i refers to the phase among R, S or T whose electric potential is intermediate between the two preceding ones; the LF currents being renamed such that: - iM denotes the current among iR, iS and iT flowing in the phase of greatest potential M; - i. m designates the current among i R , i S and i T circulating in the phase of smallest potential m; - i i designates the current among i R , i S and i T circulating in the intermediate potential phase i; the reference current ^ ^ ^^^ , k Є {R, S, T} renamed ^ ^ ^^^, j Є {M, i, m} following the tension ordering, being represented by a vector ^^^^^^^^^^^⃗ in a complex plane such that: 2^ ^^^ ^^^^^^^^^^ ^ ^^^^^^^^^ ^ ^^ ^ ^^ Where β is orthogonal to said vector on respective axes i m which intersect at the center of the complex plane representing the zero value of the currents, the axis of iM corresponding to the real axis of the complex plane, the positive part of the axis of ii being rotated 120° counterclockwise with respect to the positive part of the axis of i M , the positive part of the axis of i m being rotated 120° counterclockwise with respect to the positive part of the axis of i iThe current axes and their respective perpendicular axes, called perpendicular current axes, define twelve sectors numbered from I to XII, each identified by a specific current arrangement as shown in the following table: Sector Current Arrangement I ^^^^ ^ > 0 > ^^^^ ^ > ^^^^ ^ II ^^^^ > ^^^^ > 0 > ^^^ ^ ^ ^^ III ^^^^ > ^^^^ > ^^^^ ^ 0 > ^^IV ^^^^ > ^^^ ^^^^ 0 > ^^ > ^^V ^^^^ > ^^^ ^^^^ 0 > ^^ > ^^VI ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^VII ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^VIII ^^^^ > 0 > ^^^ ^^^ ^ ^^ > ^^ IX ^^^^ > ^^^ ^^^^ 0 > ^^ > ^^X ^^^^ > ^^^ ^^^^ ^^ > 0 > ^^XI ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^ XII ^^^^ ^ > 0 > ^^^^ ^^^ ^ > ^^Advantageously, the sum of the RF currents is zero and the sum of the LF currents is zero. In one embodiment, the output of the matrix converter defines at least two arms connecting the converter to the inductive circuit, with a single switch for each arm being closed at all times. In particular, the matrix converter can be of the 3x3 type having three output arms A, B, C. In one embodiment, the possible connections of arms A, B, C to phases R, S, T and their impact on the LF currents (iR, iS, iT) are defined in the following tables, the positive sign of an RF current (i A , i B , i C ) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter ("leaving" means "side ABC towards the inductive circuit for currents iA iB iC"): Possible states in notation<M,i,m> arms A, B, C and their impact on BF currents (i R , iS , i T) can be defined in the following tables: We will now describe the sequence of states to be taken by the converter during a period of HF currents, this same period being divided into intervals (to describe the arrangement of states over time).An interval being defined by the duration separating two zero crossings of the HF currents, a switching period comprising six substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, each arrangement corresponding to an area of ​​the complex plane obtained by a subdivision in two of each of the sectors, the set of possible arrangements is preferably defined in the following table: Where I1 to I6 denote the intervals within a switching period, the symbol ^ indicates that two states succeed one another within the same interval, the symbol 〉 denotes a transition between two intervals involving a positive safety time δ, the. This designates a transition between two intervals involving a negative safety time δ, and the symbol ↺ indicates that each arrangement is cyclic, repeating identically from one switching period to the next. There can be up to fourteen control sequences, defined in the following table: a control sequence being unique for given LF voltages and LF current references. Preferably, the applied arrangement is the one corresponding to the "small" value of the reference current ratio in the following table, i.e., when this ratio is less than a limit value Xlim that is less than 1; otherwise, the applied arrangement is the one corresponding to the "large" value of the reference current ratio in the same table, i.e., when this ratio is greater than the limit value Xlim.

[0002] A variable X can be defined such that: ^ ^^^ $ = ^ ^^^^ ^ So 1 − $^ ^ Where Ψ is the angle covered by until the current crosses zero on the curve followed by i1 when it is not zero, considering a scale of angles in radians based on the switching period, the selection of the arrangement to be applied is made according to the value of Ψ. In one embodiment, if Ψ is less than a limit value Ψlim, i.e., Ψ < Ψlim, the applied arrangement is that which corresponds to the "small" value of X in the preceding table; otherwise, the applied arrangement is that which corresponds to the "large" value of X in the same table, Ψlim corresponding to the width of an interval, i.e., π / 3, to which the safety time δ is added or subtracted depending on the arrangement. Preferably, the limit value X lim The variable X, defining the transition between the "small" and "large" values ​​in the previous table, is defined such that: 1 7 7 In a mode of 3x2 with two output arms A, B. The possible connections of arms A, B to phases R, S, T and their impact on the BF currents (i R , i S , i T ) are preferably defined in the following table, the positive sign of an HF current (iA) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter: Possible states in notation<M,i,m> arms A, B and their impact on BF currents (i R , i S , i T ) can be defined in the following table: An interval being defined by the duration separating two zero crossings of the HF currents, a switching period comprising two substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, the set of possible arrangements is preferably defined in the following table: Where I1 and I2 denote the intervals within a switching period, the symbol ^ indicates that two states succeed one another within the same interval, the symbol ≠ denotes a transition between two intervals involving a positive safety time δ, the denotes a transition between two intervals involving a negative safety time δ, the symbole↺indicates that each arrangement is cyclic, repeating identically from one switching period to another. The notation of type 〈xy〉 refers to an intermediate state of duration less than or equal to 2δ appearing at the transition between intervals. The invention also relates, according to another aspect, to a computer program product comprising instructions readable by the processor of a device for implementing the method according to the invention. The invention also relates, according to another aspect, to a matrix AC / AC power converter comprising a matrix of bidirectional current and voltage switches, suitable for connection at its input to a low-frequency (LF) three-phase RST electrical network and at its output to a high-frequency (HF) inductive circuit, configured to be controlled by the method according to the invention in order to control the active power (P) and reactive power (Q) exchanged with the LF network. The invention further relates toThe object, according to another aspect, is a DC current source, in particular a battery charger, from a three-phase network comprising: - the converter according to the invention, - a converter controller configured to implement the control method according to the invention. Brief description of the drawings The invention will be better understood upon reading the detailed description that follows, non-limiting examples of its implementation, and upon examination of the accompanying drawing, in which: [Fig. 1] Figure 1 is a schematic view of an example of an isolated AC / DC conversion using an HF transformer implementing an AC / AC converter of the invention; [Fig. 2] Figure 2 shows different representations of a 3×3 matrix converter; [Fig. 3] Figure 3 shows an example of an isolated AC / DC conversion implementing a 3×2 matrix converter; [Fig. 4] Figure 4 shows an equivalent circuit for one phase of the inductive circuit linking the HF currentwith the voltages generated by the two converters: (a) general representation without parallel impedance; (b) example of a resonant circuit involving a capacitor in series with one phase; [Fig. 5] Figure 5 schematically illustrates a basic system considered with definitions of the electrical quantities; [Fig. 6] Figure 6 schematically represents the shapes of the electrical quantities on either side of a matrix converter: (a) network voltages; (b) switched voltages on the RF side; (c) RF currents; (d) switched currents on the AF side; (e) filtered currents on the network; [Fig. 7] Figure 7 represents the current curves on the AF side on either side of the LC filter: (a) currents on the network; (b) currents generated by the converter on the AF side; (c) magnification of the network current. ^ <=> according to the reference ^ ^ ^^^ ; (d) current enlargement ^ ^ with its reference ^ ^ ^^^; (e) enlarged view showing the appearance of ^ ^ and the difference (grey area) from its reference ^ ^ ^^^; [Fig 8] Figure 8 illustrates the voltage and current evolution curves on the HF side, verifying the smooth switching conditions in ZVS; [Fig 9] Figure 9 schematically represents safety margins for ZVS switching during current zero crossings; [Fig 10] Figure 10 shows an example of safety margins on either side of the current zero crossings for ZVS switching; [Fig 11] Figure 11 schematically illustrates the minimum amplitude of the HF currents for constructing the reference LF currents; [Fig 12] Figure 12 schematically represents the construction of an LF current reference with minimum amplitude of the HF currents, including a safety margin on the minimum value of the switched current; [Fig 13] Figure 13 illustrates the states of the matrix converter: (a) identification of the three arms; (b) examples of states and their consequence on the injected LF currents;[Fig 14] Figure 14 schematically represents the rearrangement and naming of the phases on the LF side of the converter according to a voltage sorting; [Fig 15] [Fig 16] [Fig 17] Figures 15 to 17 schematically illustrate an example of a succession of states according to the control principle of the invention; [Fig 18] [Fig 19] [Fig 20] Figures 18 to 20 schematically represent successions of states on the scale of the switching period for a period at a low switching frequency; [Fig 21] [Fig 22] [Fig 23] Figures 21 to 23 are analogous to Figures 18 to 20 but with a frequency four times higher; [Fig 24] [Fig 25] [Fig 26] Figures 24 to 26 show an example of successions of states in a switching period; [Fig 27] [Fig 28] [Fig 29] Figures 27 to 29 show another example of a succession of states with ^; ^ ^^^ > 0 > ^ ^ ^^^ > ^ ^ ^^^ ; Representation of reference currents in the complex plane; [Fig 31] Figure 31 illustrates examples of trajectories of ^^^^^^^^^^^⃗ in the complex plane during a complete period T0: (a) for φ = 30°; (a) for φ = 70°; (c) for φ = −135°; [Fig 32] [Fig 33] [Fig 34] Figures 32 to 34 represent an example of a state arrangement in sector XII (satisfying ^ ^ ^^^ > 0 > ^ ^ ^^^ > ^ ^ ^^^ ) similar to that of sector I around the intersection between the ; [Fig 35] Figure 35 represents the set of sectors associated with distinct state arrangements as a function of the position of ^^^^^^^^^^^⃗ ; [Fig 36] [Fig 37] [Fig 38] Figures 36 to 38 represent an example involving arrangement A17 mixing positive and negative safety margins δ in the same switching period; [Fig 39] [Fig 40] [Fig 41] Figures 39 to 41 illustrate an example involving arrangement A10 containing only positive margins δ; [Fig 42] [Fig 43] [Fig 44] Figures 42 to 44 show an example involving arrangement A18 with the same sequence of states as that of Figures 36 to 38 but arranged differently; [Fig 45] Figure 45 represents the flowchart of a control method according to the invention; [Fig 46] Figure 46 illustrates an example of the angle ψ and its limit ψ lim ; [Fig 47] Figure 47 represents the BF side current curves of and on the other hand of the LC filter for a 3×2 converter: (a) currents on the network; (b) currents generated by the converter on the audio frequency side; (c) network current expansion ^ ^ <=> according to the reference ^ ^ ^^^ ; (d) current enlargement ^ ^ with its reference ^ ^ ^^^ ; (e) enlarged view showing the appearance of ^ ^ and the difference (grey area) from its reference ^ ^ ^^^; [Fig 48] Figure 48 illustrates the minimum amplitude of the HF currents for constructing the reference LF currents in a 3×2 matrix converter; [Fig 49] Figure 49 represents the construction of an LF current reference with minimum amplitude of the HF currents in a 3×2 converter, including a safety margin on the minimum value of the switched current; [Fig 50] [Fig 51] [Fig 52] Figures 50 to 52 represent an example of the succession of states of a 3×2 converter in a switching period; [Fig 53] [Fig 54] [Fig 55] Figures 53 to 55 illustrate an example for the 3×2 converter involving positive and negative safety margins δ in the same switching period, and showing transition states; and [Fig 56] [Fig 57] [Fig 58] Figures 56 to 58 represent an example for the 3×2 converter involving positive safety margins δ.Detailed Description Figure 1 schematically illustrates a view of an example of an AC / AC converter 1 according to the invention. This converter 1 comprises a matrix of bidirectional current and voltage switches 2, suitable for connection at its input to a low-frequency (LF) three-phase RST electrical network 3 and at its output to a high-frequency (HF) inductive circuit 5. The inductive stage 5 comprises one or more magnetic components and consists of either one or more coils in series, or a connection to a transformer winding (whose leakage inductance can act as a series coil), or a combination of both (coil and transformer). If a transformer is present, it conventionally provides galvanic isolation between one or more primary windings and one or more secondary windings, forming magnetically coupled coils.The terms primary and secondary are interchangeable (a transformer being inherently reversible), and the convention adopted here is to designate the winding(s) connected to the aforementioned AC / AC converter as primary. In this case, the secondary is generally connected to another converter 4, for example, an AC / DC type converter, so that the assembly formed by the first converter (AC / AC), the magnetically coupled inductive circuit (transformer), and the second converter (AC / DC) provides an overall AC / DC function with galvanic isolation (provided by the high-frequency transformer). Figure 1 illustrates such an arrangement including a three-phase inductive circuit 5. However, the invention focuses on the control of the first converter 1 (gray area). The inductive circuit 5, as well as the second converter 4 (including its AC / DC or AC / AC nature), may differ from the examples shown in this figure.In the following, the low frequency will be identified by the variable f0 and the high frequency by f. sw(The subscript "sw" refers to "switching frequency," also known as the switching frequency.) Indeed, a particularity justifying the notation fsw is that the invention relates to a specific operating mode on the RF side, classically called "full wave." This means that the frequency of the alternating current(s) in the inductive stage is also equal to the frequency of the on / off state change (switching) of the power semiconductor components (also called power switches). This operating mode makes it possible to take advantage of the current sign changes within a switching period to perform smooth switching, which drastically reduces switching losses to simultaneously increase efficiency, decrease thermal stress, and increase the switching frequency (which allows for a reduction in the size of passive components – inductors and capacitors).The converter considered here performs a direct AC / AC conversion, that is, without an intermediate storage stage (inductive or capacitive). In the scientific literature, such an AC / AC converter is commonly called a "matrix converter" because it consists of a matrix of equivalent power switches (combinations of transistors and possibly four-segment diodes, i.e., bidirectional in current and voltage). If the AC networks on both sides of the converter are three-phase, Figure 2 shows equivalent representations of the converter, displaying a "3×3 matrix" of switches (3 phases on the LF side and 3 phases on the HF side). Other configurations are possible, such as a 3×2 matrix converter if the inductive circuit on the HF side is single-phase (i.e., 2 wires), as illustrated in Figure 3.In the configuration of the invention, the matrix converter is connected on the RF side to an inductive circuit, which therefore acts as a current source. Consequently, it must be connected to a voltage source on the AF side, implemented using capacitors. In a three-phase network, these capacitors can be connected in delta (between phases) or star (forming a capacitive neutral point, known as a "star point"). These configurations are equivalent from the perspective of the invention. According to this configuration, the switching of the matrix converter allows the electrical potentials of the voltage source (AF side) to be applied to the phases of the inductive circuit on the RF side. Conversely, the currents of the inductive circuit (RF side) are applied to the phases of the AF network depending on the on / off state of the converter's power switches. This is referred to as voltage switching on the RF side and current switching on the AF side.It is specified that the time-domain shape of the HF alternating current(s) in the inductive circuit depends on: - the AC voltage applied on the HF side by the first converter; - the AC voltage controlled by the second converter; - the impedance of the inductive circuit between the two (at the switching frequency and its harmonics). Figure 4a shows a simplified equivalent circuit per phase, where i. HF corresponds to a current on one phase of the inductive circuit (i A , i B Yes C In the example in Figure 1), v1 represents an AC HF voltage applied by the first converter (related to potentials A, B, C in Figure 1), and v2 represents an AC HF voltage imposed by the second converter (related to potentials A', B', C' in the same example). In this case, the instantaneous voltage v indThe voltage seen through a phase by the inductive stage is, at each instant t, the voltage difference vind(t) = v1(t) − v2(t). In steady state, its Fourier series decomposition leads to frequency components with fsw and its multiples. For each frequency f, the current IHF satisfies: [Math 1] Z HF (f) × I HF (f) = V ind (f) = V1(f) − V2(f) Where V ind , Z HF and I HF (f) are complex numbers at the considered frequency. The inductive circuit is characterized by the fact that Z HF approaches a purely imaginary number that increases with frequency for sufficiently high frequencies (beyond f) sw ). In this case, I HF is a consequence of the voltage difference V ind and the frequency evolution of the impedance Z HF , and from this results a temporal pattern of the current I HF (t) which is: - controllable (by controlling the converters allowing a voltage V to be imposedind (t) suitable and at the desired frequency); - free of discontinuities (due to the inductive nature of the circuit, which can be modeled by any impedance in series with a coil). It is assumed in what follows that the voltage V2(t) imposed by the second converter always allows the fundamental frequency to be adjusted (at f sw ) of the voltage V ind (t) according to equation (1), and therefore the fundamental of the current I HF (t). Furthermore, a fundamental approximation of this current allows us to neglect its harmonics and reduce the analysis to the sinusoidal component at fsw, which has the most significant impact on power transfer. Indeed, at a given voltage excitation, current harmonics attenuate rapidly in an inductive circuit, because its impedance increases with frequency. Moreover, a quasi-sinusoidal current at f swThis can be achieved when the inductive circuit is made resonant, typically by adding capacitors in series with the magnetic components (example in Figure 4b) so that fsw is close to the circuit's resonant frequency. It should be noted that even in this case, the circuit can still be described as inductive, since the magnetic component(s) with the behavior of a series coil are still present (the impedance might then no longer be inductive at the fsw frequency, but it would become so again at higher frequencies). Finally, the exact time shape of the RF current is not a decisive factor for the application of the invention; the prerequisite is simply that this current exhibits a positive half-cycle and a negative half-cycle, allowing the zero crossing to be identified, which will serve as a reference point for controlling the converter by ensuring smooth switching.Thus, without loss of generality, the figures presented below will show sinusoidal high-frequency (HF) currents in the inductive circuit. One objective of matrix converter control is to control the active power (P) and reactive power (Q) exchanged with the low-frequency AC network, the latter typically imposing a sinusoidal voltage at 50 Hz (f0) for the French electrical grid. Consequently, power control amounts to drawing or injecting, on each phase of this network, a reference current determined to satisfy the required power references (P and Q). This current is typically sinusoidal at the same frequency as the voltage. However, it was previously specified that the current injected by the matrix converter on the low-frequency (LF) side of the phases depends on the states of the switches and the HF currents of the inductive circuit.This current, produced on the LF side by the converter, is therefore made up of different portions of the HF currents which will draw, as will be shown later, a certain time pattern during a switching period T. sw = 1 / f sw , depending on the sequence of states of the matrix converter switches during this period. The current produced by the converter to the grid therefore contains frequency components at the frequency fsw and its multiples, in addition to an LF component (at f0) that follows its reference to satisfy the power requirements. Consequently, obtaining sinusoidal currents on the grid corresponding to their reference at the frequency f0 requires: - a filtering function to remove the frequency components at f from the grid swand beyond; - control of the currents injected by the converter on the audio frequency (AF) side so that the filtered current has at all times the correct value corresponding to the AF reference at f0. Low-pass filtering is therefore useful between the matrix converter and the AF electrical network, in order to attenuate switching harmonics (fsw and beyond) and allow only the AF component (at f0) to flow to the network. Such a filter is classically of the LC type, therefore comprising: - a capacitive part (C) placed in parallel with the phases on the AF side of the matrix converter, offering a low-impedance path at high frequencies which promotes the feedback of the frequency components at f swand beyond, these latter can then remain confined to this point without propagating towards the network. Conversely, the impedance of this capacitive part is high for the LF component at f0, which is therefore not affected; - an inductive part (L) placed in series between the capacitor(s) and the LF electrical network. The corresponding impedance is low at LF, allowing the current component at f0 to flow towards the network. Conversely, the impedance is high at high frequencies, opposing the propagation of components above f swwhich will thus remain all the more confined to the capacitive part of the filter. This LC filter 6 is identified in Figure 1, between the network 3 modeled by three voltage sources and the matrix converter 1 on the LF side. It can be noted here that the capacitive part of the filter, directly connected to the converter, constitutes the voltage source ensuring the alternation of the sources with the HF inductive circuit 5 on the other side of converter 1. The inductive part of the filter, for its part, is further upstream and only plays an additional filtering function. On the scale of a switching period Tsw (very short compared to the network period T0 = 1 / f0), the average value of the current in T sw corresponds to the reference current value at that instant. Indeed, this average value is not, or only slightly, altered by the LC filter, and will be found on the network. From one switching period to the next, the average value in T swwill gradually evolve with a slow periodicity (T0), producing a low-frequency alternation and enabling the synthesis of the reference current. A key challenge in converter control is then to ensure that, at each switching period, the pattern formed by the portions of HF current injected on the LF side has an average value equal to the LF current reference. This point will be developed further. Figure 5 shows the system under consideration where the LF electrical network is represented by three voltage sources (the internal impedance of the network is not shown). For a balanced sinusoidal three-phase network (for simplicity, but the invention does not impose any constraints regarding the harmonic distortion or imbalance of the network), the time-domain expression of the network voltages satisfies (for a direct cyclic order and fixing the phase origin for R, without loss of generality): [Math 2] <=>(B) = Ĉ*^E where Ĉ is the amplitude of the line-to-neutral voltages in the network. In this case, the control of active and reactive power amounts to defining the amplitude ^̂ of the network current setpoints as well as the phase shift φ between current and voltage: [Math 3] ^ ^^^ ^ (B) = ^̂*^E − K) The currents ^ ^ ^^^ , ^ H ^^^ , on the network and are assumed to be known at every instant (even if they do not form a perfectly balanced sinusoidal network as in equation (3)). The converter control must therefore ensure that the currents iR, iS, iT generated by the matrix converter (a function of the HF currents and the control of the power switches) allow, via the LC filter, the production of currents on the network ^ ^ <=> , ^ H <=> , ^ I <=> who follow their references ^ ^ ^^^ , ^ H ^^^ , ^ ^ I ^^Figure 6 shows the time-domain waveform of the voltages and currents on either side of the matrix converter. The triplets of electrical quantities are labeled in a grouped form: for example, v{R|S|T}N denotes the vkN for k ∈ {R, S, T}, or i{A|B|C} the currents ik for k ∈ {A, B, C}. In Figure 6, the voltages v{R|S|T}N at the input of the matrix converter are assumed to be similar to the network voltages. { < ^ = ∨ > H ∨I}Aand form a balanced sinusoidal three-phase network (Figure 6a). In practice, the invention can be applied identically even if these characteristics are not perfectly met (presence of harmonics, slight phase shift introduced by the filter, etc.). Strictly speaking, a common-mode voltage may be present, composed, for example, of voltage pulses with a zero average value and carried by the LC filter coils (a consequence of converter switching and possible ground connections in the conversion chain, particularly with an EMC filter). In the general case, it would then be necessary to distinguish the neutral potential N appearing near the matrix converter in Figure 6 from the network neutral (also N) appearing at the connection point of the three AC voltage sources in Figure 5. The local neutral potential at the matrix converter could then be called N', satisfying at each instant vRN′ + vSN′ + vTN′ = 0.To avoid unnecessary overloads, we retain the single-point N notation in the following, which does not entail any loss of generality (we could always replace the v. {R | S | T}N and v{A|B|C}N by v{R|S|T}N′ and v{A|B|C}N′ in what follows). The matrix converter control produces voltages v{A|B|C}N, chopped on the HF side of the converter, shown in Figure 6b. The interaction of these voltages with the control of the second converter 4 (shown in Figure 1) produces the HF currents i {A | B | C}represented in Figure 6c, and assumed to be sinusoidal during a switching period. Similar to the switching of voltages on the RF side, the switching operations imposed by the matrix converter control induce a switching of currents on the AF side, producing the currents i{R|S|T} shown in Figure 6d and visibly exhibiting an AF component at f0 (positive and negative alternations are distinguishable) and rapid RF variations (at fsw) consisting of portions of the RF current curves. The RF components are then rejected by the LC filter so that the current on the network ^ { < ^ = ∨ > H ∨I}retains only the BF component (Figure 6e) corresponding to the desired current references (in equation (3), up to the imperfections of the LC filter). Assuming perfect filtering where only high frequencies (fsw and above) are altered by the LC filter (these frequency components not appearing on the network side), the synthesis of the reference currents amounts to ensuring that at each instant t, the average value of the currents ik (with k ∈ {R, S, T}) in a small window of width Tsw around the considered instant is equal to the corresponding reference current ^ ^ ^^^ that we are trying to obtain. We are therefore talking about a moving average, denoted ^ ^ ^ ^ Tsw or more simply ^ ^ ^ ^ considering that the averaging window implicitly corresponds to the switching period Tsw: [Math 4] ∀B∀T ∈ {U, W, X}^^^^(B) = ^^^^ ^ (B)Note: In practice, if the filter slightly alters the LF component at f0, typically causing a small phase shift in the currents between upstream and downstream, for example, it is still possible to define reference LF currents. ^ ^^^ which, after filtering, allow us to obtain the ^ ^ <=> desired. Figure 7a-b shows the currents ^ { < ^ = ∨ > H ∨I} obtained on the network after filtering the currents i {R | S | T} generated by the converter on the LF side. Since the currents are essentially identical across the three phases R, S, T (with only a time shift of one-third of a period T0), a single phase is sufficient for the analysis. Thus, Figure 7c-d shows a magnified view of the current ^ ^ <=> , following the reference correctly ^ ^ ^^^ , as well as the current i R generated by the converter matrix. A further enlarged view of i R is presented in Figure 7e, showing that this current is made up of portions of the HF current curves (iA, iB, iC, as well as their opposites and the zero value). Furthermore, it appears that the current iR oscillates around its reference ^ ^ ^^^ , as revealed by the shaded gap between these two currents, so that the average value of i R over a small time interval corresponds to ^ ^ ^^^ Thus, one objective of the invention is to control the matrix converter in such a way that the currents i{R|S|T} follow their references. ^ ^ ∨ ^ , this BF component then appearing on the currents ^ { < ^ = ∨ > H ∨I}of the LC filter network. Switching in power electronics relies on controlling a transistor in conjunction with a diode, forming a "switching cell" that interfaces a voltage source (capacitor) with a current source (inductor). There are two types of switching of this kind, described below in a simplified manner: - Turn-on: also called switching the transistor on, which consists of switching a transistor from the off state to the on state. When current first flows through the diode of the switching cell, the initially off transistor carries the full voltage of the capacitor and does not conduct any current. When the transistor is turned on (by applying a gate voltage), the current flowing through it increases (reducing the proportion of current flowing through the diode) until it reaches the value of the current in the inductor.At this point, the diode no longer conducts current and spontaneously blocks. The voltage across the transistor then decreases to a low value (voltage drop in the component's conducting state), marking the end of the switching. This switching process is the source of instantaneous power losses, resulting in energy lost during this turn-on, commonly referred to as Eon. - Blocking: also called transistor turn-off, this involves switching a transistor from the conducting (on) state to the blocked (off) state. When current is initially flowing through the transistor, the voltage across its terminals is initially low, and the diode in the switching cell carries the entire voltage of the capacitor without conducting any current. When the transistor blocks (again, via its gate voltage), the voltage across its terminals begins to increase (reducing the voltage across the diode accordingly) until it reaches the voltage across the capacitor.At this instant, the voltage across the diode drops to zero and changes polarity until it reaches its threshold voltage, spontaneously turning the diode forward. The current in the transistor then decreases to a negligible value, marking the end of the switching. This process is also the source of instantaneous power losses, leading to energy lost during this turn-off, commonly called Eoff. For the same switched current, the losses E. on The conduction exponents are generally much higher than the blocking exponents. offHowever, thanks to the "full-wave" operation of the matrix converter on the RF side, the current changes sign and exhibits positive and negative alternations with each switching cycle. This characteristic can be exploited to avoid turn-on switching, and thus only incur Eoff losses during switching. In this case, each blocking of a transistor (let's call it the first transistor) is followed (after a short dead time) by the turn-on command of the complementary transistor (let's call it the second transistor), which is located in parallel with the diode forming a switching cell with the first transistor. According to the blocking mechanism described above, this diode conducted current immediately after the first transistor turned off, so the voltage across it, and therefore across the second transistor, was very low (negligible) when the second transistor turned on.Thus, the switching to the "on" state of the second transistor takes place at zero voltage (zero-voltage switching: ZVS) and escapes the mechanism described above which induced losses E. onThis is referred to as "soft switching," as opposed to "hard switching," which corresponds to the simplified descriptions at the beginning of this subsection. In reality, this involves turning on the second transistor even though it's not (yet) necessary, since current could flow through the parallel diode. However, because this principle is linked to the fact that the current changes sign during the switching period, the second transistor is thus turned "on" in anticipation of the next change of sign in the current. Consequently, the current will no longer be able to flow through the diode but will instead find a path through this second transistor, which is already prepared to carry the current in the opposite direction.Through the alternating positive / negative current, the previously described roles of the first and second transistors are then reversed, so that the next conduction of the first transistor is also a soft switching operation in ZVS (after the second transistor is turned off). The preceding textual description corresponds to classic techniques that do not need to be detailed further here. It can be adapted to a 3×3 matrix converter, for example, by focusing on the switching cells activated according to the instantaneous signs of the switched voltage and current. The important points are: - the consequence: operating in soft switching drastically reduces switching losses, increases efficiency, and allows a higher switching frequency, which is beneficial for the sizing of the passive components (magnetics and capacitors) of the conversion structure.This allows for better energy efficiency and space savings, as these components (especially magnetic ones) are typically the bulkiest. It's worth noting that heat sinks are also bulky systems, and soft switching, by reducing losses, also allows for gains in this area through the reduction of thermal stresses; - Implementation: To ensure smooth switching conditions in ZVS, it is sufficient to adhere to a simple rule regarding the signs of voltage and current changes during switching. This rule is stated below. Rule to be followed for ZVS switching: For the matrix converter under consideration, the quantities to be considered are: - the HF-side potentials of phases A, B, C, or (equivalently) the switched voltages v. {A | B | C}NIf we consider the neutral point (LF side) as the potential reference for expressing these voltages; - the HF currents are defined for the sign convention as "outgoing" from the converter on phases A, B, C. Therefore, this is i{A|B|C}. The "on" or "off" state changes of the converter switches lead to potential variations on the phases on the HF side, so that the voltages v{A|B|C}N evolve in steps with steep transitions in the positive (voltage rise) or negative (voltage fall) direction at the time of switching. Knowing the direction of voltage change, the type of switching involved (on- or off-) can be determined according to Table 1. [Table 1] voltage rise kN decrease in v kN ik > 0 conduction blocking ik < 0On-delivery blocking. Therefore, the elimination of on-delivery switching, and thus the implementation of smooth switching in ZVS, can be achieved by respecting the following rule for each phase k ∈ {A,B,C}: - if the current i k is positive (outgoing), the phase potential k (or the voltage v kN ) must decrease during switching – if the current ik is negative (incoming), the potential of phase k (or the voltage vkN) must rise during switching. Figure 8a shows the voltages and currents on the HF side of the converter, with a time-domain enlargement in Figure 8b. Since the three phases exhibit similar behavior, only phase A is studied here, with curves that are more pronounced than the other phases for v AN and i AThe gray half-planes in the current graph allow us to identify the sign of iA, and to verify that each rise in voltage vAN occurs at a time when the current iA is negative, while each fall in voltage vAN occurs at a time when the current i Ais positive. Thus, all the state changes visible in this figure comply with the rule stated above and involve exclusively turn-off switching, which confirms the application of smooth switching in ZVS in all cases for this example. One objective of the invention is therefore to conform to this mode of operation in all situations, regardless of the position in the network period and regardless of the phase shift between network currents and voltages. Figure 9 reproduces the situation of Figure 8b with a focus on the switching operations that involve a current iA close to the sign change. Indeed, it is important that the sign of the current be precisely controlled at the time of switching, and therefore to prevent its value from being too close to zero at the time of switching.Furthermore, even with the correct sign as described in the previous paragraph, an insufficient current value would lead to slow blocking switching, which might not have time to complete during the dead time. In this case, the second transistor mentioned above would only turn on under reduced voltage, but not truly in ZVS (Zero-Velocity Selective Switching), thus resulting in unexpected Eon losses. Finally, this ZVS turn-on requires that the current has not changed sign during the dead time. If switching occurs just before a current sign change, this imposes a time margin at least equal to the dead time value between the switching instant and the instant of the current sign change. This is the situation encountered in Figure 9, where the low-current switching instants, marked by blue markers on the iA curve, occur just before a sign change.A safety time, denoted δ, is then introduced to ensure that switching occurs under a sufficient current value and with a sufficient time margin. This constraint is commonly encountered in systems operating with soft switching. It is not specific to the invention but must be taken into account. Thus, the value of δ is an adjustable parameter in the proposed control. It can be defined as a time (seconds), or as an angle after normalization by the switching period (2π or 360° corresponding to a period T). swIt is important to note that δ is negative in the example in Figure 9 because the low-current switching occurs just before the sign change of iA. However, other situations are possible: it may be positive (if these switching occurs just after the sign change), or even that during a switching period, one switching occurs just before the sign change, and another just after. This last situation is illustrated in the example in Figure 10, where some low-current switching occurs just before, and others just after the sign change. Thus, δ can be positive or negative, depending on the circumstances. Generally speaking, this parameter is at the designer's discretion and depends in particular on the characteristics of the semiconductor components used: there is no absolute rule for determining its value.In the following examples, an arbitrary value is therefore chosen (between five and ten degrees), identical in absolute value for all low-current switching operations, although this is not strictly necessary. It is important, however, to specify when this value should be positive or negative depending on the time at which the switching occurs relative to the zero crossing of the current. Another aspect of the invention relates to minimizing the RMS value of the HF currents (and therefore their amplitude for sinusoidal currents) in order to reduce power losses, particularly those related to current flow in semiconductor components (primarily conduction losses). However, the reduction in the amplitude of the HF currents is limited by the value of the largest reference value among the LF currents to be generated. { ^ ^ ^ ∨ ^ H ∨I}Indeed, as mentioned previously and shown in Figure 7e, the currents i {R | S | T} are made up of portions of the HF current curves (as well as their opposites and possibly the zero value). Assuming three-phase HF currents ^Y^Z forming a balanced network, six HF current values ​​are available at iA, iB, iC, and their opposites −iA, −iB, −iC. Therefore, the maximum achievable current from portions of the HF current curves is obtained from the maxima at each instant of these currents, tracing a time-domain arc shape (maximum envelope of all HF currents and their opposites) whose average value over a switching period is ^Y^Z × 3 / π. Thus, to construct current references whose largest absolute value is I REFAt a certain instant, it is necessary to have HF currents whose amplitude ^Y^Z is at least equal to ^Y^Z × 3 / π at that instant. At each instant within the period of the LF network, a certain minimum amplitude of the HF currents is therefore necessary. It is also sufficient to construct the set of reference currents ^ { ^ ^ ^ ∨ ^ H ∨I}Since the largest of these currents (in absolute value) can be obtained from this amplitude, and the other two are necessarily smaller and can also be synthesized as will be shown later, it is unnecessary to use higher amplitude HF currents, which would have the major drawback of increasing conduction losses in the semiconductor components. It is therefore desirable to keep the amplitude of the HF currents at the minimum value necessary to synthesize the largest reference current in absolute value. This restriction of the amplitude of the HF currents to the strict minimum is observable in Figure 11, which shows the HF currents i {A | B | C} and their opposites (6 HF currents in total) as well as the three current references ^ { ^ ^ ^ ∨ ^ H ∨I} The enlarged view of the area where ^ ^ ^^^ is the largest The reference shows the construction of the corresponding current iR, from the peaks (maxima) of the six HF currents. The amplitude of the HF currents is modulated to follow the largest reference in absolute value. Note that this reference is sometimes positive, sometimes negative, and corresponds to the reference with the opposite sign to the other two; it is identified by the circled areas in Figure 11. In reality, Figure 11 is obtained without the time offset δ ensuring the safety margin for ZVS switching. By introducing this offset, Figure 12 is obtained. The circled areas show slight differences, including in the part (^ ^ ^^^ maximum) a pace of i R featuring more pronounced peaks towards the bottom (one can because the change in curve segment no longer occurs at the exact moment of the intersections as in Figure 11. This results in an average value ^ ^ ^ ^Tsw is lower for the same amplitude of the HF currents; in other words, the amplitude of these HF currents must, in practice, be slightly higher than in the ideal case to allow for control of the ZVS switching. This observation does not change the general principle, which preferentially seeks to minimize the HF currents circulating in the inductive circuit, and therefore to adapt their amplitude according to the largest LF current reference in absolute value. It is simply concluded here that this amplitude is related to the parameter δ. In the following, it is assumed that the HF currents have, for a fixed value of δ, the minimum amplitude required to synthesize the largest LF reference current. Figure 13a reproduces the representation of matrix converter 1 used in Figure 5, and identifies three "arms" associated with phases A, B, and C on the HF side, each containing three equivalent power switches.The relevance of these groupings stems from the nature of the sources: - on the RF side, the inductive circuit constitutes the current source of the converter, which must not be open-circuited. Therefore, for a given phase A, B, or C, at least one switch on the corresponding arm must be conducting (on); - on the AF side, the filter capacitors constitute the voltage source of the converter, which must not be short-circuited between phases. Therefore, for a given arm A, B, or C, it is not permissible to have more than one switch conducting (on) (if two are "on," a short circuit would occur between the two corresponding phases R, S, or T). It follows that for each arm A, B, or C, one and only one switch on the arm must be "on" at any given time (the other two necessarily being "off"). Each arm thus connects the phase A, B, or C associated with exactly one phase R, S, or T.Defining the state of the arm therefore amounts to identifying which of these phases it is connected to. Consequently, the state of the complete converter is defined by the states of each of its three arms and can thus be written using the notation: <state arm A> <state arm B> <state arm C>. For example, the notation “RST” means that phase A is connected to R, phase B to S, and phase C to T. Figure 13b gives some examples of the states of the complete converter and their effect on the currents obtained on the low-frequency side. The representation used for the matrix converter is further simplified, showing only the actual connections made by the power switches in the “on” state, using square markers at the intersections between phases A, B, C on the one hand, and R, S, T on the other. Thus, the four example configurations presented are as follows: State “RRR”: the switches in the conducting state connect each of the phases A, B, C on the HF side to the same phase R on the LF side.In this case, phases S and T are not connected, and the respective currents i. S and i T are naturally zero. Consequently, the current i R is also zero, due to the zero sum of the currents on the phases on both the LF and HF sides. "RTS" state: in this state, each phase on the HF side is connected to a different phase on the LF side: A with R, B with T, and C with S. This results in a direct injection of the HF currents redistributed across phases R, S, and T with i R = i A , i S = i C and i T = i B . "RSS" state: in this case, a BF(T) phase is not connected, implying i T = 0. Phase R is connected only to phase A, leading to iR = iA. Phase S is then connected simultaneously to B and C, and thus sees the sum of their respective currents. By equation (5) below, this also corresponds to the opposite of the current in phase A, leading to i S= −i A (which also verifies that the sum of the currents i {R | S | T} is zero). "TST" state: this case is similar to the previous one, with R not connected, S connected to B, and T connected simultaneously to A and C, leading to iR = 0, iS = iB, and iT = −iB. Note regarding the sum of the currents: the system shown in Figure 5 does not include a fourth conductor in the converter's operation. Therefore, there is no return path for any current component flowing in the same direction on all three phases. Consequently, the sum of the three currents is zero on both sides of the converter: [Math 5] iR + iS + iT = 0 i A + i B + i C = 0 It follows from the above that each current on the BF side i {R | S | T} is worth at any given moment either one of the currents i {A | B | C}, either their opposite, or zero (therefore 7 possible values). This result was mentioned previously and is justified here. The assignment of one of the seven possible current values ​​to iR, iS, and iT thus depends on the state of the complete converter, which has 3 arms (A, B, C) each of which can take 3 states (R, S, or T). The total number of state combinations for the three arms is then 3 3 This leads to 27 possible states for the matrix converter. These states are listed in Tables 2 to 4 below, along with their impact on the currents i {R | S | T} injected on the BF side. [Table 2] It is possible to order the voltages v {R | S | T}Nbased on a sorting by voltage value at each instant, and assigning a specific name to each. Thus, we will use the following notations: M (uppercase): for “MAX”. This name will refer to the phase among R, S, or T, which has the greatest electrical potential (in other words, the maximum voltage vkN). m (lowercase): for “MIN”. This name will refer to the phase among R, S, or T, which has the smallest electrical potential (in other words, the voltage v kN minimum). i (lowercase): for “int”. This designation will refer to the remaining phase among R, S, or T, whose electrical potential is therefore between the two preceding ones (in other words, corresponding to the voltage v kN (intermediate). Consequently, the currents i{R|S|T} can be renamed according to the previous notations, so that: - iM denotes the current (among iR, iS, iT) flowing in the phase of highest potential (M) - i m designates the current (among i R , i S, i T circulating in the phase of smallest potential (m) - i i designates the current (among i R , i S , i Tcirculating in the intermediate potential phase (i) A visual representation is provided in Figure 14, which shows a "voltage sorting" block that can be conceived as a selector reordering the R, S, and T phases from highest to lowest potential. Thus, the converter states and the currents injected into the phases on the LF side can be expressed using the notation "M,i,m" rather than "R,S,T," which will subsequently allow for a generalized description of the control method that naturally adapts to all LF potential sequencing configurations. Some examples are given below: "MMM" state: the HF side phases A, B, and C are all connected to the one among R, S, and T with the highest potential. The injected currents on the LF side are all zero. "mMi" state: phase A is connected to the one among R, S, and T with the lowest potential; phase B to the one with the highest potential; and phase C to the one with the intermediate potential.The current, among i{R|S|T}, flowing in the phase of greatest potential (and therefore renamed iM) is iB; that in the phase of least potential (im) is iA, and that in the phase of intermediate potential (i. i ) is equal to i C State "imm": phase A is connected to the phase among R, S, T that has the intermediate potential; phases B and C are both connected to the phase with the lowest potential. The current, among i{R|S|T}, flowing in the phase with the highest potential (therefore denoted iM) is zero because this phase is not connected; the current in the phase with the intermediate potential (i i ) is equal to i A , and the one in the minimum potential phase (i m ) is therefore equal to −i A Consequently, the 27 possible configurations, according to the notation of type “M,i,m”, are listed in Tables 5 to 7 with their impact on the currents thus renamed iM, ii, and im. [Table 5] Current arm A B C iM i i im M M M 0 0 0 M M i −iC iC 0 M M m −iC 0 iC M i M −iB iB 0 M i i iA −iA 0 M i m iA iB iC M m M −iB 0 i B M m i iA iC iB M m m iA 0 −iA [Table 6] bras courant A B C iM i i i m i M M −iA iA 0 i M i iB −iB 0 i M m iB iA iC i i M iC −iC 0 i i i 0 0 0 i i m 0 −iC iC i m M iC iA iB i m i 0 −iB iB i m m 0 iA −iA [Table 7] bras courant A B C iM i i i m m M M −iA 0 i A m M i iB iC iA m M m iB 0 −iB m i M iC iB iA m i i 0 −iA iA m i m 0 iB −iB m m M iC 0 −iC m m i 0 iC −iCFigures 15 to 17 show an example of successive converter states in only a portion of the low-frequency period (T0), exhibiting approximately ten high-frequency periods (Tsw). Note: it should be noted, however, that the switching frequency f sw is chosen to be very low compared to the BF frequency at f0, to facilitate the visualization of electrical quantities and the understanding of the explanations. In a real system, the switching frequency could be on the order of 100 times that used in these examples, which would lead to a correspondingly increased number of switching cycles and states (and therefore also to illegible figures). Figure 15 and the upper graph of Figure 16 show the voltages v {R | S | T}N evolving slowly, as well as the tensions v {A | B | C}N which exhibit repeated cycles at the switching frequency. It is observed that at any instant, each voltage v{A | B | C}N is equal to one of the voltages v {R | S | T}N , through the switching action of the converter which always connects a phase A, B, C on the HF side to one of the phases R, S, T on the LF side. The lower graph of Figure 16 and Figure 17 represent the six HF currents (i {A | B | C} their opposites), the three BF current references ^ { ^ ^ ^ ∨ ^ H ∨I} with different line styles (as in figure 12), and the three currents i {R | S | T}associated this time with a gray fill starting from zero to clearly identify the different curves. In the intermediate area of ​​Figure 16, the instantaneous states of the complete converter (i.e., the three arms, labeled here from top to bottom for space reasons) are indicated according to the two formats described previously: in the form “R, S, T” and in the form “M, i, m”. As a reminder, the method of the invention aims to: - systematically define the states to be applied successively to construct the reference LF currents as specified above, regardless of the values ​​of these references and, a fortiori, the phase shift φ between the voltages v{R|S|T}N and the currents ^ { ^ ^ ^ ∨ ^ H ∨I}at low frequencies, which guarantees the ability to consume or supply both active and reactive power; - to ensure smooth switching in ZVS for all conduction events, as detailed above, which allows for high efficiency and a compact converter due to reduced losses and the size of passive components; - to avoid the use of unnecessarily large HF currents, as mentioned earlier, again with the aim of limiting losses and enabling high efficiency and compactness. The operation of the proposed control system meeting these requirements is shown later, focusing on a single HF period (i.e., the switching period Tsw). The switching period (Tsw) is the most important time unit for studying the converter control.Indeed, it is the site of a complete revolution cycle of the converter's states, which is then repeated with minor changes from one period to the next to account for variations in the audio frequency (AF) references, given that these are slow compared to the switching period. In this regard, it is worth noting that the actual switching frequency of the device is typically much higher than what is shown in the figures, so the AF references do not have time to change significantly during a single switching period. Note: in fact, it is common in power electronic converters for the references (or modulating references in pulse-width modulation carrier control methods) to be fixed during one or more switching periods. That is to say, their value is sampled at the beginning of a period and is only updated at the beginning of another period.On the one hand, this process generally has little impact on control performance since the variation from one period to the next is small. This is particularly true in the structure studied here, as soft switching allows for a high switching frequency. On the other hand, it is often a necessity due to the measurement acquisition times and the computation time required in the digital systems that execute the control algorithms (microcontroller, DSP, etc.) before the next reference value to be applied can be determined. Furthermore, it is sometimes desirable to complete a period that has already begun before updating the references, to avoid erratic switching during reference changes mid-period, particularly in carrier modulations (or sometimes updates are permitted at very specific points within the period for the same reason).This is therefore a common practice, but one that can often be neglected in converter operation simulations due to its minimal functional impact and the resulting discretized curves, which do not facilitate the reading and understanding of the results. Thus, in this description, the results presented come from simulations that do not require such discretization of the references, while recognizing that a real-world implementation would certainly make use of it. In any case, it should be noted for the remainder of this discussion that the references change little, if at all, within a switching period, and that it is therefore possible to consider them constant on this timescale. In the left part of Figure 16, a series of states is shaded. The corresponding duration is precisely one switching period, and an enlarged view of this single period is presented in Figures 18 to 20. A slow variation of the references ^. { ^ ^^ ∨ ^ H ∨I}This can still be observed in the figure, due to the low switching frequency, as mentioned previously (fsw = 2.5 kHz for f0 = 50 Hz in this example). Visualizing the same time interval with a switching frequency four times higher (10 kHz) in Figures 21 to 23 reveals a reduction in the switching period (still shaded in gray), and naturally, a smaller change in the reference values ​​during this shorter period. This configuration will be used subsequently, bearing in mind that the actual switching frequency can reach several hundred kilohertz, leading to near-constant reference values ​​during the switching period, even without sampling.Thus, figures 24 to 26 present the succession of states in a switching period, annotated with markers indicating the width of the switching period and the zero-crossing times of the HF currents (vertical lines and black marks) which delimit six intervals within a switching period, named I1 to I6 in figure 26. In this example, the largest reference in absolute value is ^. ^ I ^^ , positive while the other two are negative. Thus, the iT curve has a pattern repeated six times during the period, consisting of the maxima of all the HF currents (including their opposites), within the notches at the boundaries of the intervals related to the safety margin δ already mentioned previously. For the other two references, ^ ^ ^^^ is slightly negative, so that i R is simply made up of three small negative curves of HF currents close to zero. As for ^ H^^^ , it is more negative and i Sis consequently composed of portions of curves with larger negative values. It is important to note that the state changes associated with each curve "jump" on the currents are also linked to variations in the voltages v{A|B|C}, and that each of these voltages successively takes, within the switching period, each of the three values ​​of the voltages v{R|S|T}. Thus, the converter arms all switch three times in the period, leading to a total of 9 switching operations, and therefore 9 distinct states that the complete converter must assume during a switching period. The 9 states of the converter are shown in Figure 25, and begin the switching period identified in gray with the state "TST", meaning that arms A and C are both connected to phase T, while B is connected to phase S. Observation of the voltage curves trivially confirms this, since v AN and v CNare both equal to v TN at that moment, while v BN is then superimposed on v SNThe other 8 states are verified in the same way. In the “M,i,m” type notation, the voltages must first be ordered, and it appears during this switching period that the phase with the highest potential (denoted “M”) is phase T, the phase with the intermediate potential (“i”) is R, and the phase with the lowest potential (“m”) is S. Consequently, the “TST” state is also expressed as “MmM” in this notation, which corresponds to the indication given in Figures 24 to 26. Again, the other 8 states follow the same analysis. The sequence of states obtained in this example is then: MmM; Mmm; Mim; MMm; mMm; mMi; mMM; mmM; imM. It should be noted, however, that this sequence is cyclic (after the “imM” state comes the “Mmm” state, and so on), and that the “start” considered here is arbitrary. The choice made (but not mandatory) in this description is to count the start of the period from the zero crossing of the current i Ain the upward direction: we can verify in figures 24 to 26 that the period T swThe identified current corresponds precisely to a complete revolution (positive then negative alternation) of this current. Thus, the interval I1 begins when iA becomes positive. Furthermore, we observe that certain states apply throughout the entire interval separating two zero crossings of the HF currents (between the vertical separators), up to a time margin δ which can increase or decrease this interval (examples will be given later) or simply shift it, as in this example. Here, these are the states “MmM” (in interval I1), “MMm” (in I3), and “mMM” (in I4). Conversely, other intervals (again up to δ) share two states, such as “Mmm” and “Mim” (in interval I2), or “mMm” with “mMi” (in I4), and finally “mmM” with “imM” (in I6).By denoting “‖” the separation linked to the zero crossing of the current (neglecting the impact of δ for the moment), and the transition separating the two states that coexist within the same interval, the previous sequence can be rewritten more completely: [Table 8] Interval I1 I2 I3 I4 I5 I6 ^ ^ ^ ^ ^ ^ State MmM ‖ Mmm ^ Mim ‖ MMm ‖ mMm ^ mMi ‖ mMM ‖ mMM ^ imM ‖ ↺Where the final symbol↺ refers to the cyclic nature of the sequence, which therefore restarts at the first element (here “MmM”) and so on. It is important to note that this new representation is not limited to enumerating a sequence of states: it also indicates how these states are arranged within a switching period divided into intervals defined by the zero crossings of the currents.Therefore, the following terminology will be used hereafter: - the sequence of states is simply the sequence of 9 states applied successively, without any indication of grouping within intervals or safety margin; - for a given sequence, the arrangement of states is the additional information appearing in the representation introduced above, indicating how the states are grouped, or not, within the different intervals, as well as how the transition from one interval to another occurs with respect to the safety margin δ, as developed below. Figures 24 to 26 show, on the voltage graph, the directions of variation with arrows, and on the current graph, the current value when it is close to zero with a square marking.We can thus verify that all voltage drops occur under a positive current and all voltage increases under a negative current, which respects the rule stated earlier and ensures that each of the nine switching operations satisfies the switching constraint in ZVS. To guarantee this operation, a time margin δ was applied, as mentioned previously, to prevent switching at current values ​​too close to zero. This value is shown at the bottom of Figure 26 and is negative for all zero crossings in this example.However, as already mentioned, this will not always be the case, so it is important to clarify how it is applied during transitions between states arranged in this way: - its (absolute) value is a parameter decided by the designer and can range from 0 to 30 degrees (one-twelfth of the switching period) - its sign depends on the sequence of states that will be applied and must be specified during low-current transitions. For example, in Figures 24 to 26, this concerns the transition from the state “MmM” to “Mmm”, as well as from “Mim” to “MMm”, from “MMm” to “mMm”, from “mMi” to “mMm”, from “mMM” to “mmM”, and from “imM” to “MmM” (which corresponds to returning to the beginning of the cycle).To specify the location of application and the sign of δ, the arrangement of states can then be rewritten again, according to a suitable definitive notation: - the symbol 〉 denotes a transition between two intervals (therefore near the change of sign of an HF current) involving the application of a margin with δ > 0 - the symbol 〈 denotes a transition between two intervals (therefore near the change of sign of an HF current) involving the application of a margin with δ < 0 - the symbol ^ denotes (as before) a transition occurring within the same interval (therefore under a higher switched current) and therefore not concerned by the application of a safety margin. Thus, the final notation adopted to describe the sequence of states and their arrangement in the example of figures 24 to 26 is as follows: [Table 9] Interval I1 I2 I3 I4 I5 I6^ ^ ^ ^ ^ ^ State MmM ^ MiM 〈 Mim 〈 MMm ^ MMi 〈 mMi 〈 mMM ^ iMM 〈 imM 〈 ↺ At voltages v. {R | S | T}Nand BF current references ^ { ^ ^ ^ ∨ ^ H ∨I} Given the given conditions, the sequence of states to be applied to achieve the objectives of the invention is always defined and unique. Indeed, starting from the configuration shown in Figures 24 to 26 as an example, the largest current reference in absolute value is ^ ^ I ^^ , and its value is positive. The current i T is therefore constructed from the maxima of all HF currents (with the notches related to the safety margin δ). Consequently: - at the beginning of the switching period, the largest HF current is −i B It also turns out that phase T is the phase of greatest electrical potential during this period (vTN is the highest voltage), which is therefore designated “MAX” (notation “M”). The current iM thus corresponds to i T which has been said to be worth −i Bat the beginning of the period. Table 3 then informs us about the possible states that lead to i M = −i B : there are only two, which are “MiM” and “MmM”; - we also know ^ ^ ^^^ is slightly negative, leading to an iR curve that is often zero. Thus, the current either zero, or equal to a negative current close to zero, which would correspond at this point to the curves of −i A or −i C However, these last two cases are not possible because, due to the zero sum of the currents (equation (5)) and i T Since the current is already known at −iB, the third current should be −iC or −iA, respectively: the values ​​of the currents i{R|S|T} would then be a permutation of the currents −iA, −iB, −iC, but such a situation is not possible according to Tables 2 and 3. Therefore, iR is necessarily zero in the interval I1; - as a consequence of the above, the last current i Smust be equal to the opposite of i T in order to maintain the zero sum of the currents. We observe that iS is equal to iB at the beginning of the period in Figure 17, knowing that phase S is that of minimum potential in this period (v SN (is the smallest voltage). The current i S can therefore be named i mand is then equal to iB. According to Table 3, only four states satisfy this constraint: “MmM”, “Mmi”, “imM”, and “imi”. Thus, the “MmM” state is the only one that simultaneously satisfies the requirements stated above, and Figures 24 to 26 show that it is indeed the first state in the sequence in this example. A little later in the switching period, we consider the interval I2 between the zero crossings of currents iB and iC: the current iR (which remained zero during the interval I1) must take the value of one or the other of these two currents near their zero crossing. In the case where it immediately takes the value of i C , it can be shown that the resulting state would be “Mmi” (with i T = i M = i A and i S = i m = i B The current i RBeing slightly negative, it would then return to zero by applying the “Mmm” state (with iT = iM = iA and this time iS = im = −iA). Consequently, arm C would transition from state “i” to state “m”, reflecting a potential drop (from the intermediate to the minimum), while its current in this region is negative, which violates the rule stated above regarding smooth switching conditions. Therefore, the current i RA slightly negative value can only be obtained by taking the value of iB when it approaches zero (at the end of interval I2), and it must have remained zero beforehand. Combined with the fact that iT takes the value of iA in this region, this necessarily leads to the states “Mmm” and then “Mim,” which complete the sequence of states in this interval. By following this reasoning to its conclusion, it can be shown that the sequence of states presented in Figures 24 to 26 is the only one capable of fulfilling the objectives of the invention, for this given situation of voltage values ​​v {R | S | T}N and reference currents ^ { ^ ^ ^ ∨ ^ H ∨I}When the voltage scheduling changes (a little further into the low-frequency period), as well as the current reference scheduling (also affected if the phase shift value changes), the sequence or arrangement of states to be applied also changes. The very purpose of the invention is then to systematically determine this sequence and its arrangement in order to control the matrix converter with the technical characteristics described above, with a view to high energy efficiency and compactness, and with an arbitrary power factor on the network. Knowing the voltage values ​​at each instant is essential. {R | S | T}N allows their ordering and the identification of quantities according to the notation “M, i, m” which allows the currents to be renamed ^ ^ ∨ ^ in ^ ^ ^^^ , ^ ^ ^^^ and ^ ^ ^^^The sequence and arrangement of states to be applied during the course then of the value and in particular the ordering of these currents. Starting from the situation shown in Figures 24 to 26, for small variations in the current references, the sequence and arrangement of states remains valid, the adjustment to the references being possible, assuming δ is constant, by acting on the separation instants between the two states coexisting within the intervals I2, I4, and I6. Preferably, the distribution of states on either side of this separation is the same for all three intervals, as this creates a tripling effect of the apparent frequency (on iR and iS here) compared to the switching frequency fsw (which facilitates the work of the LC filter, allowing its components to be sized minimally). Therefore: - moving the boundary to the right reduces the (negative) area of ​​the peaks drawn towards the low by the current iR (to the benefit of that of iS, also negative), which is suitable for the case where ^ ^ ^^^ approaches zero. Regarding the interval I2, for example, this increases the duration of the "Mmm" state and reduces that of "Mim". The zero crossing of ^ ^ ^^^ corresponds to the disappearance of the “Mim” state, and a new sequence of states is ^ ^ ^^^ becomes positive. - Conversely, moving the boundary to the left increases the (negative) area covered by i R (duration of “Mim” in the interval I2), at the expense of that of i S (shortening of “Mmm”), which corresponds to a reference ^ ^ ^^^ more negative (while ^ H ^^^ approaches zero). However, a limit when the state “Mim” occupies the entire interval I2 and the state “Mmm” disappears. Figures 27 to 29 show this situation with a reference ^ ^^^^ more negative than in Figures 24 to 26. Now, the interval I2 (not uses “Mim” in its entirety (except for δ), while I1 now shares two states: “MmM” (which was already present in Figures 24 to 26) and the new state “MiM”. This behavior is reflected similarly in the other intervals I3 to I6. Thus, the value and ordering of the reference currents lead to different sequences or arrangements of states. For example, the situation in Figures 27 to 29 corresponds to the following arrangement (it can be verified that the δs are also always negative, justifying the separator “〈” between the intervals): It is therefore necessary to establish the conditions on the currents ^ ^ ^^^ , ^ ^ ^^^ , ^ ^ ^^^ allowing the correct sequence of states and its to be defined systematically We are referring here to the reference currents ^ { ^ ^ ^ ∨^ H ∨I} renamed in the form ^ ^ ^^^ , ^ ^ ^^^ , ^ ^ ^^^ Following the sorting of the voltages, these three currents, having a zero sum, form variables linearly linked by equation (5) and consist of only two independent quantities (two currents automatically defining the third). The three currents can then be represented in a two-dimensional space. Figure 30 shows the classic representation, where the axes iM, ii, and im are rotated 120° relative to each other, with the zero value at the center of the figure. The perpendiculars of the axes passing through the center are drawn as dashed lines: they delimit the half-planes in which a current is positive or negative. For example, i M is positive at every point in the plane located to the right of the vertical dotted line identified by the notation “i M= 0”, and ii is negative at every point below and to the right of the dotted line “ii = 0”. This figure can be considered as a complex plane in which the real axis is horizontal and the imaginary axis is vertical. Each triplet of values ​​i M , i i , i m can then be associated with a vector ^^^^^^^^^^^⃗ such as: [Math 6] 2 ^^ ^ Where the three , , of ^^^^^^^^^^^⃗ on the respective axes iM, of ^^^^^^^^^^^^⃗, that is, the angle it forms with the horizontal axis. Depending on the value of β, the vector ^^^^^^^^^^^^⃗ is located in one of the twelve angular sectors identified in Roman numerals from I to XII in Figure 30. Each of these sectors corresponds to a precise ordering of the reference currents, easily verifiable by projecting ^^^^^^^^^^^⃗ onto the axes. For example, for the vector ^^^^^^^^^^^⃗ shown in Figure 30, the largest current in absolute value is ^ ^ ^^^ , which is positive, while ^ ^ ^^^ is slightly negative and ^ ^^^ dav ^ negative angle. Possible configurations with the associated angular sector are listed in Table 10. [Table 10] Sector Current Scheduling I ^^^^ > 0 > ^^^^ ^^^ ^ ^ > ^^ II ^^^^ ^^^ ^^ > ^^ > 0 > ^ ^^ ^ III ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^IV ^^^^ ^^^ ^^^^ > 0 > ^^ > ^^V ^^^^ > 0 > ^^^^ ^^^ ^ ^ > ^^ VI ^^^^^ > ^^^^ ^^^^ > 0 > ^^VII ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^VIII ^^^^ > ^^^ ^^^^ 0 > ^^ > ^^IX ^^^^ > 0 > ^^^^ ^^^ ^ ^ > ^^ X ^^^^ ^^^ ^^^^ > ^^ > 0 > ^^XI ^^^^ > ^^^^ ^^^^ ^ > 0 > ^^XII ^^^^ ^^^ ^^^^ > 0 > ^^ > ^^It is useful to note that all sectors are likely to be reached by the vector ^^^^^^^^^^^⃗, depending on the value of the phase shift φ between reference currents and network voltages. To this end, Figure 31 shows several trajectories followed by the tip of the vector ^^^^^^^^^^^⃗ (the set of locations traversed during a period T0), for three different phase shift values. The "jumps" observed in the trajectories correspond to voltage crossings v {R | S | T}Nwhich induce a change in the voltage ordering and therefore a reassignment of the current designations in the notation “M, i, m”. We observe that in the general case (arbitrary phase shift), the vector ^^^^^^^^^^^⃗ is likely to enter any sector of Figure 30. It is therefore important to determine the sequence and arrangement of suitable states in each of them. In the example of Figures 24 to 26, it has been established that the currents i M , i i , i m were respectively iT, iR and iS, with iR weakly negative, leading to the ordering ^ ^ ^^^ > 0 > ^^^^ ^ > ^^^^ ^ which corresponds to the position of ^^^^^^^^^^^⃗ in sector I in figure 30. Based on this example: - if ^ ^ ^^^ = ^ ^ ^^^If iR were to evolve to become positive (as long as the voltage ordering remains the same), this would result in an increase in angle β and a transition of ^^^^^^^^^^^⃗ into sector II, which would require a new sequence of states as previously mentioned; - otherwise, a more negative iR would decrease β, bringing ^^^^^^^^^^^^⃗ closer to the iM axis. The vector ^^^^^^^^^^^^⃗ would initially remain in sector I, but the sequence of states could not remain the same. Indeed, this corresponds to the phenomenon mentioned previously regarding the transition to the sequence in Figures 27 to 29, which nevertheless follows the same ordering (indicated in the legend of these figures) but with a different proportion between the values ​​of ^ ^ ^^^ and ^ H ^^^, which cannot be obtained with the sequence in Figures 24 to 26. Therefore, sector I must be further subdivided in Figure 30 to reveal the two possible sequences depending on the proximity of ^^^^^^^^^^^⃗ to the dotted boundary at ii = 0; - by continuing the analysis for values ​​of ^ ^ ^^^ even more negative while ^ H ^^^As it approaches zero, a crossover between these values ​​occurs, so that ^^^^^^^^^^^⃗ passes below the iM axis in sector XII of Figure 30. It is natural to think that this change of sector again requires a different sequence of states. However, Figure 33 shows an example of this situation with the same sequence and arrangement of states as in Figure 28. This peculiarity is easily explained by the fact that as ^^^^^^^^⃗ passes ^^^ ^^^^^^ across the iM axis, therefore at β = 0, the two currents ^^ and ^^ (here iR and iS respectively) are equal, which amounts to equating the areas under the curves of these two currents in Figures 27 to 29 and those of 32 to 34, and thus placing the separation in midpoint of the interval. Consequently, crossing axis i M between sectors I and XII occurs naturally without altering the states or arrangement of the sequence; - however, continuing further towards ^ ^^^^ more strongly negative and ^ H ^^^As it approaches zero, a limitation similar to that mentioned above for sector I will appear when the states “MmM”, “MMm” and “mMM” have disappeared from their respective intervals I1, I3 and I5. A new sequence of states will then be necessary, still within sector XII, when ^^^^^^^^^^^⃗ approaches the dotted boundary at im = 0. Figure 35 complements the complex plane of Figure 30. Each sector (from I to XII) is subdivided into two (delimiters in purple dashed lines), and names “A1” to “A18” are associated with zones separated by the different delimiters appearing in the figure.The previous analyses are found in the same way: - the vector ^^^^^^^^^^^⃗ in Figure 35 still corresponds to the situation in Figures 24 to 26, and is located in the area labeled “A2”, which will identify the state arrangement to be applied there; - for an angle β that becomes smaller but still in sector I, ^^^^^^^^^^^⃗ would enter the area labeled “A1”, which characterizes the state arrangement applied in Figures 27 to 29 and those from 32 to 34. We observe that A1 straddles sectors I and XII, in accordance with the previous observations which showed that the arrangement to be applied remained the same when ^^^^^^^^^^^⃗ is close to the iM axis, whether it is above or below; - if β were to decrease even further, ^^^^^^^^^^^⃗ would cross a new boundary, leading to the application of a new arrangement named A18 even though the sector is still the XII.Subdividing the 12 angular sectors into two visually results in 24 subsectors. However, the characteristic shown above regarding crossing iM without changing the arrangement reduces the number of arrangements required. This characteristic is actually found on each of the three i axes. M , i i and i m, including by crossing their negative part, and therefore concerns a total of 6 crossings. Consequently, only the 18 distinct state arrangements of Figure 35 remain. The corresponding state sequences and arrangements are listed in the following arrangement table: This table makes it possible to identify, in all situations, the sequence of states to be applied, the arrangement of these states in the intervals, and the direction in which the safety margin δ guaranteeing the conditions for smooth switching must be applied. Indeed, on this last point: - for six of the arrangements (A1 to A5, and A18), δ is negative for all interval change transitions (symbol between intervals in the table). This was the The configuration observed in Figures 24 to 26, 27 to 29, and 32 to 34 (obtained respectively with arrangements A2 and A1); - for six other arrangements (A6 to A8, and A15 to A17), the safety margin can take different signs within the same switching period: some transitions involve δ < 0 (symbol “〈” in the table) and for others δ > 0 (symbol “〉”). As an illustration, Figures 36 to 38 (obtained within the trajectory of Figure 31b for φ = 70°) show an example corresponding to arrangement A17 where the switching time shifts relative to the zero crossing of the currents are indeed positive and then negative alternately (according to the table).It can easily be verified that this safety feature effectively guarantees a minimum current with a sign adapted to the ZVS switching for each voltage transition; - for the six other arrangements (A9 to A14), the safety margin is always positive (symbol in the table). An example is given in Figures 39 to 41 (obtained in Figure 31c for φ = −135°), corresponding to arrangement A10. Here again, the relevance of the sign of δ is verified by compliance with the objectives of smooth switching. As a note regarding the table of arrangements and the distinction in terminology between sequence of states and arrangement of these states, it can be observed that some arrangements in this table implement the same sequence of states. Indeed, the sequence of states applied by the last two arrangements A17 and A18 is identical: only the arrangement of these states within the intervals is modified.The same applies to arrangements A5 and A6 (except for the “first” state, but remember that the sequence is cyclic and therefore doesn't really have a beginning or an end), as well as A8 and A9, and finally A14 and A15. There are therefore only 14 distinct state sequences applied cyclically in each switching period. These sequences are labeled S1 to S14 in the following Table 11, which also specifies the corresponding sequence (the beginning being arbitrary) and the associated arrangements.[Table 11] Arrangements Sequence Corresponding successively applied states S1 MmM MiM Mim MMm MMi mMi mMM iMM imM A1 S2 MmM Mmm Mim MMm mMm mMi mMM mmM imM A2 S3 MmM Mmi Mmm MMm iMm mMm mMM miM mmM A3 S4 Mmi Mmm imm iMm mMm mim miM mmM mmi A4 S5 imi imm iMm iim mim miM mii mmi Mmi A5; A6 S6 imi iMi iMm iim iiM miM mii Mii Mmi A7 S7 iMi iMm iMM iiM miM MiM Mii Mmi MMi A8 ; A9 S8 iMm iMM mMM miM MiM MmM Mmi MMi MMm A10 S9 iMm mMm mMM miM mmM MmM Mmi Mmm MMm A11 S10 mMm mMi mMM mmM imM MmM Mmm Mim MMm A12 S11 mim mMm mMi mmi mmM imM imm Mmm Mim A13 S12 mim mii mMi mmi imi imM imm iim Mim A14 ; A15 S13 Mim Mii mii mMi iMi imi imM iiM iim A16 S14 MiM Mim Mii MMi mMi iMi iMM imM iiM A17 ; A18 This peculiarity whereby two arrangements can implement an identical sequence is explained by the way in which the zero-crossing of ^ is carried out. ^ ^^^ or of ^ ^ ^^^ For example, in figures 36 to 38, the current ^ H^^^ is close to zero and corresponds to ^ ^ ^^^ As this reference approaches zero, the “Mim” state (considering only the interval I1, but I3 and I5 are similar) becomes increasingly shorter. But even when the reference is zero, this state has not disappeared due to the safety margin which continues to apply it for a short period of time within the interval I2 (in fact, at ^ H ^^^ = 0, there also remains a part of “Mim” in the interval I1 which compensates very well small negative portion of the curve in I2). When the reference becomes negative, it is not necessary to resort to a new state, but simply to evolve the boundaries in another way. Thus, Figures 42 to 44 show how ^ H ^^^is made negative while maintaining the “Mim” state, but which now extends within the interval I2 rather than I1. We can observe that the succession of states is indeed the same as in Figures 36 to 38, but with a different arrangement within the intervals. Finally, one last remark must be made here: the states described in this description are expressed according to the notation “<state arm A> <state arm B> <state arm C>” and the development has been presented under the assumption of corresponding HF currents forming a three-phase system in “direct cyclic order”, that is to say that they are out of phase with each other in the order: iA, then iB, then iC, and so on (this can be observed in the succession of passages through their maximum of these three currents over time, or even their crossing of zero in a defined direction, for example ascending).However, it is quite possible to work in "reverse cyclic" order, i.e. iA, then iC, then iB (then i. A and so on). This effectively amounts to swapping two phases on the HF side, and therefore the names of the arm states are reversed (for example, “Mmi” must become “Mim” if phases B and C are swapped). To avoid complications in the description, it is certainly beneficial to stipulate from the outset that the three phases A, B, C are named in that order according to the cyclic order of the currents, so that i A , i B and i C always form a three-phase system in direct cyclic order (the naming convention always allows for this). We denote: - A, B, C the phases on the HF side such that the respective currents i A , i B , i Ccirculating on these phases, and counted as positive upon exiting the converter, form a three-phase system in direct cyclic order (without loss of generality, this is simply a naming convention); - ^ ^ ^^^ , ^ H ^^^ , ^ ^ I ^^ , the reference currents to be injected on the LF side (to satisfy, for example, active and reactive power on the network), counted as positive upon entering the converter; - ^ ^ ^^^ , ^ ^ ^^^ , ^ ^ ^^^ these same reference currents such as ^ ^ ^^^ is the one that circulates in the T of greatest potential, ^ ^ ^^^ the one phase of least potential, and ^ ^ ^^^ that in the intermediate potential phase; - i1 the instantaneous current among iR, iS, iT whose reference has the smallest absolute value; and ^ ^ ^^^its reference (it is therefore the reference closest to zero); - i2 the instantaneous current (always among iR, iS, iT) whose reference is intermediate in absolute value; and ^ ^ ^^^ its reference; - i3 the instantaneous current whose reference has the largest absolute value; and ^ ^ ^^^ its reference (it is therefore the reference furthest from zero). Note: i3se is thus the current that must be constituted by the extrema of the HF currents, corresponding for example to iT in figures 24 to 26. The current i1 would correspond in these figures to i R and i2 would correspond to i S (whose reference has an absolute value intermediate between ^ ^ ^^^ and ^ ^ I ^^ ). In these figures, the converter control notably affects the the average values ​​of the currents i R and i S(relative size of the shaded areas, the evolution of which is shown in Figures 27 to 29), characterized according to the notations introduced here by the 〈^_〉 At a given moment during the BF period, we want to know how to control the matrix converter during a switching period. A very general description of the invention is given below: - the scheduling of the currents ^ ^ ^^^ , ^ ^ ^^^ , ^ ^ ^^^allows us to define the angular sector (from I to XII) in Table 10, and therefore two candidate sequences to control the converter from among the 14 appearing in Table 12 below and defined in Table 11; - The converter is controlled by one of these two sequences such that each change of state implements a potential variation of one phase (among A, B, C) which is either: ➝ in the positive direction (potential increase) with the current in the same phase (iA, iB or iC) negative (inward) at that instant ➝ in the negative direction (potential decrease) with the current in the same phase positive (outward) at that instant - The selected sequence is the one that maintains the proportions of the current values, that is, for which the ratio of the average values, over a switching period, of the two smallest currents in absolute value (i1 and i2) is equal to the reference for this ratio: [Math 7] 〈 ^^〉 ^^^^^ [Table 12] b cd Value of ^_ ^ b̀cd Angular Sector small large sequence arrangement sequence arrangement I S2 A2 S1 A1 II S3 A3 S4 A4 III S5 A5 S4 A4 IV S5 A6 S6 A7 V S7 A8 S6 A7 VI S7 A9 S8 A10 VII S9 A11 S8 A10 VIII S10 A12 S11 A13 IX S12 A14 S11 A13 X S12 A15 S13 A16 XI S14 A17 S13 A16 XII S14 A18 S1 A1 Note: if, while respecting these criteria, the current i3 does not satisfy its reference, then it is necessary to adjust the amplitude of the HF currents to scale their values ​​without altering the 〈^_〉 As above, this aspect is assumed to be ensured by the control of the 2nd converter (example in Figure 1) and is not part of the invention: the amplitude of the HF currents is assumed to conform to the limits described above. The above description can be expanded as follows: - the scheduling of the currents ^ ^ ^^^ , ^ ^ ^^^ , ^ ^ ^^^This allows us to define the angular sector (from I to XII) in Table 10, and therefore two candidate arrangements for controlling the converter among the 18 appearing in Table 12 and defined in the arrangement table; - the converter is controlled by one or the other of these two arrangements: it is the one that maintains the proportions of the current values, that is to say, for which the ratio of the average values, over a switching period, of the two smallest currents in absolute value (i1 and i2) is equal to the reference of this ratio (equation (7)). Note: a safety margin δ will have been chosen beforehand to properly stagger the switching during interval changes in order to ensure smooth switching. By varying the distribution of states coexisting within the same interval, we can vary the ratio 〈^_〉 and it is easy to verify if the reference value can to be reached. The arrangements defined in this way naturally ensure compliance with the conditions for smooth switching; there is no need to recheck them. Thus, the control method can be simply summarized according to the flowchart in Figure 45. It is important to note that the control principle presented here is systematic and can be implemented in real time based solely on knowledge of the instantaneous electrical quantities: it adapts naturally to any phase shift condition between currents and voltages in the network, for example, without needing to know this phase shift or the power setpoints. Regarding the discrimination between the two candidate arrangements from Table 12, in practice, one can try to predetermine the one that will satisfy equation (7) if an analytical expression for the exact shape of the currents is known. Otherwise, a closed-loop system can automatically vary the 〈^_〉by playing on the moment of states coexisting within the same interval, and will change arrangement as soon as a limit is reached (for example, the disappearance of a state). In the case of sinusoidal HF currents as presented in this description, a simple analytical solution (used in the simulations whose results are shown in the figures) allows the characteristic criteria and instants to be formally expressed, as will be shown later. Figure 46 shows a view of the HF currents from Figures 24 to 26. The smallest current in absolute value is iR, which can therefore be called i1 according to the notation introduced previously, and i2 corresponds to i SBy considering a scale of angles in radians based on the switching period (one revolution of the HF currents is 2π), we can define the variable ψ as the angle spanned by a peak of the current i1, extending to the zero crossing of the current on the curve followed by i1 when it is not zero (therefore without considering the margin δ at this point). This angle is an essential parameter of the control since it determines the distribution of coexisting states within an interval (here I2). In fact, ψ quantifies the position of the separator in the array of arrangements. Furthermore, knowing the BF current references, we define a variable X such that: [Math 8] ^ ^^^ $ = ^ ^^^^ ^ We can then show that the value of ψ that satisfies equation (7) can be written as: [Math 9] 1 − $ ^ ^ where δ is the safety margin, expressed in radians, applied at the zero crossing of the HF current curve followed by i1. Thus, for the chosen arrangement, the switching times are fully known, firstly, by the choice of δ applied according to the arrangement table, and secondly, by the value of ψ thus calculated. Furthermore, the discrimination between candidate arrangements in the same sector (Table 7) amounts to determining whether ψ exceeds, or does not exceed, a certain limit value ψlim, also identified in Figure 46: this arrangement is suitable as long as ψ < ψ lim (which corresponds to the "small" value b cd in Table 12) but the second will have to be used beyond the (“large” value of _ ^ b̀cdin Table 12). The limiting value ψlim corresponds to the width of an interval, therefore π / 3, to which must be added, or subtracted depending on the arrangement, the angle δ applied here between intervals I1 and I2. As the arrangement table specifies the signs of δ at each transition, this value is known. It is also possible to deduce the limiting value Xlim of the variable X, which defines the transition between the two columns "small" and "large" of Table 12: [Math 10] 1 7 7 The case of a circuit has already received considerable attention in the literature, although generalization to arbitrary power factor is much less common. The method developed so far based on a three-phase inductive circuit on the HF side can be adapted for the single-phase case, implementing a 3×2 matrix converter as shown, for example, in Figure 3. The only two phases on the HF side will simply be labeled A and B. Due to the reduction in degrees of freedom (only 3 remain), 2 (= 9 states) for the converter, the control is greatly simplified, while retaining many similarities with the three-phase version, but also differences that will highlight the advantages of the three-phase solution. The working assumptions are similar to the three-phase case, namely that the HF current is approximated by its sinusoidal fundamental at frequency f sw , knowing that this time there is only one current, named i Aand defined as the output of the matrix converter on phase A. In reality, a current iB could also be defined in the same way, but since there are only two of them, the zero sum of the currents immediately induces i B = −i A Therefore, only iA will be referred to hereafter. The phase named A is chosen arbitrarily, but will again serve as a reference point to define the switching period, which will also contain a positive alternation followed by a negative alternation of i A . The control of currents i {R | S | T}Injected on the LF side will follow the same objectives as for the three-phase version, as illustrated in Figure 47. The operating constraint in soft switching ZVS remains identical and still obeys the rule for the evolution of potentials according to the sign of the currents presented above, including the similar introduction of a safety margin δ. Finally, minimizing HF currents remains a desired objective, illustrated in Figure 48, with again a slight impact of the safety margin on the waveforms presented in Figure 49. Figures 47, 48, and 49 are the counterpart, for the 3×2 matrix converter, of Figures 7, 11, and 12 presented previously for the 3×3 matrix converter. Comparison of these figures reveals fundamental differences between the two structures: - in Figure 47e, the current iR always follows its reference ^ ^ ^^^However, it is constructed from portions of curves using only the HF current iA and its inverse, since there is no other current on the HF side. Consequently, its apparent frequency is lower than in the three-phase case and exhibits higher amplitude variations. Over a complete period T0, Figure 47b also shows that it systematically returns to zero in each switching period. As a result, its HF frequency content is higher and of lower frequency; these two drawbacks translate into greater difficulty in filtering the HF components via the LC filter. Thus, the filtered current on the network (Figure 47a) contains not only the LF component at f0, but also undesirable HF residues clearly perceptible in Figure 47a and its enlarged view 47c.Further filtering of these currents to reduce ripple is possible but would require increasing the values ​​of the inductive and capacitive elements of the LC filter, leading to oversizing this filter compared to the three-phase system; - Figure 48 also shows that minimizing the HF current is not possible below a certain value significantly higher than in three-phase systems. This phenomenon is due to the fact that the highest reference current, in absolute value, is constructed from the maxima or minima of the current curves. A and −i A , which return to zero twice per switching period, requiring a larger amplitude to compensate for these small values ​​on the resulting average during a switching period. For a sinusoidal HF current, the observed shape leads to a ratio of π / 2 between the amplitude ^Y^Z of the HF current and the largest absolute value IREF of the references ^ { ^ ^ ^ ∨ ^ H ∨I}Here again, this ratio is a minimum value and increases slightly with the application of the safety margin, which creates notches at the zero crossings of the current (Figure 49), which must be compensated for by a higher amplitude. As a reminder, for the 3×3 converter, for the same IREF, the minimum amplitude of the HF currents was amplified by only a factor of π / 3. These observations highlight the advantages of a three-phase HF inductive circuit structure rather than a single-phase one. On the one hand, the LC filter is made up of passive components, which still represent a significant portion of the overall converter volume, and for the same switching frequency, the three-phase configuration naturally offers an HF content that is easier to filter (higher frequency with less variation), thus reducing the stress on the filter components. On the other hand, the amplitude of the HF currents required to build the same reference values ​​on the audio frequency side is reduced by a third (ratio between the factors π / 2 and π / 3).Even though three-phase power requires an additional conductor, this reduction results in lower losses per conductor, with better heat distribution across the three conductors, helping to prevent hot spots. Furthermore, three-phase power offers other advantages, such as potentially more favorable sizing of the magnetic component in the RF circuit, and the inherent redundancy provided by the third phase. This redundancy ensures operational continuity in the event of a matrix converter component failure, as single-phase operation could still be possible on the two remaining operational phases. Therefore, the three-phase version is considered a more attractive technical solution for the conversion system. However, to complete the study of both variants, the converter control with a single-phase RF circuit is described below.The 9 states of the 3×2 matrix converter are listed in Tables 13 and 14 below for the notations “R, S, T” and “M, i, m”, which have the same meaning as in three-phase systems, except that only two arms are present. The converter state will therefore be defined by two of these letters instead of three, and Tables 13 and 14 also indicate the effect of each state on the injected currents on the low-frequency side. [Table 13] Current arm A. B iR iS iT RR 0 0 0 R S iA -iA 0 R T iA 0 -iA S R −i A i A 0 SS 0 0 0 ST 0 i A −i A T R −iA 0 iA T S 0 -iA iA TT 0 0 0 [Table 14] running arm A B iM i i i m MM 0 0 0 M i iA -iA 0 M m iA 0 -iA i M −iA iA 0ii 0 0 0 i m 0 iA −iA m M −iA 0 iA m i 0 -i A iA mm 0 0 0 Again, each arm changes state three times, leading to a total of 6 switching cycles for both arms, and therefore, in principle, 6 states. However, single-phase operation leads to a peculiarity, which will be discussed later. Figures 50 to 52 show a succession of states for a configuration analogous to that of Figures 24 to 26 in three-phase operation. During a switching period, the current i A passes through zero twice, defining two intervals I1 (positive alternation of i A ) and I2 (negative alternation). Each interval is composed of two states that are distributed in such a way as to adjust the proportion of the average current values, which can be characterized as above by the ratio ^bcd _ ^ b̀cdThis leads to four states during a period. However, during interval changes, we can observe that both arms change state simultaneously (“Mi” to “mM”, then “iM” to “Mm”). This case is equivalent to applying an intermediate state of zero duration at these two instants. In reality, Figure 52 shows the safety margins δ, which are negative, but strictly speaking, there is a first negative margin to ensure that arm A switches before the current crosses zero, and a second, also negative, margin in this example to ensure that arm B also switches before the zero crossing. If these two margins were not perfectly identical, there would be a slight overlap and the fleeting appearance of an intermediate state.For example, the transition from interval I1 to I2 (i.e., from “Mi” to “mM”) might show a fleeting “mi” state if arm A switches slightly before arm B, or a “MM” state if it switches slightly after (while always leaving sufficient margin before the zero crossing). Thus, if the switching of arms A and B at interval changes is not perfectly synchronous, then six states appear during the switching period, but the near-simultaneity of these switching events allows us to identify only four truly significant states in the construction of the low-frequency current references. However, the transitions at interval changes can differ and show a more pronounced intermediate state, which is essential for the proper functioning of the control system. This is the case in the example in Figures 53 to 55. In this instance, the safety margins of arms A and B do not apply in the same direction.Therefore, the interval change, for example between I1 and I2, implements a transition state (here “mM”) that cannot be described as fleeting or negligible as in the previous case, because its duration cannot be zero: it plays a significant role in the control system to facilitate the transition between the two principal states that occupy each of the two intervals, ensuring that the two arms switch under the correct conditions in zero-crossing conditions (one just before the current crosses zero, the other just after). Analyzing the direction of potential variation, in conjunction with the signs of the currents at these times, allows verification of this correct operation. Finally, as in the three-phase version, the case where all safety margins are positive can also occur, as shown in Figures 56 to 58.Again, the margins in the same direction for both arms lead to the disappearance of two of the six states normally applied during the switching period, due to the resulting simultaneous switching on arms A and B. As with the three-phase case, Figures 50 to 52, 53 to 55, and 56 to 58 were obtained in different configurations, with phase shifts between reference voltages and currents on the network of 30°, 70°, and −135°, allowing exploration of different angular sectors (I to XII in Figure 30). Ultimately, the single-phase case is simpler, as there is only one sequence (and therefore one arrangement, the distinction no longer being necessary here) per sector, and two consecutive sectors share the same sequence.Only six sequences / arrangements are then defined, and directly assigned to the different sectors according to the table below, without it being necessary to arbitrate between two arrangements as was the case in three-phase following the identification of the sector. In this table, a new notation of the type “〈. xy The symbol 〉” is introduced in some lines at the transition between intervals. It corresponds to the transition state mentioned earlier for Figures 53 to 55. In the other lines, only the negative or positive sign of the safety margin is indicated using the symbol respectively. In this case, Two switching operations occur simultaneously on both arms, and it is worth recalling that any asynchronous operation between these two switching operations results in a transient state (corresponding to the state, in the following interval, of the arm that switches first, with the state, in the preceding interval, of the arm that switches last). Finally, for simplified implementation based on an HF current approximated as a sinusoid, the principles previously stated continue to apply identically regarding the definition of the angle ψ and equations (8) and (9). However, it is no longer necessary to determine a limiting value for this angle, since the same arrangement of the last table is applied throughout the associated angular sector.Of course, the invention is not limited to a balanced sinusoidal three-phase system, and also applies to cases where the amplitudes are not identical on the three phases with different phase shifts of 2π / 3 and to non-sinusoidal waveforms, linked to the presence of harmonics, which may be the case in certain applications, particularly in sectors other than vehicle charging.

Claims

Claim 1. A method for controlling a matrix AC / AC power converter (1), the converter comprising a matrix of bidirectional current and voltage switches (2), the converter (1) being capable of being connected at its input to a low-frequency (LF) three-phase RST electrical network (3) and at its output to a high-frequency (HF) inductive circuit (5), the frequency of the HF currents of the inductive circuit (5) being equal to the switching frequency of the switches (2), the method comprising drawing or injecting a determined reference current onto each phase (R, S, T) of this network. ^ ^^^ , k Є {R, S, T}, the switches (2) of the matrix converter (1) taking successive states during a switching period resulting from the application of a control sequence for which the ratio of the average values ​​over a switching period of the two smallest instantaneous currents BF of the currents ^ ^, k Є {R, S, T} generated by the converter (1) on said phase (R, S, T) of the network, denoted ^ ^ and ^ ^ , in absolute value is approximately equal to the ratio of the currents of corresponding, i.e. 〈 ^_〉 bcd = ^_ , ^ being the current BF insta ^^^ ^ b̀cd ^ ntané, whose reference ^ ^ to the smallest among the three reference streams and ^ ^ being the instantaneous BF current whose reference ^ ^ ^^^ is intermediate in absolute value among the three reference currents.

2. A method according to the preceding claim, wherein the switching of the switches (2) is carried out by soft switching such that a rise in HF voltage occurs at an instant when the corresponding HF current is negative and a fall in HF voltage occurs at an instant when the corresponding HF current is positive.

3. A method according to the preceding claim, a safety time δ equal to at least a minimum difference between the switching instant and the instant of sign change of the HF current associated with the switching switch (2) being present in the control sequence between two successive states of this switch, to ensure that the switching takes place under a current value and with a time margin sufficient for soft switching.

4. A method according to any one of the preceding claims, wherein low-pass filtering is applied between the matrix converter (1) and the LF power network (3) in order to to attenuate harmonics with frequencies greater than or equal to the switching frequency and to allow the LF component to flow to the network.

5. Method according to the preceding claim, the low-pass filter (6) being of the LC type comprising on each LF phase (R, S, T) a capacitor placed in parallel with said phase and an inductor placed in series between the capacitor and the electrical network (3). 6.A method according to any one of the preceding claims, the LF voltages being ordered according to a sorting by voltage value at each instant and noted such that: - M refers to the phase among R, S or T which has the greatest electric potential; - m refers to the phase among R, S or T which has the smallest electric potential; - i refers to the phase among R, S or T whose electric potential is intermediate between the two preceding ones; the LF currents being renamed such that: - iM denotes the current among iR, iS and iT flowing in the phase of greatest potential M; - i. m designates the current among i R , i S and i T circulating in the phase of smallest potential m; - i i designates the current among i R , i S and i T circulating in the intermediate potential phase i; the reference current ^ ^ ^^^ , k Є {R, S, T} renamed ^ ^^^^ , j Є {M, i, m} following the ordering of the tensions, being represented by a vector ^^^^^^^^^^^⃗ in a complex plane such that: Where β is the argument of the vector and ^ ^ ^^^ , ^ ^ ^^^ and ^ ^ ^^^ are the orthogonal projections of said vector onto respective axes i m which intersect at the center of the complex plane representing the zero value of the currents, the axis of iM corresponding to the real axis of the complex plane, the positive part of the axis of ii being rotated 120° counterclockwise with respect to the positive part of the axis of i M , the positive part of the axis of i m being rotated 120° counterclockwise with respect to the positive part of the axis of ii, the axes of the currents and their respective perpendicular axes, called perpendicular axes of current, defining twelve numbered sectors from I to XII, each identified by a specific current sequence as shown in the following table:

7. Method according to any one of the preceding claims, the sum of the HF currents being zero and the sum of the LF currents being zero.

8. Method according to any one of the preceding claims, the output of the matrix converter (1) defining at least two arms (A, B, C) connecting the converter to the inductive circuit, a single switch (2) for each arm being closed at all times.

9. Method according to the preceding claim, the matrix converter (1) being of the 3x3 type having three output arms A, B, C.

10. Method according to the preceding claim with reference to claim 7, the possible connections of arms A, B, C to phases R, S, T and their impact on the LF currents (i R , i S , i T) being defined in the following tables, the positive sign of an HF current (i A , i B , i C ) indicating a current leaving the converter (1), the negative sign of this current indicating a current entering the converter (1):

11. Method according to the preceding claim, the possible states in notation<M,i,m> arms A, B, C and their impact on BF currents (i R , i S , i T) being defined in the following tables:

12. Method according to the preceding claim with reference to claim 3, an interval being defined by the time separating two zero crossings of the HF currents, a switching period comprising six substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed in the intervals, each arrangement corresponding to an area of ​​the complex plane obtained by subdividing each of the sectors into two, the set of possible arrangements being defined in the following table: Where I1 to I6 denote the intervals within a switching period, the symbol indicates that two states succeed one another within the same interval, the symbol denotes a transition between two intervals involving a positive safety time δ, the symbol denotes a transition between two intervals involving a negative safety time δ, and the symbol indicates that each arrangement is cyclic, repeating identically from one switching period to the next.

13. Method according to the preceding claim, the control sequences being fourteen in number and defined in the following table: a control sequence being unique to given LF voltages and LF current references.

14. Method according to the preceding claim, the arrangement applied being that which corresponds to the "small" value of the ratio of reference currents in the following table, i.e., in the case where this ratio is less than a limit value Xlim which is less than 1, otherwise the arrangement applied being that which corresponds to the "large" value of the ratio of reference currents in the same table, i.e., in the case where this ratio is greater than the limit value X lim 15. A method according to the preceding claim, wherein a variable X is defined such that: where Ψ is the angle covered by a peak of the current i1 and going up to the zero crossing of the current on the curve followed by i1 when it is not zero, considering a scale of angles in radians based on the switching period, the selection of the arrangement to apply is carried out according to the value of Ψ, if Ψ is less than a limit value Ψlim , the arrangement applied being that which corresponds to the "small" value of X in the table of claim 14, otherwise the arrangement applied being that which corresponds to the "large" value of X in the same table, Ψlim corresponding to the width of an interval, i.e. π / 3, to which is added, or subtracted according to the arrangements the safety time δ.

16. Method according to the preceding claim, the limit value X lim of the variable X defining the transition between the "small" and "large" values ​​of the table in claim 14 is defined such that:

17. The method according to claim 8, the matrix converter being of the 3x2 type having two output arms A, B.

18. The method according to the preceding claim with reference to claim 7, the possible connections of arms A, B to phases R, S, T and their impact on the LF currents (iR, iS, iT) being defined in the following table, the positive sign of an HF current (i A ) indicating a current leaving the converter, the negative sign of this current indicating a current entering the converter:

19. Method according to the preceding claim with reference to claim 6, the possible states in notation<M,i,m> arms A, B and their impact on BF currents (i R , i S , i T ) being defined in the following table:

20. A method according to the preceding claim with reference to claim 3, an interval being defined by the time separating two zero crossings of the HF currents, a switching period comprising two substantially equal intervals, an arrangement of arm states being a control sequence with information on how these states are distributed within the intervals, the set of possible arrangements being defined in the following table: Where I1 and I2 denote the intervals within a switching period, the symbol indicates that two states follow one another within the same interval, the symbol denotes a transition between two intervals involving a positive safety time δ, the symbol denotes a transition between two intervals involving a negative safety time δ, the symbol indicates that each arrangement is cyclic, repeating identically from one switching period to Another type notation refers to an intermediate state of shorter duration. or equal to 2δ appearing at the transition between intervals.

21. Product: Computer program comprising instructions readable by the processor of a device for implementing the method according to any one of the preceding claims.

22. Matrix AC / AC power converter comprising a matrix of bidirectional current and voltage switches, suitable for input connection to a low-frequency (LF) three-phase RST electrical network and output connection to a high-frequency (HF) inductive circuit, configured to be controlled by the method according to any one of claims 1 to 20 in order to control the active power P and reactive power Q exchanged with the LF network. 23.DC power source, in particular battery charger, from a three-phase network comprising: - the converter according to the preceding claim, - a converter controller configured to implement the control method according to any one of claims 1 to 20, - a transformer comprising the high frequency HF inductive circuit, and - an AC / DC converter at the output of the transformer and configured to supply a DC current.

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