Automated placement of components in an integrated circuit layout design using artificial intelligence

Abstract

Methods for automatically creating a layout design for manufacture of an integrated circuit and corresponding systems and computer-readable mediums. A method includes receiving (402) layout requirements (314). The layout requirements (314) describe components and connections for an integrated circuit to be manufactured. The method includes receiving (404) an artificial intelligence (AI) model, where the AI model (306) has been trained on multiple known-good layout designs (320). The method includes creating (406) component groups (500) according to the layout requirements (314), using the AI model. The method includes placing (408) planning groups (602), corresponding to the component groups (500), into a layout design (312) using the AI model (306). The method includes placing (412) the components in each planning group (602) in the layout design (312), using the AI model (306). The method includes storing (418) the layout design (312).

Description

AUTOMATED PLACEMENT OF COMPONENTS IN AN INTEGRATED CIRCUIT LAYOUT DESIGN USING ARTIFICIAL INTELLIGENCECROSS-REFERENCE TO OTHER APPLICATION

[0001] This application includes some material in common with, but is otherwise unrelated to, concurrently filed application titled, “Automated Routing in an Integrated Circuit Layout Design using Artificial Intelligence,” which is hereby incorporated by reference.TECHNICAL FIELD

[0002] The present disclosure is directed, in general, to circuit design. More specifically, various implementations provide a circuit board development system capable of automatically planning the circuit board layout using hierarchical groupings and artificial intelligence techniques.BACKGROUND OF THE DISCLOSURE

[0003] Integrated circuit devices are used in a wide variety of modern appliances, such as computers, automobiles, telephones, televisions, manufacturing tools, satellites and even toys. While even a small integrated circuit device can provide a great deal of functionality, almost every integrated circuit device must be electrically connected to an input or output device, to another integrated circuit device, or to some other electronic component in order to be useful. To provide these electrical connections, integrated circuit devices are typically mounted on a printed circuit board (PCB). Most PCB's have a rigid, planar core. The core may be formed, for example, of a sheet of fiberglass material impregnated with epoxy. Conductive lines or “traces” then are formed on one or both surfaces of the core, to electronically connect the components attached to the PCB.

[0004] There are a number of steps performed in the design of a PCB, often referred to as the “design flow ” An illustrative design flow may include an initial step where a designer creates a schematic diagram for the system to be connected through the PCB. This process includes identifying each component that will be included in the system. A system can include “active” components, such as, for example, field programmable gate arrays (FPGA's,) integrated circuits, and application-specific integrated circuits(ASIC's). A system also can include “passive” components, such as, for example, resistors, capacitors, and inductors. In addition to identifying each component, the schematic design will represent the electrical connections that must be formed between each component.

[0005] Once the schematic design is finalized, the designer will typically create a physical design to implement the schematic design. This physical design is sometimes referred to as the layout design. The designer will begin by selecting a physical location in the layout design for each component. After a location in the layout design for the various components has been selected, the designer then will route traces in the layout design to connect the components as specified in the schematic design.

[0006] As those of ordinary skill in the art will appreciate, due to the large number of components in modern electronic designs, placing components in the layout design can be a tedious and time-consuming process. In order to increase placement efficiency, components are often grouped together and represented by geometric shapes. These geometric shapes are often referred to as “component groups,” where the component group represents the relative location (or plan) for all component contained within the component group. The component groups are placed into locations within the layout design. As such, a single item (e.g. a component group) can be placed which represents multiple items (e.g. individual components.) This process of using component groups to represent a collection of components for placement is commonly referred to as hierarchical group planning (HGP). Although using an HGP methodology to place components within a layout is more efficient than manually placing each component, there are still inefficiencies in the placement process. For example, although some automated placement of component groups is possible, conventional HGP methodologies still require the user to manually place many of the component groups and to adjust the geometric shape of component groups in order to resolve conflicts between group boundaries and allow for the placement of all necessary component groups within the layout.

[0007] United States Patent US8839174B2, hereby incorporated by reference, describes a process for placing components within a layout design for a PCB. The processes disclosed in that documents can dynamically adjust the shape or placement of component groups during an HGP process via an interaction with a user, allowingthe user to place component groups, which conflict, geographically, with either another component group or some other object within the layout design. Subsequently, the placement locations for one or both of the conflicting component groups are adjusted to resolve the conflict.

[0008] This process is still a largely manual process for the user to place components with system guidance, having one or more layout designers instantiate each part represented in the schematic design bill of materials (BOM) physically onto the printed circuit board or substrate. The only automation that exists today is the ability to place a very small number of critical mechanically constrained parts. Improved systems are desirable.SUMMARY OF THE DISCLOSURE

[0009] Various disclosed embodiments include methods for automatically creating a layout design for manufacture of an integrated circuit and corresponding systems and computer-readable mediums. A method includes receiving layout requirements. The layout requirements describe components and connections for an integrated circuit to be manufactured. The method includes receiving at least one artificial intelligence (Al) model, where the Al model has been trained on multiple known-good layout designs. The method includes creating component groups according to the layout requirements, using the Al model. The method includes placing planning groups, corresponding to the component groups, into a layout design using the Al model. The method includes placing the components in each planning group in the layout design, using the Al model. The method includes storing the layout design.

[0010] In various embodiments, the layout requirements include a bill of materials describing the components. In various embodiments, creating the component groups using the Al model includes recognizing circuit characteristics, decoupling components, or a maximum and minimum number of connections required for the components to be grouped within a circuit. In various embodiments, creating the component groups using the Al model is also based on user requirements including a minimum number of connections between components, grouping only components on a same sheet, a maximum number of components in a component group, a maximum number of pins within a component to include in a component group, or components to not include in component groups. In various embodiments, the Al model has been trained based on previous layout designs, part placement order, part placement priority scores, part grouping, part placement, connection routing between parts, categorizations of layout designs, categorizations of circuit types, or component relationship models.

[0011] Various embodiments also include optimizing the planning group placement via an interaction with a user. In various embodiments, the components are represented in a hierarchical group planning strategy used to guide placement of the components in each planning group. In various embodiments, a physical circuit board is thereafter manufactured according to the stored layout design. In various embodiments, the Al model is thereafter further trained using the stored layout design.

[0012] Disclosed embodiments also include a computer system comprising a processor and an accessible memory, configured to perform processes as disclosed herein, and a non-transitory computer-readable medium encoded with executable instructions that, when executed, cause one or more computer systems to perform processes as disclosed herein.

[0013] The foregoing has outlined rather broadly the features and technical advantages of the present disclosure so that those skilled in the art may better understand the detailed description that follows. Additional features and advantages of the disclosure will be described hereinafter that form the subject of the claims. Those skilled in the art will appreciate that they may readily use the conception and the specific embodiment disclosed as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the disclosure in its broadest form.

[0014] Before undertaking the DETAILED DESCRIPTION below, it may be advantageous to set forth definitions of certain words or phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or” is inclusive, meaning and / or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation, whether such a device is implemented in hardware, firmware, software or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, and those of ordinary skill in the art will understand that such definitions apply in many, if not most, instances to prior as well as future uses of such defined words and phrases. While some terms may include a wide variety of embodiments, the appended claims may expressly limit these terms to specific embodiments.BRIEF DESCRIPTION OF THE DRAWINGS

[0015] For a more complete understanding of the present disclosure, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, wherein like numbers designate like objects, and in which:

[0016] FIGS. 1 and 2 illustrate aspects of a computer system that can be used to implement various embodiments disclosed herein;

[0017] FIG. 3 illustrates an auto-placement system in accordance with disclosed embodiments;

[0018] FIG. 4 illustrates a flowchart of a process in accordance with disclosed embodiments;

[0019] FIG. 5 illustrates an example of creating logical hierarchical groups for component groups in accordance with disclosed embodiments;

[0020] FIG. 6 illustrates an example of placement of planning groups on a layout design in accordance with disclosed embodiments;

[0021] FIG. 7 illustrates an example of optimizing planning group placement in accordance with disclosed embodiments;

[0022] FIG. 8 illustrates an example of local placement of components in a layout design in accordance with disclosed embodiments.DETAILED DESCRIPTION

[0023] FIGS. 1 through 8, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged device. The numerous innovative teachings of the present application will be described with reference to exemplary non-limiting embodiments.

[0024] Disclosed embodiments automate the creation of hierarchal parts / component groups, breaking down a flat schematic BOM into a hierarchal structure based on the electronic parts logical interconnectivity, constraints, rules and location within the schematic graphical design. Note that “parts” and “components” may be used interchangeably herein. This hierarchal structure of electronic circuit groups can then be automatically placed in the physical layout as “Planning Groups” and optimized based on group interconnectivity, constraints, rules, physical size, relation to previously placed critical components and other desirable factors. Once the Planning Group placement is optimized by the system (with an optional human user in the loop), the set of parts within each group will have a localized physical placement constructed based its parts interconnectivity, constraints, rules, physical size and other factors. Each of these localized physical placements can be instantiated, placed with relation to each other on the printed circuit board based on the overall board geometry, and further optimized relative to the part interconnectivity between groups.Illustrative Operating Environment

[0025] FIGS. 1 and 2 illustrate aspects of a computer system that can be used to implement various embodiments disclosed herein. The execution of various processes described herein may be implemented using computer-executable software instructions executed by one or more programmable computing devices. Because these processes may be implemented using software instructions, the components and operation of a generic programmable computer system on which various embodiments of these processes may be employed will first be described. Further, because of the complexity of some electronic design and testing processes and the large size of many circuit designs, various electronic design and testing tools areconfigured to operate on a computing system capable of simultaneously running multiple processing threads. The components and operation of a computer system having a host or master computer and one or more remote or slave computers therefore will be described with reference to FIG. 1. This operating environment is only one example of a suitable operating environment, however, and is not intended to suggest any limitation as to the scope of use or functionality of any implementations of the invention.

[0026] In FIG. 1, the computer system 101 includes a master computer 103. In the illustrated example, the master computer 103 is a multi -processor computer that includes a plurality of input and output devices 105 and a memory 107. The input and output devices 105 may include any device for receiving input data from or providing output data to a user. The input devices may include, for example, a keyboard, microphone, scanner or pointing device for receiving input from a user. The output devices may then include a display monitor, speaker, printer or tactile feedback device. These devices and their connections are well known in the art, and thus will not be discussed at length here.

[0027] The memory 107 may similarly be implemented using any combination of computer readable media that can be accessed by the master computer 103. The computer readable media may include, for example, microcircuit memory devices such as read-write memory (RAM), read-only memory (ROM), electronically erasable and programmable read-only memory (EEPROM) or flash memory microcircuit devices, CD-ROM disks, digital video disks (DVD), or other optical storage devices. The computer readable media may also include magnetic cassettes, magnetic tapes, magnetic disks or other magnetic storage devices, punched media, holographic storage devices, or any other non-transitory storage medium that can be used to store desired information. As used herein, the term "non-transitory" refers to the ability to store information for subsequent retrieval at a desired time, as opposed to propagating electromagnetic signals.

[0028] As will be discussed in detail below, the master computer 103 runs a software application for performing one or more operations according to various examples of the invention. Accordingly, the memory 107 stores software instructions 109 A that, when executed, will implement a software application for performing one or moreoperations. The memory 107 also stores data 109B to be used with the software application. In the illustrated embodiment, the data 109B contains process data that the software application uses to perform the operations, at least some of which may be parallel.

[0029] The master computer 103 also includes a plurality of processor units 111 and an interface device 113. The processor units 111 may be any type of processor device that can be programmed to execute the software instructions 109 A, but will conventionally be a microprocessor device. For example, one or more of the processor units 111 may be a commercially generic programmable microprocessor, such as Intel® Pentium® or Xeon™ microprocessors, Advanced Micro Devices Athlon™ microprocessors or Motorola 68K / Coldfire® microprocessors. Alternately or additionally, one or more of the processor units 111 may be a custom-manufactured processor, such as a microprocessor designed to optimally perform specific types of mathematical operations. The interface device 113, the processor units 111, the memory 107 and the input / output devices 105 are connected together by a bus 115.

[0030] With some implementations of the invention, the master computer 103 may employ one or more processing units 111 having more than one processor core. Accordingly, FIG. 2 illustrates an example of a multi-core processor unit 111 that may be employed with various embodiments of the invention. As seen in this figure, the processor unit 111 includes a plurality of processor cores 201. Each processor core 201 includes a computing engine 203 and a memory cache 205. As known to those of ordinary skill in the art, a computing engine contains logic devices for performing various computing functions, such as fetching software instructions and then performing the actions specified in the fetched instructions. These actions may include, for example, adding, subtracting, multiplying, and comparing numbers, performing logical operations such as AND, OR, NOR and XOR, and retrieving data. Each computing engine 203 may then use its corresponding memory cache 205 to quickly store and retrieve data and / or instructions for execution.

[0031] Each processor core 201 is connected to an interconnect 207. The particular construction of the interconnect 207 may vary depending upon the architecture of the processor unit 201. With some processor cores 201, such as the Cell microprocessor created by Sony Corporation, Toshiba Corporation and IBM Corporation, theinterconnect 207 may be implemented as an interconnect bus. With other processor units 201, however, such as the Opteron™ and Athlon™ dual-core processors available from Advanced Micro Devices of Sunnyvale, Calif., the interconnect 207 may be implemented as a system request interface device. In any case, the processor cores 201 communicate through the interconnect 207 with an input / output interfaces 209 and a memory controller 211. The input / output interface 209 provides a communication interface between the processor unit 201 and the bus 115. Similarly, the memory controller 211 controls the exchange of information between the processor unit 201 and the system memory 107. With some implementations of the invention, the processor units 201 may include additional components, such as a high- level cache memory accessible shared by the processor cores 201.

[0032] While FIG. 2 shows one illustration of a processor unit 201 that may be employed by some embodiments of the invention, it should be appreciated that this illustration is representative only and is not intended to be limiting. It also should be appreciated that, with some implementations, a multi-core processor unit 111 can be used in lieu of multiple, separate processor units 111. For example, rather than employing six separate processor units 111, an alternate implementation of the computing system 101 may employ a single processor unit 111 having six cores, two multi-core processor units each having three cores, a multi-core processor unit 111 with four cores together with two separate single-core processor units 111, etc.

[0033] Returning now to FIG. 1, the interface device 113 allows the master computer 103 to communicate with the slave computers 117A, 117B, 117C . . . 117x through a communication interface. The communication interface may be any suitable type of interface including, for example, a conventional wired network connection or an optically transmissive wired network connection. The communication interface may also be a wireless connection, such as a wireless optical connection, a radio frequency connection, an infrared connection, or even an acoustic connection. The interface device 113 translates data and control signals from the master computer 103 and each of the slave computers 117 into network messages according to one or more communication protocols, such as the transmission control protocol (TCP), the user datagram protocol (UDP), and the Internet protocol (IP). These and otherconventional communication protocols are well known in the art, and thus will not be discussed here in more detail.

[0034] Each slave computer 117 may include a memory 119, a processor unit 121, an interface device 123, and, optionally, one or more input / output devices 125 connected together by a system bus 127. As with the master computer 103, the optional input / output devices 125 for the slave computers 117 may include any conventional input or output devices, such as keyboards, pointing devices, microphones, display monitors, speakers, and printers. Similarly, the processor units 121 may be any type of conventional or custom-manufactured programmable processor device. For example, one or more of the processor units 121 may be commercially generic programmable microprocessors, such as Intel®. Pentium®, or Xeon™ microprocessors, Advanced Micro Devices Athlon™ microprocessors or Motorola 68K / Coldfire®. microprocessors. Alternately, one or more of the processor units 121 may be custom-manufactured processors, such as microprocessors designed to optimally perform specific types of mathematical operations. Still further, one or more of the processor units 121 may have more than one core, as described with reference to FIG. 2 above. The memory 119 then may be implemented using any combination of the computer readable media discussed above. Like the interface device 113, the interface devices 123 allow the slave computers 117 to communicate with the master computer 103 over the communication interface.

[0035] In the illustrated example, the master computer 103 is a multi-processor unit computer with multiple processor units 111, while each slave computer 117 has a single processor unit 121. It should be noted, however, that alternate implementations of the technology may employ a master computer having single processor unit 111. Further, one or more of the slave computers 117 may have multiple processor units 121, depending upon their intended use, as previously discussed. Also, while only a single interface device 113 or 123 is illustrated for both the master computer 103 and the slave computers, it should be noted that, with alternate embodiments of the invention, either the computer 103, one or more of the slave computers 117, or some combination of both may use two or more different interface devices 113 or 123 for communicating over multiple communication interfaces.

[0036] With various examples of the computer system 101, the master computer 103 may be connected to one or more external data storage devices. These external data storage devices may be implemented using any combination of non-transitory computer readable media that can be accessed by the master computer 103. The computer readable media may include, for example, microcircuit memory devices such as read-write memory (RAM), read-only memory (ROM), electronically erasable and programmable read-only memory (EEPROM) or flash memory microcircuit devices, CD-ROM disks, digital video disks (DVD), or other optical storage devices. The computer readable media may also include magnetic cassettes, magnetic tapes, magnetic disks or other magnetic storage devices, punched media, holographic storage devices, or any other medium that can be used to store desired information. According to some implementations of the computer system 101, one or more of the slave computers 117 may alternately or additions be connected to one or more external non-transitory data storage devices. Typically, these external non- transitory data storage devices will include data storage devices that also are connected to the master computer 103, but they also may be different from any data storage devices accessible by the master computer 103.

[0037] It also should be appreciated that the description of the computer system 101 illustrated in FIG. 1 and FIG. 2 is provided as an example only, and is not intended to suggest any limitation as to the scope of use or functionality of various embodiments of the invention.

[0038] Disclosed embodiments provide systems and methods for automatic placement of components and groups in a layout design using artificial intelligence techniques. Placement can be in accordance with a defined auto-placement strategy that defines how the design will have its components physically placed. Such as strategy can be based on a digital set of rules and constraints that the user has defined, layer stackup, power / ground layer definitions, order of process operation, component prioritization, order of the placement to be performed, etc. The auto-placement strategy is more than the placement process because it includes design-level knowledge and a history of success. Various processes as described herein can operate using a bill of materials BOM or netlist that includes the necessary information about the components and their required connections so that component groups can be created and placed.

[0039] According to disclosed embodiments, a computer system can perform a process automatically, but can also include user-interactive processes. For example, the system can automate the creation of component groups based on user requirements such as number of connections, within the same sheet, by sheet proximity, parts not to include in groups, etc. As part of this automatic process, the system can receive and process user input, such as the manual optimization of the created component groups, manual placement of mechanically constrained parts in the layout (such as connectors and others), and manual placement of large ball-grid array (BGA) parts.

[0040] The system can automatically place component groups in the layout design but can also receive and process user optimization of component group placement. The system can automatically create component group physical placement areas for each component group but can also receive and process user optimization of physical area sizes and locations.

[0041] Disclosed embodiments automate component placement to reduce the overall time it takes to place the components on a board. Disclosed processes can completely place all of the components on a board without violating mechanical and electrical rules. Various embodiments can divide the placement into smaller solutions, solve smaller solutions and optimize smaller solutions globally across the design.

[0042] FIG. 3 illustrates an example of a system-level view of an auto-placement system 300 in accordance with disclosed embodiments, that can be implemented, for example by a computer 101.

[0043] Disclosed embodiments can receive layout designs 320 from a design database 302. “Receiving,” as used herein, can include loading from storage, receiving from another device or process, receiving via an interaction with a user, and otherwise. System 300 can then use the received layout designs 320 for Al training 304 to produce Al models 306 of placement and routing designs. System 300 can observe or extract a significant amount of information from prior layout designs 320.

[0044] For example, since the parts in the past designs are already placed, the system can analyze their grouping and placement. However, the system may not be able toanalyze placement order since all parts are already placed in the layout designs 320, so additional information can be used to train the models 306.

[0045] In some cases, certain parts placement order matters. So, at high level, the models 306 can also receive and be trained with additional information, such as part placement order, part placement priority scores, part grouping, and part placement (such as part connections and locations). Since, in some cases, not all this knowledge can be obtained from the received layout designs 320, the system can receive them from other sources, and can be implemented using a combination of symbolic Al (Expert System) and Machine Learning Al.

[0046] Using the models 306, the system 300 can use an Al placement engine 308 to direct layout design tool(s) 310 to produce a layout design 312 for manufacture. The Al placement engine 308 can use layout requirements 314 as described herein. As described, layout requirements 314 can include the output of and data used for schematic capture tools that can help define the context for the creation of component groups as described herein. Such data can include netlists, a BOM, and others, and the output of the schematic capture tools can include defined component groups.

[0047] The layout design tools 310 can be custom software processes or can be implemented using commercial-of-the-shelf (COTS) software tools such as the CALIBRE and XPEDITION families of software products by Siemens Digital Industry Software Inc.

[0048] The layout design 312, when final, can then be stored as a design 320 in the design database 302 to that it is reusable and so that it can be used to train the models 306 for further design processes.

[0049] As described above, in many designs, the placement order matters for placement of both local and global components and component groups. Intuitively, by placing larger part first, there is less chance of there being no feasible placement for a later part. If this were the only consideration, the system could place the parts based on their size or pin count.

[0050] However, a system as disclosed herein can consider other factors during the Al-enabled placement process, including part function, part type, part connections,pins’ net class and constraint class, etc., to get globally optimal placement results. Some factors are more critical than others and therefore can be more heavily weighted. For example, the DDR4 interface weighs bigger than the number of pins, and such a part with more part connections or more nets should ordinarily be placed first to get the globally optimal placement.

[0051] Disclosed embodiments can integrate multiple placement goals, that may not coincide together very well, into a single score which can be used to optimize the overall goals.

[0052] Disclosed embodiments can consider any number of variables in the intelligent placement of components and components groups. Such variables can include, in various embodiments, assembly rules, such as clearances between components, clearances to board edge, and rotation, and balancing of component connections. Such variables can also include routing rules, such as the area required to fanout SMD parts, max net length, netline order / topologies, room for escapes, room for routing channels between components, and return paths (including issues with via walls). Other variables can include test point requirements (extra room), parts under parts (same layer) height and underside height, passive on bottom / active on top, and mechanical height restrictions (enclosure). Variables can also include solder rules such as distance between parts for soldering process, rotation of SMD parts for the soldering process (perpendicular to the wave), small SMD component hidden behind large (block wave), side allowed for SMD soldering process, thru-hole connections perpendicular to wave, limit parts that are on bottom size based on wave, and solder rework rules.

[0053] Variables can also include location of mechanically constrained parts, power distribution / split planes, digital / analog sections of PCB, thermal (high power parts to close or tall parts blocking high power parts), accessibility for test and debug devices, and board to board height restrictions.

[0054] Other variables and considerations that the system can use for intelligent autoplacement can include grouping of components, floor planning component groups, known wave solder direction, alignment of parts, place larger parts before smaller, place critical decoupling with large ICs, place non-critical 2 pin SMD decouplingparts last. Considerations can include prioritizing placement accessibility for test and debug devices, such as mechanically constrained (fix), RF / high speed (active), power, non-sensitive (active), decoupling (passive), keepout areas, rooms, soldermask size driving component distances (web requirements), minimize net length, reduce net / netline crossovers (reduce layers), keep similar components oriented in same direction (for inspection and minimize number different rotations), and schematic grouping of symbols for analog circuits.

[0055] One way in which the system can evaluate and incorporate such variables and considerations is by creating and training an Al model 306 according to a customer or user’s past known good designs, so that the model 306 contains information to fill in any knowledge gaps of the automated placement. Such a model 306 can be trained to include a categorization of design and circuit types.

[0056] Based on the design and circuit types, the system can associate the current layout design process with past designs. Information like the probability of clearances, side, rotations, etc. can be extracted and used for future placements. Information on the routing required for past placements like fanout, routing channels, etc. will also be used as training data and used for automation of placements.

[0057] By incorporating an Al model 306 of known good designs, a system as disclosed herein can automatically achieve results more in line with a human solution, providing a significant technical advantage over prior approaches.

[0058] FIG. 4 illustrates an example of a process 400 for automatic placement in a layout design in accordance with disclosed embodiments, that can be implemented, for example, by an auto-placement system 300 in accordance with disclosed embodiments, that can be implemented, for example by a computer 101 (referred to generically as the “system” herein).

[0059] At 402, the system receives layout requirements. The layout requirements can include a bill of materials (BOM), schematic metadata, netlist, or other information that includes the necessary information about the components and their required connections so that component groups can be created and placed.

[0060] At 404, the system receives one or more Al models, such as models 306.

[0061] At 406, the system creates component groups according to the layout requirements, and each of these logical groups of components are represented by a physical “planning group” within the layout being created. Here, the system uses the layout requirements, which can describe (among other information) electronic designs components, connections between components, and locations within the schematic (sheet / block), to group components into related circuitry. To create the component groups, the system can use the models 306 to apply information from past designs to fill in an information gap when creating groups for new electronics products. As part of this step, the system can recognize special circuit characteristics like analog, RF, digital, power, etc. circuit types. The system can recognize decoupling components and relationship to ICs. The system can identify the minimum and maximum number of connections required for components to be grouped within a circuit.

[0062] Note in particular that 402, 404, and 406 can be performed largely in parallel and can exchange data as necessary. For example, creating the component groups can be performed by a schematic capture tool that uses such layout requirements information as a BOM and netlist, and the component groups and other circuit grouping information generated by the schematic capture tool can be then included as part of the layout requirements. The layout requirements may include information specifically directed to the physical layout that is to be produced, and may also include schematic information, data, and metadata directed to the schematic form of the circuits being produced.

[0063] To create the component groups, the system can identify the most suitable model 306 required to automate the creation of component groups, based on the layout requirements. In some embodiments, this step may be schematic neutral, but this is not aways possible grouping of decoupling may be determined by proximity to an IC.

[0064] Creating the component groups may be driven by user requirements on how the parts are grouped, such as the minimum number of connections between parts, grouping only parts on the same sheet, the maximum number of parts in a group, the maximum number of pins within a component to include in group, or the parts to not include in groups (e.g., J*, connectors, or BGAs). Such information may be includedin the layout requirements or may be include in separate schematic design information.

[0065] Creating the component groups can include performing an interaction with a user to allow the user to cleanup or optimize groups, such as merging, splitting, or flattening groups. Various embodiments use a hierarchal placement approach, such as that described in United States Patent US8839174B2, to break a complex large problem into smaller solutions (global and local) allowing a global placement strategy to be formalized before focusing on the local individual part placement. Such an approach can be used to automate the creation of hierarchal component groups based on connectivity and other relationships between components that can be formed and to automate generation of a placement plan based on the component groups. The component groups can be turned into a physical definition of the area needed for the components, and the physical definition cab be placed on the board as part of a planning process. Placement of physical planning groups can be done based on interconnectivity between planning groups so that the plans can “puzzled” together for most efficient placement.

[0066] FIG. 5 illustrates an example of creating logical hierarchical groups for component groups, shown as component groups 500. At 405, the system can turn thousands of parts as identified in the layout requirements into a logical hierarchal grouping definition based on connectivity, placement rules (such as top / bottom), and component relationship model. Groups can also be created using some user preferences., such as minimum or maximum number parts in a group, the number of connections between groups, what parts to use as the seed part within a group, limits on connectivity across groups, etc. CMC-type algorithms can be used to create equivalent circuit relationships including schematic groups. Component groups 500 can include the connectivity between groups, as illustrated by the arrows in the example of FIG. 5.

[0067] Returning to process 400, at 408, once the component groups have been created, the system automatically places planning groups, corresponding to the component groups, within the layout design to produce a global placement strategy for component groups and other components. The placement of planning groups can use the model(s) 306. The planning groups for the layout design represent thecomponent groups, and each planning group has a size generally corresponding to the area required to manufacture the corresponding component group. The placement of planning groups uses a higher-level component placement strategy based on the relative size of each planning group (based on the components represented within) and the connectivity between these groups and mechanically contained parts like connectors.

[0068] Various embodiments can use a component relationship model to when creating or modeling both logical and physical relationships between parts. Such a component relationship model can include information based on how the schematic parts where placed, so that the relationship between components can be enriched based on parts being on the same sheet or same block, going beyond the connectivity relationship. The component relationship model can include information on the order of parts that where placed within the schematic, information on how parts are placed and grouped in layout from past designs, and may include relationship information from the company library. The component relationship model can be part of Al models 306.

[0069] Once the physical placement plan has been generated, then each plan would have its components automatically placed within the plans area including optimization of parts within plan based on internal connectivity within the plan and external connectivity between plans.

[0070] As part of 408, the system can display the state of the physical planning solution layout in the layout design to a user and interact with the user to allow the user manually change the layout and the planning group placement according to the user’s preferences.

[0071] The placement of planning groups should be driven by user requirements, such as may be described in the layout requirements or received via an interaction with the user. In this step, the system can minimize overlap between planning groups (while in some cases allowing overlap between planning groups if needed) and can minimize overlap of planning group with route border. The planning group placement can be driven by connections between groups (such as lengths and number of connections), and can consider and minimize netline crossovers. The system can prioritizeplacement of planning groups to existing anchor points by connections such as connectors and BGAs.

[0072] FIG. 6 illustrates an example of placement of planning groups 602 on a layout design 604 corresponding to component groups 500, in accordance with disclosed embodiments. Here, the system has turned the logical hierarchal grouping definition into planning group definitions, which can act as physical group definitions. For example, a planning group could start off as a simple rectangle with a variable aspect ratio. A simplified set of clearances could be used, but the system could allow overlap during this part of the process if needed. Planning groups can be based on the component area and a small clearance between areas. Each component group could end up with two planning groups (top and bottom). Initial planning group shapes could be a simple rectangle or based on the board aspect ratio, and a minimum aspect ratio can be used based on the largest component size needed. Planning groups can be placed on the board based on the board area, with considerations for connectivity and preplaced components.

[0073] Returning to process 400, at 410, the system can optionally optimize the planning group placement. An optional step will be provided for very dense PCB electronic designs, allowing a user to manage the circuit areas needed for the next step of the process at a finer granularity.

[0074] In this case, a basic definition (such as a circle or rectangle) of the size and location for a group of components to be placed can be treated as a planning area. The system can create or designate such planning areas and use the planning areas to define the physical area needed to place the components on the top and / or bottom of the board. A planning area can be represented, for example, as a rectangular area containing all components, clearances, fanout space, etc., required for the final placement. Each planning area can then replace a planning group within the design as a more detailed representation of the placement strategy.

[0075] At this point, further optimization to the planning group placement can be performed by the system, either autonomously or via an interaction with a user, by performing such functions as changing the aspect ratio of planning areas, fitting planning areas together but still accommodating room for the components within eacharea that need to be placed, and other actions. When the user participates in the optimization process, the user can manually optimize the planning areas within the board area before the system moves on to actually placing each part on the board.

[0076] FIG. 7 illustrates an example of optimizing planning group placement in accordance with disclosed embodiments. This optimization phase can change the group size while keeping the total area of the components within the group. In this example, the original placement of planning groups 702 is shown on layout design 704. Optimization of planning group placement can adjust the group areas to remove possible overlap in the planning groups, such as shown at layout design 706. There may be cases where the simple planning of planning groups requires overlapped groups.

[0077] Optimization can also change the planning group shapes to rectangles and adjust their shape to better fit within the board area, as shown in layout design 708.

[0078] Returning to process 400, at 412, the system places individual components and parts in each planning group in the layout design using an intelligent local automated placement process according to the global placement strategy. Once the global placement strategy has been completed, the system places individual parts within each planning group / area as a circuit. The circuit's relative location can be based on the planning group's location.

[0079] Each circuit represented in a hierarchal group planning strategy will have its component placement synthesized relative to the other parts within the circuit. At this point, the placement is localized within each circuit.

[0080] Optimization of each component’s placement within a circuit is based on the interconnections between other components within the same circuit. The more connections, the more attraction between specific components within the placement. Further optimization can be performed by reducing the netline interconnection crossovers via component rotation relative to the other components within the same circuit.

[0081] The system places the components in the layout design using Al techniques and the Al model 306. For example, relative placement of parts can also use circuittype categorizations such as Analog, Digital, RF, Power, etc., and how these circuits have been placed in past high-quality designs, as reflected in the Al model 306.

[0082] As another example, clearances between components will be based on past placements according to the Al model 306. This can take into account variables like fanout, routing, thermal, and other considerations a user had when choosing the placement of similar parts in past high-quality designs.

[0083] As another example, component side / rotation can be based on past high- quality designs as reflected in the Al model 306, for example, when the categorization of the design being placed is the same as or similar to past designs. This allows the system to account for different PCB DFM / DFA rules like soldering process. Therefore, for a similar design categorization, some parts can be placed on both top / bottom while others will be restricted to top or bottom. Rotation rules for components can also be based on design categorization and past rotations used for each component.

[0084] For intelligent placement of the components in each planning group, the system can apply any number of considerations, including that components within planning groups should be placed based on internal connectivity within groups within the planning group area or that component placement may be adjusted based on external connectivity between groups. Planning groups can be updated based on the actual component area needed, so that planning groups can get bigger or smaller as needed as the local placement is done. All clearance rules should be used, and the system can optimize the component placement to use area between groups using multi-physics virtual analysis or other techniques.

[0085] FIG. 8 illustrates an example of local placement of components 806 of planning groups 802 in a layout design 804 in accordance with disclosed embodiments.

[0086] Returning to process 400, at 414, the system places individual components and component groups in the layout design using an intelligent global automated placement process according to the global placement strategy and the Al model 306. As part of 414, the system can convert each hierarchal group plan or area into alocalized placement definition then place each circuit relative to the original plan location. Each local circuit placement can go through further placement optimization based on global details like intergroup connectivity and availability of space.

[0087] Each of these localized placements can be optimized based on the connections between circuits, such as based on netline length, netline crosses, etc., by rotating each circuit as a whole.

[0088] For global area optimization, the system can adjust the relative locations of components within each circuit in the layout design based on the area available for placement within the design. This can be done by adjusting the circuit available area for the synthesis of the local placement from a uniform square to a more vertical or horizontal rectangle. This can be done independently for top and bottom components within the local circuit. If Planning Areas are used, then the placement of the components within the circuit can be restricted to the area boundary.

[0089] At 416, the system can store the completed layout design. As part of this step, the completed layout design may also be used as an additional training design for the models 306.

[0090] At 418, a physical circuit board or other part can be manufactured according to the layout design.

[0091] A generalized description of a process in accordance with disclosed embodiments would include receiving a layout requirements describing thousands of parts, connectivity, placement, and mechanical clearance and electrical rules.

[0092] The system can then turn the layout requirements into a logical hierarchal grouping model based on connectivity, placement rules (Top / Bottom), component relationship model, and other information.

[0093] The system can then turn the logical hierarchal grouping model into planning group definitions. In some cases, two areas (top and bottom) are needed for parts within the logical group to be placed. A planning group can start as a simple rectangle with a variable aspect ratio representing the area of the parts within the logical group that is needed.

[0094] The system can then use the planning group definitions to find the initial positions of the planning groups on the layout design based on part group sizes, connectivity between groups, general area needed by the groups, and other information.

[0095] The system can then optimize the planning group locations on the layout design in preparation for the creation of physical areas needed to place components within each group in the area. At this point, the system is effectively generating physical areas for placement needed for each planning group, such as determining if the area is a square, horizontal rectangle, or vertical rectangle based on the other areas being placed.

[0096] Once the areas for each group have been optimized, the system can then place the components within each planning group within the area designated for that planning group, and can then further optimize the area actually needed.

[0097] Disclosed embodiments provide distinct technological advantages over known systems. For example, known solutions do not produce “human like” results. Disclosed embodiments enable the system to use Al techniques, based on a manual human hierarchal process for part / component placement, to produce results that are superior to a typical flat placement process. Disclosed embodiments can exploit placement rules, constraints, and other characteristics based on a model of previously manually placed electronics products, which takes into account constraints typically not defined as part of the design but managed by the human themselves during the manual placement process (typical part side / rotation by component, distance between components, relationships between components, space required for future processes like fanout and routing between components or creation of routing channels, etc.

[0098] Other features of disclosed embodiments provide further technical advantages. For example, disclosed techniques can automate the generation of the component hierarchy within component groups and verify whether it is possible to place all of the parts on the board. Various embodiments can provide a recommendation for the user's placement of a single component, can automatically place the hierarchal groups on the board as part of a planning process, and can generate a better placement for a group of components within a hierarchal group. Various embodiments can automate theplacement of devices such as 2-pin capacitor components based on an existing placement of IC’s (Decoupling). Disclosed embodiments can perform placement analysis to provide guidance to the user on the quality of their existing placement. Various embodiments can perform placement cleanup processes such as automated rotate, compact, and spreading of existing parts.

[0099] Of course, those of skill in the art will recognize that, unless specifically indicated or required by the sequence of operations, certain steps in the processes described above may be omitted, performed concurrently or sequentially, or performed in a different order.

[0100] Those skilled in the art will recognize that, for simplicity and clarity, the full structure and operation of all computer systems suitable for use with the present disclosure is not being depicted or described herein. Instead, only so much of a computer system as is unique to the present disclosure or necessary for an understanding of the present disclosure is depicted and described. The remainder of the construction and operation of computer system 101 may conform to any of the various current implementations and practices known in the art.

[0101] It is important to note that while the disclosure includes a description in the context of a fully functional system, those skilled in the art will appreciate that at least portions of the mechanism of the present disclosure are capable of being distributed in the form of instructions contained within a machine-usable, computer-usable, or computer-readable medium in any of a variety of forms, and that the present disclosure applies equally regardless of the particular type of instruction or signal bearing medium or storage medium utilized to actually carry out the distribution. Examples of machine usable / readable or computer usable / readable mediums include: nonvolatile, hard-coded type mediums such as read only memories (ROMs) or erasable, electrically programmable read only memories (EEPROMs), and user- recordable type mediums such as floppy disks, hard disk drives and compact disk read only memories (CD-ROMs) or digital versatile disks (DVDs).

[0102] Although an exemplary embodiment of the present disclosure has been described in detail, those skilled in the art will understand that various changes,substitutions, variations, and improvements disclosed herein may be made without departing from the spirit and scope of the disclosure in its broadest form.

[0103] None of the description in the present application should be read as implying that any particular element, step, or function is an essential element which must be included in the claim scope: the scope of patented subject matter is defined only by the allowed claims. Moreover, none of these claims are intended to invoke 35 USC § 112(f) unless the exact words "means for" are followed by a participle. The use of terms such as (but not limited to) “mechanism,” “module,” “device,” “unit,” “component,” “element,” “member,” “apparatus,” “machine,” “system,” “processor,” or “controller,” within a claim is understood and intended to refer to structures known to those skilled in the relevant art, as further modified or enhanced by the features of the claims themselves, and is not intended to invoke 35 U.S.C. §112(f).

Claims

WHAT IS CLAIMED IS:

1. A method for automatically creating a layout design for manufacture of an integrated circuit, the method performed by a computer system (101) and comprising: receiving (402) layout requirements (314), wherein the layout requirements (314) describe components and connections for an integrated circuit to be manufactured; receiving (404) an artificial intelligence (Al) model, wherein the Al model (306) has been trained on multiple known-good layout designs (320); creating (406) component groups (500) according to the layout requirements (314), using the Al model; placing (408) planning groups (602), corresponding to the component groups (500), into a layout design (312) using the Al model (306); placing (412) the components in each planning group (602) in the layout design (312), using the Al model (306); and storing (418) the layout design (312).

2. The method of claim 1, wherein the layout requirements (314) include a bill of materials describing the components.

3. The method of claim 1, wherein creating (406) the component groups (500) using the Al model (306) includes recognizing circuit characteristics, decoupling components, or a maximum and minimum number of connections required for the components to be grouped within a circuit.

4. The method of claim 1, wherein creating (406) the component groups (500) using the Al model (306) is also based on user requirements including a minimum number of connections between components, grouping only components on a same sheet, a maximum number of components in a component group, a maximum number of pins within a component to include in a component group (500), or components to not include in component groups (500).

5. The method of claim 1, wherein the Al model (306) has been trained based on previous layout designs (320), part placement order, part placement priority scores, part grouping, part placement, connection routing between parts, categorizations of layout designs, categorizations of circuit types, or component relationship models.

6. The method of claim 1, further comprising optimizing (410) the planning group (602) placement via an interaction with a user.

7. The method of claim 1, wherein the components are represented in a hierarchical group planning strategy used to guide placement of the components in each planning group (602).

8. The method of claim 1, wherein a physical circuit board is thereafter manufactured ( 18) according to the stored layout design (312).

9. The method of claim 1, wherein the Al model (306) is thereafter further trained (304) using the stored layout design (312).

10. A computer system (101) comprising a processor (111) and an accessible memory (107), the computer system (101) particularly configured to perform a process as in any of claims 1-9.

11. A non-transitory computer-readable medium encoded with executable instructions that, when executed, cause one or more computer systems (101) to perform a process as in any of claims 1-9.

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