Automated routing in an integrated circuit layout design using artificial intelligence

Abstract

Methods for automated routing in an an integrated circuit layout design (322) using artificial intelligence (AI) and corresponding systems and computer-readable mediums. A method includes receiving (402) routing requirements (324), receiving (404) an unrouted layout design (322), and receiving (406) an AI model (306). The method includes creating (408) a routing strategy for the unrouted layout design (322) using the AI model (306) and the routing requirements (324). The method includes creating (410) a physical routing plan based on the routing strategy to produce a routed layout design (312). The method includes storing (412) the routed layout design, wherein a physical part can thereafter be manufactured (414) according to the routed layout design.

Description

AUTOMATED ROUTING IN AN INTEGRATED CIRCUIT LAYOUT DESIGN USING ARTIFICIAL INTELLIGENCECROSS-REFERENCE TO OTHER APPLICATION

[0001] This application includes some material in common with, but is otherwise unrelated to, concurrently filed application titled, “Automated Placement of Components in an Integrated Circuit Layout Design Using Artificial Intelligence,” which is hereby incorporated by reference.TECHNICAL FIELD

[0002] . More specifically, various implementations provide a circuit board development system capable of automatically planning the circuit routing on a circuit board layout using artificial intelligence techniques.BACKGROUND OF THE DISCLOSURE

[0003] The routing phase of printed board design, which produces the intended routing of physical connections between circuit board components and with external connections, is a time-consuming, manual process. While some semi-automated systems have been attempted, the layouts produced by such systems are inefficient and unsatisfactory, as well as not being “human-like” in that they do not follow customary and expected routing strategies. Improved systems are desirable.SUMMARY OF THE DISCLOSURE

[0004] Various disclosed embodiments include methods for automated routing in an integrated circuit layout design using artificial intelligence (Al) and corresponding systems and computer-readable mediums. A method includes receiving routing requirements, receiving an unrouted layout design, and receiving an Al model. The method includes creating a routing strategy for the unrouted layout design using the Al model and / or the routing requirements. The method includes creating a physical routing plan based on the routing strategy to produce a routed layout design. The method includes storing the routed layout design, where a physical part can thereafter be manufactured according to the routed layout design.

[0005] Various embodiments also include training the Al model using the routed layout design. In various embodiments, the routing requirements include one or more of a bill of materials (BOM), schematic metadata, a netlist, a description of components and component groups to be connected, a description of external connections to be connected, or from-to definitions. In various embodiments, the unrouted layout design includes a plurality of components, component groups, and external connections.

[0006] In various embodiments, the Al model includes one or more of route order and priority, route bundling and channeling, route layer mapping, bias, and connection distribution, route distances and clearances beyond minimum rules, routing via patterns, rules, stacking and staggering, routing location restrictions, or fanout patterns and rules.

[0007] In various embodiments, the routing strategy is created using an Al routing engine and may be created using information including routing-specific interfaces, routingspecific power connections on specific component types, routing of decoupling, routing of digital, analog, and power distribution connections, or routing between specific parts.

[0008] In various embodiments, the routing strategy includes )one or more of prioritizing nets for routing order, identifying bundles of from-to connections to be routed together, prioritizing bundles, calculating a local bias map for each of a plurality of layers, mapping from-to connections to a layer for routing, identifying rules for the net orderingwithin a bundle, identifying rules for bundle lengths, and identifying rules between bundles.

[0009] In various embodiments, creating a routing strategy and creating a physical routing plan include receiving modifications to the routing strategy from a user and receiving modification to the physical routing plan from the user.

[0010] Disclosed embodiments also include a computer system comprising a processor and an accessible memory, configured to perform processes as disclosed herein, and a non-transitory computer-readable medium encoded with executable instructions that, when executed, cause one or more computer systems to perform processes as disclosed herein.

[0011] The foregoing has outlined rather broadly the features and technical advantages of the present disclosure so that those skilled in the art may better understand the detailed description that follows. Additional features and advantages of the disclosure will be described hereinafter that form the subject of the claims. Those skilled in the art will appreciate that they may readily use the conception and the specific embodiment disclosed as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the disclosure in its broadest form.

[0012] Before undertaking the DETAILED DESCRIPTION below, it may be advantageous to set forth definitions of certain words or phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or” is inclusive, meaning and / or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation, whether such a device is implemented in hardware, firmware, software or somecombination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, and those of ordinary skill in the art will understand that such definitions apply in many, if not most, instances to prior as well as future uses of such defined words and phrases. While some terms may include a wide variety of embodiments, the appended claims may expressly limit these terms to specific embodiments.BRIEF DESCRIPTION OF THE DRAWINGS

[0013] For a more complete understanding of the present disclosure, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, wherein like numbers designate like objects, and in which:

[0014] FIGS. 1 and 2 illustrate aspects of a computer system that can be used to implement various embodiments disclosed herein;

[0015] FIG. 3 illustrates an example of an auto-routing system in accordance with disclosed embodiments; and

[0016] FIG. 4 illustrates a flowchart of a process in accordance with disclosed embodiments.DETAILED DESCRIPTION

[0017] FIGS. 1 through 4, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged device. The numerous innovative teachings of the present application will be described with reference to exemplary non-limiting embodiments.

[0018] Simplistic routing systems have been in use in the industry for some time. Such systems typically use a brute-force approach to attempt to complete all necessary routing, even when the final routing on the layout design is inefficient, unintuitive, or otherwise undesirable. Many conventional solutions cannot fully route a design layout and leave dozens if not hundreds of connections to be finished by the user. A significant subsequent problem is that these unrouted connections cannot be finished by the human because the computer and human have different routing strategies. Because of this, conventional systems often produce a routing where the human has to rework a significant amount of the routed connections to create a routing strategy that would allow them to finish all the connections to 100%. For example, if the computer system can route to 98%, the last 2% of routes may require 20% of the existing routes to be ripped up and rerouted just to allow the human to route the last 2%.

[0019] Disclosed embodiments include systems and methods for route automation in circuit board design that are much faster than manual processes while providing “humanlike” routing results by using Al processes and models of previously routed electronics products. Al processes and models allow the system to learn how human users routed previous designs including capturing of requirements and so enable the system to create a “human-like” routing plan to facilitate automated routing. The “human-like” routing plan will provide higher quality automated routing results and higher route completion. Further, because the routing plan already follows a “human-like” design, a human user can complete any unrouted connections or add routings manually without the need toremove and re-work “brute force” routings. Disclosed embodiments take a hierarchal approach to solving the problem by automating the route planning process.

[0020] Based on the design placement and the interconnections between components and groups of components, a disclosed process bundles individual connections together as a human would. Then, such a process automates the routing of these bundles of connections as routing plans across the design space. The routing plans organize the routing strategy at a higher-level, enabling optimization of the interconnect and design space that cannot be done at the individual connection level supported by other solutions.

[0021] Generation of the routing plans as disclosed herein considers existing constraints and rules applied to the nets that are bundled together. Using an Al model of the previous electronics designs, disclosed processes can take into account routing variables and constraints to resolve, such as the layers to distribute connections, the fanout strategy, power distribution requirements, interlayer via connection strategies, etc. Once the automation of the connection bundles and planning is complete, the system can generate the individual connections for each plan.

[0022] Systems and methods as disclosed herein can completely route a layout design or can be used to produce a substantially-completely layout routing that is acceptable to users based on a more human-like routing strategy, allowing the user to manually complete any remaining connections as may be desired, without having to delete and reroute unacceptable connections such as those that would be generated using conventional automation techniques.

[0023] A “routing strategy,” as used herein, defines how the design will be routed. It is based on the digital set of rules and constraints that the user has defined, layer stackup, power / ground layer definitions, component placement, order of process operation, net prioritization, and order of the routing to be performed, etc. The routing strategy is more than the routing process because it includes design level knowledge and a history of success to define.

[0024] A routing process is not a static process where the layout user gets everything needed to complete the placement at one time. Instead, information is typically received by the user in an iterative process, so an automated routing process such as that disclosed herein should also accommodate an iterative development process.

[0025] For example, the user, early in the routing process, may identify the component placement that is ready for routing. In many cases, this will be by the user making, and the system receiving, a selection of a component or circuit group. When iterative changes to the design occur, the system can interact with the user to receive updates to the layout design and routing. A system as described herein can interact with the user to allow the user to interact with the routing strategy to perform tasks such as to add / remove / split planned routings or routing strategies to ensure the automated routing process as new components are placed.Illustrative Operating Environment

[0026] FIGS. 1 and 2 illustrate aspects of a computer system that can be used to implement various embodiments disclosed herein. The execution of various processes described herein may be implemented using computer-executable software instructions executed by one or more programmable computing devices. Because these processes may be implemented using software instructions, the components and operation of a generic programmable computer system on which various embodiments of these processes may be employed will first be described. Further, because of the complexity of some electronic design and testing processes and the large size of many circuit designs, various electronic design and testing tools are configured to operate on a computing system capable of simultaneously running multiple processing threads. The components and operation of a computer system having a host or master computer and one or more remote or slave computers therefore will be described with reference to FIG. 1. This operating environment is only one example of a suitable operating environment, however, and is not intended to suggest any limitation as to the scope of use or functionality of any implementations of the invention.

[0027] In FIG. 1, the computer system 101 includes a master computer 103. In the illustrated example, the master computer 103 is a multi-processor computer that includes a plurality of input and output devices 105 and a memory 107. The input and output devices 105 may include any device for receiving input data from or providing output data to a user. The input devices may include, for example, a keyboard, microphone, scanner or pointing device for receiving input from a user. The output devices may then include a display monitor, speaker, printer or tactile feedback device. These devices and their connections are well known in the art, and thus will not be discussed at length here.

[0028] The memory 107 may similarly be implemented using any combination of computer readable media that can be accessed by the master computer 103. The computer readable media may include, for example, microcircuit memory devices such as readwrite memory (RAM), read-only memory (ROM), electronically erasable and programmable read-only memory (EEPROM) or flash memory microcircuit devices, CD- ROM disks, digital video disks (DVD), or other optical storage devices. The computer readable media may also include magnetic cassettes, magnetic tapes, magnetic disks or other magnetic storage devices, punched media, holographic storage devices, or any other non-transitory storage medium that can be used to store desired information. As used herein, the term "non-transitory" refers to the ability to store information for subsequent retrieval at a desired time, as opposed to propagating electromagnetic signals.

[0029] As will be discussed in detail below, the master computer 103 runs a software application for performing one or more operations according to various examples of the invention. Accordingly, the memory 107 stores software instructions 109A that, when executed, will implement a software application for performing one or more operations. The memory 107 also stores data 109B to be used with the software application. In the illustrated embodiment, the data 109B contains process data that the software application uses to perform the operations, at least some of which may be parallel.

[0030] The master computer 103 also includes a plurality of processor units 111 and an interface device 113. The processor units 111 may be any type of processor device that can be programmed to execute the software instructions 109A, but will conventionally bea microprocessor device. For example, one or more of the processor units 111 may be a commercially generic programmable microprocessor, such as Intel® Pentium® or Xeon™ microprocessors, Advanced Micro Devices Athlon™ microprocessors or Motorola 68K / Coldfire® microprocessors. Alternately or additionally, one or more of the processor units 111 may be a custom-manufactured processor, such as a microprocessor designed to optimally perform specific types of mathematical operations. The interface device 113, the processor units 111, the memory 107 and the input / output devices 105 are connected together by a bus 115.

[0031] With some implementations of the invention, the master computer 103 may employ one or more processing units 111 having more than one processor core. Accordingly, FIG. 2 illustrates an example of a multi-core processor unit 111 that may be employed with various embodiments of the invention. As seen in this figure, the processor unit 111 includes a plurality of processor cores 201. Each processor core 201 includes a computing engine 203 and a memory cache 205. As known to those of ordinary skill in the art, a computing engine contains logic devices for performing various computing functions, such as fetching software instructions and then performing the actions specified in the fetched instructions. These actions may include, for example, adding, subtracting, multiplying, and comparing numbers, performing logical operations such as AND, OR, NOR and XOR, and retrieving data. Each computing engine 203 may then use its corresponding memory cache 205 to quickly store and retrieve data and / or instructions for execution.

[0032] Each processor core 201 is connected to an interconnect 207. The particular construction of the interconnect 207 may vary depending upon the architecture of the processor unit 201. With some processor cores 201, such as the Cell microprocessor created by Sony Corporation, Toshiba Corporation and IBM Corporation, the interconnect 207 may be implemented as an interconnect bus. With other processor units 201, however, such as the Opteron™ and Athlon™ dual-core processors available from Advanced Micro Devices of Sunnyvale, Calif, the interconnect 207 may be implemented as a system request interface device. In any case, the processor cores 201 communicate through the interconnect 207 with an input / output interfaces 209 and a memory controller211. The input / output interface 209 provides a communication interface between the processor unit 201 and the bus 115. Similarly, the memory controller 211 controls the exchange of information between the processor unit 201 and the system memory 107. With some implementations of the invention, the processor units 201 may include additional components, such as a high-level cache memory accessible shared by the processor cores 201.

[0033] While FIG. 2 shows one illustration of a processor unit 201 that may be employed by some embodiments of the invention, it should be appreciated that this illustration is representative only and is not intended to be limiting. It also should be appreciated that, with some implementations, a multi-core processor unit 111 can be used in lieu of multiple, separate processor units 111. For example, rather than employing six separate processor units 111, an alternate implementation of the computing system 101 may employ a single processor unit 111 having six cores, two multi-core processor units each having three cores, a multi-core processor unit 111 with four cores together with two separate single-core processor units 111, etc.

[0034] Returning now to FIG. 1, the interface device 113 allows the master computer 103 to communicate with the slave computers 117A, 117B, 117C . . . 117x through a communication interface. The communication interface may be any suitable type of interface including, for example, a conventional wired network connection or an optically transmissive wired network connection. The communication interface may also be a wireless connection, such as a wireless optical connection, a radio frequency connection, an infrared connection, or even an acoustic connection. The interface device 113 translates data and control signals from the master computer 103 and each of the slave computers 117 into network messages according to one or more communication protocols, such as the transmission control protocol (TCP), the user datagram protocol (UDP), and the Internet protocol (IP). These and other conventional communication protocols are well known in the art, and thus will not be discussed here in more detail.

[0035] Each slave computer 117 may include a memory 119, a processor unit 121, an interface device 123, and, optionally, one or more input / output devices 125 connectedtogether by a system bus 127. As with the master computer 103, the optional input / output devices 125 for the slave computers 117 may include any conventional input or output devices, such as keyboards, pointing devices, microphones, display monitors, speakers, and printers. Similarly, the processor units 121 may be any type of conventional or custom-manufactured programmable processor device. For example, one or more of the processor units 121 may be commercially generic programmable microprocessors, such as Intel®. Pentium®, or Xeon™ microprocessors, Advanced Micro Devices Athlon™ microprocessors or Motorola 68K / Coldfire®. microprocessors. Alternately, one or more of the processor units 121 may be custom-manufactured processors, such as microprocessors designed to optimally perform specific types of mathematical operations. Still further, one or more of the processor units 121 may have more than one core, as described with reference to FIG. 2 above. The memory 119 then may be implemented using any combination of the computer readable media discussed above. Like the interface device 113, the interface devices 123 allow the slave computers 117 to communicate with the master computer 103 over the communication interface.

[0036] In the illustrated example, the master computer 103 is a multi-processor unit computer with multiple processor units 111, while each slave computer 117 has a single processor unit 121. It should be noted, however, that alternate implementations of the technology may employ a master computer having single processor unit 111. Further, one or more of the slave computers 117 may have multiple processor units 121, depending upon their intended use, as previously discussed. Also, while only a single interface device 113 or 123 is illustrated for both the master computer 103 and the slave computers, it should be noted that, with alternate embodiments of the invention, either the computer 103, one or more of the slave computers 117, or some combination of both may use two or more different interface devices 113 or 123 for communicating over multiple communication interfaces.

[0037] With various examples of the computer system 101, the master computer 103 may be connected to one or more external data storage devices. These external data storage devices may be implemented using any combination of non-transitory computer readable media that can be accessed by the master computer 103. The computer readable mediamay include, for example, microcircuit memory devices such as read-write memory (RAM), read-only memory (ROM), electronically erasable and programmable read-only memory (EEPROM) or flash memory microcircuit devices, CD-ROM disks, digital video disks (DVD), or other optical storage devices. The computer readable media may also include magnetic cassettes, magnetic tapes, magnetic disks or other magnetic storage devices, punched media, holographic storage devices, or any other medium that can be used to store desired information. According to some implementations of the computer system 101, one or more of the slave computers 117 may alternately or additions be connected to one or more external non-transitory data storage devices. Typically, these external non-transitory data storage devices will include data storage devices that also are connected to the master computer 103, but they also may be different from any data storage devices accessible by the master computer 103.

[0038] It also should be appreciated that the description of the computer system 101 illustrated in FIG. 1 and FIG. 2 is provided as an example only, and is not intended to suggest any limitation as to the scope of use or functionality of various embodiments of the invention.

[0039] FIG. 3 illustrates an example of a system-level view of an auto-routing system 300 in accordance with disclosed embodiments, that can be implemented, for example by a computer 101.

[0040] Disclosed embodiments can receive layout designs 320 from a design database 302. Layout designs 320 are routed; that is, layout designs 320 include the physical routing between and among components, component groups, and external connections as is necessary to manufacture the circuit. Layout designs 320 are “known good” designs and routing, and can be those designs previously routed by users so that they reflect the users’ routing preferences. “Receiving,” as used herein, can include loading from storage, receiving from another device or process, receiving via an interaction with a user, and otherwise. System 300 can then use the received layout designs 320 for Al training 304 to produce Al models 306 of placement and routing designs. System 300 can observe orextract a significant amount of information from prior layout designs 320, including in particular routing information.

[0041] For example, since the parts in the past designs are already placed and routed, the system can analyze their grouping, placement, and the placement of routing connections between them and to external connections. In most case, layout designs 320 are designs for known-good, released electronic products, so they are not incomplete, partially placed, or only partially routed. However, the system may not be able to analyze routing order since all parts are already placed and routed in the layout designs 320, so additional information can be used to train the models 306 with respect to the routing order.

[0042] In some cases, certain routing order matters. So, at high level, the models 306 can also receive and be trained with additional information, such as routing order, routing placements and constraints, etc. Since, in some cases, if some types of required information cannot be obtained from the received layout designs 320, the system can receive them from other sources, including user inputs. Models 306 and training of those models can be implemented, for example, using a combination of symbolic Al (Expert System) and Machine Learning Al.

[0043] Using the models 306, the system 300 can use an Al routing engine 308 to direct routing tool(s) 310 to produce a routed layout design 312 for manufacture. This can be performed, for example, on an unrouted layout design 322 that already has components and / or component groups in place, or can be performed in conjunction with a placement process to both place and route components according to layout requirements. Note that, as used herein, an “unrouted” layout design is intended to refer to both a layout design without any routing and to a layout design that is partially or incompletely routed. This process can use routing requirements 324, which may describe, for example, which components and component groups should be connected, which external connections should be connected, how the connections should be made (“from-to” definitions), and other specifications for the routing as described herein.

[0044] The routing tools can be custom software processes or can be implemented using commercial-of-the-shelf (COTS) software tools such as the XPEDITION family ofsoftware products by Siemens Digital Industry Software Inc. The layout design 312, when final, can then be stored as a design 320 in the design database 302 to that it is reusable and so that it can be used to train the models 306 for further design processes.

[0045] The Al routing engine 308 builds a “human-like” routing strategy focused on filling in the knowledge gaps not defined as part of a design's digital definition in 322 and 324. The source for obtaining the design knowledge, in various embodiments, are the designs 320 stored in design database 302, as represented by trained Al models 306. Models 306 organize and categorize electronic design information with well-formed relationships.

[0046] In various embodiments, Al routing engine 308 extracts from the unrouted layout design 322 characteristics that will be used to form relationships to the AI / ML model 306 to synthesize a design-specific “human-like” routing strategy.

[0047] For example, Al models 306 can include such knowledge that can be used to synthesize the routing strategy as route order and priority, route bundling and channeling, route layer mapping, bias, and connection distribution, route distances and clearances beyond minimum rules, routing via patterns (single and bus), rules, stacking and staggering, routing location restrictions (under specific parts), and fanout patterns and rules (number of pins that can share a via).

[0048] FIG. 4 illustrates an example of a process 400 for automatic routing in a layout design in accordance with disclosed embodiments, that can be implemented, for example, by an auto-routing system 300 in accordance with disclosed embodiments, that can be implemented, for example by a computer 101 (referred to generically as the “system” herein).

[0049] At 402, the system receives routing requirements. The routing requirements can include a bill of materials (BOM), schematic metadata, netlist, which components and component groups should be connected, which external connections should be connected, how the connections should be made (“from-to” definitions), or other information that includes the necessary information about the components and their required connections.

[0050] At 404, the system receives an unrouted layout design that includes a plurality of components, component groups, and / or external connections. Note that the routing requirements may be received as part of or with the unrouted layout design. In some embodiments, receiving the unrouted layout design may include receiving the output of an auto-placement process.

[0051] At 406, the system receives one or more Al models, such as models 306. As described above, these models 306 are preferably based on “known good” routed layout designs that are of the highest quality.

[0052] At 408, the system creates a routing strategy for the unrouted layout design using the Al models 306 (and potentially other sources as described herein). In various embodiments, this is a “human-like” routing strategy focused on filling in the knowledge gaps not defined as part of the unrouted layout design.

[0053] For creating the routing strategy, Al models 306 and Al routing engine 308 can use information and learning from previous routing tasks for design situations. Such information can include, for example, routing-specific interfaces (DDR, H-Tree, custom, serial, etc.), routing- specific power connections on BGAs, FPGAs, and large components, routing of decoupling, routing of digital, analog, and power distribution connections, and routing between specific parts like CPUs and memory.

[0054] Al routing engine 308, in various embodiments, can classify particular situations in the design to be routed, then apply very specific knowledge based on the categorization and relationships within the Al model to generate “human-like” routing results.

[0055] Creating a routing strategy, based on the unrouted layout design, the Al models, and the additional information described herein, can include (but is not limited to) such steps as:• Prioritize nets for routing order;Identify bundles of “from-to” connections to be routed together;Prioritize bundles;• Calculate each layer’s local bias map;• Map these from- to connections to a layer for routing;• Identify rules for the net ordering within each bundle;• Identify rules for bundle lengths; and• Identify the rules between bundles.

[0056] A routing strategy can be, for example, a hierarchal set of requirements for mapping how to route the unrouted or partially routed designs. These requirements can include (but are not limited to):• Routing priority;• Routing layer distribution;• Bundling of connections to be routed together;• Via transition patterns / requirements;• Component fanout patterns / requirements;• Requirements for routing on plane layers;• Requirements for routing under parts;• Route density management / distribution;• Areas needed for route tuning patterns;• Categorization of routing types will defined; orOther characteristics as defined by the user, the routing requirements, the Al models, or the Al routing engine.

[0057] At 410, the system creates a physical routing plan based on the routing strategy to produce a routed layout design. As part of this process, prioritized physical route planning geometries can be synthesized between the pins requiring routing on one or more layers based on higher-level planning rules (e.g., priority, order, length, clearance, distance, etc.).

[0058] The routing plan can be based on bundles of nets routed between areas of the board. The layers, routing categories, and size of the connections can be defined as part of the route plan. The routing plan can physically represent these bundles of connections as sketch plans. The routing plan can include categories of local routes like analog, digital, interfaces, etc., which define requirements for the local routing within a circuit.

[0059] As part of 410, the system can automatically create from-to groups as internal routing structures between components in the layout design. This can be done based on user routing requirements, such as the number of connections between components and groups of components, or other routing requirements, and can be based on the placement of the components and component groups in the layout design. This can include optimize the layers and routing bias for which the from-to groups will use.

[0060] In creating the from-to groups, the system can analyze a number of factors and perform a number of other sub-processes. These can include defining a data model required to automate the creation of from-to groups, based on such factors as the placement of components, connectivity between components, and placement groups. From-to groups can be created based on connectivity, netclass, constraint class, match groups assigned to nets, and other net-based rules. The system can also automate the creation of placement groups based on the board placement to allow from-to groups to be created between groups of components in the layout design. In cases where the layout design does not include placement groups, the system can create these based on the actual component placement to identify circuit groups to bundle nets together as part of a from- to group.

[0061] Based on the board geometry (aspect ratio) and routing layers, the system can create an initial definition for which layers the various components in the from-to groups will be routed. The system can receive user input into the creation of from-to groups, such as defining the minimum / maximum number of nets that can be within a net group. The system can ignore power / ground type nets with that have more than a given number of pins, which may be user-defined.

[0062] The routing in the routing plan can be driven by user requirements in addition to the Al models and other requirements. The system can minimize overlap between routs and routing areas and can optimize the priority for routing different from-to groups. When needed, the system can receive user input regarding prioritization and other factors, such that that nets that require tuning can be placed first, and the routing can be based on the number of nets within a from-to group and the distance required for specific routing connections. The system can distribute or balance the routing connections across layers to minimize crossings. Bias should be local, but each layer may have a global bias for long routing connections.

[0063] As part of 410, when the routing plan is complete, the system can validate and evaluate the routing plan. The system can also interact with a user so that the user can review the routing plan, add additional requirements if needed, and indicate that the routing plan should be regenerated.

[0064] As part of 410, the system can automate placement of physical routing connections, which can be based on any global and local requirements defined in the routing strategy and the routing plan. This can be in the form of a sketch plans as used in the XPEDITION family of software products by Siemens Digital Industry Software Inc. The placement of the physical routing connections is performed using Al processes, based on the Al models and other information, to optimize layers, bias, and to reduce routing cross-overs.

[0065] This can include interacting with a user to perform such tasks as modifying or optimizing the physical routing connections, splitting or joining routing connections,moving from-to connections as necessary, adjusting physical paths or layers, or otherwise.

[0066] At 412, the system can store the routed layout design. This can include adding the routed layout design to the designs 320 of the design database 302 and can include training the model(s) 306 using the routed layout design.

[0067] Thereafter, at 414, the system can manufacture a physical part, such as a printed circuit board, according to the routed layout design.

[0068] Disclosed embodiments provide distinct technical advantages over known systems. For example, disclosed systems and methods produce routing results based on a human-like routing strategy, even when complete routing is not desired, enabling a user to finish the remaining connections without having to rip-up and re-route the connections generated by automation. Disclosed embodiments support local biasing for routing connections across layers, and can create a routing strategy based on characteristics, constraints, rules, and variables extracted from known good electronics designs in an Al model. Disclosed embodiments significantly accelerate the electronics design routing process that require currently multiple resources and human intervention. Disclosed embodiments therefore reduce the human cost and time to market for products and provide consistent quality for the connections electronic products require as part of the design process.

[0069] Of course, those of skill in the art will recognize that, unless specifically indicated or required by the sequence of operations, certain steps in the processes described above may be omitted, performed concurrently or sequentially, or performed in a different order.

[0070] Those skilled in the art will recognize that, for simplicity and clarity, the full structure and operation of all computer systems suitable for use with the present disclosure is not being depicted or described herein. Instead, only so much of a computer system as is unique to the present disclosure or necessary for an understanding of the present disclosure is depicted and described. The remainder of the construction andoperation of computer system 101 may conform to any of the various current implementations and practices known in the art.

[0071] It is important to note that while the disclosure includes a description in the context of a fully functional system, those skilled in the art will appreciate that at least portions of the mechanism of the present disclosure are capable of being distributed in the form of instructions contained within a machine-usable, computer-usable, or computer- readable medium in any of a variety of forms, and that the present disclosure applies equally regardless of the particular type of instruction or signal bearing medium or storage medium utilized to actually carry out the distribution. Examples of machine usable / readable or computer usable / readable mediums include: nonvolatile, hard-coded type mediums such as read only memories (ROMs) or erasable, electrically programmable read only memories (EEPROMs), and user-recordable type mediums such as floppy disks, hard disk drives and compact disk read only memories (CD-ROMs) or digital versatile disks (DVDs).

[0072] Although an exemplary embodiment of the present disclosure has been described in detail, those skilled in the art will understand that various changes, substitutions, variations, and improvements disclosed herein may be made without departing from the spirit and scope of the disclosure in its broadest form.

[0073] None of the description in the present application should be read as implying that any particular element, step, or function is an essential element which must be included in the claim scope: the scope of patented subject matter is defined only by the allowed claims. Moreover, none of these claims are intended to invoke 35 USC §112(f) unless the exact words "means for" are followed by a participle. The use of terms such as (but not limited to) “mechanism,” “module,” “device,” “unit,” “component,” “element,” “member,” “apparatus,” “machine,” “system,” “processor,” or “controller,” within a claim is understood and intended to refer to structures known to those skilled in the relevant art, as further modified or enhanced by the features of the claims themselves, and is not intended to invoke 35 U.S.C. §112(f).

Claims

WHAT IS CLAIMED IS:

1. A method (400) for automated routing in an integrated circuit layout design (322) using artificial intelligence (Al), the method performed by a computer system (101) and comprising: receiving (402) routing requirements (324); receiving (404) an unrouted layout design (322); receiving (406) an Al model (306); creating (408) a routing strategy for the unrouted layout design (322) using the Al model (306) and the routing requirements (324); creating (410) a physical routing plan based on the routing strategy to produce a routed layout design (312); and storing (412) the routed layout design, wherein a physical part can thereafter be manufactured (414) according to the routed layout design.

2. The method of claim 1, further comprising training the Al model (306) using the routed layout design (312).

3. The method of claim 1, wherein the routing requirements (324) include one or more of a bill of materials (BOM), schematic metadata, a netlist, a description of components and component groups to be connected, a description of external connections to be connected, or from-to definitions.

4. The method of claim 1, wherein the unrouted layout design (322) includes a plurality of components, component groups, and external connections.

5. The method of claim 1, wherein the Al model (306) includes one or more of route order and priority, route bundling and channeling, route layer mapping, bias, and connection distribution, route distances and clearances beyond minimum rules, routing via patterns, rules, stacking and staggering, routing location restrictions, or fanout patterns and rules.

6. The method of claim 1, wherein the routing strategy is created (408) using an Al routing engine (308).

7. The method of claim 1, wherein the routing strategy is created (408) using an Al routing engine (308) and information including routing-specific interfaces, routing-specific power connections on specific component types, routing of decoupling, routing of digital, analog, and power distribution connections, or routing between specific parts.

8. The method of claim 1, wherein the routing strategy includes one or more of prioritizing nets for routing order, identifying bundles of from-to connections to be routed together, prioritizing bundles, calculating a local bias map for each of a plurality of layers, mapping from-to connections to a layer for routing, identifying rules for the net ordering within a bundle, identifying rules for bundle lengths, and identifying rules between bundles.

9. The method of claim 1, wherein creating (408) a routing strategy and creating (410) a physical routing plan include receiving modifications to the routing strategy from a user and receiving modification to the physical routing plan from the user.

10. A computer system (101) comprising a processor (111) and an accessible memory (107), the computer system (101) particularly configured to perform a process as in any of claims 1 -9.

11. A non-transitory computer-readable medium (107) encoded with executable instructions that, when executed, cause one or more computer systems (100) to perform a process as in any of claims 1 -9.

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