Metering sampling circuit in which isolation is implemented by means of high resistance

Abstract

A metering sampling circuit in which isolation is implemented by means of high resistance, comprising a current limiting and voltage dividing module, an analog control module, an operational amplifier module, a metering module, and an MCU. The metering sampling circuit can be adapted to three-phase three-wire and three-phase four-wire voltage sampling, and performs impedance adjustment by means of an operational amplifier circuit before a sampling signal passes through the metering module, so as to obtain a stable metering sampling signal. The sampling circuit has the advantages of being low in cost, stable, and reliable, and is greatly beneficial to the popularization, application, and maintenance of smart electricity meters.

Description

A metering sampling circuit that achieves isolation through high impedance Technical Field

[0001] This invention relates to the field of smart meter sampling circuits, and employs a high-impedance isolation method to meet the voltage sampling circuit requirements of three-phase four-wire and three-phase three-wire wiring for electricity meters. Background Technology

[0002] With the development of science and technology, the demand for electricity in industry, agriculture, commerce and residential life is increasing day by day. People are trading electricity more and more frequently. Electricity meters are measuring instruments that measure the amount of electricity transactions. They have high technical requirements, and are required to be accurate, stable and reliable in the long term.

[0003] Currently, voltage sampling is mainly achieved through two methods: voltage transformer sampling and resistance sampling. In transformer sampling, the primary winding converts voltage into current by connecting a current-limiting resistor in series with the circuit. After passing through the transformer, the secondary winding outputs a current signal, which is then converted into the required voltage signal by a sampling resistor. This signal is then sampled by an ADC chip to achieve signal acquisition. In resistance sampling, a small voltage signal is obtained by voltage division using multiple resistors, and then sampled by an ADC chip to achieve signal acquisition.

[0004] In actual design, voltage transformers are simpler for safety reasons, but considering cost and structural limitations, transformers are not the optimal choice. When resistance sampling is used, the problem of connecting the front-end N-phase and the rear-end ground wire together must be considered. In this case, the ground wire of the energy meter is the N-phase of the mains power, which poses a safety hazard. This method has high safety requirements.

[0005] When dealing with different power systems, a three-phase four-wire energy meter can use the external neutral line N as the zero-point voltage inside the energy meter, while a three-phase three-wire connection method lacks an external neutral line as a reference, so different internal circuits need to be designed according to different connection methods.

[0006] In addition, during actual use, due to the complexity of external usage scenarios, the accuracy of the internal sampling signal of the electricity meter can be affected by the different impedance values ​​in the circuit loop.

[0007] Summary of the Invention

[0008] The purpose of this invention is to address the issues of accuracy in voltage sampling of electricity meters and internal switching between three-phase three-wire and three-phase four-wire systems. It proposes a metering sampling circuit that achieves isolation through high impedance. This circuit effectively reduces costs, improves structural limitations, meets safety standards, and enables the electricity meter to perform internal switching between three-phase three-wire and three-phase four-wire systems without being affected by external factors, thus achieving relatively stable metering sampling.

[0009] The technical solution of this invention is:

[0010] This invention provides a metering sampling circuit that achieves isolation through high impedance, comprising: a current limiting voltage divider module, an analog control module, an operational amplifier module, a metering module, and an MCU;

[0011] The three-phase AC voltage source is divided by a current-limiting voltage divider module, and the resulting voltage divider signal is connected to the analog control module. The control signal input terminal of the analog control module is connected to the control port line of the MCU, receiving the control signal from the MCU and switching between three-phase three-wire and three-phase four-wire sampling modes. The output terminal of the analog control module is connected to the operational amplifier module, which connects the impedance-adjusted voltage signal to the metering module to achieve voltage sampling. The metering module is connected to the MCU.

[0012] Furthermore, the current limiting voltage divider module is a high-resistance resistor voltage divider circuit connected in series on lines A, B, C and N respectively, including current limiting circuit UA, current limiting circuit UB, current limiting circuit UC and current limiting circuit UN, used to step down the voltage at the metering voltage front end;

[0013] To ensure compatibility with both three-phase three-wire and three-phase four-wire metering methods within the electricity meter, phase B is divided into two branches. When used for three-phase three-wire, phase B is used as the reference point. Similarly, phase N is divided into three branches. When used for three-phase four-wire, phase N is used as the reference point.

[0014] Furthermore, the current limiting circuit UA includes:

[0015] Voltage divider resistors R1-R6, one end of voltage divider resistor R1 is connected to UA, and the other end is connected in series with resistors R2-R6, the other end of resistor R6 is denoted as UA_P; the voltage divider resistors R1-R6 are all on the order of MΩ, which reduces the sampling voltage signal UA_P.

[0016] The sampling resistor R7 and the filter capacitor C1 are connected in parallel. One end of the sampling resistor R7 is connected in series with the voltage divider resistors R1-R6, and the other end is grounded. The filter capacitor C1 is connected in parallel across the two ends of the sampling resistor R7.

[0017] Furthermore, the current limiting circuit UB includes:

[0018] The series-connected voltage divider resistors R8-R11 form a first branch consisting of voltage divider resistors R12 and R13, and a second branch consisting of voltage divider resistors R14 and R15. One end of voltage divider resistor R8 is connected to UB, and the other end is connected in series with resistors R9-R11. The other end of resistor R11 is connected to one end of voltage divider resistor R12 in the first branch and one end of voltage divider resistor R14 in the second branch. The other end of resistor R12 is connected in series with resistor R13, and the other end of resistor R13 is denoted as UB_P1. The other end of resistor R14 is connected in series with resistor R15, and the other end of resistor R15 is denoted as UB_P2. The voltage divider resistors R8-R15 are all on the order of MΩ, which reduces the sampling voltage signals UB_P1 and UB_P2.

[0019] Sampling resistors R16 and R17 and filter capacitors C2 and C3 are used. One end of the sampling resistor R16 is connected in series with the first branch and the other end is grounded. The two ends of the sampling resistor R16 are connected in parallel with the filter capacitor C2. One end of the sampling resistor R17 is connected in series with the second branch and the other end is grounded. The two ends of the sampling resistor R17 are connected in parallel with the filter capacitor C3, forming two sampling branches UB_P1 and UB_P2.

[0020] Furthermore, the current limiting circuit UC includes:

[0021] Voltage divider resistors R18-R23, one end of voltage divider resistor R18 is connected to UC, and the other end is connected in series with resistors R19-R23. The other end of resistor R23 is denoted as UC_P. The voltage divider resistors R18-R23 are all on the order of MΩ, which reduces the sampling voltage signal UC_P.

[0022] The sampling resistor R24 ​​and the filter capacitor C4 are provided. One end of the sampling resistor R24 ​​is connected in series with the voltage divider resistors R18-R23, and the other end is grounded. The filter capacitor C4 is connected in parallel across the two ends of the sampling resistor R24.

[0023] Furthermore, the current limiting circuit UN includes:

[0024] The system consists of voltage divider resistors R25-R28, a third branch composed of voltage divider resistors R29 and R30, a fourth branch composed of voltage divider resistors R31 and R32, and a fifth branch composed of voltage divider resistors R33 and R34. One end of voltage divider resistor R25 is connected to UN, and the other end is connected in series with resistors R26-R28. The other end of resistor R28 is connected to one end of voltage divider resistor R29 in the third branch, one end of voltage divider resistor R31 in the fourth branch, and one end of voltage divider resistor R33 in the fifth branch. The other ends of resistors R29, R31, and R33 are connected in series with one end of resistors R30, R32, and R34, respectively. The other ends of resistors R30, R32, and R34 are denoted as UN_1, UN_2, and UN_3, respectively. All voltage divider resistors R25-R34 are on the order of MΩ, which reduces the sampling voltage signals UN_1, UN_2, and UN_3.

[0025] Sampling resistors R35, R36, and R37 and filter capacitors C5, C6, and C7 are used. One end of the sampling resistors R35, R36, and R37 is connected in series with the third, fourth, and fifth branches, respectively, and the other end is grounded. The two ends of the sampling resistors R35, R36, and R37 are connected in parallel with the filter capacitors C5, C6, and C7, respectively, forming three sampling branches UN_1, UN_2, and UN_3.

[0026] Furthermore, the analog control module samples the voltage output of the two branches of phase B and the three branches of phase N of the current limiting and voltage dividing module. The sampled voltage signals UB_P1, UB_P2, UN_1, UN_2 and UN_3 are connected to the signal input port of the analog control module after passing through the corresponding filter capacitors. The three channels A, B and C of the analog control module are controlled by the IO port of the MCU.

[0027] When connecting three-phase four-wire, the analog control module opens three branches of N phases, which are respectively used as the negative terminals of the sampling signal input terminals of the three phases UA, UB, and UC.

[0028] When connecting three phases and three wires, the analog control module disconnects phase N, and two sampling signals are output from the two channels of phase B as reference points for phases A and C respectively.

[0029] Furthermore, the three channels A, B, and C of the analog control module are controlled by the MCU's I / O ports. Each channel of the analog control module is controlled by one control terminal and two signal terminals. The two branches of phase B and the three branches of phase N are respectively input to the signal terminals of the three channels of the analog control module U2. The high and low levels of the control terminal select the three-phase three-wire or three-phase four-wire metering mode. When the control terminal is high, the corresponding channel is open and the signal passes through; when the control terminal is low, the corresponding channel is closed.

[0030] Furthermore, the operational amplifier module differentially processes the sampled signal selected by the analog control module and then transmits it to the metering module through a voltage follower.

[0031] Furthermore, the operational amplifier module includes differential amplifiers U3, U5, and U7 and voltage followers U4, U6, and U8. Sampling signals UA_P, UB_P, and UC_P are connected to the non-inverting inputs of the corresponding differential amplifiers U3, U5, and U7, and sampling signals VAN / VBN_1, VBN, and VCN / VBN_2 are connected to the inverting inputs of the corresponding differential amplifiers U3, U5, and U7. The outputs of differential amplifiers U3, U5, and U7 output single-channel signals, which are connected to the non-inverting inputs of the corresponding voltage followers U4, U6, and U8, respectively. The voltage followers U4, U6, and U8 output sampling signals U_AN / U_AB, U_BN, and U_CN / U_CB to the metering module to complete voltage sampling.

[0032] The beneficial effects of this invention are:

[0033] The sampling circuit of this invention effectively solves the safety hazards of resistive voltage division sampling. It can flexibly set the three-phase three-wire or three-phase four-wire metering mode according to the needs. No matter how the external environmental impedance changes, it can ensure the stability of the sampling data and not affect the accurate measurement of the meter.

[0034] The circuit of this invention is simple, low-cost, highly practical, and easy to implement.

[0035] Other features and advantages of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0036] The above and other objects, features and advantages of the present invention will become more apparent from the more detailed description of exemplary embodiments of the invention in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments of the invention.

[0037] Figure 1 shows a block diagram of the metering sampling circuit of the present invention, which achieves isolation through high impedance.

[0038] Figure 2 shows the circuit diagram of the current limiting voltage divider module;

[0039] Figure 3 shows a simplified schematic diagram of the current limiting voltage divider module;

[0040] Figure 4 shows a schematic diagram of the analog control module;

[0041] Figure 5 shows the schematic diagram of the operational amplifier module. Detailed Implementation

[0042] Preferred embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While preferred embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0043] As shown in Figures 1-5, the present invention provides a metering sampling circuit that achieves isolation through high impedance, comprising: a current limiting voltage divider module, an analog control module, an operational amplifier module, a metering module, and an MCU;

[0044] The three-phase AC voltage source is divided by a current-limiting voltage divider module, and the resulting voltage divider signal is connected to the analog control module. The control signal input terminal of the analog control module is connected to the control port line of the MCU, receiving the control signal from the MCU and switching between three-phase three-wire and three-phase four-wire sampling modes. The output terminal of the analog control module is connected to the operational amplifier module, which connects the impedance-adjusted voltage signal to the metering module to achieve voltage sampling. The metering module is connected to the MCU.

[0045] An AC voltage source generates a small voltage signal through a current-limiting voltage divider module and connects it to an analog control module. The analog control module switches between three-phase three-wire and three-phase four-wire sampling modes via an MCU I / O line and is connected to an operational amplifier module. The operational amplifier module then connects the impedance-adjusted voltage signal to a metering module, thereby achieving voltage sampling.

[0046] The current limiting and voltage divider module divides the voltage signal through a series of high-resistance resistors on the A / B / C / N lines, which serves to reduce the voltage at the metering voltage front end and also to meet the safety standard for current limiting and voltage reduction.

[0047] The current limiting circuit UA includes voltage divider resistors R1-R6 and a sampling resistor R7 connected in series with them. The voltage divider resistors R1-R6 are all on the order of MΩ, thereby reducing the voltage signal UA_P.

[0048] The current-limiting circuit UB includes voltage divider resistors R8-R11. After resistor R11, it branches into two branches: R12, R13, and R14, R15. A sampling resistor R16 is connected in series after resistor R13, and a sampling resistor R17 is connected in series after resistor R15, forming two sampling branches, UB_P1 and UB_P2, so that phase B can be used as the reference point during three-phase three-wire metering. The voltage divider resistors R8-R15 are all on the order of MΩ, thus reducing the voltage signal UB_P.

[0049] The current-limiting circuit UC includes voltage divider resistors R18-R23 and a sampling resistor R24 ​​connected in series with them. The voltage divider resistors R18-R23 are all on the order of MΩ, thus reducing the voltage signal UC_P. The current-limiting circuit UN adds resistors for isolation, including voltage divider resistors R25, R26, R27, and R28. After resistor R28, the circuit splits into three branches: R29, R30, R31, R32, and R33, R34. A sampling resistor R35 is connected in series after resistor R30, a sampling resistor R36 is connected in series after resistor R32, and a sampling resistor R37 is connected in series after resistor R34, forming three sampling branches UN_1, UN_2, and UN_3. This allows for three-phase four-wire metering with the N-phase as the reference point. The voltage divider resistors R25-R34 are all on the order of MΩ, thus reducing the voltage signal UN.

[0050] The aforementioned sampling signals UB_P1, UB_P2, UN_1, UN_2, and UN_3 are passed through filter capacitors C2, C3, C5, C6, and C7, respectively, and then connected to the signal input ports of the three channels of the switching chip. The control signals of the three channels are simulated and controlled by the MCU's I / O ports, and both control the output sampling signals.

[0051] In a three-phase four-wire connection, the sampling signal VAN output by the A channel of the switching chip is used as the negative terminal of the sampling signal input terminal of phase A, the sampling signal VBN output by the B channel of the switching chip is used as the negative terminal of the sampling signal input terminal of phase B, and the sampling signal VCN output by the C channel of the switching chip is used as the negative terminal of the sampling signal input terminal of phase C.

[0052] When connecting three phases and three wires, the switching chip disconnects phase N, and two sampling signals are output from the two channels of phase B as reference points for phases A and C respectively.

[0053] The operational amplifier module transmits the sampled signal, selected by the switch, to the metering module for processing. During this process, there is an impedance difference between the two circuits. To improve the stability and quality of the sampled signal, the voltage sampled signal is differentially processed before being transmitted to the metering chip via a voltage follower. The output of U9 is connected to the non-inverting inputs of U3, U5, and U7 via R61, R65, and R69 to increase the common-mode voltage.

[0054] The UA_P signal flows into the non-inverting input terminal of U3 through resistor R58; the VAN three-phase four-wire / VBN_1 three-phase three-wire signal flows into the inverting input terminal of U3 through resistor R59. The amplification factor is determined by the resistance ratio of R60 and R61, and the A-phase differential signal is output as a single-channel signal. Then, the A-phase voltage follower U4 outputs the sampling signal U_AN three-phase four-wire / U_AB three-phase three-wire.

[0055] The UB_P signal flows into the non-inverting input terminal of U5 via resistor R62. The VBN three-phase four-wire signal flows into the inverting input terminal of U5 via resistor R64. The amplification factor is determined by the resistance ratio of R64 and R63. The B-phase differential signal is output as a single-channel signal, and then the sampling signal U_BN three-phase four-wire is output via the B-phase voltage follower U6.

[0056] The UC_P signal flows into the non-inverting input terminal of U7 through resistor R66, and the VCN three-phase four-wire / VBN_2 three-phase three-wire signal flows into the inverting input terminal of U7 through resistor R67. The amplification factor is determined by the resistance ratio of R68 and R67, and the C-phase differential signal is output as a single-channel signal. Then, the C-phase voltage follower U8 outputs the sampling signal U_CN three-phase four-wire / U_CB three-phase three-wire.

[0057] In practice:

[0058] The current limiting voltage divider module simplifies the schematic diagram of the high voltage isolation scheme in Figure 3. As shown in Figure 3, the first four voltage divider resistors R1-R4 in phase A of Figure 2 are equivalent to resistor R1, the last two voltage divider resistors R5-R6 are equivalent to resistor R1', and the sampling resistor R7 is equivalent to resistor r1. That is, the current limiting circuit UA includes voltage divider resistors R1, R1' and sampling resistor r1 connected in series with them.

[0059] Similarly, the current limiting circuit UB includes a voltage divider resistor R2, which is then divided into two branches, R2', r2 and R2", r2.

[0060] The current limiting circuit UC includes voltage divider resistors R3 and R3' and a sampling resistor r3 connected in series with them;

[0061] The current limiting circuit UN includes a voltage divider resistor R4, which is then divided into three branches: R4', r4, R4", r4, and R4"', r4.

[0062] Assuming R1 = R2 = R3 = R4, R1' = R3' = 1 / 2R2' = 1 / 3R3', R2' = R2", R4' = R4" = R4"', since the voltage divider resistors R are all on the order of MΩ, the change in the sampling resistor r can be ignored, that is, r1 = r2 = r3 = r4.

[0063] The above circuit can be derived using the superposition theorem:

[0064] The voltage generated across r1 by phase A is:

[0065] The voltage generated across r2 by phase A is:

[0066] The voltage generated across r3 by phase A is:

[0067] The voltage generated across r4 by phase A is:

[0068] Similarly, the voltages generated by phases B and C across resistors r1, r2, r3, and r4 can be obtained.

[0069] The voltage generated across r1 by phase B is:

[0070] The voltage generated across r2 by phase B is:

[0071] The voltage generated across r3 by phase B is:

[0072] The voltage generated across r4 by phase B is:

[0073] The voltage generated across r1 by phase C is:

[0074] The voltage generated across r2 by phase C is:

[0075] The voltage generated across r3 by phase C is:

[0076] The voltage generated across r4 by phase C is:

[0077] Then the voltage across r1 is:

[0078] The voltage across r2 is:

[0079] The voltage across r3 is:

[0080] The voltage across r4 is:

[0081] After superimposing multiple loops, we can obtain:

[0082] Calculate the voltage-related parameters using the formula above.

[0083] The analog control module is a 3-to-2 analog switch, which is equivalent to three sets of single-pole double-throw switches. Each switch has one control terminal and two signal terminals.

[0084] Three digital control inputs, A, B, and C, can independently select the conduction direction of each group of analog switch positions. When the control input is high, the corresponding switch is open, and the signal can pass through; when the control input is low, the corresponding switch is closed, and the signal cannot pass through. When the INH input is high, all channels of the three groups of 2-to-1 analog switches are turned off.

[0085] To accommodate both three-phase three-wire and three-phase four-wire metering sampling, phase B sampling is divided into two branches, and phase N sampling is divided into three branches.

[0086] When the energy meter is in three-phase four-wire mode, the three branches of N phase are opened, which are respectively used as the negative terminals of the sampling signal input terminals of UA, UB, and UC. When the energy meter is in three-phase three-wire mode, the two branches of B phase are opened, which are respectively connected to UA and UC to output sampling signals UAB and UCB.

[0087] In the operational amplifier module, when the aforementioned switch is switched to three-phase four-wire mode, the A-phase voltage sampling signal UAP is connected to the non-inverting input of differential amplifier U3 via resistor R58, and VAN is connected to the inverting input of differential amplifier U3 via resistor R59. The non-inverting input of U3 is connected to the output of U9 via resistor R61, and resistors R70 and R71 are connected to the non-inverting input of U9 to increase the common-mode voltage. The ratio of resistors R60 and R60 determines the amplification factor of the single-phase signal at the output, and then the voltage follower U4 improves the signal quality to output the A-phase sampling signal U_AN, which is then sent to the metering module for processing. The B-phase voltage sampling signal UBP is connected to the non-inverting input of differential amplifier U5 via resistor R62, and VBN is connected to the inverting input of differential amplifier U5 via resistor R63. The non-inverting input of U5 is connected to the output of U9 via resistor R65. The B-phase sampling signal's amplification factor for the single-phase output signal is determined by the ratio of resistors R64 and R63. This amplification factor is then improved by voltage follower U6, resulting in the output B-phase sampling signal U_BN, which is sent to the metering module for processing. The C-phase voltage sampling signal UCP is connected to the non-inverting input of differential amplifier U7 via resistor R66, and VCN is connected to the inverting input of differential amplifier U7 via resistor R67. The non-inverting input of U8 and the output of U9 are connected via resistor R65. The C-phase sampling signal's amplification factor for the single-phase output signal is determined by the ratio of resistors R68 and R67. This amplification factor is then improved by voltage follower U8, resulting in the output C-phase sampling signal U_CN, which is sent to the metering module for processing.

[0088] When the above switches are switched to three-phase three-wire mode, U5 and U6 do not operate. The signal at the inverting input of differential amplifier U3 switches to VBN_1, and the rest is the same as in the three-phase four-wire A-phase case. The sampling signal U_AB is output by voltage follower U4 and sent to the metering module for processing. The signal at the inverting input of differential amplifier U7 switches to VBN_2, and the rest is the same as in the three-phase four-wire C-phase case. The sampling signal U_CB is output by voltage follower U8 and sent to the metering module for processing.

[0089] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A metering sampling circuit that achieves isolation through high impedance, characterized in that... include: Current limiting and voltage divider module, analog control module, operational amplifier module, metering module, and MCU; The three-phase AC voltage source is divided by a current-limiting voltage divider module, and the resulting voltage divider signal is connected to the analog control module. The control signal input terminal of the analog control module is connected to the control port line of the MCU, receiving the control signal from the MCU and switching between three-phase three-wire and three-phase four-wire sampling modes. The output terminal of the analog control module is connected to the operational amplifier module, which connects the impedance-adjusted voltage signal to the metering module to achieve voltage sampling. The metering module is connected to the MCU.

2. The metering sampling circuit with isolation achieved through high impedance according to claim 1, characterized in that, The current limiting voltage divider module is a high-resistance resistor voltage divider circuit connected in series on lines A, B, C and N, including current limiting circuit UA, current limiting circuit UB, current limiting circuit UC and current limiting circuit UN, used to step down the voltage at the metering voltage front end; To ensure compatibility with both three-phase three-wire and three-phase four-wire metering methods within the electricity meter, phase B is divided into two branches. When used for three-phase three-wire, phase B is used as the reference point. Similarly, phase N is divided into three branches. When used for three-phase four-wire, phase N is used as the reference point.

3. The metering sampling circuit with isolation achieved through high impedance according to claim 2, characterized in that... The current limiting circuit UA includes: Voltage divider resistors R1-R6, one end of voltage divider resistor R1 is connected to UA, and the other end is connected in series with resistors R2-R6, with the other end of resistor R6 denoted as UA_P; voltage divider resistors R1-R6 Both are on the order of MΩ, which reduces the sampled voltage signal UA_P; The sampling resistor R7 and the filter capacitor C1 are connected in parallel. One end of the sampling resistor R7 is connected in series with the voltage divider resistors R1-R6, and the other end is grounded. The filter capacitor C1 is connected in parallel across the two ends of the sampling resistor R7.

4. The metering sampling circuit with isolation achieved through high impedance according to claim 2, characterized in that... The current limiting circuit UB includes: The series-connected voltage divider resistors R8-R11 form a first branch consisting of voltage divider resistors R12 and R13, and a second branch consisting of voltage divider resistors R14 and R15. One end of voltage divider resistor R8 is connected to UB, and the other end is connected in series with resistors R9-R11. The other end of resistor R11 is connected to one end of voltage divider resistor R12 in the first branch and one end of voltage divider resistor R14 in the second branch. The other end of resistor R12 is connected in series with resistor R13, and the other end of resistor R13 is denoted as UB_P1. The other end of resistor R14 is connected in series with resistor R15, and the other end of resistor R15 is denoted as UB_P2. The voltage divider resistors R8-R15 are all on the order of MΩ, which reduces the sampling voltage signals UB_P1 and UB_P2. Sampling resistors R16 and R17 and filter capacitors C2 and C3 are used. One end of the sampling resistor R16 is connected in series with the first branch and the other end is grounded. The two ends of the sampling resistor R16 are connected in parallel with the filter capacitor C2. One end of the sampling resistor R17 is connected in series with the second branch and the other end is grounded. The two ends of the sampling resistor R17 are connected in parallel with the filter capacitor C3, forming two sampling branches UB_P1 and UB_P2.

5. The metering sampling circuit with isolation achieved through high impedance according to claim 2, characterized in that... The current limiting circuit UC includes: Voltage divider resistors R18-R23, one end of voltage divider resistor R18 is connected to UC, and the other end is connected in series with resistors R19-R23. The other end of resistor R23 is denoted as UC_P. The voltage divider resistors R18-R23 are all on the order of MΩ, which reduces the sampling voltage signal UC_P. The sampling resistor R24 ​​and the filter capacitor C4 are provided. One end of the sampling resistor R24 ​​is connected in series with the voltage divider resistors R18-R23, and the other end is grounded. The filter capacitor C4 is connected in parallel across the two ends of the sampling resistor R24.

6. The metering sampling circuit with isolation achieved through high impedance according to claim 2, characterized in that... The current limiting circuit UN includes: The system consists of voltage divider resistors R25-R28, a third branch composed of voltage divider resistors R29 and R30, a fourth branch composed of voltage divider resistors R31 and R32, and a fifth branch composed of voltage divider resistors R33 and R34. One end of voltage divider resistor R25 is connected to UN, and the other end is connected in series with resistors R26-R28. The other end of resistor R28 is connected to one end of voltage divider resistor R29 in the third branch, one end of voltage divider resistor R31 in the fourth branch, and one end of voltage divider resistor R33 in the fifth branch. The other ends of resistors R29, R31, and R33 are connected in series with one end of resistors R30, R32, and R34, respectively. The other ends of resistors R30, R32, and R34 are denoted as UN_1, UN_2, and UN_3, respectively. All voltage divider resistors R25-R34 are on the order of MΩ, which reduces the sampling voltage signals UN_1, UN_2, and UN_3. Sampling resistors R35, R36, and R37 and filter capacitors C5, C6, and C7 are used. One end of the sampling resistors R35, R36, and R37 is connected in series with the third, fourth, and fifth branches, respectively, and the other end is grounded. The two ends of the sampling resistors R35, R36, and R37 are connected in parallel with the filter capacitors C5, C6, and C7, respectively, forming three sampling branches UN_1, UN_2, and UN_3.

7. The metering sampling circuit with isolation achieved through high impedance according to claim 2, characterized in that... The analog control module samples the voltage output of the two branches of phase B and the three branches of phase N of the current limiting and voltage dividing module. The sampled voltage signals UB_P1, UB_P2, UN_1, UN_2 and UN_3 are connected to the signal input port of the analog control module after passing through the corresponding filter capacitors. The three channels A, B and C of the analog control module are controlled by the IO port of the MCU. When connecting three-phase four-wire, the analog control module opens three branches of N phases, which are respectively used as the negative terminals of the sampling signal input terminals of the three phases UA, UB, and UC. When connecting three phases and three wires, the analog control module disconnects phase N, and two sampling signals are output from the two channels of phase B as reference points for phases A and C respectively.

8. The metering sampling circuit with isolation achieved through high impedance according to claim 7, characterized in that... The three channels A, B, and C of the analog control module are controlled by the MCU's I / O ports. Each channel of the analog control module is controlled by one control terminal and two signal terminals. The two branches of phase B and the three branches of phase N are respectively input to the signal terminals of the three channels of the analog control module U2. The high and low levels of the control terminal select the three-phase three-wire or three-phase four-wire metering mode. When the control terminal is high, the corresponding channel is open and the signal passes through; when the control terminal is low, the corresponding channel is closed.

9. The metering sampling circuit with isolation achieved through high impedance according to claim 1, characterized in that... The operational amplifier module differentially processes the sampled signal selected by the analog control module, and then transmits it to the metering module through a voltage follower.

10. The metering sampling circuit with isolation achieved through high impedance according to claim 8, characterized in that... The operational amplifier module includes differential amplifiers U3, U5, and U7, and voltage followers U4, U6, and U8. Sampling signals UA_P, UB_P, and UC_P are connected to the non-inverting inputs of the corresponding differential amplifiers U3, U5, and U7, respectively. Sampling signals VAN / VBN_1, VBN, and VCN / VBN_2 are connected to the inverting inputs of the corresponding differential amplifiers U3, U5, and U7. The outputs of differential amplifiers U3, U5, and U7 are single-channel signals, which are connected to the non-inverting inputs of the corresponding voltage followers U4, U6, and U8, respectively. The voltage followers U4, U6, and U8 output sampling signals U_AN / U_AB, U_BN, and U_CN / U_CB to the metering module to complete voltage sampling.

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