Current measurement circuit, charging system and electronic device

Abstract

Provided in the embodiments of the present invention are a current measurement circuit, a charging system and an electronic device. A first measurement input port and a second measurement input port of a chip package structure are connected via a bonding wire structure, the impedance of N bonding wires of the chip package structure is used to implement a measurement resistor, and a current flowing through the bonding wire structure is measured by means of a programmable gain amplifier, so that a current sampling function is achieved; in the present invention, the bonding wires and the programmable gain amplifier are arranged inside the same chip package structure, so that the measurement accuracy of the bonding wire structure is not affected by external layout and wiring of the package, thus reducing the complexity of application of the current measurement circuit in chips and improving the chip integration level; in addition, using the bonding wire structure as a measurement resistor achieves low cost and small impedance, thus also reducing the current measurement cost.

Description

Current detection circuits, charging systems, and electronic devices Technical Field

[0001] This invention relates to the field of power electronics, and more particularly to a current detection circuit, a charging system, and an electronic device. Background Technology

[0002] To improve the safety of the power supply charging system, it is necessary to monitor parameters such as voltage, current, and temperature in the system circuit.

[0003] The commonly used detection method is to connect a sensing resistor in series in the current path. However, this sensing resistor needs to balance low resistance, high accuracy, low temperature drift, and high power dissipation, resulting in high cost. Furthermore, since the sensing resistor cannot be integrated into the chip, it leads to low chip integration density. Additionally, to ensure accurate accuracy control, the current sampling wiring must adhere to Kelvin connection methods, further increasing the complexity of chip applications.

[0004] Therefore, how to reduce the complexity of current detection circuits in chip applications, improve chip integration, and reduce current detection costs has become a pressing technical problem that the industry needs to solve. Summary of the Invention

[0005] This invention provides a current detection circuit, a charging system, and an electronic device, solving the technical problems of how to reduce the complexity of current detection circuits in chip applications, improve chip integration, and reduce current detection costs.

[0006] According to a first aspect of the present invention, an embodiment of the present invention provides a current detection circuit, comprising:

[0007] The chip packaging structure includes a first detection input port and a second detection input port, which are connected by a wire bonding structure.

[0008] The binding structure includes N binding wires, the first end of each binding wire is connected to the first detection input port, and the second end of each binding wire is connected to the second detection input port, where N is a positive integer;

[0009] A programmable gain amplifier is disposed within the chip package structure. The first input terminal of the programmable gain amplifier is coupled to the first detection input port, and its second input terminal is coupled to the second detection input port. Its output terminal outputs a first signal, which includes current information flowing through the binding structure.

[0010] Optionally, the current detection circuit further includes a calibration module, which is disposed within the chip package structure and includes:

[0011] A temperature detection unit is used to detect the temperature of the chip packaging structure in real time and output a second signal, the second signal including the current temperature information of the chip packaging structure;

[0012] A coefficient generation unit is used to output a third signal, the third signal including first temperature coefficient information;

[0013] A reference voltage generation unit is used to output M reference voltages, wherein the M reference voltages are different reference voltages of the binding structure at a set temperature, and M is a positive integer;

[0014] The calibration voltage generation unit is used to generate and output M calibration voltages based on the second signal, the third signal, the set temperature, and the M reference voltages.

[0015] Optionally, the first temperature coefficient is the same as the temperature coefficient of the binding wire.

[0016] Optionally, the calibration module further includes:

[0017] A gain adjustment unit is used to adjust the gain of the programmable gain amplifier so that the product of the total impedance of the binding structure and the gain is a set value.

[0018] Optionally, the calibration module further includes: a storage unit;

[0019] The storage unit stores the temperature coefficients of various types of binding wires and the gain adjustment values ​​of the programmable gain amplifier.

[0020] Optionally, the first detection input port, the second detection input port, and the binding structure form a Kelvin connection.

[0021] According to a second aspect of the present invention, an embodiment of the present invention provides a charging system including a current detection circuit as described in any of the first aspects of the present invention.

[0022] Optionally, the charging system includes an overcurrent protection module, which is disposed within the chip package structure and includes:

[0023] The comparison unit receives the first signal at its first input terminal and the first calibration voltage at its second input terminal. The comparison unit is used to compare the voltage value of the first signal with the voltage value of the first calibration voltage and output a fourth signal to the power-off control module.

[0024] A power-off control unit is used to control the charging system to power off when the fourth signal indicates that the voltage value of the first signal is greater than or equal to the voltage value of the first calibration voltage.

[0025] Optionally, the charging system includes a constant current control module, which is disposed within the chip package structure and includes:

[0026] An error amplification unit receives the first signal at its first terminal and a second calibration voltage at its second terminal. The error amplification module is used to compare the deviation between the voltage value of the first signal and the voltage value of the second calibration voltage, and outputs a fifth signal to the constant current control unit. The second calibration voltage corresponds to the target constant current.

[0027] The constant current control unit is used to adjust the current flowing through the binding structure based on the fifth signal until the current flowing through the binding structure is the target constant current.

[0028] Optionally, the charging system includes an analog-to-digital converter module disposed within the chip package structure, used to acquire the current value of the current flowing through the binding structure based on the first signal and the third calibration voltage.

[0029] According to a third aspect of the present invention, an embodiment of the present invention provides an electronic device including the charging system described in any of the second aspects of the present invention.

[0030] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0031] In the current detection circuit, charging system, and electronic device of this invention, the first and second detection input ports of the chip package structure are connected by a wire-binding structure. The impedance generated by the N wires of the chip package structure is used as the detection resistor. The current flowing through the wire-binding structure is detected by a programmable gain amplifier, thereby realizing the current sampling function. By placing the wires and the programmable gain amplifier inside the same chip package structure, the detection accuracy of the wire-binding structure is not affected by the external layout and wiring of the package. This reduces the complexity of the current detection circuit in chip applications, improves the chip integration, and also reduces the cost of current detection due to the low cost and low impedance of the wire-binding structure as the detection resistor.

[0032] Furthermore, by controlling the product of the total impedance and gain of the binding structure to a set value, the setting of a specific current value in the circuit is made independent of temperature changes or specific binding resistance values.

[0033] Furthermore, since the first detection input port and the second detection input port of the chip package structure are connected by a wire-binding structure, a Kelvin connection is formed between the first detection input port, the second detection input port and the wire-binding structure, eliminating the influence of the resistance of the wires and connection points on the current measurement results. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 is a schematic diagram of the current detection circuit in the prior art;

[0036] Figure 2 is a schematic diagram of the current detection circuit in one embodiment of the present invention;

[0037] Figure 3 is a schematic diagram of the current detection circuit in another embodiment of the present invention;

[0038] Figure 4 is a schematic diagram of the calibration module in one embodiment of the present invention;

[0039] Figure 5 is a schematic diagram of the calibration module in another embodiment of the present invention;

[0040] Figure 6 is a schematic diagram of the charging system in one embodiment of the present invention.

[0041] Explanation of reference numerals in the attached diagram: 10-Chip; 101-Constant current control module; 102-Protection module; R1-Current sensing resistor; PGA-Programmable gain amplifier; ADC-Analog-to-digital converter module; 20-Chip package structure; 201-First detection input port; 202-Second detection input port; 203-Wire binding structure; 11-Calibration module; 111-Temperature detection unit; 112-Coefficient generation unit; 113-Reference voltage generation unit; 114-Calibration voltage generation unit; 115-Gain adjustment unit; 116-Storage unit; 121-Comparison unit; 122-Power-off control unit; 131-Error amplification unit; 132-Constant current control unit. Detailed Implementation

[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0043] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0044] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0045] As described in the background section, existing technologies struggle to reduce the complexity of current detection circuits in chip applications, improve chip integration, and simultaneously reduce current detection costs. A detailed explanation follows with reference to the accompanying drawings.

[0046] Currently, current sampling is generally performed using an external current sensing resistor. In practical applications, the wiring must be in Kelvin connection mode. Please refer to Figure 1 for details. Figure 1 shows an embodiment of a current sensing circuit, including a current sensing resistor R1 disposed outside the chip 10, and a programmable gain amplifier PGA, a constant current control module 101, an analog-to-digital converter module ADC, and a protection module 102 inside the chip 10.

[0047] The first input terminal of the programmable gain amplifier (PGA) is coupled to the first terminal of the current sensing resistor R1, the second input terminal of the programmable gain amplifier (PGA) is coupled to the second terminal of the current sensing resistor R1, and the output terminal of the programmable gain amplifier (PGA) is coupled to the constant current control module 101, the analog-to-digital converter (ADC) module, and the protection module 102, respectively.

[0048] The current sensing resistor R1 needs to have a small resistance value, high accuracy, low temperature drift, and high power dissipation characteristics.

[0049] In this case, the voltage at the output of the programmable gain amplifier (PGA) is: V1 = I × R × A

[0050] Where I is the current flowing through the current sensing resistor R1, R is the resistance value of the current sensing resistor R1, and A is the internal gain of the programmable gain amplifier PGA.

[0051] However, this circuit is expensive, and since the current sensing resistor R1 cannot be integrated into chip 10, the integration density of chip 10 will be low. In addition, in order to achieve good accuracy control, the current sampling wiring also needs to pay attention to the Kelvin connection method, which increases the complexity of chip 10 application.

[0052] To address the aforementioned issues, this invention provides a current detection circuit. By connecting the first and second detection input ports of a chip package structure via a wire-binding structure, the impedance generated by the N wires of the chip package structure is used as a detection resistor. A programmable gain amplifier is then used to detect the current flowing through the wire-binding structure, thus achieving current sampling. This invention places the wires and the programmable gain amplifier within the same chip package structure, ensuring that the detection accuracy of the wire-binding structure is unaffected by the external layout and wiring of the package. This reduces the complexity of the current detection circuit in chip applications, improves chip integration, and, because the wire-binding structure as a detection resistor has advantages such as low cost and low impedance, it also reduces the cost of current detection.

[0053] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0054] Please refer to Figure 2, which is a current detection circuit according to an embodiment of the present invention, including:

[0055] The chip package structure 20 includes a first detection input port 201 and a second detection input port 202, and the first detection input port 201 and the second detection input port 202 are connected by a binding wire structure 203.

[0056] The binding structure 203 includes N binding wires, the first end of each binding wire is connected to the first detection input port 201, and the second end of each binding wire is connected to the second detection input port 202, where N is a positive integer;

[0057] A programmable gain amplifier (PGA) is disposed within the chip package structure 20. The first input terminal of the PGA is coupled to the first detection input port 201, and its second input terminal is coupled to the second detection input port 202. Its output terminal outputs a first signal, which includes current information flowing through the binding structure 203.

[0058] The first detection input port 201, the second detection input port 202, and the binding structure 203 form a Kelvin connection. Thus, this invention eliminates the influence of the resistance of the wires and connection points on the current measurement results.

[0059] In the example of Figure 1, the present invention places the bonding wire and the programmable gain amplifier (PGA) inside the same chip package structure 20, so that the detection accuracy of the bonding wire structure 203 is not affected by the external layout and wiring of the package, thereby reducing the complexity of the current detection circuit in the application of the chip 10 and improving the integration of the chip 10. Of course, the present invention is not limited to this, and the first detection input port 201 and the second detection input port 202 can also be pins extended outside the chip package structure 20.

[0060] In practical applications, the programmable gain amplifier (PGA) can be integrated into the chip 10 (as shown in Figure 1) or implemented as a separate circuit. The first input terminal of the programmable gain amplifier (PGA) is coupled to the first detection input port 201 via a binding wire, and its second input terminal is coupled to the second detection input port 202 via a binding wire. The resistance of these two binding wires is much greater than the resistance of the binding wire structure 203, so it does not affect the current acquisition.

[0061] Regarding the wire binding structure 203, the N binding wires can be regarded as an equivalent resistance. The cost of the binding wires is low. Therefore, the N binding wires of the present invention can reduce the cost of current sampling and improve the efficiency of the circuit in the integrated circuit. The total equivalent impedance of the binding wires is directly proportional to the length of the binding wires and inversely proportional to the number of binding wires. In order to reduce the impedance while improving the current carrying capacity and improving the reliability of the wire binding structure 203, multiple binding wires can be run in parallel in the wire binding structure 203, and the length of the binding wires can be controlled according to actual needs.

[0062] Because the impedance of the binding material is greatly affected by temperature, the voltage value of the first signal is: V2=I*Rw*A=I*Rw0(1+ΔT*a)*A

[0063] Wherein, I is the current flowing through the binding structure 203, Rw is the resistance of the binding structure 203 at the current temperature, A is the internal gain of the programmable gain generator (PGA), Rw0 is the resistance of the binding structure 203 at the set temperature, ΔT is the difference between the current temperature and the set temperature, and a is the temperature coefficient of the binding wire.

[0064] However, in actual production, the manufacturing precision of the binding wires is low, and the impedance of each binding wire may be different, resulting in inconsistent total impedance for each binding wire structure 203. In this case, the resistance value Rw0 of the aforementioned binding wire structure 203 at a set temperature can be considered to be selected from the normal distribution of resistance values ​​at a set temperature for the same batch of binding wire structures 203. Therefore, the circuit requires additional modules for correction and compensation to meet the current measurement accuracy requirements.

[0065] Please refer to Figure 3. The current detection circuit further includes a calibration module 11, which is disposed within the chip package structure 20 and includes:

[0066] Temperature detection unit 111 is used to detect the temperature of the chip packaging structure 20 in real time and output a second signal, the second signal including the current temperature information of the chip packaging structure 20;

[0067] The coefficient generation unit 112 is used to output a third signal, the third signal including the first temperature coefficient information;

[0068] The reference voltage generation unit 113 is used to output M reference voltages, wherein the M reference voltages are different reference voltages of the binding structure 203 at a set temperature, and M is a positive integer;

[0069] The calibration voltage generation unit 114 is used to generate and output M calibration voltages based on the second signal, the third signal, the set temperature, and the M reference voltages.

[0070] The calibration voltage can be understood as the different voltage values ​​required by different subsequent circuits. Specifically, the calibration voltage value VRx = VRx0(1 + ΔT × b)

[0071] Where x is an integer, and M≥x≥1;

[0072] VRx0 is the xth reference voltage, ΔT is the difference between the current temperature and the set temperature, and b is the first temperature coefficient.

[0073] Now, assuming that when the voltage value of the first signal is VR1, the current flowing through the binding structure 203 is the set overcurrent protection current, then the current value of the set overcurrent protection current is...

[0074] In one embodiment, the first temperature coefficient b is the same as the temperature coefficient a of the binding wire.

[0075] In this case, the current value of the set overcurrent protection current

[0076] It can be seen that, after correction and compensation, the current value of the overcurrent protection current setting is not affected by temperature.

[0077] In a preferred embodiment, to prevent the different total impedances of the same batch of binding structures 203 from affecting subsequent circuits (e.g., causing different current values ​​for setting the overcurrent protection current), please refer to Figure 4. The calibration module 11 further includes:

[0078] The gain adjustment unit 115 is used to adjust the gain of the programmable gain amplifier PGA so that the product of the total impedance of the binding structure 203 and the gain is a set value.

[0079] Specifically, the set value B = Rw0 × c × A

[0080] Where c is the gain adjustment value.

[0081] As an example, the current value for setting the overcurrent protection current mentioned above...

[0082] By setting a gain adjustment value, the present invention can adjust the current value of the overcurrent protection current of the wire binding structure 203 with different resistance values ​​to be the same.

[0083] After completing the testing and calibration of the above parameters, in one embodiment, please refer to Figure 5, the calibration module 11 further includes: a storage unit 116;

[0084] The storage unit 116 stores the temperature coefficients of various types of binding wires and the gain adjustment values ​​of the programmable gain amplifier (PGA).

[0085] In practical applications, the calibration module 11 obtains the temperature coefficient of the corresponding binding material and the gain adjustment value c of the programmable gain amplifier (PGA) from the storage unit 116 to match the temperature coefficients of different binding materials and adapt to the impedance (Rw0) of different binding structures. By setting the gain adjustment value, it ensures that the set current value required by subsequent circuits is the same, which has high flexibility and versatility. It can be extended to more current sampling-related application areas.

[0086] In addition, referring to Figure 6, the present invention also provides a charging system including the aforementioned current detection circuit.

[0087] In one embodiment, referring to Figure 6, the charging system includes an overcurrent protection module, which is disposed within the chip package structure 20 and includes:

[0088] The comparison unit 121 receives the first signal at its first input terminal and receives the first calibration voltage at its second input terminal. The comparison unit 121 is used to compare the voltage value of the first signal with the voltage value of the first calibration voltage and output a fourth signal to the power-off control module.

[0089] The power-off control unit 122 is used to control the charging system to power off (not shown in the figure) when the fourth signal represents the voltage value of the first signal being greater than or equal to the voltage value of the first calibration voltage.

[0090] In the example of Figure 6, the comparison unit 121 includes a comparator 1211, whose non-inverting input receives the first signal, whose inverting input receives the first calibration voltage, and whose output outputs the fourth signal. For example, the first calibration voltage can be VR1 as described above.

[0091] In one embodiment, referring to Figure 6, the charging system includes a constant current control module, which is disposed within the chip package structure 20 and includes:

[0092] Error amplification unit 131 receives the first signal at its first terminal and receives the second calibration voltage VR2 at its second terminal. The error amplification module is used to compare the deviation between the voltage value of the first signal and the voltage value of the second calibration voltage VR2, and outputs a fifth signal to the constant current control unit 132. The second calibration voltage VR2 corresponds to the target constant current.

[0093] The constant current control unit 132 is used to adjust the current flowing through the binding structure 203 based on the fifth signal until the current flowing through the binding structure 203 is the target constant current.

[0094] In the example of Figure 6, the error amplification unit 131 includes an error amplifier 1311, which receives the first signal at its non-inverting input, receives the second calibration voltage at its inverting input, and outputs the fifth signal at its output.

[0095] In one embodiment, referring to FIG6, the charging system includes an analog-to-digital converter (ADC) module disposed within the chip package structure 20, and is used to acquire the current value of the current flowing through the binding structure 203 based on the first signal and the third calibration voltage VR3.

[0096] In practical applications, the first calibration voltage VR1, the second calibration voltage VR2, and the third calibration voltage VR3 mentioned above are different from each other and can be stored in the storage unit 106 for retrieval.

[0097] Furthermore, embodiments of the present invention also provide an electronic device that includes the aforementioned charging system. For example, the electronic device may be a fast charging plug, a communication device, etc., and the present invention does not limit it in this regard.

[0098] In summary, this invention connects the first and second detection input ports of the chip package structure via a wire-binding structure. The impedance generated by the N wires of the chip package structure is used as the detection resistor. A programmable gain amplifier is used to detect the current flowing through the wire-binding structure, thus achieving current sampling. By placing the wires and the programmable gain amplifier within the same chip package structure, the detection accuracy of the wire-binding structure is not affected by the external layout and wiring of the package. This reduces the complexity of the current detection circuit in chip applications, improves chip integration, and, because the wire-binding structure has advantages such as low cost and low impedance as the detection resistor, it also reduces the cost of current detection.

[0099] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A current detection circuit, characterized in that, include: The chip packaging structure includes a first detection input port and a second detection input port, which are connected by a wire bonding structure. The binding structure includes N binding wires, the first end of each binding wire is connected to the first detection input port, and the second end of each binding wire is connected to the second detection input port, where N is a positive integer; A programmable gain amplifier is disposed within the chip package structure. The first input terminal of the programmable gain amplifier is coupled to the first detection input port, and its second input terminal is coupled to the second detection input port. Its output terminal outputs a first signal, which includes current information flowing through the binding structure.

2. The current detection circuit as described in claim 1, characterized in that, The current detection circuit further includes a calibration module, which is disposed within the chip package structure and includes: A temperature detection unit is used to detect the temperature of the chip packaging structure in real time and output a second signal, the second signal including the current temperature information of the chip packaging structure; A coefficient generation unit is used to output a third signal, the third signal including first temperature coefficient information; A reference voltage generation unit is used to output M reference voltages, wherein the M reference voltages are different reference voltages of the binding structure at a set temperature, and M is a positive integer; The calibration voltage generation unit is used to generate and output M calibration voltages based on the second signal, the third signal, the set temperature, and the M reference voltages.

3. The current detection circuit as described in claim 2, characterized in that, The first temperature coefficient is the same as the temperature coefficient of the binding wire.

4. The current detection circuit as described in claim 3, characterized in that, The calibration module also includes: A gain adjustment unit is used to adjust the gain of the programmable gain amplifier so that the product of the total impedance of the binding structure and the gain is a set value.

5. The current detection circuit as described in claim 4, characterized in that, The calibration module further includes: a storage unit; The storage unit stores the temperature coefficients of various types of binding wires and the gain adjustment values ​​of the programmable gain amplifier.

6. The current detection circuit as described in claim 1, characterized in that, The first detection input port, the second detection input port, and the binding structure form a Kelvin connection.

7. A charging system, characterized in that, Includes the current detection circuit as described in any one of claims 1 to 5.

8. The charging system as described in claim 6, characterized in that, The charging system includes an overcurrent protection module, which is disposed within the chip package structure and includes: The comparison unit receives the first signal at its first input terminal and the first calibration voltage at its second input terminal. The comparison unit is used to compare the voltage value of the first signal with the voltage value of the first calibration voltage and output a fourth signal to the power-off control module. A power-off control unit is used to control the charging system to power off when the fourth signal indicates that the voltage value of the first signal is greater than or equal to the voltage value of the first calibration voltage.

9. The charging system as described in claim 6, characterized in that, The charging system includes a constant current control module, which is disposed within the chip package structure and includes: An error amplification unit receives the first signal at its first terminal and a second calibration voltage at its second terminal. The error amplification module is used to compare the deviation between the voltage value of the first signal and the voltage value of the second calibration voltage, and outputs a fifth signal to the constant current control unit. The second calibration voltage corresponds to the target constant current. The constant current control unit is used to adjust the current flowing through the binding structure based on the fifth signal until the current flowing through the binding structure is the target constant current.

10. The charging system as described in claim 6, characterized in that, The charging system includes an analog-to-digital converter module, which is disposed within the chip package structure and is used to acquire the current value of the current flowing through the binding structure based on the first signal and the third calibration voltage.

11. An electronic device, characterized in that, include: The charging system as described in any one of claims 6 to 9.

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