Communication method, apparatus and system

Abstract

The present application relates to the technical field of communications, and discloses a communication method, apparatus and system. The method comprises: acquiring, by a first communication apparatus, a first sequence; and processing a received signal on the basis of the first sequence to detect a synchronization signal, wherein the synchronization signal is obtained on the basis of a second sequence, the first sequence and the second sequence are ideally cross-correlated, and the second sequence comprises at least one element having a value of 0. In the method, since the second sequence comprises at least one element having a value of 0, and the first sequence and the second sequence are ideally cross-correlated, the detection complexity of the synchronization signal can be reduced while ensuring the detection performance of the synchronization signal.

Description

Communication method, apparatus and system

[0001] Cross-reference to Related Applications

[0002] This application claims priority to the Chinese Patent Application No. 202410965134.0, filed on July 17, 2024, and entitled "A communication method, apparatus and system", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the field of communication technology, and in particular to a communication method, apparatus and system. BACKGROUND

[0004] In a wireless communication system, a synchronization signal is used for time-frequency synchronization between a terminal device and a network device. For example, the network device can send a synchronization signal (SS) / physical broadcast channel (PBCH) block (SS / PBCH block), and then the terminal device can perform time-frequency synchronization and obtain information of the cell (such as physical cell identity (PCI)) after receiving the SS / PBCH block, so as to access the cell. The SS / PBCH block includes a primary synchronization signal (PSS), a secondary synchronization signal (SSS) and a physical broadcast channel (PBCH).

[0005] The terminal device performs time-frequency synchronization based on the primary synchronization signal, and therefore the detection complexity of the primary synchronization signal is high. How to reduce the detection complexity of the primary synchronization signal still needs further research. SUMMARY

[0006] The present application provides a communication method, apparatus and system for reducing the detection complexity of a synchronization signal.

[0007] In a first aspect, an embodiment of the present application provides a communication method, which can be applied to a first communication device, which can be a terminal device or a component (e.g., a chip or a circuit) in a terminal device. For example, in the method provided in the first aspect, the first communication device acquires a first sequence; and processes a received signal according to the first sequence to detect a synchronization signal, the synchronization signal being obtained based on a second sequence; wherein the first sequence and the second sequence are ideally cross-correlated, and the second sequence includes at least one element with a value of 0.

[0008] With the above method, since the second sequence includes at least one element with a value of 0 and the first sequence and the second sequence are ideally cross-correlated, the detection complexity of the synchronization signal can be reduced while the detection performance of the synchronization signal is ensured.

[0009] In a possible design, processing the received signal according to the first sequence includes: performing DFT processing on the first sequence to obtain a third sequence; mapping the third sequence onto a plurality of subcarriers and performing IFFT processing; and performing correlation processing on the received signal according to the sequence after IFFT processing; wherein the first sequence is denoted as [y(n)], the third sequence is denoted as [z(n)], n = 0, 1, 2, …, L-1, and the first sequence and the third sequence satisfy:

[0010] In this way, the terminal device can directly perform correlation processing on the received signal in the time domain, without first performing DFT processing to transform the received signal to the frequency domain and then performing processing, thereby greatly reducing the detection complexity of the synchronization signal. In addition, since the second sequence includes at least one element with a value of 0, the number of addition operations and / or the number of multiplication operations in each correlation operation can be reduced, thereby further reducing the detection complexity of the synchronization signal.

[0011] In a possible design, processing the received signal according to the first sequence includes: oversampling the first sequence, and performing correlation processing on the received signal according to the sequence after oversampling; or downsampling the received signal, and performing correlation processing on the signal after downsampling according to the first sequence.

[0012] In this way, the terminal device can directly perform correlation processing on the received signal in the time domain, without first performing DFT processing to transform the received signal to the frequency domain and then performing processing, thereby greatly reducing the detection complexity of the synchronization signal. In addition, since the second sequence includes at least one element with a value of 0, the number of addition operations and / or the number of multiplication operations in each correlation operation can be reduced, thereby further reducing the detection complexity of the synchronization signal.

[0013] It can be understood that when the synchronization signal is a signal of a DFT-s-OFDM waveform, the synchronization signal is transmitted using a DFT-s-OFDM waveform to simulate a time-domain square wave, because the DFT-s-OFDM waveform can be compatible with signals of OFDM waveforms of other channels of the current system, thereby reducing interference on signals of other channels, and also enabling a terminal device to directly perform correlation processing on a received signal in the time domain. Therefore, the terminal device can perform correlation on a signal obtained by processing the first sequence through a DFT-s-OFDM waveform, or can directly perform correlation on the first sequence after oversampling (that is, repeating sequence elements), or can perform correlation on the first sequence after downsampling the received signal.

[0014] In a possible design, processing the received signal according to the first sequence includes: mapping the first sequence onto a plurality of subcarriers to obtain a frequency-domain sequence; performing DFT processing on the received signal to obtain a frequency-domain signal; performing conjugate point multiplication on the frequency-domain sequence and the frequency-domain signal, and performing IDFT processing on the sequence after the conjugate point multiplication.

[0015] In this way, because the second sequence includes at least one element with a value of 0, complexity required by multiplication operations in frequency-domain detection and complexity of IDFT can be reduced, and in turn, complexity of detection of the synchronization signal is reduced.

[0016] In a possible design, the number of elements with a value of 0 in the second sequence is (L-1) / 2, and L represents a length of the second sequence.

[0017] In a possible design, the second sequence further includes at least one element with a value of 1.

[0018] In a possible design, the second sequence is denoted as [x(n)], and the first sequence is denoted as [y(n)], n=0, 1, 2,..., L-1, and the second sequence and the first sequence satisfy: y(n)=1-2x(n), or y(n)=2x(n)-1.

[0019] It can be understood that the second sequence can be an m-sequence, and the above processing can make the second sequence and the first sequence satisfy ideal cross-correlation.

[0020] In a possible design, the second sequence further includes at least one element with a value of , and L represents a length of the second sequence.

[0021] It can be understood that the second sequence can be an m-sequence, and the number of 0 elements in the m-sequence with a length of L is (L-1) / 2. Therefore, to ensure the power normalization of the transmitted signal, a transmission power related factor needs to be multiplied

[0022] In a possible design, the second sequence is denoted as [x(n)], the first sequence is denoted as [y(n)], n=0, 1, 2,..., L-1, and the second sequence and the first sequence satisfy: Or where A is a constant.

[0023] It can be understood that the second sequence can be an m-sequence multiplied by a transmission power related factor. After the above processing, the second sequence and the first sequence can satisfy the ideal cross-correlation.

[0024] In a possible design, the second sequence is one of W sequences, the W sequences correspond to W recursive formulas one by one, and W is an integer greater than 1.

[0025] In this way, the W sequences can correspond to different recursive formulas, to facilitate guaranteeing the synchronization performance.

[0026] In a possible design, the W recursive formulas include any one of the following multiple items: s(n+7) = (s(n+1) + s(n)) mod 2; s(n+7) = (s(n+3) + s(n)) mod 2; s(n+7) = (s(n+5) + s(n+2) + s(n+1) + s(n)) mod 2.

[0027] In a second aspect, an embodiment of the present application provides a communication method, which can be applied to a second communication device, and the second communication device can be a network device or a component (such as a chip or a circuit) in the network device. For example, in the method provided in the second aspect, the second communication device generates a synchronization signal according to a second sequence; and transmits the synchronization signal; where the second sequence includes at least one element with a value of 0, the second sequence and a first sequence are ideally cross-correlated, and the first sequence is used to detect the synchronization signal.

[0028] In a possible design, generating the synchronization signal according to the second sequence includes: performing DFT processing on the second sequence to obtain a fourth sequence; mapping the fourth sequence to a plurality of subcarriers and performing IFFT processing to generate the synchronization signal; where the second sequence is denoted as [x(n)], the fourth sequence is denoted as [g(n)], n=0, 1, 2,..., L-1, and the second sequence and the fourth sequence satisfy:

[0029] In one possible design, the synchronization signal is generated according to a second sequence, including: mapping the second sequence onto a plurality of subcarriers, and performing IFFT processing to generate the synchronization signal.

[0030] In one possible design, the number of elements with value 0 in the second sequence is (L-1) / 2, where L represents the length of the second sequence.

[0031] In one possible design, the second sequence further includes at least one element with value 1.

[0032] In one possible design, the transmission power of the synchronization signal is a first power plus a power offset, and the power offset is equal to dB or 10log 10 [2L / (L+1)] dB, where L represents the length of the second sequence; and the first power is predefined or preconfigured.

[0033] In one possible design, the second sequence further includes at least one element with value , where L represents the length of the second sequence.

[0034] In one possible design, the transmission power of the synchronization signal is a first power, and the first power is predefined or preconfigured.

[0035] In one possible design, the second sequence is one of W sequences, and the W sequences correspond to W recursive formulas one by one, where W is an integer greater than 1.

[0036] In one possible design, the W recursive formulas include any of the following multiple items: s(n+7)=(s(n+1)+s(n))mod2; s(n+7)=(s(n+3)+s(n))mod2; s(n+7)=(s(n+5)+s(n+2)+s(n+1)+s(n))mod2.

[0037] It can be understood that the communication method provided by the second aspect corresponds to the communication method provided by the first aspect, and the beneficial effects of the related technical features in the second aspect can be referred to the description of the first aspect.

[0038] In a third aspect, an embodiment of the present application provides a communication method, including: generating a synchronization signal according to a second sequence, and transmitting the synchronization signal; processing a received signal according to a first sequence to detect the synchronization signal; where the first sequence and the second sequence have ideal cross-correlation, and the second sequence includes at least one element with value 0.

[0039] It can be understood that other technical features of the third aspect can refer to the descriptions of the first aspect and the second aspect, and will not be described herein.

[0040] In the fourth aspect, the communication apparatus has functions of the first aspect or the second aspect, for example, the communication apparatus includes modules or units or means for performing the functions of the first aspect or the second aspect. The functions or units or means can be implemented by hardware, or by software with hardware, or by a combination of hardware and software.

[0041] In a possible design of the communication apparatus, the communication apparatus includes a processing unit and a communication unit. The communication unit can be configured to transceive signals to implement communication between the communication apparatus and another apparatus. The processing unit can be configured to perform some internal operations of the communication apparatus. The processing unit and the communication unit can perform functions corresponding to the operations of the first aspect or the second aspect.

[0042] In a possible design of the communication apparatus, the communication apparatus includes a processor. The processor can be configured to be coupled with a memory. The memory can store computer programs or instructions necessary for implementing the functions of the first aspect or the second aspect. The processor can execute the computer programs or instructions stored in the memory. When the computer programs or instructions are executed, the communication apparatus can implement the method in any possible design or implementation manner of the first aspect or the second aspect.

[0043] In a possible design of the communication apparatus, the communication apparatus includes a processor and a memory. The memory can store computer programs or instructions necessary for implementing the functions of the first aspect or the second aspect. The processor can execute the computer programs or instructions stored in the memory. When the computer programs or instructions are executed, the communication apparatus can implement the method in any possible design or implementation manner of the first aspect or the second aspect.

[0044] In a possible design of the communication apparatus, the communication apparatus includes a processor and an interface circuit. The processor can be configured to communicate with another apparatus through the interface circuit, and perform the method in any possible design or implementation manner of the first aspect or the second aspect.

[0045] It can be understood that, in the fourth aspect, the processor can be implemented by hardware or software. When implemented by hardware, the processor can be a logic circuit, an integrated circuit, or the like. When implemented by software, the processor can be a general-purpose processor, which implements by reading software code stored in the memory. In addition, the processor can be one or more, and the memory can be one or more. The memory can be integrated with the processor, or the memory and the processor can be separately arranged. In the implementation process, the memory can be integrated on the same chip as the processor, or can be separately arranged on different chips. The type of the memory and the arrangement manner of the memory and the processor are not limited in the embodiments of the present application.

[0046] In a fifth aspect, the present application provides a communication system, which can include a first communication device and a second communication device; wherein the first communication device is configured to perform the method of the first aspect, and the second communication device is configured to perform the method of the second aspect.

[0047] In a sixth aspect, the present application provides a computer readable storage medium, which stores a computer program (or computer readable instructions). When a computer reads and executes part or all of the computer readable instructions, the method in any possible design of the first aspect or the second aspect is performed.

[0048] For example, the computer readable storage medium can be any available medium that can be accessed by a computer. For example, but not limited to: the computer readable medium can include a non-transitory computer readable medium, a random access memory (RAM), a read-only memory (ROM), an electrically EPROM (EEPROM), a CD-ROM or other optical disk storage, a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer.

[0049] In a seventh aspect, the present application provides a computer program product, which, when read and executed by a computer, causes the method in any possible design of the first aspect or the second aspect to be performed.

[0050] In an eighth aspect, the present application provides a chip (or chip system), which includes a processor, the processor is coupled with a memory, and the memory stores a computer program; the processor is configured to call part or all of the computer program in the memory, so that the method in any possible design of the first aspect or the second aspect is performed. BRIEF DESCRIPTION OF DRAWINGS

[0051] FIG. 1 is a schematic diagram of an architecture of a communication system to which embodiments of the present application are applied;

[0052] FIG. 2 is a schematic diagram of an SS / PBCH block provided by an embodiment of the present application;

[0053] FIG. 3 is a schematic diagram of a basic structure of a feedback shift register provided by an embodiment of the present application;

[0054] FIG. 4 is a schematic diagram of a flow corresponding to a communication method provided by an embodiment of the present application;

[0055] FIG. 5 is a schematic diagram of two time-domain signals provided by an embodiment of the present application;

[0056] FIG. 6 is a possible exemplary block diagram of an apparatus involved in an embodiment of the present application;

[0057] FIG. 7 is a schematic diagram of a structure of a communication apparatus provided by an embodiment of the present application. DETAILED DESCRIPTION

[0058] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. The present application will present various aspects, embodiments or features around systems that can include a plurality of devices, components, modules, etc. It should be understood and appreciated that each system can include additional devices, components, modules, etc., and / or can not include all the devices, components, modules, etc. discussed in connection with the drawings. In addition, combinations of these solutions can also be used.

[0059] In the embodiments of the present application, the words "exemplarily", "for example", and the like are used to represent examples, illustrations or descriptions. Any embodiment or design scheme described as "example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the word "example" is used to present the concept in a specific way. In the embodiments of the present application, "of", "corresponding" and "corresponding" are sometimes used interchangeably, and it should be pointed out that when their differences are not emphasized, the meanings they express are consistent.

[0060] The technical solutions of the embodiments of the present application can be applied to various wireless communication systems, such as a universal mobile telecommunications system (UMTS), a wireless local area network (WLAN), a short-range wireless communication system (such as a sidelink, wireless fidelity (Wi-Fi), Bluetooth, and the like), a wired network, a vehicle to everything (V2X) communication system, a device-to-device (D2D) communication system, a vehicle networking communication system, a 4th generation (4G) mobile communication system (such as a long term evolution (LTE) system), an LTE frequency division duplex (FDD) system, an LTE time division duplex (TDD), a worldwide interoperability for microwave access (WiMAX) communication system, a 5th generation (5G) mobile communication system (such as a new radio (NR) system), a future communication system, or other similar communication systems, and the like, without limitation. The embodiments of the present application are described by taking a communication system shown in FIG. 1 as an example, and when the technical solutions of the embodiments of the present application are applied to other communication systems, devices, components, modules, and the like in the embodiments can be replaced by corresponding devices, components, modules in other communication systems, without limitation.

[0061] FIG. 1 is a schematic diagram of an architecture of a communication system to which embodiments of the present application are applied. As shown in FIG. 1, the communication system includes an access network 100. Optionally, the communication system can also include a core network 200 and an Internet 300. The access network 100 can include at least one network device, such as 110a and 110b in FIG. 1, and at least one terminal device, such as 120a-120j in FIG. 1. Among them, 110a is a base station, 110b is a micro station, 120a, 120e, 120f and 120j are mobile phones, 120b is a car, 120c is a fuel dispenser, 120d is a home access point (HAP) arranged indoors or outdoors, 120g is a notebook computer, 120h is a printer, and 120i is a drone. Among them, the same terminal device or network device can provide different functions in different application scenarios. For example, the mobile phones in FIG. 1 are 120a, 120e, 120f and 120j. The mobile phone 120a can access the base station 110a, connect to the car 120b, communicate directly with the mobile phone 120e and access the HAP. The car 120b can access the HAP and communicate directly with the mobile phone 120a. The mobile phone 120f can access the micro station 110b, connect to the notebook computer 120g and connect to the printer 120h. The mobile phone 120j can control the drone 120i.

[0062] (1) Network device

[0063] A network device is a network-side device with wireless transceiving function. The network device can be a device in a radio access network (RAN) that provides wireless communication function for a terminal device, referred to as a RAN device. The RAN can be an access network in the 3rd generation partnership project (3GPP), such as 4G, 5G or future network. The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a communication network of two or more of the above networks.

[0064] The RAN device can also be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next generation NodeB (gNB) in a 5G mobile communication system, a base station in a future mobile communication system or an access node in a WiFi system, etc.

[0065] The RAN device can also be a module or unit that completes the functions of the base station part, for example, can be a central unit (CU), can also be a distributed unit (DU), and can also be a radio unit (RU). The CU here completes the functions of the radio resource control protocol (RRC) and the PDCP of the base station, and can also complete the function of the service data adaptation protocol (SDAP); the CU can be further divided into a CU control panel (CP) (CU-CP) and a CU user panel (UP) (CU-UP). The DU completes the functions of the RLC layer and the MA layer of the base station, and can also complete part of the physical layer or all the physical layer functions. For specific descriptions of the above-mentioned protocol layers, please refer to the relevant technical specifications of 3GPP. The CU and the DU can be separately arranged, or can also be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or a radio frequency unit, such as a remote radio unit (RRU), an active antenna processing unit (AAU), or a remote radio head (RRH). In different systems, the CU, the DU or the RU can also have different names, but those skilled in the art can understand their meanings. For example, in the ORAN system, the CU can also be referred to as an O-CU (open CU), the DU can also be referred to as an O-DU, and the RU can also be referred to as an O-RU. Any one of the CU (or CU-CP, CU-UP), the DU and the RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module. The RAN device can be a macro base station (such as 110a in FIG. 1), can also be a micro base station or an indoor station (such as 110b in FIG. 1), and can also be a relay node or a donor node, etc. The embodiments of the present application do not limit the specific technologies and specific device forms adopted by the network device.

[0066] In the embodiments of the present application, the functions of the network device can also be executed by a module (such as a chip) in the network device, or can also be executed by a control subsystem containing the functions of the network device. The control subsystem containing the functions of the network device here can be a control center in the above-mentioned application scenarios such as smart grid, industrial control, intelligent transportation, and smart city.

[0067] (2) Terminal device

[0068] A terminal device is a user-side device with wireless transceiving function. The terminal device can also be referred to as a terminal, a user equipment (UE), a mobile station, a mobile terminal, etc. The terminal device can be widely applied in various scenarios, such as device-to-device (D2D), vehicle to everything (V2X) communication, machine-type communication (MTC), internet of things (IOT), virtual reality, augmented reality, industrial control, automatic driving, remote medical treatment, smart power grid, smart furniture, smart office, smart wear, smart transportation, smart city, etc. The terminal device can be a mobile phone, a tablet computer, a computer with wireless transceiving function, a wearable device, a vehicle, a drone, a helicopter, an airplane, a ship, a robot, a mechanical arm, a smart home device, etc. In the embodiments of the present application, the device for implementing the function of the terminal device can be the terminal device, or a device capable of supporting the terminal device to implement the function, such as a chip system or a combination device or component that can implement the function of the terminal device, which can be installed in the terminal device. The embodiments of the present application do not limit the specific technology and specific device form adopted by the terminal device.

[0069] In the embodiments of the present application, the function of the terminal device can also be executed by a module (such as a chip or a modem) in the terminal device, or by a device containing the function of the terminal device.

[0070] The network device and the terminal device can be fixed in position or movable. The network device and the terminal device can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on the water surface; can also be deployed on an airplane, a balloon and a man-made satellite in the air. The embodiments of the present application do not limit the application scenarios of the network device and the terminal device.

[0071] The roles of the network device and the terminal device can be relative, for example, the helicopter or the unmanned aerial vehicle 120i in FIG. 1 can be configured as a mobile network device, and for those terminal devices 120j that access the wireless access network 100 through 120i, the terminal device 120i is a network device; but for the network device 110a, 120i is a terminal device, that is, 110a communicates with 120i through a wireless air interface protocol. Of course, 110a and 120i can also communicate through an interface protocol between network devices and network devices, at this time, 120i is also a network device relative to 110a. Therefore, the network device and the terminal device can be collectively referred to as a communication apparatus, 110a and 110b in FIG. 1 can be referred to as a communication apparatus with a network device function, and 120a-120j in FIG. 1 can be referred to as a communication apparatus with a terminal device function.

[0072] The network device and the terminal device, the network device and the network device, and the terminal device and the terminal device can communicate through an authorized frequency spectrum, or through an unlicensed frequency spectrum, or through both the authorized frequency spectrum and the unlicensed frequency spectrum, without limitation.

[0073] The network architecture and the service scenario described in the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems as the network architecture evolves and new service scenarios appear.

[0074] The related terms or technical features involved in the embodiments of the present application will be explained first. These explanations are to make the embodiments of the present application easier to understand, and should not be regarded as a strict limitation on the terms in the claimed scope of the present application.

[0075] (1) Sequence

[0076] The "sequence" in the embodiments of the present application includes one or more elements. Among them, the element can be represented as a complex number, including a real part and an imaginary part; or the element can also be represented as a real number, without specific limitation.

[0077] For example, the sequence [s(n)] includes L elements, and L is an integer greater than 1. n belongs to [0, …, L-1], that is, n∈[0, …, L-1]. "…" in [0, …, L-1] represents the integers between 0 and L-1, for example, when L=5, n∈[0, 1, 2, 3, 4]. The L elements in [s(n)] can be s(0), …, s(L-1) respectively; in other words, the element with the number n in [s(n)] can be s(n).

[0078] It can be understood that the embodiment of the present application takes the numbering mode of starting from 0 and increasing by 1 as an example, but is not limited thereto. For example, the numbering mode can also be starting from 1 and increasing by 1. For another example, the numbering mode can also be starting from X and decreasing by 1, X being an integer greater than 1. “[·]” and “{·}” can be used interchangeably, and are used to represent multiple elements, which can be understood as a set, a group, or a sequence, and are not limited.

[0079] (2) Cross-correlation between sequences

[0080] For two sequences [s1(n)] and [s2(n)] of length L, the cross-correlation value between [s1(n)] and [s2(n)] satisfies the following formula without considering the time domain cyclic shift:

[0081] Wherein, c(s1,s2)' represents the cross-correlation value (i.e., the cross-correlation value before normalization) between [s1(n)] and [s2(n)], c(s1,s2) represents the cross-correlation value (i.e., the cross-correlation value after normalization) between [s1(n)] and [s2(n)], and abs represents the absolute value.

[0082] In the case of considering the time domain cyclic shift, the cross-correlation value between [s1(n)] and [s2(n)] satisfies the following formula:

[0083] Wherein, c(s1,s2)' represents the cross-correlation value (i.e., the cross-correlation value before normalization) between [s1(n)] and [s2(n)], c(s1,s2) represents the cross-correlation value (i.e., the cross-correlation value after normalization) between [s1(n)] and [s2(n)], and τ is the time domain multipath delay, and the value range of τ is [0, L-1].

[0084] (3) SS / PBCH block

[0085] Taking the 5G communication system as an example, the SS / PBCH block includes a PSS, an SSS, and a PBCH. As shown in FIG. 2, in the time domain, 1 SS / PBCH block occupies 4 orthogonal frequency division multiplexing (OFDM) symbols, such as symbol 0-symbol 3; in the frequency domain, 1 SS / PBCH block occupies 20 resource blocks (RBs) (one RB includes 12 subcarriers), that is, 240 subcarriers, and the subcarrier number is 0-239. The PSS is located on the middle 127 subcarriers of symbol 0, and the SSS is located on the middle 127 subcarriers of symbol 2. In order to protect the PSS and the SSS, there are different guard subcarriers, and the guard subcarriers are not used to carry signals. As shown in FIG. 2, the blank areas on both sides of the SSS are guard subcarriers. The PBCH occupies all the subcarriers of symbol 1 and symbol 3, and occupies a part of the remaining subcarriers (that is, the subcarriers except the guard subcarriers) in the remaining subcarriers in symbol 2 except the subcarriers occupied by the SSS.

[0086] (4) Generation of PSS and SSS

[0087] Before detecting the PSS, the terminal device does not know the center frequency of the cell, and the carrier frequency calibration between the terminal device and the network device is not completed, therefore, the PSS is a signal used by the terminal device to determine the center frequency of the carrier of the cell, and the detection performance is guaranteed in the case of time deviation and frequency deviation.

[0088] The PSS in NR adopts an m sequence. Here, the m sequence is introduced: the m sequence is the abbreviation of the longest linear feedback shift register sequence, and is a sequence with the longest period generated by a shift register with linear feedback. Generally, the longest period generated by a v-level linear feedback shift register is equal to 2 v -1. FIG. 3 is the basic structure of a feedback shift register, and the bit data used for initialization is stored in the memory, and a new value is generated through a feedback function and supplemented to the memory. Assuming that the feedback function is an exclusive OR operation on all the bits in the memory, that is, then the output sequence is The length of the output sequence is 2 v -1.

[0089] It can be understood that the m sequence is determined by the initial value sequence stored in the register and the primitive polynomial, the value set of the elements in the initial value sequence is {0, 1}, and the order of the primitive polynomial is the highest power in the polynomial. For example, the primitive polynomial f(x) = x 7The recursive formula corresponding to +x+1 is s(t)+s(t-6)+s(t-7)=0. Since the binary addition is defined as modulo 2 addition, the recursive formula can be converted into s(t)=s(t-6)+s(t-7), that is, the primitive polynomial f(x)=x 7 The recursive formula corresponding to +x+1 is s(t)=s(t-6)+s(t-7). The recursive formula corresponds to the primitive polynomial one by one, and the "recursive formula" in the embodiment of the application can be replaced by "primitive polynomial".

[0090] When the PSS adopts the m sequence, a possible generation formula of the PSS sequence (denoted as [d(n)]) is as follows: d(n)=1-2x(m) 0≤n<127

[0091] Wherein, mod is the modulo operation, The initial value [x(6), x(5), x(4), x(3), x(2), x(1), x(0)] is preconfigured or predefined, for example, [x(6), x(5), x(4), x(3), x(2), x(1), x(0)]=[1, 1, 1, 0, 1, 1, 0].

[0092] After the m sequence is generated according to the above formula, the m sequence is BPSK modulated to obtain the PSS sequence, and the value set of the elements in the PSS sequence is {1, -1}. Further, the network device can generate the PSS according to the PSS sequence, for example, the network device maps the elements in the PSS sequence to a plurality of subcarriers and performs inverse fast fourier transformation (IFFT) processing to generate the PSS, that is, the PSS is an OFDM waveform signal.

[0093] In addition, the SSS in the NR adopts the gold sequence, and the gold sequence can be obtained by performing element-wise XOR operation on two m sequences with different primitive polynomials. The gold sequence has good autocorrelation and cross-correlation characteristics, and the number of gold sequences is large, which facilitates information carrying. When the SSS adopts the gold sequence, the generation formula of the SSS sequence can refer to the prior art, which is not described herein. After the network device generates the SSS sequence according to the generation formula of the SSS sequence, the network device can generate the SSS according to the SSS sequence.

[0094] (5) The role of PSS, SSS and PBCH

[0095] PSS: used for frequency synchronization and symbol-level time synchronization. The PSS sequence is used to carry which can be referred to as a cell number, The value set of n is {0, 1, 2}. Since The value set of n has 3 values, and thus there can be 3 PSS sequences. The 3 PSS sequences can correspond to the same recursive formula, that is, the 3 PSS sequences are m sequences obtained by cyclic shift according to the same recursive formula.

[0096] SSS: used to carry may be referred to as a cell group number, The value set of n is {0, 1, 2, …, 335}. The cell number and the cell group number jointly determine a plurality of PCIs in the 5G communication system, and the PCI (denoted as The calculation method of the PCI is as follows: Therefore, there are totally 1008 PCIs.

[0097] The PSS sequence has a total of three kinds, and the terminal device can determine after detecting the PSS sequence. Then, the terminal device substitutes into the detection of the SSS. Once is determined, there are totally 336 possible SSS sequences. The terminal device needs to use 336 different SSS sequences for cross-correlation detection, and the SSS sequence corresponding to the maximum cross-correlation value is the actually transmitted sequence. Once the terminal device successfully searches for the PSS and the SSS, the information of the cell (such as the PCI) is obtained, and the terminal device has the ability to analyze the system message contained in the SS / PBCH block.

[0098] PBCH: used to carry the system message contained in the SS / PBCH block, such as the main information block (MIB). The MIB includes the information necessary for the terminal device to access the network, such as the system frame number, the initial access subcarrier spacing, and the like. Since the information contained in the MIB is limited and is not enough to support the terminal device to access the 5G cell, the terminal device must also obtain some necessary system messages, such as the system information block (SIB) 1. The SIB1 is transmitted on the physical downlink shared channel (PDSCH) with a period of 160 milliseconds. Since the terminal device has obtained the parameters used by the SIB1 transmission and the control resource distribution for scheduling it in the MIB carried by the PBCH, the terminal device can receive the SIB1. In this way, the terminal device can obtain the system message necessary for accessing the 5G cell, and can subsequently access the 5G cell.

[0099] Since the terminal device performs time-frequency synchronization based on the PSS, the detection complexity of the PSS is high.

[0100] Specifically, assuming that the signal received by the terminal device is [r(n)] = [r(0), r(1), …, r(L'-1)], where the length L' of the received signal corresponds to the length of the receiving window, and the length of the receiving window is preset, for example, the length of the receiving window can be related to the transmission period of the PSS, for example, the length of the receiving window is set to 5 ms.

[0101] The terminal device can generate three time domain sequences according to the three PSS sequences, and use the three time domain sequences to detect the received signal. Taking one of the PSS sequences as an example, the terminal device performs subcarrier mapping and IFFT processing on the PSS sequence with a length of L to obtain a time domain sequence p (in the case of no oversampling, the sequence p includes L elements, and in the case of oversampling, the sequence p includes N elements, N is greater than L, and here the case of oversampling is taken as an example).

[0102] For the received signal, the terminal device slides one sample point at a time, for example, the signal r tmp obtained by sliding the i-th sample point is [r(i-1), r(i), …, r(N+i-1)], and the sequence p and the sequence r tmp are multiplied to obtain the cross-correlation value between the sequence p and the sequence r tmp . Optionally, the terminal device normalizes the cross-correlation value to obtain c(p, r tmp )' and the specific calculation formula can be referred to in the foregoing. The terminal device can slide each sample point in the N sample points in turn to obtain N cross-correlation values.

[0103] Due to the crystal oscillator frequency offset and the mobility of the terminal device, there is a frequency offset in the received signal. Considering the maximum crystal oscillator frequency offset (related to the characteristics of the device) and the maximum moving speed of the terminal device, the terminal device can know the maximum frequency offset range in advance (for example, less than or equal to twice the subcarrier spacing). Further, the terminal device can compensate the received signal according to the step to traverse different frequency offset values, and then perform the above correlation operation. The step can be set to 0.2 or 0.5 times the subcarrier spacing (SCS), for example, when the frequency offset value f d = 0.5*SCS, the signal r tmp corrected for the i-th sliding sample point is Further, the cross-correlation value c(p, r tmp,1 )' between the sequence p and the sequence r tmp,1 is obtained through correlation operation.

[0104] That is, the terminal device needs to traverse different PSS sequences, different time delays (i.e., sampling points), and different frequency offset values to perform correlation calculation when detecting the PSS. For example, there are M frequency offset values in the maximum frequency offset range, the number of sampling points is N, and the number of PSS sequences is 3. Therefore, 3*M*N correlation operations are needed to traverse 3 PSS sequences, M frequency offset values, and N sampling points. According to the above correlation calculation formula, each correlation operation needs to perform N-1 addition operations and N multiplication operations, which leads to high detection complexity.

[0105] Based on this, the embodiment of the present application provides a communication method for reducing the detection complexity of the synchronization signal. Exemplarily, in the communication method provided by the embodiment of the present application, the sending side generates and sends the synchronization signal according to the second sequence, and the receiving side processes the received signal according to the first sequence to detect the synchronization signal; wherein the first sequence and the second sequence are ideally cross-correlated, and the second sequence includes at least one element with a value of 0. The synchronization signal can be a signal of a discrete fourier transformation-spread-orthogonal frequency division multiplexing (DFT-s-OFDM) waveform. In this case, since the second sequence includes at least one element with a value of 0, the number of addition operations and / or the number of multiplication operations in each correlation operation can be reduced, thereby reducing the detection complexity of the synchronization signal. Alternatively, the synchronization signal can be a signal of an orthogonal frequency division multiplexing (OFDM) waveform. In this case, since the second sequence includes at least one element with a value of 0, the complexity required by the multiplication operation in the frequency domain detection and the complexity of the inverse discrete fourier transform (IDFT) can be reduced, thereby reducing the detection complexity of the synchronization signal.

[0106] The communication method provided by the embodiment of the present application involves a first communication device and a second communication device. The first communication device is the receiving side of the synchronization signal, and the second communication device is the sending side of the synchronization signal. For example, the first communication device is a terminal device or a component in the terminal device, such as a chip or a chip system arranged in the terminal device; and the second communication device is a network device or a component in the network device, such as a chip or a chip system arranged in the network device. In the embodiment of the present application, the first communication device is taken as an example of a terminal device, and the second communication device is taken as an example of a network device.

[0107] FIG. 4 is a flow diagram of a communication method according to an embodiment of the present application. As shown in FIG. 4, the flow can include the following steps.

[0108] S401, the network device generates a synchronization signal according to the second sequence.

[0109] Exemplarily, the synchronization signal can be a PSS, or other possible signals for time and / or frequency synchronization, which are not limited in particular.

[0110] Exemplarily, the network device can first obtain the second sequence, and then generate the synchronization signal according to the second sequence. The network device can obtain the second sequence in various ways, such as directly obtaining a predefined or preconfigured second sequence, or obtaining a predefined or preconfigured sequence 1 and obtaining the second sequence according to the sequence 1, which will be described below.

[0111] (1) The second sequence and the implementation of the network device obtaining the second sequence are described.

[0112] The second sequence includes at least one element with a value of 0, such as the number of elements with a value of 0 in the second sequence is (L-1) / 2, and L represents the length of the second sequence. For example, the value set of the elements of the second sequence is {0, A}, and A is a constant. The second sequence will be further described in combination with implementation mode 1 and implementation mode 2.

[0113] Implementation mode 1: the second sequence is an m-sequence, in which case the second sequence also includes at least one element with a value of 1, i.e., A = 1, such as the number of elements with a value of 1 in the second sequence is (L+1) / 2.

[0114] The second sequence can be one of W sequences, and the W sequences are all m-sequences, the lengths of the W sequences are the same, and W is an integer greater than 1. The W sequences correspond to W recursive formulas one by one, and the W sequences are obtained according to the W recursive formulas. For example, the W sequences include sequence 1, sequence 2, …, and sequence w, the W recursive formulas include recursive formula 1, recursive formula 2, …, and recursive formula w, and the recursive formula 1 to the recursive formula w are different recursive formulas; the sequence 1 is obtained according to the recursive formula 1 and the initial value sequence 1, the sequence 2 is obtained according to the recursive formula 2 and the initial value sequence 2, and so on, and the sequence w is obtained according to the recursive formula w and the initial value sequence w. The initial value sequence 1 to the initial value sequence w can be the same initial value sequence, or can be different initial value sequences.

[0115] Exemplarily, the cross-correlation values between the W recursive formulas are less than or equal to a first threshold, and the cross-correlation values between different recursive formulas can refer to cross-correlation values between sequences obtained based on different recursive formulas, that is, the cross-correlation values between the W sequences are less than or equal to the first threshold. The first threshold can be set according to actual needs, for example, the first threshold is 0.17. For example, the length of each sequence in the W sequences is 127, and the W recursive formulas can include any multiple of the following recursive formula 1 to recursive formula 3:

[0116] Recursive formula 1: s(n+7) = (s(n+1) + s(n)) mod 2;

[0117] Recursive formula 2: s(n+7) = (s(n+3) + s(n)) mod 2;

[0118] Recursive formula 3: s(n+7) = (s(n+5) + s(n+2) + s(n+1) + s(n)) mod 2.

[0119] In implementation 1, the second sequence is a pre-configured or pre-defined sequence, in which case the network device can directly obtain the pre-defined or pre-configured second sequence and generate the synchronization signal according to the second sequence. Alternatively, the W sequences are pre-configured or pre-defined sequences, in which case the network device can select one sequence from the W sequences as the second sequence and generate the synchronization signal according to the second sequence.

[0120] Optionally, the second sequence is associated with a cell identifier, for example, the second sequence is associated with For example, the value set of is {0, 1, 2}, and W (W = 3) sequences can be pre-configured or pre-defined, and the three sequences are associated with different values of , for example, sequence 1 is associated with "0", sequence 2 is associated with "1", and sequence 3 is associated with "2"; the network device can select one sequence from the three sequences as the second sequence according to of the current cell. For example, if of the current cell is "1", the network device can select sequence 2 from the three sequences as the second sequence.

[0121] That is, one sequence can be pre-configured or pre-defined, and the sequence is the second sequence; in this case, the pre-configured or pre-defined sequence can not be associated with a cell identifier. Alternatively, W sequences can be pre-configured or pre-defined, and the second sequence is one of the W sequences; in this case, the pre-configured or pre-defined sequence can be associated with a cell identifier.

[0122] In an implementation, the second sequence is obtained according to the first sequence (the first sequence is an m-sequence), for example, the second sequence is obtained by multiplying elements in the first sequence by a transmission power related factor (i.e., A = the transmission power related factor). The transmission power related factor can be L represents a length of the second sequence. For example, the second sequence is denoted as [x(n)], and the first sequence is denoted as [z(n)], and the second sequence and the first sequence satisfy: In this case, the second sequence further includes at least one element with a value of For example, the number of elements with a value of in the second sequence is (L+1) / 2.

[0123] It can be understood that multiplying elements in the m-sequence by the transmission power related factor to obtain the second sequence, and generating the synchronization signal according to the second sequence, can ensure power normalization of the transmitted signal.

[0124] The second sequence can be one of W sequences, and the W sequences are obtained according to W m-sequences (i.e., the W sequences are obtained by multiplying elements in the W m-sequences by a transmission power related factor). The W m-sequences correspond to the W recursive formulas one by one, and specific descriptions are provided in the implementation 1, and thus it can be considered that the W sequences correspond to the W recursive formulas one by one.

[0125] In the implementation 2, the second sequence is a preconfigured or predefined sequence, and in this case, the network device can directly obtain the predefined or preconfigured second sequence, and generate the synchronization signal according to the second sequence. Alternatively, the W sequences are preconfigured or predefined sequences, and in this case, the network device can select one sequence from the W sequences as the second sequence, and generate the synchronization signal according to the second sequence. That is, one sequence can be preconfigured or predefined, and the sequence is the second sequence. In this case, the preconfigured or predefined sequence can not be associated with the cell identifier. Alternatively, the W sequences can be preconfigured or predefined, and the second sequence is one of the W sequences. In this case, the preconfigured or predefined sequence can be associated with the cell identifier.

[0126] Alternatively, the sequence 1 is a pre-configured or pre-defined sequence, in which case the network device can obtain the pre-defined or pre-configured sequence 1, obtain a second sequence according to the sequence 1, and generate the synchronization signal according to the second sequence. Alternatively, the W m-sequences are pre-configured or pre-defined sequences, in which case the network device can select one sequence (such as the sequence 1) from the W m-sequences, obtain a second sequence according to the sequence 1, and generate the synchronization signal according to the second sequence. That is, one sequence can be pre-configured or pre-defined as the sequence 1, in which case the pre-configured or pre-defined sequence can not be associated with the cell identifier. Alternatively, the W m-sequences can be pre-configured or pre-defined, and the sequence 1 is one of the W m-sequences, in which case the pre-configured or pre-defined sequence can be associated with the cell identifier.

[0127] (2) The implementation of the network device generating the synchronization signal according to the second sequence is described.

[0128] Exemplarily, the synchronization signal can be understood as a time domain sequence. In the case of no oversampling, the number of elements in the time domain sequence is the same as the number of elements in the second sequence, and in the case of oversampling, the number of elements in the time domain sequence is greater than the number of elements in the second sequence. In the embodiments of the present application, the case of oversampling is described as an example, such as the synchronization signal is denoted as sequence [t(n)], n = 0, 1, 2, …, N-1, and N is greater than L.

[0129] As a possible implementation, the network device performs discrete fourier transformation (DFT) processing, subcarrier mapping, and IFFT processing on the second sequence to generate the synchronization signal. Optionally, the network device can also perform other possible processing, which is not limited in detail, and it should be noted that the processing performed by the network device on the second sequence does not include modulation.

[0130] For example, the network device performs DFT processing on the second sequence to obtain a fourth sequence, then maps the fourth sequence to a plurality of subcarriers, and performs IFFT processing to generate the synchronization signal. In this case, the synchronization signal is a DFT-s-OFDM waveform signal. Wherein the second sequence is denoted as [x(n)], the fourth sequence is denoted as [g(n)], n = 0, 1, 2, …, L-1, and the second sequence and the fourth sequence satisfy:

[0131] As another possible implementation, the network device performs subcarrier mapping and IFFT processing on the second sequence to generate the synchronization signal. Optionally, the network device can also perform other possible processing, which is not limited in detail, and it should be noted that the processing performed by the network device on the second sequence does not include modulation and DFT processing.

[0132] For example, the network device maps the second sequence onto a plurality of subcarriers and performs IFFT processing to generate the synchronization signal. In this case, the synchronization signal is a signal of an OFDM waveform.

[0133] That is, in the embodiments of the present application, the network device can use a DFT-s-OFDM waveform to transmit the synchronization signal, or can also use an OFDM waveform to transmit the synchronization signal according to the prior art.

[0134] It can be understood that, as described above, the three PSS sequences in NR can correspond to the same recursive formula; and in the embodiments of the present application, when the DFT-s-OFDM waveform is used, if the different cyclic shifts based on the same sequence in the NR protocol are followed to distinguish the different synchronization signals, the three PSS sequences will correspond to the same recursive formula. When time domain detection is performed, three similar correlation peaks will appear, which will cause time domain synchronization failure or PCI detection failure. Therefore, the W sequences can correspond to different recursive formulas to facilitate guaranteeing the synchronization performance. It can be understood that, if the synchronization signal continues to use the OFDM waveform, the W sequences can correspond to different recursive formulas, or the W sequences can also be obtained according to different cyclic shifts of the same sequence.

[0135] S402, the network device transmits the synchronization signal; correspondingly, the terminal device receives the corresponding signal.

[0136] It can be understood that the synchronization signal is generated by the baseband chip of the network device. The network device transmitting the synchronization signal includes the baseband chip of the network device transmitting the synchronization signal to the radio frequency chip of the network device. The network device transmitting the synchronization signal also includes the radio frequency chip of the network device transmitting the synchronization signal to the terminal device. The transmission power of the synchronization signal can refer to the power used by the radio frequency chip of the network device to transmit the synchronization signal to the terminal device.

[0137] In the embodiments of the present application, since the m sequence contains (L-1) / 2 elements with a value of 0, in order to guarantee the transmission power normalization, the second sequence (that is, each element in the m sequence is multiplied by the transmission power correlation factor to obtain the second sequence) can be obtained according to the m sequence and the transmission power correlation factor. In this case, the value set of the elements in the second sequence is {0, }(corresponding to the above implementation manner 2), the transmission power of the synchronization signal can be the first power, and the first power is predefined or preconfigured. Alternatively, the second sequence is the m sequence, in which case the value set of the elements in the second sequence is {0, 1}, and the network device can control the transmission power of the synchronization signal, for example, the transmission power of the synchronization signal is the first power plus a power offset, and the power offset is equal to dB or 10log 10[2L / (L+1)] dB.

[0138] S403, the terminal device acquires the first sequence.

[0139] Here, the first sequence and the second sequence are ideally cross-correlated, that is, the first sequence and the second sequence are the optimal ternary sequence pair.

[0140] (1) The optimal ternary sequence pair is described.

[0141] Suppose [s1(n)] and [s2(n)] are ternary sequence pairs, then the element value set of [s1(n)] and [s2(n)] includes 3 values; for example, the element value set of [s1(n)] and [s2(n)] is {-1, 0, 1}, the element value set of [s1(n)] is {0, 1}, the element value set of [s2(n)] is {-1, 1}, or the element value set of [s1(n)] is {-1, 1}, and the element value set of [s2(n)] is {0, 1}. If c(s1, s2) satisfies: That is, [s1(n)] and [s2(n)] are ideally cross-correlated, then [s1(n)] and [s2(n)] can be considered as the optimal ternary sequence pair.

[0142] For example, the unmodulated and modulated m sequence are ideally cross-correlated. Taking the m sequence with a length of 7 as an example, the unmodulated sequence is [1, 0, 0, 1, 0, 1, 1], and the binary phase shift keying (BPSK) modulated sequence is [-1, 1, 1, -1, 1, -1, -1]. The cross-correlation value of [1, 0, 0, 1, 0, 1, 1] and [-1, 1, 1, -1, 1, -1, -1] is [4, 0, 0, 0, 0, 0, 0]. Therefore, the second sequence can be the unmodulated m sequence, and the first sequence can be the modulated m sequence.

[0143] (2) The implementation of “the terminal device acquires the first sequence” is described.

[0144] Since the first sequence and the second sequence are ideally cross-correlated, when the value set of the elements in the first sequence is {0, 1}, the first sequence and the second sequence satisfy y(n) = 1-2x(n), or y(n) = 2x(n)-1. Or, when the value set of the elements in the first sequence is {0, }, i = 0, 1, 2,..., L-1, the first sequence and the second sequence satisfy: Or Where A is a constant.

[0145] When the pre-configured or pre-defined sequence is the second sequence (the second sequence is an m-sequence, or the second sequence is obtained according to an m-sequence), the terminal device can obtain the first sequence according to the second sequence (refer to the formula satisfied by the first sequence and the second sequence).

[0146] When the pre-configured or pre-defined sequence includes W sequences (the W sequences include the second sequence, the W sequences are all m-sequences, or the W sequences are obtained according to W m-sequences), the terminal device can obtain W' sequences according to the W sequences, and the W' sequences include the first sequence. The W sequences and the W' sequences correspond to each other one by one, for example, the second sequence corresponds to the first sequence, that is, the terminal device can obtain the first sequence according to the second sequence (refer to the formula satisfied by the first sequence and the second sequence).

[0147] It can be understood that the embodiments of the present application do not limit the specific timing of the terminal device obtaining the second sequence, and "the terminal device obtaining the second sequence" is an internal implementation of the terminal device, which can be an optional step in specific implementation.

[0148] S404, the terminal device processes the received signal according to the first sequence to detect the synchronization signal.

[0149] As described above, the synchronization signal can be a DFT-s-OFDM waveform signal, or can also be an OFDM waveform signal, which will be described below.

[0150] (1) The synchronization signal is a DFT-s-OFDM waveform signal, and three possible implementations are described for this case.

[0151] The first implementation is that the terminal device performs DFT processing on the first sequence to obtain a third sequence, maps the third sequence to a plurality of subcarriers, and performs IFFT processing, and then performs correlation processing on the received signal according to the sequence after IFFT processing (referred to as sequence a1, in the case of no oversampling, sequence a1 includes L elements, in the case of oversampling, sequence a1 includes N elements, N is greater than L, here taking oversampling as an example). Wherein, the first sequence is denoted as [y(n)], the third sequence is denoted as [z(n)], n=0,1,2……L-1, and the first sequence and the third sequence satisfy: The processing of the terminal device on the first sequence can refer to the processing of the network device on the second sequence.

[0152] For example, for the received signal, the terminal device obtains the signal r tmp = [r(i-1), r(i), … r(N+i-1)] when the frequency offset value f d = 0.5*SCS, the terminal device corrects the frequency offset of the signal r tmp obtained by the i-th sliding sampling point to obtain rtmp,1 The terminal device performs inner product on the sequence a1 and the sequence r tmp,1 to obtain the cross-correlation value c(a1, r tmp ) between the sequence a1 and the sequence r tmp , and performs normalization to obtain c(a1, r tmp )'.

[0153] In the second implementation, the terminal device oversamples the first sequence to obtain a sequence a2, and performs correlation processing on the received signal according to the sequence a2. For details, refer to the description of "the terminal device performs correlation processing on the received signal according to the sequence a1".

[0154] In the third implementation, the terminal device downsamples the received signal to obtain a sequence a3, and performs correlation processing on the sequence a3 according to the first sequence.

[0155] For example, for the received signal, the terminal device obtains a signal r tmp = [r(i-1), r(i), … r(N+i-1)] by sliding sampling points i times, downsamples r tmp to obtain r tmp’ , and corrects the frequency offset of r d when the frequency offset value f tmp’ = 0.5*SCS to obtain r tmp’,1 . The terminal device performs inner product on the first sequence and the sequence r tmp’,1 to obtain the normalized cross-correlation value between the first sequence and the sequence r tmp’,1 .

[0156] The above three implementations are examples of the first sequence. When there are multiple predefined or preconfigured sequences, the terminal device can traverse multiple sequences. That is, in the above three implementations, the terminal device can traverse multiple sequences, multiple sampling points, and multiple frequency offset values to perform correlation calculation to obtain multiple cross-correlation values. Further, the terminal device determines the sequence (i.e., detects the synchronization signal) actually transmitted by the network device, the time delay, and the frequency offset value according to the maximum cross-correlation value in the multiple cross-correlation values. It can be understood that in some scenarios, there can be only one frequency offset value or one sequence, and the specific implementation is not limited.

[0157] In an embodiment of the present application, on the one hand, since the synchronization signal has timing function, the terminal device needs to perform sliding correlation detection in the time domain, and the synchronization signal adopts the DFT-s-OFDM waveform, which can enable the terminal device to directly perform correlation processing on the received signal in the time domain without first performing DFT processing on the received signal to transform it to the frequency domain for processing, thereby greatly reducing the detection complexity of the synchronization signal. On the other hand, the DFT-s-OFDM waveform can be used to simulate a square wave to ensure the performance of time domain detection. As shown in FIG. 5, the local sequence (such as the first sequence) adopts an m sequence, the recursive formula of which is s(n+7) = (s(n+1) + s(n)) mod 2, and the initial value is [s(6), s(5), s(4), s(3), s(2), s(1), s(0)] = [0, 0, 0, 0, 0, 0, 1]. FIG. 5 shows a comparison between the time domain signal of the first sequence after oversampling (i.e., element repetition) and the time domain signal of the first sequence after DFT-s-OFDM waveform processing. It can be found that the positions of high and low levels completely coincide, and therefore, the DFT-s-OFDM waveform can be used to simulate a square wave. It should be understood that the time domain signal of the first sequence generated after DFT-s-OFDM waveform processing can also be subjected to time domain filtering and other operations to make the final waveform more consistent with the square wave, and the embodiments of the present application do not limit these possible operations.

[0158] Further, taking the synchronization signal PSS as an example, as described above, in the current NR, the m sequence is subjected to BPSK modulation to obtain the PSS sequence, and then the network device performs subcarrier mapping and IFFT processing on the PSS sequence to generate the PSS, i.e., the PSS is an OFDM waveform signal; correspondingly, the terminal device detects the PSS according to the PSS sequence. Since the PSS sequence obtained by BPSK modulation of the m sequence has an element value set of {1, -1}, the elements in the PSS generated after subcarrier mapping and IFFT processing are all complex elements, which results in N-1 addition operations and N multiplication operations in each correlation operation.

[0159] In the embodiments of the present application, the network device performs DFT processing, subcarrier mapping and IFFT processing on the m-sequence to generate the PSS (or multiplies the m-sequence by a factor associated with the transmission power, and then performs DFT processing, subcarrier mapping and IFFT processing to generate the PSS), that is, the PSS is a signal of DFT-s-OFDM waveform; correspondingly, the terminal device detects the PSS according to the BPSK-modulated m-sequence. Since the unmodulated m-sequence and the modulated m-sequence have ideal cross-correlation, the detection performance of the PSS can be ensured; further, since the network device generates the PSS by performing DFT processing, subcarrier mapping and IFFT processing on the unmodulated m-sequence, the unmodulated m-sequence includes at least one element with a value of 0, therefore, the terminal device can first perform quantization processing on the received signal, and the quantized signal includes at least one element with a value of 0 (for example, referring to FIG. 5, the terminal device can quantize the sampling points with an amplitude close to 0 in the time domain signal to 0), so that when the terminal device performs correlation processing on the received signal (specifically, the quantized signal) according to the modulated m-sequence, the number of addition operations in each correlation operation can be reduced. Further, since the value set of the elements in the modulated m-sequence is {1, -1}, the number of multiplication operations in each correlation operation can be ignored when the above-mentioned second implementation and third implementation are used; when the above-mentioned first implementation is used, the terminal device performs DFT processing, subcarrier mapping and IFFT processing on the modulated m-sequence, and the final obtained sequence usually does not have elements with a value of 1 / -1, but since the floating point can be quantized to 1 / -1, the number of multiplication operations in each correlation operation can also be ignored when the first implementation is used. That is, by using the scheme in the embodiments of the present application, the number of addition operations and / or multiplication operations in each correlation operation can be reduced, thereby reducing the detection complexity of the PSS.

[0160] For example, referring to Table 1, when the length of the PSS sequence is 63 (taking the case of no oversampling as an example), according to the scheme in NR, 62 addition operations and 63 multiplication operations are required in each correlation operation; according to the scheme in the present application, 32 addition operations and 0 multiplication operations are required in each correlation operation.

[0161] Table 1: complexity example

[0162] Since the multiplication operation can be realized by an adder and a circular shift register, the number of NAND gates is X times the number of additions, where X is the bit quantization bit width, generally 16, therefore, the calculation process of the complexity reduction ratio is: When the length of the PSS sequence is 127, the scheme in NR is adopted, and 126 addition operations and 127 multiplication operations are required for each correlation operation; the scheme in the application is adopted, and 64 addition operations and 0 multiplication operations are required for each correlation operation. The complexity reduction ratio is 97.03%.

[0163] (2) Synchronization signal is OFDM waveform signal

[0164] The terminal device maps the first sequence onto a plurality of subcarriers to obtain a frequency domain sequence. In addition, the terminal device performs DFT processing on the received signal to obtain a frequency domain signal; for example, for the received signal r = [r(0), r(1), …, r(L'-1)], when the frequency offset value f d = 0.5*SCS, the terminal device corrects the frequency offset of the signal r to obtain a signal r1, and performs DFT processing on the signal r1 to obtain a frequency domain signal. Further, the terminal device performs conjugate point multiplication on the frequency domain sequence and the frequency domain signal, and performs IDFT processing on the sequence after conjugate point multiplication to determine the maximum correlation peak position corresponding to the frequency offset value in the time domain. In this way, after traversing a plurality of frequency offset values, the sequence actually transmitted by the network device (i.e., detecting the synchronization signal), the time delay and the frequency offset value can be determined according to the maximum correlation peak positions corresponding to the plurality of frequency offset values.

[0165] In the embodiments of the application, taking the synchronization signal PSS as an example, the network device performs subcarrier mapping and IFFT processing on the m sequence to generate the PSS (or multiplies the m sequence by a factor associated with the transmission power, and then performs subcarrier mapping and IFFT processing to generate the PSS), that is, the PSS is an OFDM waveform signal; correspondingly, the terminal device detects the PSS according to the BPSK modulated m sequence. Since the unmodulated m sequence includes at least one element with a value of 0, the complexity required for frequency domain multiplication operation and the complexity of IDFT can be reduced, thereby reducing the detection complexity of the synchronization signal.

[0166] It can be understood that the above is an example taking the synchronization signal PSS, and when the synchronization signal is a DFT-s-OFDM waveform signal, the synchronization signal in the embodiments of the application can also be a signal in other scenarios, such as a low power-wake up signal (LP-WUS). When the synchronization signal is an LP-WUS, the scheme in the embodiments of the application can effectively reduce the detection complexity of the LP-WUS.

[0167] Specifically, in the LP-WUS project, for a low-capability terminal device, a network device can perform DFT processing, subcarrier mapping, and IFFT processing on a synchronization sequence, generate an LP-WUS, and send the LP-WUS. The synchronization sequence can be a Golay sequence or a computer search sequence. Correspondingly, a terminal device can perform envelope detection on a received LP-WUS, remove a direct current component to convert the LP-WUS into a bipolar signal, and then detect the bipolar signal according to the synchronization sequence (the difference from PSS detection is that the synchronization sequence is usually only one, and the frequency offset value is not considered, so when the bipolar signal is detected according to the synchronization sequence, only different sampling points need to be traversed).

[0168] In the embodiments of the present application, an m sequence is subjected to DFT processing, subcarrier mapping, and IFFT processing to generate an LP-WUS (or the m sequence is multiplied by a factor associated with transmission power, and then subjected to DFT processing, subcarrier mapping, and IFFT processing to generate an LP-WUS); correspondingly, a terminal device detects an LP-WUS according to an m sequence subjected to BPSK modulation. Since the sequence pair used for transmission and detection in the embodiments of the present application is the optimal ternary sequence pair, it is not necessary to convert a received signal into a bipolar signal, that is, it is not necessary to perform an operation of removing a direct current component, thereby facilitating reduction of the detection complexity of the LP-WUS.

[0169] The other performances (such as anti-frequency offset capability and coverage performance) of the scheme provided by the embodiments of the present application are described below.

[0170] Due to the influence of the moving speed of a terminal device and the crystal oscillator frequency offset, a terminal device receives a signal with a large frequency offset, and therefore it is necessary to evaluate the anti-frequency offset capability of a synchronization signal. The synchronization signal here refers to a synchronization signal generated by a baseband chip and not yet sent to a radio frequency chip. The anti-frequency offset capability is generally evaluated by the second highest peak of a blurring function. The larger the second highest peak of the blurring function is, the weaker the anti-frequency offset capability is. For example, a synchronization signal generated by a network device according to a second sequence is denoted as [t(n)], and the expression of the blurring function of [t(n)] is as follows:

[0171] wherein A(f d ,τ) is the blurring function of [t(n)], f d is a frequency offset value, τ is a time-domain multipath delay, the value range of τ is [0, N-1], t * (n+τ) is the conjugate of t(n+τ). For example, the main peak of the blurring function of [t(n)] is A(0, 0), A(f d ,τ)′=A(f d ,τ) / A(0, 0), and A(f d ,τ)′ is obtained by normalizing A(f d ,τ).

[0172] The peak-to-average power ratio (PAPR) is defined as the ratio of the peak power to the average power of a signal. Since the dynamic range of a power amplifier is limited, when the PAPR is too high, the power amplifier will enter a nonlinear region, resulting in nonlinear distortion of the signal after passing through the power amplifier, causing spectral expansion and in-band signal distortion, and reducing system performance. In order to avoid entering the nonlinear region, power backoff is required. The higher the PAPR, the lower the power backoff required. However, power backoff will result in a decrease in coverage performance, so reducing the PAPR is beneficial to improving the coverage performance. The PAPR is the logarithm of the ratio between the square of the maximum value of the time-domain transmitted signal and the square of the average value. For a time-domain signal [t(n)], the PAPR is defined as Generally, the complementary cumulative distribution function (CCDF) of the PAPR = 10 -4 The size of the PAPR is determined by the point.

[0173] Taking the length of the second sequence as 127 as an example, it is found through simulation that the second highest peak of the normalized ambiguity function of the synchronization signal in the present application is 0.178, and the PAPR (CDF = 10 -4 ) is 6.5-8.3 dB; while the second highest peak of the normalized ambiguity function of the synchronization signal in NR (the length of the PSS sequence is 127) is 0.089, and the PAPR (CDF = 10 -4 ) is 6.5 dB. That is, the anti-frequency offset capability of the synchronization signal provided in the embodiments of the present application is slightly lost compared to the anti-frequency offset capability of the PSS in NR, and the PAPR of the synchronization signal provided in the embodiments of the present application is the same as the PAPR of the PSS in NR. Therefore, by using the scheme in the embodiments of the present application, the detection complexity of the synchronization signal can be reduced while ensuring the performance of the synchronization signal in all aspects.

[0174] With regard to the above embodiments, it can be understood that:

[0175] (1) In the embodiments of the present application, the terms and / or descriptions in different examples or implementation manners are consistent and can be referred to each other if there is no special description and logical conflict, and the technical features in different examples or implementation manners can be combined to form new embodiments according to their inherent logical relationship. In addition, different implementation manners or different examples can refer to or refer to each other.

[0176] (2) The various numbers involved in the present application are only for the convenience of distinguishing, and do not limit the scope of the present application. The step numbers of the above various flowcharts are only an example of the execution flow, and do not constitute a limitation on the execution order of the steps, that is, the size of the step numbers does not mean the order of execution, and the execution order of the steps should be determined according to its function and internal logic. In addition, the steps shown in each flowchart are not all the steps that must be executed, and some steps can be added or deleted based on each flowchart as needed.

[0177] The above mainly introduces the scheme provided by the embodiments of the present application from the perspective of the interaction between the first communication device and the second communication device. It can be understood that, in order to realize the above functions, the first communication device and the second communication device can include corresponding hardware structures and / or software modules for executing various functions. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of the examples described in the embodiments disclosed in the present application, the embodiments of the present application can be realized in the form of hardware or a combination of hardware and computer software. Whether a certain function is realized in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0178] The embodiments of the present application can divide the functional units of the first communication device and the second communication device according to the above method examples, for example, each functional unit can be divided according to each function, or two or more functions can be integrated into one unit. The integrated unit can be realized in the form of hardware or software functional unit.

[0179] In the case of using an integrated unit, FIG. 6 shows a possible exemplary block diagram of the device involved in the embodiments of the present application. As shown in FIG. 6, the device 600 can include a processing unit 602 and a communication unit 603. The processing unit 602 is used to control and manage the actions of the device 600. The communication unit 603 is used to support the communication of the device 600 with other devices. Optionally, the communication unit 603, also known as a transceiver unit, can include a receiving unit and / or a sending unit, which are used to perform receiving and sending operations, respectively. The device 600 can also include a storage unit 601 for storing the program code and / or data of the device 600.

[0180] (1) The apparatus 600 can be the first communication apparatus in the above embodiments. The processing unit 602 can enable the apparatus 600 to perform the actions of the first communication apparatus in the above method embodiments. Alternatively, the processing unit 602 mainly performs the internal actions of the first communication apparatus in the method embodiments, and the communication unit 603 can enable the apparatus 600 to communicate with other devices.

[0181] For example, in an embodiment, the processing unit 602 is configured to: obtain a first sequence; and process a received signal according to the first sequence to detect a synchronization signal, the synchronization signal being based on a second sequence; wherein the first sequence and the second sequence are ideally cross-correlated, and the second sequence comprises at least one element with a value of 0.

[0182] In a possible design, the processing unit 602 is specifically configured to: perform DFT processing on the first sequence to obtain a third sequence; map the third sequence onto a plurality of subcarriers and perform IFFT processing; and perform correlation processing on the received signal according to the sequence after IFFT processing; wherein the first sequence is denoted as [y(n)], the third sequence is denoted as [z(n)], n=0, 1, 2, …, L-1, and the first sequence and the third sequence satisfy:

[0183] In a possible design, the processing unit 602 is specifically configured to: perform oversampling on the first sequence, and perform correlation processing on the received signal according to the sequence after oversampling; or perform downsampling on the received signal, and perform correlation processing on the signal after downsampling according to the first sequence.

[0184] In a possible design, the processing unit 602 is specifically configured to: map the first sequence onto a plurality of subcarriers to obtain a frequency domain sequence; perform DFT processing on the received signal to obtain a frequency domain signal; perform conjugate point multiplication on the frequency domain sequence and the frequency domain signal; and perform IDFT processing on the sequence after conjugate point multiplication.

[0185] In a possible design, the number of elements with a value of 0 in the second sequence is (L-1) / 2, and L represents the length of the second sequence.

[0186] In a possible design, the second sequence further comprises at least one element with a value of 1.

[0187] In a possible design, the second sequence is denoted as [x(n)], the first sequence is denoted as [y(n)], n=0, 1, 2, …, L-1, and the second sequence and the first sequence satisfy: y(n)=1-2x(n), or y(n)=2x(n)-1.

[0188] In one possible design, the second sequence further includes at least one element with a value of L represents a length of the second sequence.

[0189] In one possible design, the second sequence is denoted as [x(n)], the first sequence is denoted as [y(n)], n = 0, 1, 2,..., L-1, and the second sequence and the first sequence satisfy: or where A is a constant.

[0190] In one possible design, the second sequence is one of W sequences, the W sequences correspond to W recursive formulas one by one, and W is an integer greater than 1.

[0191] In one possible design, the W recursive formulas include any of the following multiple terms: s(n+7) = (s(n+1) + s(n)) mod 2; s(n+7) = (s(n+3) + s(n)) mod 2; s(n+7) = (s(n+5) + s(n+2) + s(n+1) + s(n)) mod 2.

[0192] (2) The apparatus 600 can be the second communication apparatus in the above-described embodiments. The processing unit 602 can enable the apparatus 600 to perform the actions of the second communication apparatus in the above-described method embodiments. Alternatively, the processing unit 602 mainly performs the internal actions of the second communication apparatus in the method embodiments, and the communication unit 603 can enable the apparatus 600 to communicate with other devices.

[0193] For example, in one embodiment, the processing unit 602 is configured to generate a synchronization signal according to a second sequence, and the communication unit 603 is configured to transmit the synchronization signal, where the second sequence includes at least one element with a value of 0, the second sequence and a first sequence have ideal cross-correlation, and the first sequence is used to detect the synchronization signal.

[0194] In one possible design, the processing unit 602 is specifically configured to perform DFT processing on the second sequence to obtain a fourth sequence, map the fourth sequence onto a plurality of subcarriers, and perform IFFT processing to generate the synchronization signal, where the second sequence is denoted as [x(n)], the fourth sequence is denoted as [g(n)], n = 0, 1, 2,..., L-1, and the second sequence and the fourth sequence satisfy:

[0195] In one possible design, the processing unit 602 is specifically configured to map the second sequence onto a plurality of subcarriers and perform IFFT processing to generate the synchronization signal.

[0196] In a possible design, the number of elements with a value of 0 in the second sequence is (L-1) / 2, where L represents the length of the second sequence.

[0197] In a possible design, the second sequence further includes at least one element with a value of 1.

[0198] In a possible design, the transmission power of the synchronization signal is a first power plus a power offset, and the power offset is equal to dB or 10log 10 [2L / (L+1)] dB, where L represents the length of the second sequence; and the first power is predefined or preconfigured.

[0199] In a possible design, the second sequence further includes at least one element with a value of , where L represents the length of the second sequence.

[0200] In a possible design, the transmission power of the synchronization signal is a first power, and the first power is predefined or preconfigured.

[0201] In a possible design, the second sequence is one of W sequences, the W sequences correspond to W recursive formulas one by one, and W is an integer greater than 1.

[0202] In a possible design, the W recursive formulas include any one of the following multiple terms: s(n+7) = (s(n+1) + s(n)) mod 2; s(n+7) = (s(n+3) + s(n)) mod 2; s(n+7) = (s(n+5) + s(n+2) + s(n+1) + s(n)) mod 2.

[0203] It should be understood that the division of units in the above apparatus is only a logical functional division, and in actual implementation, all or part of the units can be integrated into one physical entity, or can be physically separated. The units in the apparatus can all be implemented in the form of software invoked by a processing element; or all be implemented in the form of hardware; or part of the units are implemented in the form of software invoked by a processing element, and part of the units are implemented in the form of hardware. For example, each unit can be a separately established processing element, or can be integrated in a chip of the apparatus, in addition, the unit can also be stored in the form of a program in a memory, and the function of the unit is invoked and executed by a processing element of the apparatus. In addition, all or part of the units can be integrated together, or can be independently implemented. The processing element described herein can be a processor, which can be an integrated circuit with a signal processing capability. In the implementation process, each operation of the above method or each unit can be implemented by an integrated logic circuit of hardware in the processing element, or in the form of software invoked by the processing element.

[0204] In one example, the units in any of the above apparatuses can be one or more integrated circuits configured to implement the above methods, for example, one or more application specific integrated circuits (ASICs), or one or more digital signal processors (DSPs), or one or more field programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms. In another example, when the units in the apparatus can be implemented in the form of a program invoked by a processing element, the processing element can be a processor, such as a general purpose central processing unit (CPU), or other processor capable of invoking a program. In another example, the units can be integrated together to implement in the form of SoC.

[0205] The above receiving unit is an interface circuit of the apparatus for receiving signals from other apparatuses. For example, when the apparatus is implemented in the form of a chip, the receiving unit is an interface circuit of the chip for receiving signals from other chips or apparatuses. The above transmitting unit is an interface circuit of the apparatus for transmitting signals to other apparatuses. For example, when the apparatus is implemented in the form of a chip, the transmitting unit is an interface circuit of the chip for transmitting signals to other chips or apparatuses.

[0206] Based on the same technical concept, the embodiment of the present application further provides a communication device, which is used to realize the functions of the first communication device or the second communication device in the above-mentioned embodiments. As shown in FIG. 7, the device can be a communication equipment or a chip in the communication equipment. The device comprises a processor 701 and a communication interface 702, and optionally further comprises a memory 703. FIG. 7 only shows the main components of the communication device. In addition to the processor 701 and the communication interface 702, the communication device can further comprise the memory 703 and an input and output device (not shown in the figure).

[0207] The processor 701 is used to execute the program code stored in the memory 703, and specifically used to execute the actions of the processing unit 602 described above, which will not be repeated here. The communication interface 702 is specifically used to execute the actions of the communication unit 603 described above, which will not be repeated here.

[0208] The processor 701 can be a CPU or a digital processing unit, etc. The processor 701 can be used to process communication protocols and communication data, control the whole communication device, execute software programs, process data of the software programs, such as but not limited to baseband related processing. The communication interface 702 can be used to transceive signals, such as but not limited to radio frequency transceiving. The above-mentioned devices can be respectively arranged on chips independent of each other, or at least part of or all of them can be arranged on the same chip. For example, the processor 701 can be further divided into an analog baseband processor and a digital baseband processor. Among them, the analog baseband processor can be integrated with the transceiver on the same chip, and the digital baseband processor can be arranged on an independent chip. With the continuous development of integrated circuit technology, more and more devices can be integrated on the same chip, for example, the digital baseband processor can be integrated with various application processors (such as but not limited to graphic processors, multimedia processors, etc.) on the same chip. Such a chip can be called a system on chip. Whether to arrange each device independently on different chips or to integrate them on one or more chips often depends on the specific needs of product design. The embodiment of the present application does not limit the specific implementation form of the above-mentioned devices.

[0209] The communication interface 702 can be a transceiver, an interface circuit such as a transceiving circuit, etc., or a transceiving chip, etc. Optionally, the communication interface 702 can comprise a radio frequency circuit and an antenna, and the radio frequency circuit is mainly used for conversion between baseband signals and radio frequency signals and processing of the radio frequency signals. The antenna is mainly used for transceiving radio frequency signals in the form of electromagnetic waves. The input and output device, such as a touch screen, a display screen, a keyboard, etc., is mainly used for receiving user input data and outputting data to the user.

[0210] The memory 703 is configured to store programs executed by the processor 701. The memory 703 can be a non-volatile memory such as a hard disk drive (HDD) or a solid-state drive (SSD), and can also be a volatile memory such as a random-access memory (RAM). The memory 703 can be any other medium capable of carrying or storing desired program codes in the form of instructions or data structures and capable of being accessed by a computer, but is not limited to this.

[0211] When the communication apparatus is powered on, the processor 701 can read a software program in the memory 703, interpret and execute instructions of the software program, and process data of the software program. When data needs to be transmitted wirelessly, the processor 701 performs baseband processing on the data to be transmitted, and outputs a baseband signal to the radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal, and transmits a radio frequency signal in the form of an electromagnetic wave through an antenna. When data is transmitted to the communication apparatus, the radio frequency circuit receives a radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor 701. The processor 701 converts the baseband signal into data and processes the data.

[0212] In another implementation, the radio frequency circuit and the antenna can be arranged independently of the processor that performs baseband processing, for example, in a distributed scenario, the radio frequency circuit and the antenna can be arranged remotely from the communication apparatus.

[0213] The specific connection medium between the communication interface 702, the processor 701, and the memory 703 in the embodiments of the present application is not limited. In FIG. 7, the memory 703, the processor 701, and the communication interface 702 are connected through a bus 704, which is represented by a thick line in FIG. 7. The connection mode between other components is only schematically illustrated, and is not limited. The bus can be divided into an address bus, a data bus, a control bus, and the like. For convenience of representation, only one thick line is used in FIG. 7, but it does not mean that there is only one bus or only one type of bus.

[0214] Optionally, the communication apparatus can be a stand-alone device or can be part of a larger device. For example, the communication apparatus can be:

[0215] (1) a stand-alone integrated circuit (IC), or a chip, or a chip system or subsystem;

[0216] (2) a set of one or more ICs, which can optionally include a storage component for storing data and instructions;

[0217] (3) Application specific integrated circuit (ASIC), such as a modem;

[0218] (4) A module that can be embedded within other devices;

[0219] (5) A receiver, a smart terminal, a wireless device, a handset, a mobile unit, a car device, a cloud device, an artificial intelligence device, and the like;

[0220] (6) Other, and the like.

[0221] In the embodiments of the present application, "multiple" can mean two or more than two. Therefore, in the embodiments of the present application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, "including at least one" means including one, two or more, for example, including at least one of A, B and C, then including A, B, C, A and B, A and C, B and C, or A, B and C. "And / or" describes the association relationship of the associated objects, and there can be three kinds of relationships, for example, A and / or B, which can represent three cases: A exists alone, A and B exist together, and B exists alone. In addition, the character " / ", if not specially stated, generally represents an "or" relationship between the associated objects before and after it.

[0222] In addition, the terms "system" and "network" in the embodiments of the present application can be used interchangeably, and "according to" and "based on" can be used interchangeably. The ordinal numbers "first", "second" and the like mentioned in the embodiments of the present application are generally used to distinguish different objects, and are not used to limit the order, time sequence, priority or importance of multiple objects. For example, the first communication device and the second communication device in the embodiments of the present application are used to distinguish two communication devices, and do not limit the priority or importance of the two communication devices.

[0223] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system or a computer program product. Therefore, the present application can be in the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can be in the form of a computer program product implemented on one or more computer usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

[0224] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks or in conjunction with the flowchart blocks. These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks.

[0225] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks or in conjunction with the flowchart blocks. These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks.

[0226] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks or in conjunction with the flowchart blocks. These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks.

Claims

1. A communication method characterized by comprising: The method comprises: acquiring a first sequence; processing a received signal according to the first sequence to detect a synchronization signal, the synchronization signal being based on a second sequence; wherein the first sequence and the second sequence are ideally cross-correlated, and the second sequence comprises at least one element with a value of 0.

2. The method of claim 1, wherein, The number of elements with a value of 0 in the second sequence is (L-1) / 2, L representing the length of the second sequence.

3. The method according to claim 1 or 2, characterized in that, The second sequence further comprises at least one element with a value of 1.

4. The method of claim 3, wherein, The second sequence is denoted as [x(n)], and the first sequence is denoted as [y(n)], n=0, 1, 2, …, L-1, and the second sequence and the first sequence satisfy: y(n)=1-2x(n) or y(n)=2x(n)-1.

5. The method according to claim 1 or 2, characterized in that, The second sequence further comprises at least one element having a value of L represents the length of the second sequence.

6. The method of claim 5, wherein, The second sequence is denoted as [x(n)], and the first sequence is denoted as [y(n)], n=0, 1, 2, …, L-1, and the second sequence and the first sequence satisfy: or where A is a constant.

7. The method according to any one of claims 1 to 6, characterized in that, The second sequence is one of W sequences, the W sequences correspond to W recursive formulas one by one, and W is an integer greater than 1.

8. The method of claim 7, wherein, The W recursive formulas include any one of the following multiple terms: s(n+7)=(s(n+1)+s(n))mod2; s(n+7)=(s(n+3)+s(n))mod2; s(n+7)=(s(n+5)+s(n+2)+s(n+1)+s(n))mod2.

9. The method according to any one of claims 1 to 8, characterized in that, Processing the received signal according to the first sequence comprises: performing discrete Fourier transform (DFT) processing on the first sequence to obtain a third sequence; mapping the third sequence onto a plurality of subcarriers and performing inverse fast Fourier transform (IFFT) processing; performing correlation processing on the received signal according to the sequence after IFFT processing; wherein the first sequence is denoted as [y(n)], the third sequence is denoted as [z(n)], n = 0, 1, 2,..., L-l, and the first sequence and the third sequence satisfy:

10. The method according to any one of claims 1 to 8, characterized in that, Processing the received signal according to the first sequence comprises: oversampling the first sequence, and performing correlation processing on the received signal according to the oversampled sequence; or downsampling the received signal, and performing correlation processing on the downsampled signal according to the first sequence.

11. The method according to any one of claims 1 to 8, characterized in that, Processing the received signal according to the first sequence comprises: mapping the first sequence onto a plurality of subcarriers to obtain a frequency domain sequence; performing DFT processing on the received signal to obtain a frequency domain signal; performing conjugate point multiplication on the frequency domain sequence and the frequency domain signal, and performing inverse discrete Fourier transform (IDFT) processing on the sequence after conjugate point multiplication.

12. A communication method characterized by comprising: The method comprises: generating a synchronization signal according to a second sequence; sending the synchronization signal; wherein the second sequence comprises at least one element with a value of 0, the second sequence and a first sequence are ideally cross-correlated, and the first sequence is used to detect the synchronization signal.

13. The method of claim 12, wherein, The number of elements with a value of 0 in the second sequence is (L-1) / 2, L representing the length of the second sequence.

14. The method according to claim 12 or 13, characterized in that, The second sequence further comprises at least one element with a value of 1.

15. The method of claim 14, wherein, The transmission power of the synchronization signal is a first power plus a power offset, the power offset being equal to dB or 10 log 10 [2L / (L+1)] dB, L denoting the length of the second sequence; The first power is predefined or preconfigured.

16. The method of claim 12 or 13, wherein, The second sequence further comprises at least one element having a value of L represents the length of the second sequence.

17. The method of claim 16, wherein, The sending power of the synchronization signal is the first power, and the first power is predefined or preconfigured.

18. The method according to any one of claims 12 to 17, characterized in that, The second sequence is one of W sequences, the W sequences correspond to W recursive formulas one by one, W is an integer greater than 1.

19. The method of claim 18, wherein, The W recursive formulas include any of the following multiple items: s(n+7) = (s(n+1) + s(n)) mod 2; s(n+7) = (s(n+3) + s(n)) mod 2; s(n+7) = (s(n+5) + s(n+2) + s(n+1) + s(n)) mod 2.

20. The method of any one of claims 12-19, wherein, According to the second sequence, a synchronization signal is generated, including: The second sequence is subjected to DFT processing to obtain a fourth sequence; The fourth sequence is mapped to a plurality of subcarriers and subjected to IFFT processing to generate the synchronization signal; wherein the second sequence is denoted as [x(n)], the fourth sequence is denoted as [g(n)], n = 0, 1, 2,..., L-1, and the second sequence and the fourth sequence satisfy:

21. The method of any one of claims 12-19, wherein, According to the second sequence, a synchronization signal is generated, including: The second sequence is mapped to a plurality of subcarriers and subjected to IFFT processing to generate the synchronization signal.

22. A method of communication, comprising: The method includes: According to the second sequence, a synchronization signal is generated, and the synchronization signal is sent; According to the first sequence, a received signal is processed to detect the synchronization signal; The first sequence and the second sequence are ideally cross-correlated, and the second sequence includes at least one element with a value of 0.

23. A communications device, characterized by The method includes units for performing any of the methods of claims 1-21.

24. A communications device, characterized by The processor is coupled to the memory, and the memory stores a computer program; the processor is configured to invoke part or all of the computer program in the memory, so that the method of any of claims 1-21 is executed.

25. A communication system, characterized by The communication system includes a first communication device configured to perform the method of any of claims 1-11, and a second communication device configured to perform the method of any of claims 12-21.

26. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, and when part or all of the computer program is executed by a computer, the method of any of claims 1-21 is executed.

27. A computer program product, characterised in that, When the computer reads and executes the computer program product, the method of any of claims 1-21 is executed.

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