Method of configuring a substrate positioning system of a semiconductor manufacturing tool

Abstract

Disclosed is a method of configuring a substrate positioning system of a semiconductor manufacturing tool or metrology tool, the method comprising: obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate using a bonding tool; and using the bonding data for a specific substrate portion to configure the substrate positioning system for improving a manufacturing or metrology step performed on said specific substrate portion.

Description

METHOD OF CONFIGURING A SUBSTRATE POSITIONING SYSTEM OF A SEMICONDUCTOR MANUFACTURING TOOLCROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of EP application 24189246.2 which was filed on Inly 17, 2024. and EP application 25157291.3 which was filed on February 12, 2025 which are incorporated herein in its entirety by reference.BACKGROUNDField of the Invention

[0002] The present invention relates to a method and apparatus for lithography and in particular to lithography on a reconstituted substrate having been the subject of a die-to-wafer bonding process.Background

[0003] A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”- direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.

[0004] In order to monitor the lithographic process, parameters of the patterned substrate are measured. Parameters may include, for example, the overlay error between successive layers formed in or on the patterned substrate and critical linewidth (CD) of developed photosensitive resist. This measurement may be performed on a product substrate and / or on a dedicated metrology target. There are various techniques for making measurements of the microscopic structures formed in lithographic processes, including the use of scanning electron microscopes and various specialized tools. A fast and non-invasive form of specialized inspection tool is a scatterometer in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered or reflected beam are measured. Two main types of scatterometer are known. Spectroscopic scatterometers direct a broadband radiation beam onto the substrate and measure the spectrum (intensity as a function ofwavelength) of the radiation scattered into a particular narrow angular range. Angularly resolved scatterometers use a monochromatic radiation beam and measure the intensity of the scattered radiation as a function of angle.

[0005] Examples of known scatterometers include angle -resolved scatterometers of the type described in US2006033921A1 and US2010201963A1. The targets used by such scatterometers are relatively large, e.g., 40pm by 40pm, gratings and the measurement beam generates a spot that is smaller than the grating (i.e., the grating is underfilled). In addition to measurement of feature shapes by reconstruction, diffraction based overlay can be measured using such apparatus, as described in published patent application US2006066855A1. Diffraction-based overlay metrology using dark-field imaging of the diffraction orders enables overlay measurements on smaller targets. Examples of dark field imaging metrology can be found in international patent applications WO 2009 / 078708 and WO 2009 / 106279 which documents are hereby incorporated by reference in their entirety. Further developments of the technique have been described in published patent publications US20110027704A, US20110043791A, US2011102753A1, US20120044470A, US20120123581A, US20130258310A, US20130271740A and WO2013178422A1. These targets can be smaller than the illumination spot and may be surrounded by product structures on a wafer. Multiple gratings can be measured in one image, using a composite grating target. The contents of all these applications are also incorporated herein by reference.

[0006] Process control methods are used in the manufacture of integrated devices to monitor and control the processes of application of a pattern on a substrate or measurement of such a pattern. Such process control techniques are typically performed to obtain corrections for control of the process. Subsequently, it is sometimes required (for certain devices) to bond substrates together. Bonding processes include die-to-die, die-to-wafer and wafer-to-wafer.

[0007] In die-to-wafer bonding, individual dies or chiplets are bonded to an acceptor wafer or substrate. A wafer reconstitution (or wafer reconstruction) may then be performed, comprising one or more processing steps to, for example, fdl in gaps between the individual dies. The reconstituted wafer undergoes one or more further lithography processes (patterning steps).

[0008] It is desirable to improve lithography processes on reconstituted wafers in the manufacture of integrated devices.SUMMARY

[0009] In a first aspect of the invention, there is provided a method of configuring a substrate positioning system of a semiconductor manufacturing tool or metrology tool, the method comprising: obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate using a bonding tool; and using the bonding data for a specific substrate portion to configure the substrate positioning system for improving a manufacturing or metrology step performed on said specific substrate portion.

[0010] In a second aspect of the invention, there is provided a semiconductor manufacturing tool or metrology tool comprising said substrate positioning system and being operable to perform the method of the first aspect.

[0011] In a third aspect of the invention, there is provided a computer program comprising program instructions operable to perform the method of the first aspect, when run on a suitable apparatus.

[0012] Further aspects, features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings in which:Figure 1 depicts a lithographic apparatus together with other apparatuses forming a production facility for semiconductor devices; andFigure 2 illustrates a die-to-wafer bonded substrate.DETAILED DESCRIPTION

[0014] Before describing embodiments of the invention in detail, it is instructive to present an example environment in which embodiments of the present invention may be implemented.

[0015] Figure 1 at 200 shows a lithographic apparatus LA as part of an industrial production facility implementing a high -volume, lithographic manufacturing process. In the present example, the manufacturing process is adapted for the manufacture of for semiconductor products (integrated circuits) on substrates such as semiconductor wafers. The skilled person will appreciate that a wide variety of products can be manufactured by processing different types of substrates in variants of this process. The production of semiconductor products is used purely as an example which has great commercial significance today.

[0016] Within the lithographic apparatus (or “litho tool” 200 for short), a measurement station MEA is shown at 202 and an exposure station EXP is shown at 204. A control unit LACU is shown at 206. In this example, each substrate visits the measurement station and the exposure station to have a pattern applied. In an optical lithographic apparatus, for example, a projection system is used to transfer a product pattern from a patterning device MA onto the substrate using conditioned radiation and a projection system. This is done by forming an image of the pattern in a layer of radiation-sensitive resist material.

[0017] The term “projection system” used herein should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and substrate optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. The patterning MA device may be a mask or reticle, which imparts a pattern to a radiation beam transmitted or reflected by the patterning device. Well-known modes of operation include a stepping mode and a scanning mode. As is well known, the projection system may cooperate with support and positioning systems for the substrate and the patterning device in a variety of ways to apply a desired pattern to many target portions across a substrate. Programmable patterning devices may be used instead of reticles having a fixed pattern. The radiation for example may include electromagnetic radiation in the deep ultraviolet (DUV) or extreme ultraviolet (EUV) wavebands. The present disclosure is also applicable to other types of lithographic process, for example imprint lithography and direct writing lithography, for example by electron beam.

[0018] The lithographic apparatus control unit LACU which controls all the movements and measurements of various actuators and sensors to receive substrates W and reticles MA and to implement the patterning operations. . LACU also includes signal processing and data processing capacity to implement desired calculations relevant to the operation of the apparatus. In practice, control unit LACU will be realized as a system of many sub-units, each handling the real-time data acquisition, processing and control of a subsystem or component within the apparatus.

[0019] Before the pattern is applied to a substrate at the exposure station EXP, the substrate is processed in at the measurement station MEA so that various preparatory steps may be carried out. The preparatory steps may include mapping the surface height of the substrate using a level sensor and measuring the position of alignment marks on the substrate using an alignment sensor. The alignment marks are arranged nominally in a regular grid pattern. However, due to inaccuracies in creating the marks and also due to deformations of the substrate that occur throughout its processing, the marks deviate from the ideal grid. Consequently, in addition to measuring position and orientation of the substrate, the alignment sensor in practice must measure in detail the positions of many marks across the substrate area, if the apparatus is to print product features at the correct locations with very high accuracy. The apparatus may be of a so-called dual stage type which has two substrate tables, each with a positioning system controlled by the control unit LACU. While one substrate on one substrate table is being exposed at the exposure station EXP, another substrate can be loaded onto the other substrate table at the measurement station MEA so that various preparatory steps may be carried out. The measurement of alignment marks is therefore very time-consuming and the provision of two substrate tables enables a substantial increase in the throughput of the apparatus. If the position sensor IF is not capable of measuring the position of the substrate table while it is at the measurement station as well as at the exposure station, a second position sensor may be provided to enable the positions of the substrate table to be tracked at both stations. Lithographic apparatus LA may for example is of aso-called dual stage type which has two substrate tables and two stations - an exposure station and a measurement station- between which the substrate tables can be exchanged.

[0020] Within the production facility, apparatus 200 forms part of a “litho cell” or “litho cluster” that contains also a coating apparatus 208 for applying photosensitive resist and other coatings to substrates W for patterning by the apparatus 200. At an output side of apparatus 200, a baking apparatus 210 and developing apparatus 212 are provided for developing the exposed pattern into a physical resist pattern. Between all of these apparatuses, substrate handling systems take care of supporting the substrates and transferring them from one piece of apparatus to the next. These apparatuses, which are often collectively referred to as the track, are under the control of a track control unit which is itself controlled by a supervisory control system SCS, which also controls the lithographic apparatus via lithographic apparatus control unit LACU. Thus, the different apparatus can be operated to maximize throughput and processing efficiency. Supervisory control system SCS receives recipe information R which provides in great detail a definition of the steps to be performed to create each patterned substrate.

[0021] Once the pattern has been applied and developed in the litho cell, patterned substrates 220 are transferred to other processing apparatuses such as are illustrated at 222, 224, 226. A wide range of processing steps is implemented by various apparatuses in a typical manufacturing facility. For the sake of example, apparatus 222 in this embodiment is an etching station, and apparatus 224 performs a post-etch annealing step. Further physical and / or chemical processing steps are applied in further apparatuses, 226, etc.. Numerous types of operation can be required to make a real device, such as deposition of material, modification of surface material characteristics (oxidation, doping, ion implantation etc.), chemical-mechanical polishing (CMP), and so forth. The apparatus 226 may, in practice, represent a series of different processing steps performed in one or more apparatuses. As another example, apparatus and processing steps may be provided for the implementation of selfaligned multiple patterning, to produce multiple smaller features based on a precursor pattern laid down by the lithographic apparatus.

[0022] As is well known, the manufacture of semiconductor devices involves many repetitions of such processing, to build up device structures with appropriate materials and patterns, layer-by-layer on the substrate. Accordingly, substrates 230 arriving at the litho cluster may be newly prepared substrates, or they may be substrates that have been processed previously in this cluster or in another apparatus entirely. Similarly, depending on the required processing, substrates 232 on leaving apparatus 226 may be returned for a subsequent patterning operation in the same litho cluster, they may be destined for patterning operations in a different cluster, or they may be finished products to be sent for dicing and packaging.

[0023] Each layer of the product structure requires a different set of process steps, and the apparatuses 226 used at each layer may be completely different in type. Further, even where the processing steps to be applied by the apparatus 226 are nominally the same, in a large facility, there may be several supposedly identical machines working in parallel to perform the step 226 on different substrates. Smalldifferences in set-up or faults between these machines can mean that they influence different substrates in different ways. Even steps that are relatively common to each layer, such as etching (apparatus 222) may be implemented by several etching apparatuses that are nominally identical but working in parallel to maximize throughput. In practice, moreover, different layers require different etch processes, for example chemical etches, plasma etches, according to the details of the material to be etched, and special requirements such as, for example, anisotropic etching.

[0024] The previous and / or subsequent processes may be performed in other lithography apparatuses, as just mentioned, and may even be performed in different types of lithography apparatus. For example, some layers in the device manufacturing process which are very demanding in parameters such as resolution and overlay may be performed in a more advanced lithography tool than other layers that are less demanding. Therefore some layers may be exposed in an immersion type lithography tool, while others are exposed in a ‘dry’ tool. Some layers may be exposed in a tool working at DUV wavelengths, while others are exposed using EUV wavelength radiation.

[0025] In order that the substrates that are exposed by the lithographic apparatus are exposed correctly and consistently, it is desirable to inspect exposed substrates to measure properties such as overlay errors between subsequent layers, line thicknesses, critical dimensions (CD), etc. Accordingly a manufacturing facility in which litho cell LC is located also includes metrology system which receives some or all of the substrates W that have been processed in the litho cell. Metrology results are provided directly or indirectly to the supervisory control system SCS. If errors are detected, adjustments may be made to exposures of subsequent substrates, especially if the metrology can be done soon and fast enough that other substrates of the same batch are still to be exposed. Also, already exposed substrates may be stripped and reworked to improve yield, or discarded, thereby avoiding performing further processing on substrates that are known to be faulty. In a case where only some target portions of a substrate are faulty, further exposures can be performed only on those target portions which are good.

[0026] Also shown in Figure 1 is a metrology apparatus 240 which is provided for making measurements of parameters of the products at desired stages in the manufacturing process. A common example of a metrology station in a modem lithographic production facility is a scatterometer, for example a dark -field scatterometer, an angle -re solved scatterometer or a spectroscopic scatterometer, and it may be applied to measure properties of the developed substrates at 220 prior to etching in the apparatus 222. Using metrology apparatus 240, it may be determined, for example, that important performance parameters such as overlay or critical dimension (CD) do not meet specified accuracy requirements in the developed resist. Prior to the etching step, the opportunity exists to strip the developed resist and reprocess the substrates 220 through the litho cluster. The metrology results 242 from the apparatus 240 can be used to maintain accurate performance of the patterning operations in the litho cluster, by supervisory control system SCS and / or control unit LACU 206 making small adjustments over time, thereby minimizing the risk of products being made out-of-specification, and requiring re-work.

[0027] Additionally, metrology apparatus 240 and / or other metrology apparatuses (not shown) can be applied to measure properties of the processed substrates 232, 234, and incoming substrates 230. The metrology apparatus can be used on the processed substrate to determine important parameters such as overlay or CD.

[0028] Die-to-Wafer comprises using a bonding tool to bond a number of individual substrate portions or dies to an acceptor or base substrate (or wafer), e.g., to provide a heterogeneous 3D integration of the individual dies onto the substrate. The dies, for example, may have multiple different data processing and / or storage functionalities and different dimensions.

[0029] Recent technology trends include the wafer-level processing of so-called reconstituted wafers. Reconstituted wafers typically comprise a patterned base or acceptor substrate with multiple dies bonded thereon, after which the gaps in between the dies are filled with a material (e.g., oxide or oxynitride material). A subsequent process of flattening and cleaning prepares the reconstituted wafers for further wafer-level patterning. The further wafer-level patterning may comprise, for example, patterning of through-silicon-vias (TSVs), re-distribution layers (RDLs) and / or other functional structures. This patterning is executed using lithography equipment, e.g., a scanner or lithographic apparatus used for patterning conventional wafers.

[0030] As such, the manufacture of a reconstituted wafer may comprise the use of one or more lithographic apparatuses to pattern the acceptor wafer and one or more other wafers from which the individual to-be-bonded dies are cut, and a bonding tool to bond the dies to the acceptor wafer.

[0031] In regular lithography, the aforementioned alignment techniques determine an alignment grid by reference to which the patterns are positioned. The alignment grid is modeled at wafer level (interfield) and field level (intra-field). This means that by measuring the deformation on a sub-sampled number of locations on the wafer, the complete wafer deformation can be modeled, depending on the nature of the deformation and the model used to describe it. For example, a single field (or a field per region) may be measured densely and an intra-field model fitted, with the remaining fields being measured sparsely to determine an interfield model.

[0032] However, for reconstituted wafers, every die location is, at least within certain constraints (e.g. bonding and placement design rules), independent of the other die locations and therefore is not part of a common grid. This is conceptually illustrated in Figure 2, where the individual dies 300 can be seen to be irregularly placed and oriented with respect to the acceptor substrate 310. On a typical such substrate, there may actually be hundreds of dies bonded to the acceptor wafer.

[0033] Regular lithography alignment, as described above, is typically performed in three steps. A first step may comprise pre-alignment step, during which a first set of alignment marks (coarse alignment marks) are found. When the coarse alignment marks have been found, a coarse alignment step is performed to find a second set of alignment marks (fine alignment marks). Finally, a fine alignment step measures the fine alignment marks to determine their position from which the aforementioned grid is determined.

[0034] For accurate positioning and therefore overlay control of the subsequent patterning on the reconstituted wafer (e.g., TSV, RDL), requires knowledge of the location of each bonded die. This means that an accurate grid description of a reconstituted wafer requires that every individual die is measured. In particular, a pre-alignment and coarse alignment needs to be performed per die such that the capture range for final alignment is met for the alignment marks of each die. This is called field-by- field alignment. The number of measurements per die will quickly increase depending on the nature (order) of the deformation. This will lead to slowdown of wafer throughput making the technology less cost-effective.

[0035] It is proposed herein to improve throughput in lithography processes (e.g., patterning) on reconstituted wafers by using bonding data describing a respective intended bonding location (and / or orientation) of each die.

[0036] As such, a method of configuring a substrate positioning system (e.g., a substrate stage or wafer stage) of a semiconductor manufacturing tool or metrology tool is proposed. The method comprises obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate (e.g., bonded dies); and using the bonding data to configure the substrate positioning system such that at least one mark (e.g., final alignment marks) on each of the plurality of substrate portions are aligned to a measurement system (e.g., alignment system) within the semiconductor manufacturing tool or metrology tool.

[0037] The respective intended bonding location may comprise static data (e.g., the designed locations or intended locations as input to the bonding tool), or dynamic data (e.g., feedforward bonding data from bonder to lithography apparatus based on measurement within the bonder).

[0038] It is proposed that the lithographic apparatus uses this bonding data to position the reconstituted wafer such that fine alignment marks are in capture range of the fine alignment measurement system. In doing this, the per die pre-alignment and coarse alignment steps may be skipped. The final alignment measurements can then be used for modeling and expose side correction purposes. Dispensing with the need for this per die pre-alignment and coarse alignment will improve speed and throughput significantly. A single pre-alignment and coarse alignment may still be performed initially on the substate as would be done when aligning a standard wafer.

[0039] The concepts herein assume that the bonding tools positional accuracy when bonding the dies is within the fine alignment capture range.

[0040] As such, there is no longer a requirement for field-by-field alignment metrology on the reconstituted wafers and the lithography equipment productivity increases. Similar to standard alignment metrology and modelling, only a single die or field (or a subset of dies or fields) need be measured more densely, with this intra-field metrology being used for all the dies / fields on the wafer. For reconstituted wafers comprising multiple die types in one layer on a single wafer, the dense measurement can be performed, e.g., once per die type.

[0041] To implement the concept herein, the lithographic apparatus may be provided with an interface for receiving such bonding data. The bonding data may be referenced to a common co-ordinate system, being common to the bonding tool and the lithographic apparatus (e.g., the alignment system or substrate positioning system of the lithographic apparatus).

[0042] More generally, mutual grid and die location information may be maintained from metrology data from the bonder tool and lithography apparatus to determine the common co-ordinate system. This common co-ordinate system may be used by either or both of the lithographic apparatus (e.g., when exposing further patterns on the reconstituted wafer) and the bonding tool (e.g., when bonding dies to the acceptor substrate). As such, the lithography grid information (alignment grid) can be used by the die bonder to determine the bonder target die location. Should the to-be-bonded die size not be equal to the die size of the patterned base wafer, a substrate plane or x-y offset can be added. Since accuracy and productivity are inversely proportional, this method may increase the die- bonder productivity.

[0043] For some use cases the overlay requirements of post-bonding lithographically applied layers on the re -constituted wafer may be relatively relaxed. In such a case metrology data from the bonder tool relating to die positions, orientations, and optionally (low order) distortions may be used by a lithographic apparatus for patterning the post-bonding layers instead of relying on time consuming fine alignment measurements (at intra-field or intra-die level). In such a scenario it is sufficient that the lithographic apparatus performs a coarse alignment to ensure the re -constituted wafer is positioned and oriented correctly with respect to the co-ordinate system of the lithographic apparatus. Such a coarse alignment requires readout of a limited number of alignment marks on the re -constituted wafer (for example 4 or 5, typically not more than 10) and hence has a limited impact on the throughput of the lithographic apparatus. The metrology data (alignment and / or overlay measurement data) as provided by the bonder tool is then used to control the exposures by the lithographic apparatus on the reconstituted wafer in such a way that the applied patterns are aligned to the structures of the individual dies on the re-constituted wafer.

[0044] In an example the bonder tool has a metrology system capable of determining the position, orientation (rotation) and dimensions of the substrate portions (dies) 300 after they are bonded to an acceptor substrate 310, as for example depicted in figure 2. The metrology system may be for example a machine vision system capable of measuring said positions, orientations and dimensions relative to one or more reference structures (not shown) distributed across the acceptor substrate 310. Alternatively the metrology system may be an image based or diffraction based alignment measurement system that determines the position of alignment marks provided to the substrate portions (dies) 300.

[0045] After bonding of all dies 300 to the acceptor substrate 310 and performing the alignment and / or overlay measurements the metrology data may be generated. The metrology data may be sorted as a list of records, each record comprising a die ID (number) and its measured quantities, such as die position / dimension and rotation with respect to the reference structures on the acceptor substrate 310.The metrology data is subsequently forwarded to the lithographic apparatus for use in performing one or more post-bond lithographic patterning steps.

[0046] As the bonder tool metrology data is referenced to reference structures on the re -constituted wafer the lithographic apparatus then may perform a coarse alignment to said reference structures to ensure the bonder tool metrology data and the co-ordinate system of the lithographic apparatus are properly referenced to each other. The per die available bonder metrology data may then be used to enhance individual exposures of the lithographic apparatus corresponding to the die to which the bonder tool metrology data refers (die ID). In this fashion a Correction Per Exposure (CPE) overlay optimization mechanism is provided that does not require time consuming fine alignment measurements by the lithographic apparatus. The CPE is typically implemented by optimizing a substrate positioning system of the lithographic apparatus such that the substrate portion is properly aligned and / or dimensioned with respect to the image of a patterning device exposed to that substrate portion.

[0047] It is not excluded to still perform fine alignment measurements on a reduced set of alignment marks in case overlay accuracy requirements would require this.

[0048] In addition to a lithographic apparatus any semiconductor manufacturing tool used in postbonding processing may benefit from the bonding tool metrology data to improve substrate portion (die) specific processing or metrology.

[0049] In addition to semiconductor manufacturing tools also metrology and inspection tools may benefit from the bonding tool metrology data to optimize metrology and / or inspection on die specific areas on the reconstituted substrate. For example a scatterometer of e-beam metrology tool may use the bonding tool metrology data to position the reconstituted substrate with respect to a measurement system such that particular patterns of interest comprised within a portion (die) of interest are in a Field Of View (FOV) of the measurement system.

[0050] In an embodiment a method is provided to configure a semiconductor manufacturing tool or a metrology tool, the method comprising: receiving metrology data generated by a bonding tool associated with the position, orientation and / or dimension of substrate portions on a reconstituted substrate, wherein the metrology data is referenced to reference structures distributed across the reconstituted substrate; loading the reconstituted substrate into the semiconductor manufacturing tool or metrology tool; aligning the loaded reconstituted substrate to the reference structures using a measurement system of the semiconductor manufacturing tool or metrology tool; and configuring the semiconductor manufacturing tool or metrology tool for processing or measuring of a substrate portion using the received metrology data corresponding to the substrate portion.

[0051] In an embodiment the metrology data comprises positions of individual dies bonded to an acceptor substrate.

[0052] In an embodiment the metrology data comprises orientations of individual dies bonded to an acceptor substrate.

[0053] In an embodiment the metrology data comprises dimensions of individual dies bonded to an acceptor substrate.

[0054] In an embodiment the metrology data is generated by a machine vision system within a bonding tool.

[0055] In an embodiment the metrology data is generated by an image or diffraction based alignment system within a bonding tool, configured to measure positions of alignment marks provided to the substrate portions.

[0056] Further embodiments of the invention are disclosed in a first list of the following numbered clauses:1. A method of configuring a substrate positioning system of a semiconductor manufacturing tool or metrology tool, the method comprising: obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate using a bonding tool; and using the bonding data to configure the substrate positioning system such that one or more marks on each of the plurality of substrate portions are aligned to a measurement system within the semiconductor manufacturing tool or metrology tool.2. A method according to clause 1, wherein the bonding data is referenced to a co-ordinate system common to the substrate positioning system and the bonding tool.3. A method according to clause 1 or 2, wherein said bonding data is obtained from the bonding tool.4. A method according to any preceding clause, wherein said bonding data is determined, at least in part, from measurements performed within the bonding tool.5. A method according to any of clauses 1 to 3, wherein the bonding data comprises the intended bonding locations by design.6. A method according to any preceding clause, wherein said substrate comprises a reconstituted substrate.7. A method according to any preceding clause, wherein said bonding data is used to configure the substrate positioning system such that said one or more marks on each of the plurality of substrate portions is aligned to within a fine capture range for said measurement system.8. A method according to any preceding clause, wherein each said one or more marks comprises a fine alignment mark.9. A method according to any preceding clause, comprising not performing a coarse positioning for each of said plurality of substrate portions.10. A method according to any preceding clause, comprising only performing a coarse positioning once on said substrate.11. A method according to any preceding clause, comprising only performing a relatively dense measurement on a subset of said substrate portions, compared to a measurement performed on the other substrate portions of said plurality of substrate portions.12. A method according to clause 11, wherein said subset of said substrate portions comprises a single substrate portion per different substrate portion type.13. A method according to any preceding clause, wherein each substrate portion comprises an individual die.14. A method according to any preceding clause, comprising measuring at least some of said one or more marks on each of the plurality of substrate portions to obtain alignment data.15. A method according to clause 14, comprising: determining an alignment grid from said alignment data; and determining positional corrections for exposure on said substrate with reference to said alignment grid.16. A method according to clause 15, comprising patterning said substrate in accordance to said positional corrections.17. A method of bonding a plurality of substrate portions to a substrate, the method comprising: obtaining alignment grid information from a semiconductor manufacturing tool; obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions to be bonded to a substrate; and using the bonding data and alignment grid information to determine the bonding location for each said plurality of substrate portions.18. A method according to clause 17, comprising: bonding each said plurality of substrate portions at the determined bonding locations.19. A semiconductor manufacturing tool or metrology tool comprising said substrate positioning system and being operable to perform the method of any of clauses 1 to 16.20. A semiconductor manufacturing tool or metrology tool according to clause 19, comprising an interface operable to receive said bonding data.21. A semiconductor manufacturing tool or metrology tool according to clause 19 or 20, comprising a processor operable to determine a co-ordinate system from said bonding data which is common to said bonding tool and substrate positioning system.22. A bonding tool being operable to perform the method of clause 17 or 18.23. A semiconductor manufacturing system comprising: the semiconductor manufacturing tool or metrology tool of any of clauses 19 to 21; and the bonding tool of clause 22.24. A computer program comprising program instructions operable to perform the method of any of clauses 1 to 17, when run on a suitable apparatus.25. A non-transient computer program carrier the computer program of clause 24.26. A patterned substrate obtained by performance of the method of clause 16.27. A method of configuring a substrate positioning system of a semiconductor manufacturing tool or metrology tool, the method comprising: obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate using a bonding tool;and using the bonding data for a specific substrate portion to configure the substrate positioning system for improving a manufacturing or metrology step performed on said specific substrate portion.28. A method according to clause 27, wherein the bonding data is referenced to a co-ordinate system common to the substrate positioning system and the bonding tool.29. A method according to clause 27 or 28, wherein said bonding data is obtained from the bonding tool.30. A method according to any of clauses 27 to 29, wherein said bonding data is determined, at least in part, from measurements performed within the bonding tool.31. A method according to any of clauses 27 to 30, wherein said substrate comprises a reconstituted substrate.32. A method according to any of clauses 27 to 31, wherein said bonding data is used to configure the substrate positioning system such that one or more marks on each of the plurality of substrate portions is aligned to within a capture range of a measurement system of said semiconductor manufacturing or metrology tool.33. A method according to any of clauses 27 to 32, wherein each substrate portion comprises an individual die.34. A method according to any of clauses 27 to 33, comprising measuring at least some of said one or more marks on each of the plurality of substrate portions to obtain alignment data.35. A method according to clause 34, further comprising: determining an alignment grid from said alignment data; and determining positional corrections for exposure on said substrate with reference to said alignment grid.36. A method according to clause 30, wherein the bonding data is metrology data referenced to reference structures distributed across the substrate, and wherein the method further comprises: loading the substrate into the semiconductor manufacturing tool or metrology tool; and aligning the loaded substrate to the reference structures using a measurement system of the semiconductor manufacturing tool or metrology tool.37. A method according to clause 36, wherein the metrology data comprises positions of individual dies bonded to an acceptor substrate.38. A method according to clause 36, wherein the metrology data comprises orientations of individual dies bonded to an acceptor substrate.39. A semiconductor manufacturing tool or metrology tool comprising said substrate positioning system and being operable to perform the method of any of clauses 27 to 38.40. A semiconductor manufacturing tool or metrology tool according to clause 39, comprising an interface operable to receive said bonding data.41. A computer program comprising program instructions operable to perform the method of any of clauses 27 to 38, when run on a suitable apparatus.

[0057] The terms “radiation” and “beam” used in relation to the lithographic apparatus encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having a wavelength of or about 365, 355, 248, 193, 157 or 126 nm) and extreme ultra-violet (EUV) radiation (e.g., having a wavelength in the range of 5-20 nm), as well as particle beams, such as ion beams or electron beams.

[0058] The term “lens”, where the context allows, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic and substrate optical components.

[0059] The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying knowledge within the skill of the art, readily modify and / or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present invention. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description by example, and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0060] The breadth and scope of the present invention should not be limited by any of the above - described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

CLAIMS1. A method of configuring a substrate positioning system of a semiconductor manufacturing tool or metrology tool, the method comprising: obtaining bonding data describing a respective intended bonding location for each of a plurality of substrate portions bonded to a substrate using a bonding tool; and using the bonding data for a specific substrate portion to configure the substrate positioning system for improving a manufacturing or metrology step performed on said specific substrate portion.

2. A method according to claim 1, wherein the bonding data is referenced to a co-ordinate system common to the substrate positioning system and the bonding tool.

3. A method according to claim 1, wherein said bonding data is obtained from the bonding tool.

4. A method according to claim 1, wherein said bonding data is determined, at least in part, from measurements performed within the bonding tool.

5. A method according to claim 1, wherein said substrate comprises a reconstituted substrate.

6. A method according to claim 1, wherein said bonding data is used to configure the substrate positioning system such that one or more marks on each of the plurality of substrate portions is aligned to within a capture range of a measurement system of said semiconductor manufacturing or metrology tool.

7. A method according to claim 1, wherein each substrate portion comprises an individual die.

8. A method according to claim 1, comprising measuring at least some of said one or more marks on each of the plurality of substrate portions to obtain alignment data.

9. A method according to claim 8, further comprising: determining an alignment grid from said alignment data; and determining positional corrections for exposure on said substrate with reference to said alignment grid.

10. A method according to claim 4, wherein the bonding data is metrology data referenced to reference structures distributed across the substrate, and wherein the method further comprises: loading the substrate into the semiconductor manufacturing tool or metrology tool; andaligning the loaded substrate to the reference structures using a measurement system of the semiconductor manufacturing tool or metrology tool.

11. A method according to claim 10, wherein the metrology data comprises positions of individual dies bonded to an acceptor substrate.

12. A method according to claim 10, wherein the metrology data comprises orientations of individual dies bonded to an acceptor substrate.

13. A semiconductor manufacturing tool or metrology tool comprising said substrate positioning system and being operable to perform the method of claim 1.

14. A semiconductor manufacturing tool or metrology tool according to claim 13, comprising an interface operable to receive said bonding data.

15. A computer program comprising program instructions operable to perform the method of claim 1, when run on a suitable apparatus.

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