Light detection device

Abstract

A light detection device according to the present invention comprises a plurality of pixels which are two-dimensionally disposed, wherein each of the pixels has a photoelectric conversion unit and a plurality of multiplication units that are connected in parallel to each other and that are connected in series to the photoelectric conversion unit. The light detection device further comprises a semiconductor substrate in which the photoelectric conversion unit and the plurality of multiplication units are formed, wherein: each of the multiplication units is formed in a region of the semiconductor substrate where a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type are joined; the first semiconductor region is disposed at a center part of the pixel as viewed from the direction substantially perpendicular to the semiconductor substrate; and a plurality of the second semiconductor regions are disposed so as to overlap the first semiconductor region at parts other than the center part of the first semiconductor region as viewed from the direction substantially perpendicular to the semiconductor substrate.

Description

Photodetector

[0001] SUMMARY OF THE INVENTION Embodiments according to the present disclosure relate to a light detection device.

[0002] In recent years, photodetectors using a single photon avalanche diode (SPAD) have been attracting attention in the fields of image sensors and distance measuring sensors (see, for example, Patent Document 1).

[0003] International Publication No. 2023 / 068210

[0004] However, when SPAD is made into finer pixels, the distance between adjacent multiplication regions becomes too close, which can make it difficult to maintain the characteristics. Also, when making the pixels finer, it is necessary to reduce the mask opening size for ion implantation to form the multiplication regions, but there are cases where this is limited from a process standpoint.

[0005] Therefore, the present disclosure provides a photodetector device that can more appropriately achieve finer pixelation.

[0006] In order to solve the above problems, the present disclosure provides a photodetector device comprising a plurality of pixels arranged two-dimensionally, each pixel having a photoelectric conversion unit and a plurality of multiplication units connected in parallel to each other and connected in series to the photoelectric conversion unit, and further comprising a semiconductor substrate in which the photoelectric conversion unit and the plurality of multiplication units are formed, each of the multiplication units being formed in a region of the semiconductor substrate where a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type are junctioned, the first semiconductor region being arranged in the center of the pixel when viewed from a direction approximately perpendicular to the semiconductor substrate, and the plurality of second semiconductor regions being arranged so as to overlap with the first semiconductor region other than the center of the first semiconductor region when viewed from a direction approximately perpendicular to the semiconductor substrate.

[0007] The second semiconductor regions may be arranged so as to overlap the first semiconductor regions at corners of the first semiconductor regions when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0008] The semiconductor substrate may further include a third semiconductor region of the second conductivity type that is arranged other than at a center of the first semiconductor region and other than at a corner of the first semiconductor region when viewed from a direction approximately perpendicular to the semiconductor substrate, and the impurity concentration of the second conductivity type in the third semiconductor region may be lower than the impurity concentration of the second conductivity type in the second semiconductor region.

[0009] The semiconductor substrate may further have a fourth semiconductor region of the second conductivity type that is arranged at least in the center of the pixel when viewed from a direction approximately perpendicular to the semiconductor substrate and is arranged closer to the photoelectric conversion section than the second semiconductor region.

[0010] The fourth semiconductor region may be substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0011] The fourth semiconductor region may be connected to a fixed potential.

[0012] The fourth semiconductor region may be connected to a fixed potential by extending in a direction substantially perpendicular to the semiconductor substrate.

[0013] The fourth semiconductor region may be connected to a fixed potential by extending in a direction substantially parallel to the semiconductor substrate.

[0014] The fourth semiconductor region may extend between the plurality of multiplication sections in a direction substantially parallel to the semiconductor substrate when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0015] The first semiconductor region may have an m-sided polygon (m is a natural number of 3 or more) when viewed from a direction substantially perpendicular to the semiconductor substrate, and the plurality of multiplication sections may be m multiplication sections.

[0016] The pixel may be an m-sided polygon when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0017] The first semiconductor region may be substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0018] A combined region of the second semiconductor regions that are in contact with each other between adjacent pixels may be substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate.

[0019] When viewed from a direction substantially perpendicular to the semiconductor substrate, an outer edge of the first semiconductor region that overlaps with the second semiconductor region may protrude outward relative to an outer edge of the first semiconductor region that does not overlap with the second semiconductor region.

[0020] The semiconductor substrate may have a recess formed in a center of the pixel from a first surface of the semiconductor substrate, and the first semiconductor region may be disposed at an end of the recess.

[0021] The first conductivity type may be n-type, and the second conductivity type may be p-type.

[0022] The first conductivity type may be p-type, and the second conductivity type may be n-type.

[0023] Each of the pixels may further include a quencher section connected to one of the plurality of multiplication sections on the side opposite to the side connected to the photoelectric conversion section.

[0024] The second semiconductor regions may be disposed so as to be in contact with each other between the adjacent pixels.

[0025] 6A is a diagram illustrating an example of a functional block of each pixel used in a photodetector according to a first embodiment of the present disclosure. FIG. 6B is a diagram illustrating an example of a vertical cross-sectional configuration of the pixel of FIG. 1. FIG. 6C is a diagram illustrating an example of a horizontal cross-sectional configuration of the pixel of FIG. 2. FIG. 6D is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel during manufacturing according to the first embodiment and a comparative example. FIG. 6E is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the first embodiment and a comparative example. FIG. 6F is a diagram illustrating an example of a manufacturing method of a pixel according to the first embodiment. FIG. 6G is a diagram illustrating an example of a manufacturing method of a pixel following FIG. 6A. FIG. 6H is a diagram illustrating an example of a manufacturing method of a pixel following FIG. 6B. FIG. 6G is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel according to a second embodiment. FIG. 6H is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the second embodiment. FIG. 6H is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the third embodiment. FIG. 6H is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel according to a fourth embodiment. FIG. 6H is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the fourth embodiment. FIG. 6H is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel according to the fifth embodiment. FIG. 6H is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the fifth embodiment. FIG. 6H is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the fifth embodiment. FIG. 6J is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel according to the sixth embodiment. FIG. 6J is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel according to the sixth embodiment. FIG. 6J is a diagram illustrating an example of a horizontal cross-sectional 22A . FIG. 22B is a diagram showing an example of a horizontal cross-sectional configuration of a pixel according to the eighth embodiment. FIG. 22C is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 16th embodiment. FIG. 22D is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 17th embodiment. FIG. 22D is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 18th embodiment. FIG. 22A is a diagram showing an example of a horizontal cross-sectional configuration of a pixel according to the 9th embodiment. FIG. 22B is a diagram showing an example of a horizontal cross-sectional configuration of a pixel according to the 10th embodiment. FIG. 22C is a diagram showing an example of a horizontal cross-sectional configuration of a pixel according to the 11th embodiment. FIG. 22D is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 13th embodiment. FIG. 22C is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 14th embodiment. FIG. 22C is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 15th embodiment. FIG. 22D is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 16th embodiment. FIG. 22D is a diagram showing an example of a horizontal cross-sectional configuration of a pixel according to the 17th embodiment. FIG. 22D is a diagram showing an example of a method for forming an n-type semiconductor region and a p-type semiconductor region according to the 17th embodiment. FIG. 22D is a diagram showing an example of a vertical cross-sectional configuration of a pixel according to the 18th embodiment.It is a figure showing an example of a horizontal cross-sectional configuration of a pixel according to an eighteenth embodiment. It is a schematic diagram showing an example of the overall configuration of an electronic device. It is a block diagram showing an example of a schematic configuration of a vehicle control system. It is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.

[0026] Hereinafter, an embodiment of a photodetector will be described with reference to the drawings. The following description will focus on the main components of the photodetector, but the photodetector may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0027] First Embodiment [Configuration] Fig. 1 illustrates an example of a functional block of each pixel 10 used in a photodetector (hereinafter referred to as "photodetector") according to a first embodiment of the present disclosure. Fig. 2 illustrates an example of a cross-sectional configuration of each pixel 10. The photodetector includes a plurality of pixels 10 arranged in a matrix (two-dimensionally arranged). Each pixel 10 includes, for example, a light receiving section 11, a quenching section 12, and a detecting section 13, as shown in Fig. 1 .

[0028] The light receiving unit 11 generates a pulse signal in response to incident light. For example, as shown in FIG. 1, the light receiving unit 11 includes a photoelectric conversion unit 14 and multiple multiplication units 15. The multiple multiplication units 15 are connected in parallel with each other and are further connected in series to the photoelectric conversion unit 14. For example, as shown in FIG. 2, the multiple multiplication units 15 are formed together with the photoelectric conversion unit 14 in a common semiconductor substrate 21A and are connected to the photoelectric conversion unit 14 via impurity semiconductor regions (e.g., n-well 22, p-type semiconductor region 25) in the semiconductor substrate 21A. The multiple multiplication units 15 are electrically connected to each other via an n-type semiconductor region 23 on the side opposite to the side connected to the photoelectric conversion unit 14. The semiconductor substrate 21A is made of silicon or the like. The interlayer insulating film 21B is a layer formed in contact with the semiconductor substrate 21A and is made of multiple stacked SiO ２The light-receiving substrate 21 is configured such that a plurality of patterned wiring layers (e.g., metal wiring 17) and vias (e.g., contact electrodes 16) connecting the wiring layers are formed within the layers. The light-receiving substrate 21 is configured by the semiconductor substrate 21A and the interlayer insulating film 21B.

[0029] The light receiving section 11 includes multiple avalanche photodiodes (APDs) that share the photoelectric conversion section 14. In a Geiger-mode APD, when a voltage equal to or greater than the breakdown voltage is applied between the terminals, an avalanche phenomenon occurs when a single photon is incident. An APD that multiplies a single photon by the avalanche phenomenon is called a single-photon avalanche diode (SPAD). In each pixel 10, the light receiving section 11 includes, for example, multiple SPADs that share the photoelectric conversion section 14.

[0030] As shown in FIG. 1 , the quench unit 12 is connected to one of the multiple multiplier units 15 on the side opposite to the side connected to the photoelectric conversion unit 14. As shown in FIGS. 1 and 2 , the quench unit 12 is connected to the metal wiring 17 via connection pads 31 and 32. The quench unit 12 has a function of stopping the avalanche phenomenon (quenching) by lowering the voltage applied to the light receiving unit 11 to a breakdown voltage. The quench unit 12 further has a function of enabling the light receiving unit 11 to detect photons again by increasing the voltage applied to the light receiving unit 11 to a bias voltage equal to or higher than the breakdown voltage. The quench unit 12 includes, for example, a MOS transistor. The quench unit 12 may also be, for example, a resistor.

[0031] One end of the quench unit 12 (e.g., the source of the MOS transistor) is connected to a power supply line to which a fixed voltage Ve is applied, for example. Meanwhile, the other end of the quench unit 12 (e.g., the drain of the MOS transistor) is connected to one end of the light-receiving unit 11 (e.g., the anode of the SAPD). The other end of the light-receiving unit 11 (e.g., the cathode of the SAPD) is connected to a power supply line to which a reference voltage Vspad is applied, for example. The values ​​of the fixed voltage Ve and the reference voltage Vspad are set so that a voltage equal to or greater than the breakdown voltage is applied to the light-receiving unit 11.

[0032] The detection unit 13 is connected to a connection node N between the multiple multiplier units 15 and the quench unit 12. The detection unit 13 includes, for example, an inverter. When the voltage Vs of the connection node N is lower than a predetermined threshold voltage (i.e., when it is at low level Lo), the inverter outputs a signal PFout at high level Hi. When the voltage Vs of the connection node N is equal to or higher than a predetermined threshold voltage (i.e., when it is at high level Hi), the inverter outputs a signal PFout at low level Lo. In this way, the detection unit 13 outputs a digital signal (signal PFout).

[0033] The detection unit 13 is formed in a signal processing substrate 41. The signal processing substrate 41 is a substrate bonded to the light receiving substrate 21, and includes a semiconductor substrate 42 made of silicon or the like, and an interlayer insulating film 43 formed on the semiconductor substrate 42. The detection unit 13 is formed on the semiconductor substrate 42. The interlayer insulating film 43 is a layer formed on the semiconductor substrate 42, and is made of a plurality of stacked SiO ２ A plurality of patterned wiring layers and vias connecting the wiring layers to each other are formed within the layer.

[0034] Connection pads 31 made of Cu are exposed on the surface of the light-receiving substrate 21. Meanwhile, connection pads 32 made of Cu are exposed on the surface of the signal processing substrate 41. The connection pads 31 and 32 are bonded to each other. As a result, the light-receiving substrate 21 and the signal processing substrate 41 are bonded to each other at the surfaces of the interlayer insulating film 21B and the interlayer insulating film 43, and the connection pads 31 and 32 are bonded to each other, thereby electrically connecting each other.

[0035] Next, the structure of the light receiving section 11 will be described in detail with reference to Figures 2 and 3. Figure 3 shows an example of the planar configuration of the surface of the semiconductor substrate 21A (the surface on the signal processing substrate 41 side).

[0036] Each pixel 10 is formed on a semiconductor substrate 21A made of silicon or the like. In FIG. 2, the back surface of the semiconductor substrate 21A is depicted at the upper side of FIG. 2, and an on-chip lens 29 is bonded to the back surface of the semiconductor substrate 21A. Light from the outside (incident light) is incident on the back surface of the semiconductor substrate 21A through the on-chip lens 29. Therefore, the back surface of the semiconductor substrate 21A serves as a light-receiving surface 21a. In FIG. 2, the top surface of the semiconductor substrate 21A is depicted at the lower side of FIG. 2, and the top surface of the semiconductor substrate 21A is in contact with an interlayer insulating film 21B.

[0037] 2 , each pixel 10 includes an n-well 22, an n-type semiconductor region 23, a high-concentration n-type semiconductor region 24, a plurality of p-type semiconductor regions 25, a hole accumulation region 26, and a plurality of high-concentration p-type semiconductor regions 27. The n-well 22, the n-type semiconductor region 23, the high-concentration n-type semiconductor region 24, the plurality of p-type semiconductor regions 25, the hole accumulation region 26, and the plurality of high-concentration p-type semiconductor regions 27 are formed on a semiconductor substrate 21A. In each pixel 10, an avalanche multiplication region (multiplication section 15) is formed by a depletion layer formed in a region where the n-type semiconductor region 23 and the p-type semiconductor region 25 are junctioned. In other words, the multiplication section 15 is formed in a pn junction region where the n-type semiconductor region 23 and the p-type semiconductor region 25 are junctioned.

[0038] The n-well 22 is formed by controlling the impurity concentration of the semiconductor substrate 21A to a low n-type (n--), and forms an electric field that transfers electrons generated by photoelectric conversion in the pixel 10 to the multiplier section 15. The n-well 22 functions as the photoelectric conversion section 14. The photoelectric conversion section 14 is formed in the n-well 22. The photoelectric conversion section 14 is composed of a semiconductor region of a predetermined conductivity type formed in a single region at a predetermined depth in the semiconductor substrate 21A. Note that instead of the n-well 22, a p-well may be formed in which the impurity concentration of the semiconductor substrate 21A is controlled to p-type.

[0039] When the top surface of the semiconductor substrate 21A is viewed in a plan view, the n-type semiconductor region 23 is disposed toward the center of the pixel region, facing the n-well 22 (photoelectric conversion unit 14). The n-type semiconductor region 23 is a concentrated n-type semiconductor region formed in the center of the pixel 10 from the surface side of the semiconductor substrate 21A or from a position deeper than the surface to a predetermined depth. The n-type semiconductor region 23, particularly the central portion near the surface, is controlled to have a high impurity concentration (n+), forming a high-concentration n-type semiconductor region 24. The high-concentration n-type semiconductor region 24 is a contact portion connected to the contact electrode 16, which serves as a cathode for supplying a negative voltage to form the multiplication unit 15. A fixed voltage Ve is applied to the high-concentration n-type semiconductor region 24 from the contact electrode 16.

[0040] The p-type semiconductor regions 25 are dense p-type semiconductor regions formed to a predetermined thickness (depth) from a depth position in the semiconductor substrate 21A where they contact the bottom surface of the n-type semiconductor region 23, and disposed at the four corners of the pixel 10. Note that in Figure 2, the semiconductor substrate 21A is drawn so that the bottom surface of the semiconductor substrate 21A faces upward and the surface (top surface) of the semiconductor substrate 21A faces downward.

[0041] The p-type semiconductor region 25 is formed in a region of the semiconductor substrate 21A that is shallower than the photoelectric conversion section 14 and in contact with the photoelectric conversion section 14. In other words, the multiplication section 15 is formed in a pn junction region in a region of the semiconductor substrate 21A that is shallower than the photoelectric conversion section 14 and in contact with the photoelectric conversion section 14. The p-type semiconductor region 25 is in contact with the photoelectric conversion section 14. Here, the impurity concentration of the n-well 22 is, for example, 1×10 １４ cm －３ The impurity concentrations of the n-type semiconductor region 23 and the p-type semiconductor region 25 forming the multiplication section 15 are set to a low concentration of 1×10 １６ cm －３ It is desirable to control the concentration to a high level above this.

[0042] The hole accumulation region 26 is a p-type semiconductor region (p) formed to surround the side and bottom surfaces of the n-well 22 and accumulates holes generated by photoelectric conversion. The hole accumulation region 26 traps electrons generated at the interface with the pixel separation region 28, thereby suppressing the dark count rate (DCR). The region adjacent to the hole accumulation region 26 on the surface side of the semiconductor substrate 21A has a high impurity concentration (p+) controlled to form a high-concentration p-type semiconductor region 27. The high-concentration p-type semiconductor region 27 is a contact portion connected to the contact electrode 18 serving as one end of the light receiving section 11 (e.g., the anode of a SAPD). A reference voltage Vspad is applied to the high-concentration p-type semiconductor region 27 from the contact electrode 18. The hole accumulation region 26 can be formed by ion implantation or solid-phase diffusion.

[0043] A pixel separation section 28 that separates the pixels is formed at the pixel boundary section of the pixel 10, which is the boundary between adjacent pixels. The pixel separation section 28 may be composed of only an insulating layer such as a silicon oxide film, or may have a double structure in which the outer side (n-well 22 side) of a metal layer such as tungsten is covered with an insulating layer such as a silicon oxide film.

[0044] As described above, in each pixel 10, with regard to the planar regions of the n-type semiconductor region 23 and the p-type semiconductor region 25 in which the multiplication section 15 is formed, the planar region of the p-type semiconductor region 25 is formed to overlap the planar region of the n-type semiconductor region 23 when the upper surface of the semiconductor substrate 21A is viewed in a planar view. Also, with regard to the depths of the n-type semiconductor region 23 and the p-type semiconductor region 25 from the surface of the semiconductor substrate 21A, the p-type semiconductor region 25 is formed deeper than the depth position of the n-type semiconductor region 23. In other words, the p-type semiconductor region 25 is formed at a position closer to the light-receiving surface 21a than the n-type semiconductor region 23.

[0045] The pixel structure of FIG. 2 is an example of a structure in which electrons are read out as signal charges (carriers). However, each pixel 10 may also have a structure in which holes are read out (see FIGS. 29 and 30 , which will be described later). In this case, the n-type semiconductor region 23, which has a small planar size, is changed to a p-type semiconductor region, and the high-concentration n-type semiconductor region 24 is changed to a high-concentration p-type semiconductor region. The p-type semiconductor region 25 is changed to an n-type semiconductor region, and the high-concentration p-type semiconductor region 27 is changed to a high-concentration n-type semiconductor region. A reference voltage Vspad is applied from the contact electrode 16 to the contact portion that has been changed from the high-concentration n-type semiconductor region 24 to the high-concentration p-type semiconductor region, and a fixed voltage Ve is applied from the contact electrode 18 to the contact portion that has been changed from the high-concentration p-type semiconductor region 27 to the high-concentration n-type semiconductor region.

[0046] Next, the positions of the multiple multiplication sections 15 (n-type semiconductor regions 23) will be described in detail. Fig. 3 shows four pixels 10. Each pixel 10 has four multiplication sections 15 (n-type semiconductor regions 23), for example, as shown in Fig. 3.

[0047] In order to arrange multiple multiplication regions (multiplication sections 15) within a single pixel, the structure of this embodiment has an n-type semiconductor region 23 forming the multiplication region in the center of the pixel 10, and a p-type semiconductor region 25 overlapping the n-type semiconductor region 23 at a portion other than the center, and the n-type semiconductor region 23 and the p-type semiconductor region 25 form the multiplication section 15. In addition, the n-type semiconductor region 23 overlaps with the p-type semiconductor region 25 at at least one corner, and the multiplication region is formed at the corner of the n-type semiconductor region 23. This makes it possible to share the p-type semiconductor region 25 forming the multiplication section 15 with adjacent pixels, which, as will be described later with reference to FIG. 5 , makes manufacturing easier from a process perspective.

[0048] In the example shown in Figure 3, in each pixel 10, the n-type semiconductor region 23 is located near the center of the pixel region, and the four p-type semiconductor regions 25 are located at the four corners of the rectangular pixel 10.

[0049] The n-type semiconductor region 23 is disposed in the center of the pixel 10 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. The multiple p-type semiconductor regions 25 are disposed so as to overlap the n-type semiconductor region 23 at a portion other than the center of the n-type semiconductor region 23 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. More specifically, the multiple p-type semiconductor regions 25 are disposed so as to overlap the n-type semiconductor region 23 at corners of the n-type semiconductor region 23 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. Furthermore, the p-type semiconductor regions 25 are disposed so as to contact each other between adjacent pixels 10. This allows for more appropriate pixel miniaturization, as will be described later.

[0050] As a comparative example, a structure can be considered in which multiple multiplication sections 15 are provided within a single pixel to suppress variations in VBD (breakdown voltage) for each pixel. In this structure, when the SPAD is made into finer pixels, the distance D15 between adjacent multiplication sections 15 becomes closer, making it difficult to maintain characteristics. In addition, when making the pixels finer, it is necessary to reduce the mask opening size for ion implantation to form the multiplication region, but this is limited from a process perspective.

[0051] 4 is a diagram showing an example of the horizontal cross-sectional configuration of the pixel 10 according to the first embodiment and the comparative example. In the comparative example, the p-type semiconductor region 25 is formed over the entire surface of the pixel 10, and is therefore not shown. Therefore, the multiplication section 15 is formed in the region where the n-type semiconductor region 23 is formed.

[0052] In the first embodiment, the distance D15 between the multiplication sections 15 can be kept wider than in the comparative example where multiple multiplication sections 15 are arranged within a single pixel, thereby improving pixel characteristics such as PDE (Photon Detection Efficiency) variation.

[0053] 5A and 5B are diagrams illustrating an example of a vertical cross-sectional configuration during the manufacture of a pixel 10 according to the first embodiment and a comparative example. A resist R, which is a mask, is shown in Fig. 5. The upper part of Fig. 5 illustrates the timing for forming the p-type semiconductor region 25 by ion implantation in the first embodiment. The lower part of Fig. 5 illustrates the timing for forming the n-type semiconductor region 23 by ion implantation in the comparative example.

[0054] In the first embodiment, as described above, it is possible to share the p-type semiconductor region 25 forming the multiplication section 15 with adjacent pixels. This allows the mask opening to be shared between adjacent pixels. Compared to the case where multiple independent multiplication sections 15 are arranged within a single pixel (comparative example), the mask opening width can be made wider, making manufacturing easier from a process standpoint.

[0055] Next, a method for manufacturing the photodetector will be described.

[0056] 6A to 6C are diagrams illustrating an example of a method for manufacturing the pixel 10 according to the first embodiment.

[0057] First, as shown in FIG. 6A, a p-type semiconductor region 25, an n-type semiconductor region 23, a high-concentration n-type semiconductor region 24, and a high-concentration p-type semiconductor region 27 are formed in a semiconductor substrate 21A.

[0058] Next, as shown in FIG. 6B, an interlayer insulating film 21B is formed on the semiconductor substrate 21A, and contact electrodes 16 and 18 and metal wiring 17 are formed thereon.

[0059] 6C, the semiconductor substrate 21A is turned upside down, and a signal processing substrate 41 (not shown) is bonded thereto, and the pixel separating section 28, the on-chip lens 29, etc. are formed. In this way, the pixel 10 shown in FIG. 1 is completed.

[0060] As described above, according to the first embodiment, the n-type semiconductor region 23 is disposed in the center of the pixel 10 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. The multiple p-type semiconductor regions 25 are disposed so as to overlap the n-type semiconductor region 23 at a location other than the center of the n-type semiconductor region 23 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. This makes it easier to maintain a wide distance D15 between the multiplication sections 15 even when the pixel size is reduced. As a result, it is easier to maintain the characteristics and, from a process standpoint, makes manufacturing easier. Therefore, the pixel size can be reduced more appropriately.

[0061] Second Embodiment Fig. 7 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a second embodiment. Fig. 8 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to the second embodiment. Note that the signal processing substrate 41 and the like are omitted in Fig. 7. The second embodiment differs from the first embodiment in that a p-type semiconductor region 51 is provided.

[0062] By forming a p-type semiconductor region 51 in the center of the n-type semiconductor region 23 and on the pixel back surface side of the p-type semiconductor region 25 that forms the multiplication section 15, it is possible to guide photoelectrically converted electrons to the avalanche region. Without the p-type semiconductor region 51, photoelectrically converted electrons would be guided toward the n-type semiconductor region 23 in the center of the pixel 10, and the electrons would not pass through the multiplication section 15. This would result in a significant reduction in PDE. The p-type semiconductor region 51 makes it easier for electrons to be guided to the multiplication section 15, thereby suppressing the reduction in PDE.

[0063] The p-type semiconductor region 51 is disposed at least in the center of the pixel 10 when viewed from a direction substantially perpendicular to the semiconductor substrate 21A, and is disposed closer to the photoelectric conversion section 14 than the p-type semiconductor region 25 .

[0064] As in the second embodiment, a p-type semiconductor region 51 may be provided. The photodetector according to the second embodiment can obtain the same effects as the first embodiment.

[0065] 9 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to a third embodiment. In the third embodiment, the shape of the p-type semiconductor region 51 in plan view is different from that in the second embodiment.

[0066] The shape of the p-type semiconductor region 51 does not have to be rectangular, and may be other shapes such as a circle.

[0067] In the example shown in FIG. 9, the p-type semiconductor region 51 has a substantially circular shape when viewed in a direction substantially perpendicular to the semiconductor substrate 21A.

[0068] As in the third embodiment, the shape of the p-type semiconductor region 51 may be changed. The photodetector according to the third embodiment can obtain the same effects as the second embodiment.

[0069] <Fourth Embodiment> Fig. 10 is a diagram showing an example of the vertical cross-sectional configuration of a pixel 10 according to a fourth embodiment. Fig. 11 is a diagram showing an example of the horizontal cross-sectional configuration of a pixel 10 according to the fourth embodiment. The fourth embodiment differs from the second embodiment in that the p-type semiconductor region 51 is connected to the hole accumulation region 26.

[0070] The p-type semiconductor region 51 may extend to the hole accumulation region 26, which is a fixed charge film on the back surface of the pixel 10. This fixes the potential of the p-type semiconductor region 51, making it possible to suppress the accumulation of holes generated by avalanche, and thereby reducing afterpulses, for example.

[0071] The p-type semiconductor region 51 is connected to a fixed potential by extending in a direction substantially perpendicular to the semiconductor substrate 21A.

[0072] As in the fourth embodiment, the p-type semiconductor region 51 may be connected to the hole accumulation region 26. The photodetector according to the fourth embodiment can obtain the same effects as those of the second embodiment.

[0073] Fifth Embodiment Fig. 12 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a fifth embodiment. Fig. 13 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to the fifth embodiment. In the fifth embodiment, the shape of the p-type semiconductor region 51 is different from that in the fourth embodiment.

[0074] By extending the p-type semiconductor region 51 in the lateral direction so as to contact the pixel sidewall, it is possible to fix the potential of the p-type semiconductor region 51. As a result, as in the fourth embodiment, it is possible to reduce afterpulses, for example.

[0075] The p-type semiconductor region 51 extends in a direction substantially parallel to the semiconductor substrate 21A, and is thereby connected to a fixed potential.

[0076] As in the fifth embodiment, the shape of the p-type semiconductor region 51 may be changed. The photodetector according to the fifth embodiment can obtain the same effects as the fourth embodiment.

[0077] Sixth Embodiment Fig. 14 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a sixth embodiment. Fig. 15 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to the sixth embodiment. In the sixth embodiment, the shape of the p-type semiconductor region 51 is different from that in the fifth embodiment.

[0078] The p-type semiconductor region 51 extends laterally so as to contact the pixel sidewall, forming a cross shape. As in the fifth embodiment, the potential of the p-type semiconductor region 51 can be fixed, which makes it possible to reduce afterpulses, for example. Furthermore, in the arrangement in the second embodiment in which the p-type semiconductor regions 25 are arranged only at the center of the pixel, there is a possibility that electrons may be induced between the p-type semiconductor regions 25 that form the multiplication section 15 (for example, between the sides of the n-type semiconductor region 23, which is rectangular in plan view), but this can be suppressed in this structure.

[0079] The p-type semiconductor region 51 extends between the multiple multiplication sections 15 in a direction substantially parallel to the semiconductor substrate 21A when viewed in a direction substantially perpendicular to the semiconductor substrate 21A.

[0080] As in the sixth embodiment, the shape of the p-type semiconductor region 51 may be changed. The photodetector according to the sixth embodiment can obtain the same effects as those of the fifth embodiment.

[0081] 16 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to a seventh embodiment. In the seventh embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 are different from those in the first embodiment.

[0082] The shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 that form the multiplication section 15 may be not only rectangular but also circular. However, since this embodiment is expected to be applied to fine pixels, the mask size is also expected to be small. In this case, since the mask shape may be rounded, it is expected that the n-type semiconductor region 23 and the p-type semiconductor region 25 will actually have the shapes described in this embodiment.

[0083] The n-type semiconductor region 23 is substantially circular when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. The combined region of the p-type semiconductor regions 25 that contact each other between adjacent pixels 10 is substantially circular when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. That is, the p-type semiconductor region 25 is fan-shaped within one pixel 10, but is substantially circular when combined with the p-type semiconductor region 25 of four adjacent pixels 10.

[0084] As in the seventh embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 may be changed. The photodetector according to the seventh embodiment can obtain the same effects as those of the first embodiment. Note that the seventh embodiment may be combined with any of the second to sixth embodiments.

[0085] 17 is a diagram illustrating an example of the horizontal cross-sectional configuration of a pixel 10 according to an eighth embodiment. In the eighth embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 are different from those in the first embodiment.

[0086] The n-type semiconductor region 23 and the p-type semiconductor region 25 that form the multiplication section 15 can be formed in an m-sided shape (m is any natural number equal to or greater than 3) other than a square. In this case, by forming p-type impurity regions that form the multiplication regions on the back surface side so as to correspond to the corners of the n-type semiconductor region 23 that forms the multiplication section 15, a maximum of m multiplication sections 15 can be formed, and the variation in VBD can be reduced to 1 / √m.

[0087] The n-type semiconductor region 23 has an m-sided polygon (m is a natural number equal to or greater than 3) when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. For example, it is possible to provide a maximum of m multiplication sections 15. In the example shown in FIG. 17 , the n-type semiconductor region 23 has a pentagonal shape.

[0088] As in the eighth embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 may be changed. The photodetector according to the eighth embodiment can obtain the same effects as those of the first embodiment. Note that the eighth embodiment may be combined with any of the second to sixth embodiments.

[0089] 18 is a diagram illustrating an example of the horizontal cross-sectional configuration of a pixel 10 according to a ninth embodiment. The ninth embodiment differs from the eighth embodiment in that the shape of the pixel 10 and the shape of the n-type semiconductor region 23 are the same.

[0090] If the pixel shape and the n-type semiconductor region 23 shape differ, it is difficult to form the multiplication section 15 at every corner as in the eighth embodiment shown in Fig. 17. Therefore, it is desirable that the shape of the pixel 10 and the shape of the n-type semiconductor region 23 match as shown in Fig. 18.

[0091] The pixel 10 has an m-sided polygon when viewed from a direction substantially perpendicular to the semiconductor substrate 21A. In the example shown in Fig. 18, the pixel 10 and the n-type semiconductor region 23 have a hexagonal shape.

[0092] As in the ninth embodiment, the shape of the pixel 10 may be the same as the shape of the n-type semiconductor region 23. The photodetector according to the ninth embodiment can obtain the same effects as the eighth embodiment.

[0093] 19 is a diagram illustrating an example of the horizontal cross-sectional configuration of a pixel 10 according to a tenth embodiment. In the tenth embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 are different from those in the first embodiment.

[0094] The n-type semiconductor region 23 forming the multiplication section 15 at the center of the pixel 10 may be annular.

[0095] 19, the n-type semiconductor region 23 has a square ring shape. The central portion of the n-type semiconductor region 23 is not used and therefore does not need to be provided.

[0096] As in the tenth embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 may be changed. The photodetector according to the tenth embodiment can obtain the same effects as those of the first embodiment. Note that the tenth embodiment may be combined with any of the second to sixth embodiments.

[0097] 20 is a diagram illustrating an example of the horizontal cross-sectional configuration of a pixel 10 according to an eleventh embodiment. In the eleventh embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 are different from those in the first embodiment.

[0098] The n-type semiconductor region 23 and the p-type semiconductor region 25 that form the multiplication section 15 may have a cross shape. In this case, multiplication near the pixel sidewalls can be suppressed, and a dark current reduction effect can be expected.

[0099] When viewed from a direction approximately perpendicular to the semiconductor substrate 21A, the outer edge of the n-type semiconductor region 23 that overlaps with the p-type semiconductor region 25 protrudes outward relative to the outer edge of the n-type semiconductor region 23 that does not overlap with the p-type semiconductor region 25. This allows the distance between the n-type semiconductor region 23 and the sidewall of the pixel 10 to be increased. As a result, dark current can be reduced. Furthermore, the outer edge of the combined region of the p-type semiconductor regions 25 that contact each other between adjacent pixels 10 also protrudes outward relative to the outer edge of the p-type semiconductor region 25 that overlaps with the n-type semiconductor region 23. In this case as well, the distance between the p-type semiconductor region 25 and the sidewall of the pixel 10 can be increased, thereby reducing dark current.

[0100] As in the eleventh embodiment, the shapes of the n-type semiconductor region 23 and the p-type semiconductor region 25 may be changed. The photodetector according to the eleventh embodiment can obtain the same effects as those of the first embodiment. Note that the eleventh embodiment may be combined with any of the second to sixth embodiments.

[0101] 21 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a twelfth embodiment. The twelfth embodiment differs from the first embodiment in that a recessed structure is provided in a semiconductor substrate 21A.

[0102] A recessed structure can be placed in the center of the pixel, and the cathode contact can be positioned above the recessed structure. This allows the anode-cathode distance to be increased, thereby suppressing avalanches during contact implantation.

[0103] The semiconductor substrate 21A has a recess in the center of the pixel 10, extending from the first surface (bottom surface, top surface) of the semiconductor substrate 21A. The n-type semiconductor region 23 is disposed at the tip of the recess. This allows the distance between the high-concentration p-type semiconductor region 27, which serves as the anode contact, and the high-concentration n-type semiconductor region 24, which serves as the cathode contact, to be extended in the vertical direction of the paper in FIG. 21. As a result, even when the pixels are made finer, the distance can be extended and unnecessary avalanches can be suppressed.

[0104] 22A to 22E are diagrams illustrating an example of a method for manufacturing the pixel 10 according to the twelfth embodiment.

[0105] First, as shown in FIG. 22A, a p-type semiconductor region 25, an n-type semiconductor region 23, and a high-concentration p-type semiconductor region 27 are formed in a semiconductor substrate 21A.

[0106] 22B, a trench E is formed in the upper surface of the semiconductor substrate 21A. The trench E is formed in the center of the pixel 10. The trench E is formed by, for example, etching.

[0107] Next, as shown in FIG. 22C, a high-concentration n-type semiconductor region 24 is formed at the tip of the trench E.

[0108] Next, as shown in FIG. 22D, an interlayer insulating film 21B is formed on the semiconductor substrate 21A, and the trench E is filled with, for example, an oxide film.

[0109] Next, as shown in FIG. 22E, contact electrodes 16 and 18 and metal wiring 17 are formed.

[0110] Thereafter, the semiconductor substrate 21A is turned upside down, and the hole accumulation region 26, the pixel separating portion 28, the on-chip lens 29, etc. are formed, thereby completing the pixel 10 shown in FIG.

[0111] As in the twelfth embodiment, a recessed structure may be provided in the semiconductor substrate 21A. The photodetector according to the twelfth embodiment can achieve the same effects as the first embodiment. Note that the twelfth embodiment may be combined with any of the second to eleventh embodiments.

[0112] 23 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a thirteenth embodiment. The thirteenth embodiment differs from the first embodiment in that a metalens 29 a is provided instead of the on-chip lens 29.

[0113] The metalens 29a can be placed above the pixel, which allows for a lower height.

[0114] As in the thirteenth embodiment, a metalens 29a may be provided instead of the on-chip lens 29. The photodetector according to the thirteenth embodiment can obtain the same effects as those of the first embodiment. Note that the thirteenth embodiment may be combined with any of the second to twelfth embodiments.

[0115] 24 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a fourteenth embodiment. The fourteenth embodiment differs from the first embodiment in that a color filter CF is provided.

[0116] A color filter CF can be provided below the on-chip lens 29 provided above the pixel, which gives the pixel sensitivity to a specific visible light wavelength, making it possible to use the pixel for photon counting imaging.

[0117] A color filter CF may be provided as in the fourteenth embodiment. The photodetector according to the fourteenth embodiment can achieve the same effects as the first embodiment. Note that the fourteenth embodiment may be combined with any of the second to thirteenth embodiments.

[0118] 25 is a diagram illustrating an example of the vertical cross-sectional configuration of a pixel 10 according to a 15th embodiment. The 15th embodiment differs from the 14th embodiment in that a color router CR is provided instead of the color filter CF.

[0119] The color filter CF below the on-chip lens 29 provided above the pixel can be replaced with a color router CR, which makes it possible to increase the amount of light that can be collected on one pixel compared to when the color filter CF is used.

[0120] A color router CR may be provided as in the fifteenth embodiment. The photodetector according to the fifteenth embodiment can achieve the same effects as the fourteenth embodiment.

[0121] 26 is a diagram illustrating an example of a vertical cross-sectional configuration of a pixel 10 according to a sixteenth embodiment. The sixteenth embodiment differs from the first embodiment in the method of forming the pixel separator 28.

[0122] The pixel isolation unit 28 according to the first embodiment is a reverse full trench isolation (RFTI) unit, but RFTI can be replaced with a front full trench isolation (FFTI) unit.

[0123] As in the sixteenth embodiment, the method of forming the pixel separator 28 may be changed. The photodetector according to the sixteenth embodiment can obtain the same effects as those of the first embodiment. Note that the sixteenth embodiment may be combined with any of the second to fifteenth embodiments.

[0124] 27 is a diagram illustrating an example of a horizontal cross-sectional configuration of a pixel 10 according to a seventeenth embodiment. The seventeenth embodiment differs from the first embodiment in the method of forming the p-type semiconductor region 25.

[0125] The p-type semiconductor region (p-type semiconductor regions 25, 52) forming the multiplication section 15 can be formed in a ring shape (annular shape) surrounding the n-type semiconductor region 23 forming the multiplication section 15. When forming the impurity region, ion implantation is performed separately vertically and horizontally, so that the concentration becomes higher only at the intersections, and multiplication occurs at the four corners (see FIG. 28). This makes manufacturing easier from a process standpoint.

[0126] 27 , a p-type semiconductor region 52 is provided. When viewed from a direction substantially perpendicular to the semiconductor substrate 21A, the p-type semiconductor region 52 is disposed outside the center of the n-type semiconductor region 23 and outside the corners of the n-type semiconductor region 23. In other words, the p-type semiconductor region 52 is disposed so as to overlap with the side portions of the n-type semiconductor region 23. The p-type impurity concentration of the p-type semiconductor region 52 is lower than the p-type impurity concentration of the p-type semiconductor region 25.

[0127] FIG. 28 is a diagram showing an example of a method for forming the n-type semiconductor region 23 and the p-type semiconductor regions 25, 52 according to the seventeenth embodiment.

[0128] 28A, an n-type semiconductor region 23 is formed in the center of the pixel 10 on the semiconductor substrate 21A. The n-type semiconductor region 23 is formed by ion implantation of n-type impurities.

[0129] Next, as shown in FIG. 28(b), p-type semiconductor regions 53a are formed on the left and right sides of the n-type semiconductor region 23. The p-type semiconductor regions 53a are formed by ion implantation of p-type impurities. The p-type impurity concentration of the p-type semiconductor region 53a is the same as the p-type impurity concentration of the p-type semiconductor region 52. The dashed line shown in FIG. 28 indicates the outline of the n-type semiconductor region 23.

[0130] Although FIG. 28 shows one pixel 10, the p-type semiconductor region 53a is formed continuously in the pixels 10 above and below.

[0131] 28(c), p-type semiconductor regions 53b are formed above and below the n-type semiconductor region 23. The p-type semiconductor region 53b is formed by ion implantation of p-type impurities. The p-type impurity concentration of the p-type semiconductor region 53b is the same as the p-type impurity concentration of the p-type semiconductor region 52. The dashed line in FIG. 28 indicates the outline of the n-type semiconductor region 23.

[0132] Although FIG. 28 shows one pixel 10, the p-type semiconductor region 53b is formed continuously in the left and right pixels 10 as well.

[0133] The region where the p-type semiconductor regions 53a, 53b overlap becomes the p-type semiconductor region 25. The remaining regions where the p-type semiconductor regions 53a, 53b do not overlap become the p-type semiconductor region 52. In the first embodiment, ion implantation of p-type impurities is performed in a dot pattern. In contrast, in the seventeenth embodiment, ion implantation is performed in a line pattern. This makes it easier to ensure, for example, a mask opening during ion implantation. As a result, it becomes easier to achieve finer pixels.

[0134] As in the seventeenth embodiment, the method of forming the p-type semiconductor region 25 may be changed. The photodetector according to the seventeenth embodiment can obtain the same effects as those of the first embodiment. Note that the seventeenth embodiment may be combined with any of the second to sixteenth embodiments.

[0135] <Eighteenth Embodiment> Fig. 29 is a diagram showing an example of a vertical cross-sectional configuration of a pixel 10 according to an eighteenth embodiment. Fig. 30 is a diagram showing an example of a horizontal cross-sectional configuration of a pixel 10 according to an eighteenth embodiment. The eighteenth embodiment differs from the first embodiment in that the polarity of the conductivity type is reversed.

[0136] For example, the n-type semiconductor region 23 in the first embodiment is a p-type semiconductor region in the eighteenth embodiment, and the p-type semiconductor region 25 in the first embodiment is an n-type semiconductor region in the eighteenth embodiment.

[0137] The polarity of the conductivity type may be reversed as in the eighteenth embodiment. The photodetector according to the eighteenth embodiment can achieve the same effects as the first embodiment. Note that the eighteenth embodiment may be combined with any of the second to seventeenth embodiments.

[0138] <Application Example to Electronic Device> FIG. 31 is a block diagram showing a configuration example of a camera 2000 as an electronic device to which the present technology is applied.

[0139] The camera 2000 includes an optical unit 2001 including a group of lenses, an imaging device 2002 to which the above-mentioned photodetector or the like (hereinafter referred to as the photodetector or the like) is applied, and a DSP (Digital Signal Processor) circuit 2003, which is a camera signal processing circuit. The camera 2000 also includes a frame memory 2004, a display unit 2005, a recording unit 2006, an operation unit 2007, and a power supply unit 2008. The DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, the operation unit 2007, and the power supply unit 2008 are connected to one another via a bus line 2009.

[0140] The optical unit 2001 takes in incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 2002. The imaging device 2002 converts the amount of incident light formed on the imaging surface by the optical unit 2001 into an electrical signal on a pixel-by-pixel basis and outputs the signal as a pixel signal.

[0141] The display unit 2005 is formed of a panel display device such as a liquid crystal panel or an organic EL panel, and displays moving images or still images captured by the imaging device 2002. The recording unit 2006 records the moving images or still images captured by the imaging device 2002 on a recording medium such as a hard disk or semiconductor memory.

[0142] An operation unit 2007, under the operation of a user, issues operation commands for various functions of the camera 2000. A power supply unit 2008 appropriately supplies various types of power to the DSP circuit 2003, frame memory 2004, display unit 2005, recording unit 2006, and operation unit 2007 as operating power sources.

[0143] As described above, by using the above-described photodetector or the like as the imaging device 2002, it is possible to expect to obtain a good image.

[0144] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0145] FIG. 32 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0146] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 32, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0147] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0148] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0149] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0150] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0151] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0152] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0153] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0154] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0155] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 32, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0156] FIG. 33 is a diagram showing an example of the installation position of the imaging unit 12031.

[0157] In FIG. 33, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0158] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0159] 33 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0160] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0161] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0162] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0163] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0164] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 of the above-described configuration. Specifically, the imaging device 1 shown in FIG. 1 or the like can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, finer pixelation is possible, thereby enabling safer vehicle driving.

[0165] The present technology may have the following configurations: (1) A photodetector including a plurality of pixels arranged two-dimensionally, each pixel including: a photoelectric conversion unit; and a plurality of multiplication units connected in parallel to each other and connected in series to the photoelectric conversion unit; and a semiconductor substrate on which the photoelectric conversion unit and the plurality of multiplication units are formed, each of the multiplication units being formed in a region of the semiconductor substrate where a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type are junctioned, the first semiconductor region being arranged in a center of the pixel when viewed from a direction approximately perpendicular to the semiconductor substrate, and the plurality of second semiconductor regions being arranged to overlap with the first semiconductor region at a portion other than the center of the first semiconductor region when viewed from a direction approximately perpendicular to the semiconductor substrate. (2) The photodetector according to (1), wherein the plurality of second semiconductor regions are arranged to overlap with the first semiconductor region at a corner of the first semiconductor region when viewed from a direction approximately perpendicular to the semiconductor substrate. (3) The photodetector according to (2), wherein the semiconductor substrate further includes a third semiconductor region of the second conductivity type, which is disposed outside a center of the first semiconductor region and outside a corner of the first semiconductor region when viewed from a direction substantially perpendicular to the semiconductor substrate, and wherein a concentration of the second conductivity type impurity in the third semiconductor region is lower than a concentration of the second conductivity type impurity in the second semiconductor region. (4) The photodetector according to any one of (1) to (3), wherein the semiconductor substrate further includes a fourth semiconductor region of the second conductivity type, which is disposed at least in a center of the pixel when viewed from a direction substantially perpendicular to the semiconductor substrate and is disposed closer to the photoelectric conversion unit than the second semiconductor region. (5) The photodetector according to (4), wherein the fourth semiconductor region is substantially circular when viewed from a direction substantially perpendicular to the semiconductor substrate. (6) The photodetector according to (4) or (5), wherein the fourth semiconductor region is connected to a fixed potential. (7) The photodetector according to (6), wherein the fourth semiconductor region is connected to a fixed potential by extending in a direction substantially perpendicular to the semiconductor substrate. (8) The photodetector according to (6), wherein the fourth semiconductor region is connected to a fixed potential by extending in a direction substantially parallel to the semiconductor substrate.(9) The photodetector according to (8), wherein the fourth semiconductor region extends between the plurality of multiplication sections in a direction substantially parallel to the semiconductor substrate when viewed in a direction substantially perpendicular to the semiconductor substrate. (10) The photodetector according to any one of (1) to (9), wherein the first semiconductor region is an m-gon (m is a natural number greater than or equal to 3) when viewed in a direction substantially perpendicular to the semiconductor substrate, and the plurality of multiplication sections are m multiplication sections. (11) The photodetector according to (10), wherein the pixel is an m-gon when viewed in a direction substantially perpendicular to the semiconductor substrate. (12) The photodetector according to any one of (1) to (9), wherein the first semiconductor region is substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate. (13) The photodetector according to (12), wherein a combined area of ​​the second semiconductor regions in contact with each other between adjacent pixels is substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate. (14) The photodetector according to any one of (1) to (9), wherein, when viewed in a direction substantially perpendicular to the semiconductor substrate, an outer edge of the first semiconductor region overlapping with the second semiconductor region protrudes outward relative to an outer edge of the first semiconductor region that does not overlap with the second semiconductor region. (15) The photodetector according to any one of (1) to (14), wherein the semiconductor substrate has a recess extending from a first surface of the semiconductor substrate in a center portion of the pixel, and the first semiconductor region is disposed at an end of the recess. (16) The photodetector according to any one of (1) to (15), wherein the first conductivity type is n-type, and the second conductivity type is p-type. (17) The photodetector according to any one of (1) to (15), wherein the first conductivity type is p-type, and the second conductivity type is n-type. (18) The photodetector according to any one of (1) to (17), wherein each of the pixels further includes a quencher connected to a side of the plurality of multiplication sections opposite to a side connected to the photoelectric conversion section. (19) The photodetector according to any one of (1) to (18), wherein the second semiconductor regions of adjacent pixels are arranged to be in contact with each other.

[0166] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents.

Claims

1. A photodetector comprising a plurality of pixels arranged two-dimensionally, each of the pixels having a photoelectric conversion unit and a plurality of multiplication units connected in parallel to each other and in series to the photoelectric conversion unit; further comprising a semiconductor substrate in which the photoelectric conversion unit and the plurality of multiplication units are formed, each of the multiplication units being formed in a region of the semiconductor substrate where a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type are junctioned, the first semiconductor region being arranged in the center of the pixel when viewed in a direction approximately perpendicular to the semiconductor substrate, and the plurality of second semiconductor regions being arranged so as to overlap the first semiconductor region other than at the center of the first semiconductor region when viewed in a direction approximately perpendicular to the semiconductor substrate.

2. The photodetector device according to claim 1, wherein the plurality of second semiconductor regions are arranged so as to overlap the first semiconductor regions at corners of the first semiconductor regions when viewed in a direction substantially perpendicular to the semiconductor substrate.

3. The photodetector according to claim 2, wherein the semiconductor substrate further has a third semiconductor region of the second conductivity type that is arranged outside the center of the first semiconductor region and outside a corner of the first semiconductor region when viewed in a direction substantially perpendicular to the semiconductor substrate, and the concentration of the second conductivity type impurities in the third semiconductor region is lower than the concentration of the second conductivity type impurities in the second semiconductor region.

4. The photodetector device of claim 1, wherein the semiconductor substrate further has a fourth semiconductor region of the second conductivity type that is positioned at least in the center of the pixel when viewed from a direction approximately perpendicular to the semiconductor substrate and that is positioned closer to the photoelectric conversion section than the second semiconductor region.

5. The photodetector device according to claim 4, wherein said fourth semiconductor region is substantially circular when viewed in a direction substantially perpendicular to said semiconductor substrate.

6. The photodetector device according to claim 4, wherein said fourth semiconductor region is connected to a fixed potential.

7. The photodetector according to claim 6, wherein said fourth semiconductor region is connected to a fixed potential by extending in a direction substantially perpendicular to said semiconductor substrate.

8. The photodetector according to claim 6, wherein said fourth semiconductor region is connected to a fixed potential by extending in a direction substantially parallel to said semiconductor substrate.

9. The photodetector according to claim 8, wherein said fourth semiconductor region extends between said plurality of multiplication sections in a direction substantially parallel to said semiconductor substrate when viewed in a direction substantially perpendicular to said semiconductor substrate.

10. The photodetector device according to claim 1, wherein the first semiconductor region is an m-sided polygon (m is a natural number equal to or greater than 3) when viewed in a direction substantially perpendicular to the semiconductor substrate, and the plurality of multiplication sections are m multiplication sections.

11. The photodetector device according to claim 10, wherein the pixel has an m-sided polygonal shape when viewed in a direction substantially perpendicular to the semiconductor substrate.

12. The photodetector device according to claim 1, wherein said first semiconductor region is substantially circular when viewed in a direction substantially perpendicular to said semiconductor substrate.

13. The photodetector according to claim 12, wherein the combined area of ​​the second semiconductor regions in contact with each other between adjacent pixels is substantially circular when viewed in a direction substantially perpendicular to the semiconductor substrate.

14. The photodetector device of claim 1, wherein, when viewed from a direction substantially perpendicular to the semiconductor substrate, the outer edge of the first semiconductor region that overlaps with the second semiconductor region protrudes outward relative to the outer edge of the first semiconductor region that does not overlap with the second semiconductor region.

15. The photodetector device according to claim 1, wherein the semiconductor substrate has a recess formed from the first surface of the semiconductor substrate in the center of the pixel, and the first semiconductor region is disposed at the tip of the recess.

16. The photodetector device of claim 1, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

17. The photodetector device of claim 1, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

18. The photodetector according to claim 1, wherein each of the pixels further comprises a quencher connected to one of the plurality of multiplication sections on the side opposite to the side connected to the photoelectric conversion section.

19. The photodetector device according to claim 1, wherein the second semiconductor regions are arranged so as to contact each other between adjacent pixels.

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