Methods of manufacturing thin glass substrates with pinholes, and corresponding systems and assemblies

Abstract

A method of manufacturing a housing substrate is provided. The method comprises providing substrate sections comprising glass, and each substrate section of the substrate sections has a thickness of less than about 1.5 millimeters. The method also comprises forming pinholes in each substrate section of the substrate sections, stacking the substrate sections so that the pinholes align, providing an adhesive material in one or more volumes between adjacent substrate sections when the substrate sections are stacked, and consolidating the substrate sections and the adhesive material to form the housing substrate. The housing substrate has an overall thickness of about 4 millimeters or more.

Description

METHODS OF MANUFACTURING THIN GLASS SUBSTRATES WITH PINHOLES, AND CORRESPONDING SYSTEMS AND ASSEMBLIESCROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of priority under 35 U.S.C. § 119 of U.S. Provisional Application Serial No. 63 / 671387 filed on July 15, 2024, the content of which is relied upon and incorporated herein by reference in its entirety.FIELD

[0002] Embodiments relate generally to a glass housing substrate comprising smaller substrate sections having pinholes formed therein that are stacked together, and methods for making the same.BACKGROUND

[0003] Radio frequency (RF) probe cards are testing devices used for packaged RF devices. Radio frequency probe cards are composed of high density testing pinheads that are pushed through pinholes within a corresponding RF probe card housing substrate. Because the RF probe card housing substrate needs to provide both electrical insulation and mechanical support for the pinheads, the thickness often must be at least a few millimeters, and the thickness for the housing substrate often must be more than about 4 millimeters. However, making pinhole arrays having a high density within an RF probe card housing substrate is often challenging where thicker substrates are used having a thickness of about 4 millimeters or more.

[0004] The current technologies mostly use polymer-based materials such as polyetheretherketone (PEEK) for RF probe card housing substrates due to the easy machineability for the PEEK material. PEEK plastic material typically has a dielectric constant of about 3 at an operating frequency of about 10 gigahertz, a dielectric loss of about 0.01 at an operating frequency of about 10 gigahertz, a thermal conductivity of about 0.294 Watts per meter-kelvin, and a coefficient of thermal expansion of about 127 parts per million per Celsius degree or less. Pinholes may be easily milled on thick PEEK materials with a computer numerical control (CNC) milling method. However due to the advent of increasing data transmission frequency in RF applications, the RF probe cards are often required to be ready to measure at higher frequencies. A common trend for many amorphous materials is the increase of dielectric loss tangent with increasing frequency. This may cause higher RF signalloss and heating of housing substrate. Therefore, it is preferrable to use a lower dielectric loss and higher thermal conductive material for high frequency operations.

[0005] Other materials such as Macor® glass-ceramic materials and Photoveel® ceramic materials may serve as potential alternatives to polymer materials for use in RF probe card housing substrates. Ceramic based material like these generally have a low dielectric loss and high thermal conductivity. Macor® glass-ceramic materials typically have a dielectric constant of about 5.9 at an operating frequency of about 10 gigahertz, a thermal conductivity of about 1.46 Watts per meter-kelvin, and a coefficient of thermal expansion of about 9 parts per million per Celsius degree or less. Photoveel® ceramic materials may have a dielectric constant of about 6.1 at an operating frequency of about 1 megahertz, a thermal conductivity of about 1.5 Watts per meter-kelvin, and a coefficient of thermal expansion of about 7.8 parts per million per Celsius degree or less.

[0006] Processability is another major criterion for the housing substrate selection. In a thick polymer substrate, pinholes may be formed using CNC milling techniques. However, these mechanical milling and drilling approaches are often challenging for ceramic material due to the small pin hole size, small pitch size, and substrate thickness. In a typical RF probe card housing unit, the substrate is often about 5 millimeters to about 10 millimeters thick. Additionally, in a typical RF probe card housing unit, more than 700 pinholes are present in the pinhole array. Further, each pin hole in a typical RF probe card housing unit is about 300 micrometers in diameter, and the pinholes are typically separated by a pitch of about 650 micrometers. With these specifications, it is often highly difficult to effectively form pinholes. Additionally, for some ceramics that have better machineability such as Macor® glass-ceramic materials and Photoveel® ceramic materials, the dielectric loss would be undesirably high. The dielectric loss in Macor® glass-ceramic materials is typically about 0.007 at an operating frequency of about 10 gigahertz, and the dielectric loss in Photoveel® ceramic materials is likely around 0.002 at an operating frequency of about 10 gigahertz.

[0007] Photoveel II® is a machinable nitride based ceramic. These Photoveel II® ceramic materials may have a dielectric constant of about 5.5 at an operating frequency of about 10 gigahertz, a dielectric loss of about 0.001 at an operating frequency of about 10 gigahertz, a thermal conductivity of about 50 Watts per meter-kelvin, and a coefficient of thermal expansion of about 1.4 parts per million per Celsius degree or less. Photoveel II® is often expensive and is often very energy demanding during manufacturing relative to otheralternative materials. Additionally, Photoveel II® material is not transparent, and this often makes it more difficult to identify defects within the Photoveel II® material.BRIEF SUMMARY

[0008] An all-glass solution for making a housing substrate is provided, with the final housing substrates being created having a thickness of about 4 millimeters or more. The housing substrate may be a probe card housing substrate (e.g., an RF probe card housing substrate) for a probe card. Housing substrates may comprise fused silica glass. This fused silica glass may provide lower dielectric loss and good thermal conductive properties relative to housing substrates comprising other materials. Fused silica glass may be made using a fusion forming process, and fusion formed fused silica glass may have a size, shape, and cost advantage compared to fused silicate made by flame hydrolysis methods. Fused silica glass that has been sintered may also have a low dielectric loss of about 0.0005 at an operating frequency of 10 gigahertz, and this low dielectric loss may lead to lower signal loss and lower thermal expansion for housing substrates. Fused silica glass may also have a higher thermal conductivity and a lower coefficient of thermal expansion compared to polymer material used in other probe card housing substrates, with fused silica glass that has been sintered having a thermal conductivity of about thermal conductivity of about 1.0 Watts per meter-kelvin or more or even about 1.2 Watts per meter-kelvin or more and a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less or even about 1.0 parts per million per Celsius degree or less over a temperature range of 25-300 C.

[0009] Glass materials such as fused silica glass may serve as good alternatives to polymer and ceramic materials for use in probe card substrates. These glass materials having low dielectric loss, high thermal conductivity, and a low coefficient of thermal expansion, making these glass materials desirable for use in RF probe card housings.

[0010] Additionally, fused silica glass made through a fusion forming process may be beneficial to use rather than fused silica glass made by a flame hydrolysis process. Where a flame hydrolysis process is used, the resulting fused silica glass generally has good properties. However, it is often difficulty to make pinhole arrays in a thick substrate when flame hydrolysis is used, and the material cost for this approach is typically very high.

[0011] The small pin hole size, small pitch size, and substrate thickness may make it difficult to implement mechanical milling and drilling approaches for glass material to effectively form pinholes. However, in order to effectively make pinholes having small diameters of about 300 micrometers in diameter or less in glass such as fused silica glass,pinholes may be formed in smaller substrate sections having a thickness of less than about 1.5 millimeters in thickness or less than 1.0 millimeters in thickness. Using one of these thin thicknesses may reduce the technical challenge for making high density pinhole arrays. Because of these thin thicknesses, low cost laser processes such as ultraviolet laser ablation methods, carbon dioxide laser ablation methods, or other laser ablation methods may be used to form high density pinhole arrays.

[0012] To achieve the final thickness of the housing substrate of greater than about 4 millimeters, multiple substrate sections may be stacked and bonded together once pinholes are formed in the smaller substrate sections. Once the smaller substrate sections are stacked with the appropriate alignment of pinholes, the stack of substrate sections may be subjected to multilayer sintering or multi-layer lamination.

[0013] Thus, housing substrates may be provided with thicknesses that may be required for a probe card housing substrate, and this may be accomplished while still maintaining appropriate alignment for pinholes and while still maintaining a high quality for the housing substrates.

[0014] Housing substrates may also be manufactured in a cost-effective and efficient manner. An important feature for probe card housing substrates is that they do not require metallization. The pinholes within probe card housing substrates are generally only used for housing support for metal testing pins. As a result, the main cost consideration for housing substrate is the material cost and process cost for making pinholes. Housing substrates formed in various embodiments described herein may possess both low material costs and low process costs for making pinholes.

[0015] Different processes may be used to form a multilayer structure. In some embodiments, substrate sections may be pre-sintered before laser ablation is performed, laser ablation may be performed to form pinholes and / or alignment holes, the housing substrate may be assembled from the smaller substrate sections, and the housing substrate may then be subjected to multi-layer lamination. In other embodiments, substrate sections may not be presintered before laser ablation is performed. Where this is the case, laser ablation may still be performed to form pinholes and / or alignment holes, the housing substrate may be assembled from the smaller substrate sections, and then the housing substrate may be subjected to multilayer sintering.

[0016] In an example embodiment, a method of manufacturing a housing substrate is provided. The method comprises forming a plurality of pinholes in a plurality of substratesections, each substrate section of the plurality of substrate sections including glass and having a thickness less than about 1.5 millimeters, stacking the substrate sections so that the plurality of pinholes align, depositing an adhesive material in one or more volumes between adjacent substrate sections when the substrate sections are stacked; and consolidating the plurality of substrate sections and the adhesive material to form the housing substrate. The housing substrate has a thickness of about 4 millimeters or more. In some embodiments, the substrate sections may each have a thermal conductivity of at least about 1.0 Watts per meter-kelvin. Additionally, in some embodiments, the substrate sections may each have a thermal conductivity of at least about 1.2 Watts per meter-kelvin.

[0017] In some embodiments, the substrate sections may each have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less over a temperature range of 25-300 C. Furthermore, in some embodiments, the coefficient of thermal expansion may be about 1.2 parts per million per Celsius degree or less over a temperature range of 25-300 C.

[0018] In some embodiments, the substrate sections may each have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz. Also, in some embodiments, the dielectric loss may be about 0.0005 or less at an operating frequency of about 10 gigahertz.

[0019] In some embodiments, the substrate sections may each comprise fused silica glass. Additionally, in some embodiments, the substrate sections may each have a thickness of about 1 millimeter or less, and the housing substrate may have a thickness of about 5 millimeters or more. In some embodiments, the pinholes may be formed through laser ablation. In some embodiments, the housing substrate may be a probe card housing substrate. Furthermore, in some embodiments, the substrate sections and the adhesive material may be consolidated at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius.

[0020] In some embodiments, the method may also include forming alignment holes in the substrate sections and aligning the pinholes in the substrate sections. Alignment of the pinholes in the substrate sections may be accomplished by extending an alignment member through each alignment hole of the alignment holes. Furthermore, in some embodiments, the alignment holes may be formed through laser ablation.

[0021] In another example embodiment, a housing substrate is provided that is made by a particular process. The process comprises providing substrate sections comprising glass, each substrate section of the substrate sections has a thickness of less than about 1.5 millimeters, forming a plurality of pinholes in a plurality of substrate sections, each substrate section of theplurality of the substrate sections comprising glass and having a thickness less than about 1.5 millimeters, stacking the substrate sections so that the plurality of pinholes align, depositing an adhesive material in one or more volumes between adjacent substrate sections when the substrate sections are stacked, and consolidating the plurality of substrate sections and the adhesive material to form the housing substrate. The housing substrate has a thickness of about4 millimeters or more.

[0022] In another example embodiment, a housing substrate is provided comprising substrate sections comprising glass. Each substrate section of the substrate sections has a thickness of less than about 1.5 millimeters. Pinholes are positioned in each substrate section of the substrate sections, and the substrate sections are stacked so that the pinholes align. The housing substrate also includes an adhesive material positioned in one or more volumes between adjacent substrate sections within the substrate sections. The housing substrate has a thickness of about 4 millimeters or more.

[0023] In some embodiments, the housing substrate may be a probe card housing substrate. Furthermore, in some embodiments, the substrate sections may comprise fused silica glass. In some embodiments, the substrate sections may have a thermal conductivity of at least about 1.0 Watts per meter-kelvin. Additionally, in some embodiments, the substrate sections may have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less over a temperature range of 25-300 C. In some embodiments, the substrate sections may have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz. Also, in some embodiments, each substrate section of the substrate sections may have a thickness of less than about 1 millimeter, and the housing substrate may have an overall thickness of about5 millimeters or more. In some embodiments, the pinholes may be formed through laser ablation. Furthermore, in some embodiments, the substrate sections and the adhesive material may be consolidated at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius.BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, and wherein:

[0025] FIG. l is a schematic view illustrating a housing substrate positioned in an example radiofrequency probe card housing unit, in accordance with some embodiments discussed herein;

[0026] FIG. 2 is a top view illustrating an example pinhole area on a housing substrate, in accordance with some embodiments discussed herein;

[0027] FIG. 3 is a flow chart illustrating an example method for manufacturing a housing substrate where substrate sections are not pre-sintered, in accordance with some embodiments discussed herein;

[0028] FIG. 4 is a schematic view illustrating an example housing substrate comprising substrate sections that are not pre-sintered, in accordance with some embodiments discussed herein;

[0029] FIG. 5A is a top view illustrating example pinholes on a housing substrate comprising substrate sections that are not pre-sintered after assembly but before multi-layer sintering, in accordance with some embodiments discussed herein;

[0030] FIG. 5B is a top view illustrating the pinholes of the housing substrate of FIG. 5A after multi-layer sintering, in accordance with some embodiments discussed herein;

[0031] FIG. 6 is a flow chart illustrating an example method for manufacturing a housing substrate where substrate sections are pre-sintered, in accordance with some embodiments discussed herein;

[0032] FIG. 7 is a schematic view illustrating an example housing substrate comprising pre-sintered substrate sections, in accordance with some embodiments discussed herein;

[0033] FIG. 8 is a top view illustrating example pinholes on a housing substrate comprising pre-sintered substrate sections, in accordance with some embodiments discussed herein; and

[0034] FIG. 9 is a flow chart illustrating an example method for manufacturing a housing substrate, in accordance with some embodiments discussed herein.DETAILED DESCRIPTION

[0035] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments are shown. Like reference numerals generally refer to like elements throughout. For example, reference numbers 414 and 714 each refer to housing substrates. Additionally, any connections or attachments may be direct or indirect connections or attachments unless specifically noted otherwise.

[0036] An example radiofrequency probe card housing unit 100 is illustrated in the schematic view of FIG. 1. The radiofrequency probe card housing unit 100 comprises an outer housing 102, an inner housing 104, a housing substrate 106, and locking members 108. The outer housing 102 may define an internal volume therein where the housing substrate 106 andthe inner housing 104 may be received. The locking members 108 may be selectively moved between a locked state and an unlocked state. In the locked state, the locking members 108 may retain the inner housing 104 in its position in the internal volume of the outer housing 102, the housing substrate 106 may be positioned within the internal volume of the outer housing 102 beneath the inner housing 104, and the inner housing 104 may retain the housing substrate 106 in its position in the internal volume of the outer housing 102.

[0037] An example pinhole area 210 on a housing substrate 206 is illustrated in the top view of FIG. 2, and the housing substrate 206 may be similar to the housing substrate 106 illustrated in FIG. 1. The pinhole area 210 may include a large number of pinholes, and these pinholes may be positioned in a grid pattern with a n-by-n array. In some embodiments, about 700 pinholes or more may be included in a pinhole area 210 but a greater or lesser number of pinholes may be used. Additionally, as noted below, the pinholes within the housing substrate typically must have a small diameter and small pitch. Thus, providing a solution that may accomplish these properties is desirable, and various embodiments described herein are capable of doing so. The housing substrate 206 also has holes 212 positioned at different locations around the perimeter of the housing substrate 206 to position the housing substrate 206 relative to other components.

[0038] As noted previously, different approaches may be used to provide a multilayer structure for housing substrates with desirable properties. An example method 300 for manufacturing a housing substrate is illustrated in the flow chart of FIG. 3. In this example method 300, substrate sections are not pre-sintered before laser ablation is performed.

[0039] At operation 302 of method 300, substrate sections are provided. These substrate sections may comprise glass (e.g., fused silica glass) that is formed through a fusion forming process. The glass may be a low-loss glass and may be provided in the form of one or more glass sheets. Examples of fusion forming processes that may be performed herein are illustrated and described in U.S. Patent Numbers 3,338,696 and 3,682,609, which are incorporated by reference herein for all purposes.

[0040] At operation 304, acid leaching may be performed on the substrate sections. Acid leaching may be performed in a leaching material comprising hydrogen chloride (HC1). About five percent of the leaching material by weight percentage may be hydrogen chloride in some embodiments. Leaching may occur over a time period of about 24 hours or more at about 95 degrees Celsius where glass having a thickness of about 700 micrometers is used. However, the time required for leaching may differ based on the thickness of the glass. For example,where glass is used having athickness of about 100 micrometers, the time required for leaching may be around 2 hours. After acid leaching is performed, the substrate sections may be relatively porous compared to the substrate sections before acid leaching. For example, the pore sizes for pores within substrate sections may generally fall between about 2 nanometers and about 20 nanometers in diameter or width, between about 3 nanometers and about 15 nanometers in diameter or width, between about 4 nanometers and about 10 nanometers in diameter or width, between about 3 nanometers and about 6 nanometers in diameter or width, between about 3.5 nanometers and about 4.5 nanometers in diameter or width, with pore sizes centering around 4 nanometers in diameter or width.

[0041] At operation 306, laser ablation may be performed on the substrate sections. Laser ablation may be utilized to form pinholes, alignment holes, and other holes or features of the substrate sections.

[0042] At operation 308, the housing substrate may be assembled from the substrate sections. The substrate sections may be assembled by performing operations similar to operations 907, 908, 910 of the method 900 of FIG. 9. At operation 310, multi-layer sintering may be performed to consolidate the components of the housing substrate. Multi-layer sintering of the substrate sections and the adhesive material may be performed at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius.

[0043] An example housing substrate 414 comprising substrate sections 418A-418E is illustrated in the schematic view of FIG. 4. The housing substrate 414 may be a probe card housing substrate. Each of the substrate sections 418A-418E comprise a glass material such as fused silica glass. Even with multiple substrate sections being used and with adhesive being used between substrate sections, the housing substrate 414 may retain strong optical transparency, and the housing substrate 414 may be created without any visible interlayer gap or bubbles between substrate sections 418A-418E.

[0044] The substrate sections 418A-418E include five sections, including a first substrate section 418A, a second substrate section 418B, a third substrate section 418C, a fourth substrate section 418D, a fifth substrate section 418E. However, a greater or lesser number of substrate sections may be included in a housing substrate 414.

[0045] Each ofthe substrate sections 418A-418E may defme athickness Tl. The thickness T1 may be less than about 1.5 millimeters or less than about 1.0 millimeters in some embodiments. In the illustrated embodiment, the thickness T1 is about 0.7 millimeters thick. Using one of these thin thicknesses may reduce the technical challenge for making high densitypinhole arrays. Because of these thin thicknesses, low cost laser processes (e.g., ultraviolet laser ablation methods, carbon dioxide laser ablation methods, etc.) may be used to form high density pinhole arrays. In some embodiments, the thickness of each of the substrate sections 418A-418E may be about the same, but substrate sections having differing sizes may be used in some embodiments.

[0046] Additionally, the housing substrate 414 defines a thickness T2. Once the housing substrate 414 is fully manufactured, the thickness T2 may be about 4 millimeters or more, about 5 millimeters or more, about 6 millimeters or more, about 7 millimeters or more, about 8 millimeters or more, about 9 millimeters or more, or about 10 millimeters or more. However, the thickness T2 may be different in other embodiments.

[0047] The substrate sections 418A-418E may each have a thermal conductivity of about 1.0 Watts per meter-kelvin or more or about 1.2 Watts per meter-kelvin. However, substrate sections 418A-418E may have different thermal conductivity levels.

[0048] The substrate sections 418A-418E may each have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less over a temperature range of 25-300 C. Alternatively, the substrate sections 418A-418E may each have a coefficient of thermal expansion of about 1.2 parts per million per Celsius degree or less over a temperature range of 25-300 C. However, substrate sections 418A-418E may have different coefficients of thermal expansion.

[0049] The substrate sections 418A-418E may each have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz. Alternatively, the substrate sections 418A-418E may each have a dielectric loss of about 0.0005 or less at an operating frequency of about 10 gigahertz. However, substrate sections may have a different dielectric loss levels in other embodiments.

[0050] The substrate sections 418A-418E may each include a pinhole array comprising one or more pinholes 426 defined within the substrate sections 418A-418E. In the embodiment illustrated in FIG. 4, the pinhole array is provided in a grid pattern, with a four-by-four array of pinholes. However, the size of the pinholes array may be significantly larger in other embodiments.

[0051] The pinholes 426 in the different substrate sections may be aligned so that each of the corresponding pinholes 426 extend along about the same axis. For example, pinholes on the far left in FIG. 4 each extend along the same axis 416B. The pinholes 426 in the different substrate sections may be aligned by extending an alignment member through each alignmenthole of the alignment holes. For example, a first alignment member 425 A may be positioned within the alignment holes 424A, and a second alignment member 425B may be positioned within the alignment holes 424B. Extending the first alignment member 425 A through the alignment holes 424A may cause the alignment holes 424A to be aligned about the axis 416A, and extending the second alignment member 425B through the alignment holes 424B may cause the alignment holes 424B to be aligned about the axis 416C. By aligning the alignment holes 424A relative to the axis 416A and by aligning the alignment holes 424B relative to the axis 416C, the substrate sections 418A-418E and the array of pinholes 426 positioned on the substrate sections 418A-418E may also be aligned.

[0052] In some embodiments, the alignment members 425A, 425B may be fixed on another substrate or surface before positioning the alignment holes 424A, 424B relative to the alignment members 425A, 425B. Once the alignment members 425A, 425B are fixed, the substrate sections 418A-418E may be positioned (e.g., one at atime) relative to the alignment members 425 A, 425B.

[0053] While two alignment holes 424A, 424B are illustrated in the schematic view of FIG. 4, additional alignment holes may be positioned at other locations. The alignment holes 424A, 424B may be positioned proximate to the edges of the substrate sections, and the array of pinholes 426 may be positioned at a central location on the substrate sections. In some embodiments, at least one alignment hole may be positioned proximate to each comer of the substrate sections 418A-418E. In other embodiments, only two alignment holes are positioned in the substrate sections 418A-418E.

[0054] The alignment holes 424A, 424B and other alignment holes described herein may be formed through ultraviolet laser ablation in some embodiments. Similarly, the pinholes 426 and other pinholes described herein may be formed through ultraviolet laser ablation in some embodiments. However, alignment holes and pinholes may be formed using other techniques (e.g., carbon dioxide laser ablation or other laser ablation techniques) in other embodiments.

[0055] The housing substrate 414 illustrated in FIG. 4 includes volumes 422 formed between the adjacent substrate sections. Adhesive 420 may be positioned in each of these volumes 422 at one or more locations within the volumes 422. The adhesive 420 may be provided in the form of adhesive droplets. The adhesive 420 may hold the substrate sections 418 A-418E together.

[0056] Once the adhesive 420 is positioned, the housing substrate 414 may be placed within a furnace for sintering. The housing substrate 414 may be sintered at a temperature ofbetween about 900 degrees Celsius and about 1100 degrees Celsius. Before consolidation, the housing substrate 414 may optionally be separated from the alignment members 425 A, 425B and / or any other substrate or surface that the alignment members 425A, 425B are fixed to.

[0057] After sintering, fused silica glass may have a dielectric constant of about 3.8 at an operating frequency of about 10 gigahertz, a dielectric loss of about 0.0005 at an operating frequency of about 10 gigahertz, a thermal conductivity of about 1.2 Watts per meter-kelvin, and a coefficient of thermal expansion of about 1.2 parts per million per Celsius degree or less over a temperature range of 25-300 C. Properties for other Table 1 below provides a comparison of this sintered substrate material relative to other alternatives. The use of fused silica glass that has been sintered provides advantages over other materials identified in Table 1 above. For example, the fused silica glass has the lowest dielectric loss of the materials listed in Table 1. Materials like Photoveel II® have a higher dielectric constant and loss tangent than sintered fused silica glass, causing Photoveel II® to have a higher total dielectric loss than sintered fused silica glass.* Measured at an operating frequency of about 10 gigahertz unless noted otherwise

[0058] For probe card housing substrates, it is beneficial to have materials with a low dielectric loss, high thermal conductivity, and a low coefficient of thermal expansion, and fused silica glass provides all of these qualities. It is also important to be able to easily process pinholes on a thick substrate with high densities, and the use of fused silica glass also enables this easy ability to process pinholes. Additionally, sintered fused silica glass is typically transparent, so detecting defects may be easier with sintered fused silica glass than when nontransparent materials like Photoveel II® are used. Additionally, the use of fused silica glass instead of Photoveel II® may be beneficial because Photoveel II® material imposes higher energy demands during manufacturing relative to sintered fused silica glass material.

[0059] Example pinholes are illustrated in FIG. 5A on a housing substrate 530 comprising substrate sections before multi-layer sintering, with these substrate sections not being presintered before multi-layer sintering. In the housing substrate 530 of FIG. 5 A, a first pinhole 534, a second pinhole 536, and a third pinhole 538 are illustrated. Other pinholes are also illustrated. Each of the pinholes are generally circular in shape. The first pinhole 534 defines a diameter D 1. This diameter D 1 is about 600 micrometers, but the diameter D 1 may possess other values. For example, the diameter DI may be between about 20 micrometers and about 750 micrometers or between about 50 micrometers and about 500 micrometers in other embodiments. Other pinholes may also possess a similar diameter. Small pinholes of about 20 micrometers in diameter D 1 may be used where thin glass is used having a thickness of about 100 micrometers.

[0060] Additionally, centers of the second pinhole 536 and the third pinhole 538 may be separated by a distance D2. This distance D2 is often about twice the diameter DI, but the distance D2 may possess other values. For example, the distance D2 may be between about 40 micrometers and about 1500 micrometers or between about 100 micrometers and about 1000 micrometers in other embodiments. As illustrated, the pinholes are each positioned in a grid pattern with equal spacing. Thus, the centers of adjacent pinholes within the same row may be separated by the distance D2, and the centers of adjacent pinholes within the same column may be separated by the distance D2.

[0061] FIG. 5B shows a housing substrate 530A, with this housing substrate 530A being the housing substrate 530 after it has undergone multi-layer sintering. FIG. 5B illustrates that excellent alignment and sizing of pinholes may be maintained even after multi-layer sintering is performed. In the housing substrate 530A of FIG. 5B, a first pinhole 534A, a second pinhole 536A, and a third pinhole 538A are illustrated, and each of these pinholes correspond to the pinholes 534, 536, 538 in the housing substrate 530. Other pinholes are also illustrated in FIG. 5B. Each of the pinholes are generally circular in shape. The first pinhole 534A defines a diameter D3. This diameter D3 is about 550 micrometers, but the diameter D3 may possess other values. For example, the diameter D3 may be between about 20 micrometers and about 750 micrometers or between about 50 micrometers and about 500 micrometers. Other pinholes may also possess a similar diameter.

[0062] Additionally, centers of the second pinhole 536A and the third pinhole 538A may be separated by a distance D4. This distance D4 is about 610 micrometers, but the distance D4 may possess other values. For example, the distance D4 may be between about 40 micrometersand about 1500 micrometers or between about 100 micrometers and about 1000 micrometers in other embodiments. As illustrated, the pinholes are each positioned in a grid pattern with equal spacing. Thus, the centers of adjacent pinholes within the same row may be separated by the distance D4, and the centers of adjacent pinholes within the same column may be separated by the distance D4.

[0063] As noted previously, different approaches may be used to provide a multilayer structure for the housing substrate with desirable properties. An example method 600 for manufacturing a housing substrate is illustrated in the flow chart of FIG. 6. In this example method 600, substrate sections are pre-sintered before laser ablation is performed.

[0064] At operation 602, substrate sections are provided. These substrate sections may comprise glass (e.g., fused silica glass) that is formed through a fusion forming process. The glass may be a low-loss glass and may be provided in the form of one or more glass sheets.

[0065] At operation 604, acid leaching may be performed. Acid leaching may be performed in a leaching material comprising hydrogen chloride (HC1). About five percent of the leaching material by weight percentage may be hydrogen chloride in some embodiments, and leaching may occur over a time period of about 24 hours or more at about 95 degrees Celsius where glass having a thickness of about 700 micrometers is used. However, the time required for leaching may differ based on the thickness of the glass. For example, where glass is used having a thickness of about 100 micrometers, the time required for leaching may be around 2 hours. After acid leaching is performed, the substrate sections may be relatively porous compared to the substrate sections before acid leaching. For example, the pore sizes for pores within substrate sections may generally fall between about 2 nanometers and about 20 nanometers in diameter or width, between about 3 nanometers and about 15 nanometers in diameter or width, between about 4 nanometers and about 10 nanometers in diameter or width, between about 3 nanometers and about 6 nanometers in diameter or width, between about 3.5 nanometers and about 4.5 nanometers in diameter or width, with pore sizes centering around 4 nanometers in diameter or width.

[0066] At operation 606, pre-sintering may be performed, with the substrate sections being thermally consolidated through sintering. This sintering may occur at a temperature of about between about 900 degrees Celsius and about 1100 degrees Celsius.

[0067] At operation 608, touch finishing may be completed, with this touch finishing being performed to make a silica wafer. After touch finishing is completed, the substrate sections may generally be provided in the form of consolidated silica.

[0068] At operation 610, laser ablation may be performed on the substrate sections. Laser ablation may be utilized to form pinholes, alignment holes, and other holes or features of the substrate sections. Laser ablation may be performed using ultraviolet laser ablation techniques, carbon dioxide laser ablation techniques, or other laser ablation techniques.

[0069] At operation 612, the housing substrate may be assembled from the substrate sections. The substrate sections may be assembled using an approach similar to the method 900 of FIG. 9.

[0070] At operation 614, multi-layer lamination may be performed on the housing substrate to consolidate the components of the housing substrate. With this multi-layer lamination approach, an ultraviolet curable adhesive may be positioned between adjacent substrate sections, and the substrate sections and the ultraviolet curable adhesive may undergo lamination.

[0071] While the method 300 and 600 of FIGS. 3 and 6 provide example methods for making substrate sections comprising silica glass, other methods may also be used. Examples methods for making silica glass (e.g., consolidated silica glass) are illustrated and described in the patent application filed under the Paris Cooperation Treaty having the application number PCT / US2024 / 032175, which is incorporated by reference herein for all purposes.

[0072] An example housing substrate 714 comprising pre-sintered substrate sections 718A-718E is illustrated in the schematic view of FIG. 7. The pre-sintered substrate sections 718A-718E may include finished thin silica sheets. By using substrate sections 718A-718E that are pre-sintered rather than the substrate sections 418A-418E of FIG. 4, higher optical clarity and optical transparency may be provided within the housing substrate 714 that is formed. Additionally, by using substrate sections 718A-718E that are pre-sintered rather than the substrate sections 418A-418E of FIG. 4, the risk of misalignment developing during sintering may be eliminated as alignment may occur after substrate sections 718A-718E have already been sintered. However, by using substrate sections 718A-718E that are pre-sintered rather than the substrate sections 418A-418E of FIG. 4, a thin adhesive layer may be required between silica sheet to allow for multilayer lamination. For both the housing substrate 414 and the housing substrate 714, the final housing substrates that are formed may be provided without any visible interlayer gap or bubbles between substrate sections.

[0073] The housing substrate 714 may be an RF probe card housing substrate. Each of the substrate sections 718A-718E comprise a glass material such as fused silica glass. Unlike thesubstrate sections 418A-418E of FIG. 3, each of the substrate sections 718A-718E may comprise glass that has been sintered.

[0074] The substrate sections 718A-718E include five sections, including a first substrate section 718A, a second substrate section 718B, a third substrate section 718C, a fourth substrate section 718D, and a fifth substrate section 718E. However, a different number of substrate sections may be included in a housing substrate 714.

[0075] Each of the substrate sections 718A-718E may define a thickness T3. The thickness T3 may be about 1.5 millimeters or less in some embodiments. However, the thickness T3 may be about 1.0 millimeters or less in some embodiments. In some embodiments, the thickness T3 may be about 0.7 millimeters. Using one of these thin thicknesses may reduce the technical challenge for making high density pinhole arrays. Because of these thin thicknesses, low cost laser processes (e.g., ultraviolet laser ablation methods, carbon dioxide laser ablation methods, etc.) may be used to form high density pinhole arrays. In some embodiments, the thickness of each of the substrate sections 718A-718E may be about the same, but substrate sections having differing sizes may be used in some embodiments.

[0076] Additionally, the housing substrate 714 defines a thickness T4. Once the housing substrate 714 is fully manufactured, the thickness T4 may be about 4 millimeters or more, about 5 millimeters or more, about 6 millimeters or more, about 7 millimeters or more, about 8 millimeters or more, about 9 millimeters or more, or about 10 millimeters or more. However, the thickness T4 may be different in other embodiments.

[0077] The housing substrate 714 illustrated in FIG. 7 includes volumes 722 formed between the adjacent substrate sections. A curable adhesive 728 may be positioned in each of these volumes 722 at one or more locations within the volumes 722. The layer of curable adhesive 728 may be brush painted in some embodiments, but the curable adhesive 728 may be applied using different techniques. The curable adhesive 728 may be configured to be cured through ultra-violet curing. The curable adhesive 728 may hold the substrate sections 71 SA- 718 E together.

[0078] The substrate sections 718A-718E may each have a thermal conductivity of about 1.0 Watts per meter-kelvin or more or about 1.2 Watts per meter-kelvin. However, substrate sections 718A-718E may have different thermal conductivity levels.

[0079] The substrate sections 718A-718E may each have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less. Alternatively, the substrate sections 718A-718E may each have a coefficient of thermal expansion of about 1.2 parts permillion per Celsius degree or less over a temperature range of 25-300 C. However, substrate sections 718A-718E may have different coefficients of thermal expansion.

[0080] The substrate sections 718A-718E may each have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz. Alternatively, the substrate sections 718A-718E may each have a dielectric loss of about 0.0005 or less at an operating frequency of about 10 gigahertz. However, substrate sections may have a different dielectric loss levels in other embodiments.

[0081] The pinholes 726 in the different substrate sections may be aligned so that each of the corresponding pinholes 726 extend along about the same axis. For example, pinholes on the far left in FIG. 7 each extend along the same axis 716B. The pinholes 726 in the different substrate sections may be aligned by extending an alignment member through each alignment hole of the alignment holes. For example, a first alignment member 725 A may be positioned within the alignment holes 724A, and a second alignment member 725B may be positioned within the alignment holes 724B. Extending the first alignment member 725 A through the alignment holes 724A may cause the alignment holes 724A to be aligned about the axis 716A, and extending the second alignment member 725B through the alignment holes 724B may cause the alignment holes 724B to be aligned about the axis 716C. By aligning the alignment holes 724A relative to the axis 716A and by aligning the alignment holes 724B relative to the axis 716C, the substrate sections 718A-718E and the array of pinholes 726 positioned on the substrate sections 718A-718E may also be aligned.

[0082] Example pinholes are illustrated on a housing substrate 830 comprising pre-sintered substrate sections in the top view of FIG. 8. The housing substrate 830 of FIG. 8 has not undergone multi-layer lamination. However, properties such as pinhole size, pinhole positioning, and pinhole alignment may generally remain unchanged after multi-layer lamination.

[0083] In the housing substrate 830 of FIG. 8, a first pinhole 834, a second pinhole 836, and a third pinhole 838 are illustrated. Other pinholes are also illustrated. Each of the pinholes are generally circular in shape. The first pinhole 834 defines a diameter D5. This diameter D5 is about 380 micrometers, but the diameter D5 may possess other values. For example, the diameter D5 may be between about 20 micrometers and about 750 micrometers or between about 50 micrometers and about 500 micrometers in other embodiments. Other pinholes may also possess a similar diameter. Small pinholes of about 20 micrometers in diameter may be used where thin glass is used having a thickness of about 100 micrometers.

[0084] Additionally, centers of the second pinhole 836 and the third pinhole 838 may be separated by a distance D6. This distance D6 is about 700 micrometers, but the distance D6 may possess other values. For example, the distance D6 may be about twice the diameter D5 or the distance D6 may be between about 40 micrometers and about 1500 micrometers or between about 100 micrometers and about 1000 micrometers in other embodiments. As illustrated, the pinholes are each positioned in a grid pattern with equal spacing. Thus, the centers of adjacent pinholes within the same row may be separated by the distance D6, and the centers of adjacent pinholes within the same column may be separated by the distance D6.

[0085] An example method 900 for manufacturing a housing substrate is illustrated in the flow chart of FIG. 9. At operation 902, substrate sections are provided comprising glass material. For example, the substrate sections may each comprise fused silica glass and may be formed using a fusion forming process. Each of the substrate sections may have a thickness about 1.5 millimeters or less in some embodiments or about 1.0 millimeters or less. However, the thickness may be about 0.7 millimeters in some embodiments.

[0086] The substrate sections provided at operation 902 may each have a thermal conductivity of about 1.0 Watts per meter-kelvin or more or about 1.2 Watts per meter-kelvin. However, substrate sections may be provided having different thermal conductivity levels.

[0087] The substrate sections provided at operation 902 may each have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less over a temperature range of 25-300 C. Alternatively, the substrate sections may each have a coefficient of thermal expansion of about 1.2 parts per million per Celsius degree or less over a temperature range of 25-300 C. However, substrate sections may have different coefficients of thermal expansion.

[0088] The substrate sections provided at operation 902 may each have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz. Alternatively, the substrate sections may each have a dielectric loss of about 0.0005 or less at an operating frequency of about 10 gigahertz. However, substrate sections may have a different dielectric loss levels in other embodiments.

[0089] At operation 904, pinholes are formed in the substrate sections. The pinholes may be formed through ultraviolet laser ablation, carbon dioxide laser ablation, or through other laser ablation approaches.

[0090] At operation 906, alignment holes are formed in the substrate sections. The alignment holes may be formed through ultraviolet laser ablation, carbon dioxide laser ablation, or through other laser ablation approaches.

[0091] At operation 907, alignment members may be extended through each of the alignment holes. The alignment holes in each of the substrate sections may be aligned together, and alignment members (e.g., rods, etc.) may be inserted into the alignment holes to maintain alignment of the pinholes as the substrate sections are stacked. The alignment members may help ensure that the pinholes remain aligned.

[0092] At operation 908, the substrate sections are stacked so that the pinholes in each of the substrate sections align.

[0093] At operation 910, an adhesive material is provided in volume(s) between the adjacent substrate sections. The adhesive may be provided in the form of adhesive droplets where multi-layer sintering is performed. The adhesive may be provided in the form ultraviolet curable adhesive where multi-layer lamination is performed.

[0094] At operation 912, the substrate sections and the adhesive material are consolidated together. Consolidation of the substrate sections and the adhesive material may be performed by multi-layer sintering at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius. Alternatively, consolidation may occur through multi-layer lamination.

[0095] After the method 900 is completed, a housing substrate is provided. This may be provided in the form of a probe card housing substrate in some embodiments. The housing substrate may have a thickness of about 4 millimeters or more, about 5 millimeters or more, about 6 millimeters or more, about 9 millimeters or more, about 8 millimeters or more, about 9 millimeters or more, or about 10 millimeters or more.

[0096] The methods 300, 600, 900 are merely exemplary, and these methods may be modified in other embodiments in various ways. For example, the operations of methods 300, 600, 900 may be performed in different orders. Additionally, certain operations may be added to or omitted from the methods 300, 600, 900.CONCLUSION

[0097] Many modifications and other embodiments set forth herein will come to mind to one skilled in the art to which these embodiments pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the embodiments are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the invention. Moreover, although the foregoing descriptions and the associated drawings describe example embodiments in the context of certain example combinations of elements and / or functions, it should be appreciated that different combinations of elements and / orfunctions may be provided by alternative embodiments without departing from the scope of the invention. In this regard, for example, different combinations of elements and / or functions than those explicitly described above are also contemplated within the scope of the invention. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

THAT WHICH IS CLAIMED:

1. A method of manufacturing a housing substrate comprising: forming a plurality of pinholes in a plurality of substrate sections, each substrate section of the plurality of substrate sections comprising glass and having a thickness less than about 1.5 millimeters; stacking the substrate sections so that the plurality of pinholes align; depositing an adhesive material in one or more volumes between adjacent substrate sections when the substrate sections are stacked; and consolidating the plurality of substrate sections and the adhesive material to form the housing substrate, wherein the housing substrate has a thickness of about 4 millimeters or more.

2. The method of claim 1, wherein each substrate section of the plurality of substrate sections comprises fused silica glass.

3. The method of claim 1 or claim 2, wherein a thermal conductivity of each substrate section of the plurality of substrate sections is at least about 1.0 Watts per meter-kelvin.

4. The method of claim 1 or claim 2, wherein the substrate sections each have a thermal conductivity of at least about 1.2 Watts per meter-kelvin.

5. The method of any of claims 1-4, wherein the substrate sections each have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less over a temperature range of 25-300 C.

6. The method of claim 5, wherein the coefficient of thermal expansion is about 1.2 parts per million per Celsius degree or less over a temperature range of 25-300 C.

7. The method of any of claims 1-6, wherein the substrate sections each have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz.

8. The method of claim 7, wherein the dielectric loss is about 0.0005 or less at an operating frequency of about 10 gigahertz.

9. The method of any of claims 1-8, wherein the substrate sections each have a thickness of about 1 millimeter or less, and wherein the housing substrate has a thickness of about 5 millimeters or more.

10. The method of any of claims 1-9, wherein the pinholes are formed through laser ablation.

11. The method of any of claims 1-10, further comprising: forming alignment holes in the substrate sections; and aligning the pinholes in the substrate sections by extending an alignment member through each alignment hole of the alignment holes.

12. The method of claim 11, wherein the alignment holes are formed through laser ablation.

13. The method of any of claims 1-12, wherein the housing substrate is a probe card housing substrate.

14. The method of any of claims 1-13, wherein the substrate sections and the adhesive material are consolidated at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius.

15. A housing substrate made by a process of: providing substrate sections comprising glass, wherein each substrate section of the substrate sections has a thickness of less than about 1.5 millimeters; forming a plurality of pinholes in a plurality of substrate sections, each substrate section of the plurality of the substrate sections comprising glass and having a thickness less than about 1.5 millimeters; stacking the substrate sections so that the plurality of pinholes align;depositing an adhesive material in one or more volumes between adjacent substrate sections when the substrate sections are stacked; and consolidating the plurality of substrate sections and the adhesive material to form the housing substrate, wherein the housing substrate has a thickness of about 4 millimeters or more.

16. The housing substrate of claim 15, wherein the housing substrate is a probe card housing substrate.

17. A housing substrate comprising: substrate sections comprising glass, wherein each substrate section of the substrate sections has a thickness of less than about 1.5 millimeters, wherein pinholes are positioned in each substrate section of the substrate sections, and wherein the substrate sections are stacked so that the pinholes align; and an adhesive material positioned in one or more volumes between adjacent substrate sections within the substrate sections, wherein the housing substrate has a thickness of about 4 millimeters or more.

18. The housing substrate of claim 17, wherein the housing substrate is a probe card housing substrate.

19. The housing substrate of claim 17 or 18, wherein the substrate sections comprise fused silica glass.

20. The housing substrate of any of claims 17-19, the substrate sections have a thermal conductivity of at least about 1.0 Watts per meter-kelvin.

21. The housing substrate of any of claims 17-20, wherein the substrate sections have a coefficient of thermal expansion of about 1.5 parts per million per Celsius degree or less.

22. The housing substrate of any of claims 17-21, wherein the substrate sections have a dielectric loss of about 0.001 or less at an operating frequency of about 10 gigahertz.

23. The housing substrate of any of claims 17-22, wherein each substrate section of the substrate sections has a thickness of about 1 millimeter or less, and wherein the housing substrate has a thickness of about 5 millimeters or more.

24. The housing substrate of any of claims 17-23, wherein the pinholes are formed through laser ablation.

25. The housing substrate of any of claims 17-24, wherein the substrate sections and the adhesive material are consolidated at a temperature between about 900 degrees Celsius and about 1100 degrees Celsius.

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