Power conversion device and wiring board
By introducing a non-forming region in the power conversion device's wiring board to minimize parasitic capacitance, noise suppression is achieved, improving the performance and reliability of power conversion devices.
Patent Information
- Application Number
- PCT/JP2025/024926
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-29
- Filing Date
- 2025-07-11
- Publication Date
- 2026-02-05
AI Technical Summary
Existing power conversion devices experience noise generation due to parasitic capacitance formed between the power supply terminal and other conductor layers, which is not effectively addressed in current configurations.
The power conversion device incorporates a common mode choke coil and a wiring board with a non-forming region where the other potential portion is not formed in the opposing region of the power supply conductor layer, reducing parasitic capacitance and noise.
This configuration effectively suppresses noise caused by parasitic capacitance, enhancing the performance and reliability of power conversion devices.
Smart Images

Figure JP2025024926_05022026_PF_FP_ABST
Abstract
Description
Power conversion device and wiring board CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is based on Patent Application No. 2024-122570 filed in Japan on July 29, 2024, and the contents of the original application are incorporated by reference in their entirety.
[0002] The present disclosure relates to a power conversion device and a wiring board.
[0003] An example of a power conversion device is a power supply device disclosed in Patent Document 1. The power supply device includes a common mode choke coil, a control circuit, and a main circuit. The control circuit operates by receiving power from a control power supply and outputs a switching signal to a switching element in the main circuit. The main circuit converts the power supplied from the power supply and outputs it to a load. The common mode choke coil and control circuit are mounted on a substrate with internal wiring.
[0004] Japanese Patent Application Laid-Open No. 2023-138338
[0005] A power converter may have a configuration in which a common mode choke coil is mounted on a substrate in which multiple conductor layers are stacked via an insulating substrate. In such a power converter, a portion of the conductor layer to which the power supply terminal of the common mode choke coil is connected may be arranged opposite another conductor layer in the stacking direction. As a result, parasitic capacitance may be formed between the portion to which the power supply terminal is connected and another conductor layer, and noise may be generated due to this parasitic capacitance.
[0006] One disclosed object is to provide a power conversion device in which noise is suppressed. Another disclosed object is to provide a wiring board in which noise is suppressed.
[0007] The power conversion device disclosed herein is a power conversion device provided between a power supply and a load, comprising a common mode choke coil and a wiring board, wherein the common mode choke coil has a power supply side terminal and a load side terminal and is mounted on the wiring board, and the wiring board comprises an insulator and a plurality of conductor layers stacked with the insulator interposed between them, and the plurality of conductor layers have a connecting conductor layer including a power supply conductor portion to which the power supply side terminal is connected, and an other conductor layer different from the connecting conductor layer, and the other conductor layer has an other potential portion which is at a different potential from the power supply conductor portion, and a non-forming region in which the other potential portion is not formed in at least a part of an opposing region opposing the power supply conductor portion.
[0008] In this way, the power converter has a non-formation region where no other potential portion is formed in at least a portion of the opposing region of the power conductor portion on the other conductor layer. Therefore, the power converter can reduce the region where the power conductor portion and the other potential portion are arranged opposing each other compared to a configuration without the non-formation region. Therefore, the power converter can reduce the parasitic capacitance formed between the power conductor portion and the other potential portion. Therefore, the power converter can suppress noise caused by the parasitic capacitance.
[0009] The wiring board disclosed herein is a wiring board on which a common mode choke coil is mounted, and comprises an insulator and a plurality of conductor layers stacked with the insulator interposed therebetween, the plurality of conductor layers having a connecting conductor layer including a power supply conductor portion to which the common mode choke coil is connected, and an other conductor layer different from the connecting conductor layer, the other conductor layer having an other potential portion which is at a different potential from the power supply conductor portion, and a non-forming region in which the other potential portion is not formed, in at least a part of an opposing region opposing the power supply conductor portion.
[0010] The wiring board can achieve the same effects as the power conversion device.
[0011] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims and in this section are intended to exemplify correspondences with the following embodiments and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings.
[0012] 1 is a diagram illustrating the electrical configuration of a drive system in a first embodiment; FIG. 2 is a perspective view of an EPU; FIG. 3 is a perspective view of a motor device and an inverter device; FIG. 4 is a cross-sectional view of a high-voltage board; FIG. 5 is a plan view of the inverter device as seen from the high-voltage side; FIG. 6 is a plan view of the inverter device as seen from the low-voltage side; FIG. 7 is a perspective view showing a first conductor layer and an eighth conductor layer in the inverter device; FIG. 8 is a perspective view showing a second conductor layer and a fourth conductor layer in the inverter device; FIG. 9 is a perspective view showing a third conductor layer and a sixth conductor layer in the inverter device; FIG. 10 is an enlarged plan view of a first conductor layer; FIG. 11 is an enlarged plan view of a first conductor layer in a state in which a common mode choke coil is mounted; FIG. 12 is an enlarged plan view of a non-forming region portion in the second conductor layer; FIG. 13 is an enlarged plan view of a non-forming region portion in a first modification; FIG. 14 is an enlarged plan view of a non-forming region portion in a second modification;
[0013] Hereinafter, several embodiments for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, parts corresponding to matters described in the preceding embodiment will be assigned the same reference numerals, and duplicate descriptions may be omitted. In each embodiment, when only a part of the configuration is described, other previously described embodiments may be applied to the other parts of the configuration. In addition to combinations of parts that are specifically specified as being combinable in each embodiment, it is also possible to partially combine embodiments even if not specified, as long as there is no particular problem with the combination.
[0014] In this embodiment, an inverter device 80 provided in the drive system 100 is used as an example of a power conversion device. Also, in this embodiment, a high-voltage board 200 provided in the inverter device 80 is used as an example of a wiring board.
[0015] As shown in FIG. 1 , the drive system 100 is mounted on a moving object such as a vehicle or an aircraft. Examples of vehicles that can mount the drive system 100 include electric vehicles (EVs), hybrid vehicles (HVs), and fuel cell vehicles. Examples of aircraft include vertical take-off and landing aircraft, rotary-wing aircraft, and fixed-wing aircraft. An example of a vertical take-off and landing aircraft is an eVTOL. eVTOL stands for electric vertical take-off and landing aircraft.
[0016] The drive system 100 is a system that drives a moving object to move it. If the moving object is a vehicle, the drive system 100 drives the vehicle to run, and if the moving object is an air vehicle, the drive system 100 drives the air vehicle to fly.
[0017] The drive system 100 includes a battery 60 and an EPU 70. The battery 60 is connected to the EPU 70. The battery 60 is a power supply unit that supplies power to the EPU 70. The battery 60 is a DC voltage source that applies a DC voltage to the EPU 70. The battery 60 includes a rechargeable secondary battery. Examples of such secondary batteries include a lithium ion battery and a nickel-metal hydride battery. Note that a fuel cell, a generator, or the like may be used as the power supply unit in addition to or instead of the battery 60. The battery 60 corresponds to a power source.
[0018] 1 and 2, the EPU 70 includes the motor device 50 and the inverter device 80. In other words, the EPU 70 is an electric propulsion unit that combines the motor device 50 and the inverter device 80. EPU is an abbreviation for Electric Propulsion Unit.
[0019] The EPU 70 is a device that drives the moving body to move, and corresponds to a drive device. The EPU 70 mounted on a vehicle drives and rotates, for example, wheels as the drive object. The EPU 70 mounted on an aircraft drives and rotates, for example, rotors as the drive object. In a moving body, for example, one EPU 70 is provided for each drive object.
[0020] The EPU 70 has, for example, one motor device 50 and one inverter device 80. The motor device 50 has a motor 51. The inverter device 80 has an inverter 10. The battery 60 is connected to the motor 51 via the inverter 10. Power is supplied to the motor 51 from the battery 60 via the inverter 10. The motor 51 is driven in accordance with the voltage and current supplied from the inverter 10.
[0021] <Motor Device> As shown in Figures 1, 2, and 3, the motor device 50 has a motor housing 90a in addition to a motor 51. The motor 51 has a stator and a rotor. A shaft 110, which is the rotation axis of the motor 51, is fixed to the rotor. The motor 51 is, for example, an axial gap motor. The motor housing 90a houses the motor 51 and will be described later. The motor 51 (motor device 50) corresponds to a load.
[0022] The motor 51 is a multi-phase AC motor. The motor 51 is, for example, a three-phase AC motor having a U phase, a V phase, and a W phase. The motor 51 is a driving source for moving the moving body and functions as an electric motor. For example, a brushless motor is used as the motor 51. The motor 51 functions as a generator during regeneration. The motor 51 can also be referred to as a rotating electric machine, and the EPU 50 can also be referred to as a rotating electric machine unit.
[0023] The motor 51 has coils of multiple phases. The coils are windings and form an armature. A coil is provided for each of the U, V, and W phases. In the motor 51, the coils of multiple phases are star-connected. A star connection is sometimes called a Y connection. The coils of multiple phases are connected to each other at the neutral point of the motor 51. The motor device 50 may also have multiple bearings, resolvers, etc.
[0024] 1, 2, and 3, the inverter device 80 includes, in addition to the inverter 10, a drive circuit 41, a control circuit 42, and an inverter housing 90b. The inverter device 80 also includes an EMC filter 20, wiring sections 31 to 33, a smoothing capacitor 34, and current sensors 35 and 36. In FIG. 1, the drive circuit 41 is indicated as DD, and the control circuit 42 is indicated as CD. The inverter housing 90b houses the inverter 10 and will be described later.
[0025] The inverter device 80 has a P line 31, an N line 32, and an output line 33 as wiring sections 31 to 33. The P line 31 and the N line 32 connect the battery 60 and the inverter 10. The P line 31 is connected to the positive electrode of the battery 60. The N line 32 is connected to the negative electrode of the battery 60. In the battery 60, the positive electrode is the high-potential electrode, and the negative electrode is the low-potential electrode. The P line 31 and the N line 32 are power lines for supplying electric power. The P line 31 is a high-potential power line and may be referred to as a high-potential line or high-potential side wiring. The N line 32 is a low-potential power line and may be referred to as a low-potential line or low-potential side wiring.
[0026] The output line 33 is a power line for supplying power to the motor 51. The output line 33 connects the motor 51 and the inverter 10. The output lines 33 are provided corresponding to the U phase, V phase, and W phase, respectively. The output lines 33 do not have to be included in the inverter device 80. In other words, the output lines 33 only need to be included in the EPU 70.
[0027] The smoothing capacitor 34 is a capacitor that smoothes the DC voltage supplied from the battery 60. The smoothing capacitor 34 is connected to the P line 31 and the N line 32 between the battery 60 and the inverter 10. The smoothing capacitor 34 is connected in parallel to the inverter 10.
[0028] The EMC filter 20 is a filter circuit that reduces electromagnetic noise. The EMC filter 20 is connected to a P line 31 and an N line 32 between the battery 60 and the inverter 10. The EMC filter 20 is connected in parallel to, for example, a smoothing capacitor 34 and the inverter 10. EMC is an abbreviation for Electromagnetic Compatibility.
[0029] The EMC filter 20 has a common coil 21, a normal mode coil 22, a Y capacitor 23, an X capacitor 24, and a varistor 25. The common coil 21 is a common mode choke coil and is capable of reducing common mode noise. The normal mode coil 22 is a normal mode choke coil and is capable of reducing normal mode noise. The Y capacitor 23 is a line bypass capacitor and is capable of reducing common mode noise. The X capacitor 24 is an across-the-line capacitor and is capable of reducing normal mode noise. The varistor 25 is capable of absorbing and reducing surge voltages. The Y capacitor 23 and the varistor 25 are grounded to the ground GND.
[0030] The inverter 10 drives the motor 51 by converting the power supplied to the motor 51. The inverter 10 converts the power supplied to the motor 51 from direct current to alternating current. The inverter 10 is a power conversion unit that converts power. The inverter 10 is a multi-phase power conversion unit that performs power conversion for each of the multiple phases. The inverter 10 is, for example, a three-phase inverter that performs power conversion for each of the U phase, V phase, and W phase. The inverter device 80 has a power conversion unit and corresponds to a power conversion device. The inverter 10 can also be referred to as a power conversion circuit or an inverter circuit.
[0031] The inverter 10 has upper and lower arm circuits 11 for a plurality of phases. For example, the inverter 10 has an upper and lower arm circuit 11 for each of the U phase, V phase, and W phase. The upper and lower arm circuits 11 are sometimes referred to as legs. The upper and lower arm circuit 11 has an upper arm 12 and a lower arm 13. The upper arm 12 and the lower arm 13 are connected in series to the battery 60. The upper arm 12 is connected to a P line 31, and the lower arm 13 is connected to an N line 32.
[0032] The output line 33 is connected to the upper and lower arm circuits 11 for each of the multiple phases. The output line 33 is connected between the upper arm 12 and the lower arm 13. The output line 33 connects the upper and lower arm circuits 11 and the coil of the motor 51 for each of the multiple phases.
[0033] The upper arm 12 and the lower arm 13 each have an arm switch 14 and a diode 15. The arm switch 14 is a semiconductor switching element such as a MOSFET. MOSFET is an abbreviation for Metal-Oxide-Semiconductor Field-Effect Transistor. The arm switch 14 is a switching element that can convert power by switching. The diode 15 can be a body diode of a MOSFET. The upper arm 12 and the lower arm 13 can also be an IGBT.
[0034] In the upper arm 12, the drain of the arm switch 14 is connected to the P line 31. In the lower arm 13, the source of the arm switch 14 is connected to the N line 32. The source of the arm switch 14 in the upper arm 12 and the drain of the arm switch 14 in the lower arm 13 are connected to each other. In each of the upper arm 12 and the lower arm 13, a diode 15 is connected in anti-parallel to the arm switch 14 for reflux. The anode of the diode 15 is connected to the source of the corresponding arm switch 14, and the cathode is connected to the drain.
[0035] Each of the upper arm 12 and the lower arm 13 has a plurality of arm switches 14 and diodes 15. In each of the upper arm 12 and the lower arm 13, a plurality of arm switches 14 are connected in parallel, and a plurality of diodes 15 are connected in parallel. In each of the arms 12 and 13, one arm switch 14 and one diode 15 constitute one set, and multiple sets are connected in parallel.
[0036] For example, six arm switches 14 and six diodes 15 are connected in parallel in each of the upper arm 12 and the lower arm 13. In order to avoid cluttering the drawing, Fig. 1 shows three arm switches 14 and three diodes 15 connected in parallel. The number of units connected in parallel is not limited to six.
[0037] Furthermore, in this embodiment, as an example, an inverter device 80 is employed that has a motor current sensor 36 and a battery current sensor 35. The battery current sensor 35 detects the current flowing to the battery 60. The battery current sensor 35 is provided for the P line 31. The battery current sensor 35 detects the current flowing from the battery 60 to the inverter 10 via the P line 31. The battery current sensor 35 is connected to the control circuit 42 and outputs a detection signal to the control circuit 42.
[0038] The motor current sensor 36 detects the current flowing through the motor 51. The motor current sensor 36 is provided for the output line 33. The motor current sensor 36 detects the current flowing through the motor 51 via the output line 33. A motor current sensor 36 is provided for each of the U phase, V phase, and W phase, for example. The motor current sensor 36 is connected to the control circuit 42 and outputs a detection signal to the control circuit 42.
[0039] The control circuit 42 is a control device such as an ECU, and controls the operation of the inverter 10. ECU is an abbreviation for Electronic Control Unit. The control circuit 42 is mainly composed of a microcomputer equipped with, for example, a processor, memory, I / O, and a bus connecting these. The memory is a non-transitory tangible storage medium that non-temporarily stores computer-readable programs and data. The non-transitory tangible storage medium is a non-transitory tangible storage medium, and is realized by a semiconductor memory, a magnetic disk, or the like.
[0040] The control circuit 42 executes various processes related to the operation of the inverter 10 by having a processor execute a control program stored in the memory. The control circuit 42 is connected to an external device, the inverter 10, and various sensors. The external device is, for example, a host ECU such as an integrated ECU mounted on a vehicle. The various sensors are, for example, current sensors 35, 36, and are provided in the EPU 70.
[0041] The control circuit 42 generates a command signal in response to a control signal input from an external device, detection signals input from various sensors, etc. The control circuit 42 outputs the generated command signal to the drive circuit 41. The control circuit 42 then controls the inverter 10 via the drive circuit 41. In other words, the control circuit 42 causes the inverter 10 to perform power conversion.
[0042] The drive circuit 41 is connected to each of the multiple arm switches 14 included in the inverter 10. The drive circuit 41 drives the inverter 10 in response to a command signal from the control circuit 42. The drive circuit 41 drives the arm switches 14 by applying a drive voltage in response to the command signal to the gate of each arm switch 14. The drive circuit 41 is capable of turning on and off the arm switches 14. The drive circuit 41 is sometimes referred to as a driver.
[0043] 2 and 3, the EPU 70 has the motor device 50 and the inverter device 80 arranged along the motor axis Cm. The motor device 50 and the inverter device 80 are fixed to each other with fasteners such as bolts.
[0044] The motor device 50 and the inverter device 80 are each formed in a cylindrical shape as a whole. The EPU 70 is configured such that the motor device 50 and the inverter device 80 are multi-staged in the axial direction AD. In the EPU 70, the two cylindrical devices, the motor device 50 and the inverter device 80, are stacked in the axial direction AD.
[0045] The axial direction AD is the direction in which the motor axis Cm extends. With respect to the motor axis Cm, the axial direction AD, the radial direction RD, and the circumferential direction CD are perpendicular to one another (see FIG. 5). Note that the outside of the radial direction RD is sometimes referred to as the radially outer side, and the inside of the radial direction RD is sometimes referred to as the radially inner side.
[0046] The motor axis Cm is the center line of the motor 51 and is an imaginary line that extends linearly. The rotor rotates relative to the stator about the motor axis Cm. In the motor 51, the stator and rotor are arranged in the axial direction AD along the motor axis Cm. For example, the stator is provided between the two rotors in the axial direction AD.
[0047] As shown in FIG. 3 , the motor housing 90a is formed in an overall cylindrical shape and extends along the motor axis Cm. The motor housing 90a is made of a metal material or the like and has thermal conductivity. The motor housing 90a has an outer peripheral surface 90a1. The outer peripheral surface 90a1 is included in the outer surface of the motor housing 90a and extends annularly in the circumferential direction CD as a whole. The motor housing 90a has a motor outer peripheral wall 90a2 and motor fins 90a3. The motor outer peripheral wall 90a2 forms the outer peripheral surface 90a1.
[0048] The motor fins 90a3 are heat dissipation fins provided on the outer peripheral surface 90a1. The motor fins 90a3 increase the surface area of the motor housing 90a, enhancing the heat dissipation effect of the motor housing 90a. The motor fins 90a3 protrude radially outward from the outer peripheral surface 90a1. The motor fins 90a3 extend in the axial direction AD along the outer peripheral surface 90a1. Multiple motor fins 90a3 are arranged in the circumferential direction CD. The motor fins 90a3 are fins for cooling the motor device 50 and are sometimes referred to as cooling fins. The outer peripheral surface 90a1 is a surface for cooling the motor device 50 and is sometimes referred to as a cooling surface. The motor device 50 is an air-cooled device.
[0049] As shown in Fig. 3, the inverter housing 90b is formed into a cylindrical shape as a whole and extends along the inverter axis Ci. The inverter axis Ci is the center line of the inverter housing 90b. The inverter axis Ci coincides with the motor axis Cm. The inverter housing 90b is made of a metal material or the like and has thermal conductivity.
[0050] The inverter housing 90b has an outer peripheral surface 90b1 and an inner peripheral surface 90b5 (see FIG. 5). The outer peripheral surface 90b1 is included in the outer surface of the inverter housing 90b and extends annularly in the circumferential direction CD. The inner peripheral surface 90b5 is included in the inner surface of the inverter housing 90b and extends annularly in the circumferential direction CD.
[0051] The inverter housing 90b has an inverter outer peripheral wall 90b2 and inverter fins 90b3. The inverter outer peripheral wall 90b2 extends in an annular shape around the inverter axis Ci. The inverter outer peripheral wall 90b2 has an outer peripheral surface 90b1 and an inner peripheral surface 90b5 that are formed in an annular shape.
[0052] The inverter fins 90b3 are heat dissipation fins provided on the outer peripheral surface 90b1. The inverter fins 90b3 increase the surface area of the inverter housing 90b, enhancing the heat dissipation effect of the inverter housing 90b. The inverter fins 90b3 protrude radially outward from the outer peripheral surface 90b1. The inverter fins 90b3 extend in the axial direction AD along the outer peripheral surface 90b1. Multiple inverter fins 90b3 are arranged in the circumferential direction CD. The inverter fins 90b3 are fins for cooling the inverter device 80 and are sometimes referred to as cooling fins. The outer peripheral surface 90b1 is a surface for cooling the inverter device 80 and is sometimes referred to as a cooling surface. The inverter device 80 is an air-cooled device.
[0053] Furthermore, the inverter housing 90b has an inverter connector 90b4. The inverter connector 90b4 covers the power line 310 and the output line 320. The power line 310 and the output line 320 can be connected to external devices via the inverter connector 90b4. The external devices include the battery 60 and the motor 51.
[0054] The power line 310 and the output line 320 are connected to the high voltage board 200. The power line 310 has an electrical wiring that forms a P line 31 and an electrical wiring that forms an N line 32.
[0055] The power line 310 is connected to the battery 60 via an inverter connector 90b4. A battery current sensor 35 is provided for the power line 310. The output line 320 is connected to the motor 51 via the inverter connector 90b4. An output line 320 is provided for each of the multiple phases. A motor current sensor 36 is provided for the output line 320.
[0056] As described above, both the motor device 50 and the inverter device 80 are air-cooled devices. That is, the EPU 70 is also an air-cooled device. For example, a blower fan is provided for the EPU 70. The blower fan is arranged on the EPU 70, for example, along the motor axis Cm, and blows air in the axial direction AD toward the EPU 70. The air from the blower fan flows along the plate surfaces of the motor fins 90a3 and the inverter fins 90b3, thereby cooling the motor device 50 and the inverter device 80.
[0057] As shown in FIG. 2 , the EPU 70 has a unit duct 71. The unit duct 71 is made of a resin material or the like. The unit duct 71 houses the motor housing 90a and the inverter housing 90b. The unit duct 71 is formed into a cylindrical shape as a whole and extends along the motor axis Cm. The unit duct 71 spans between the motor housing 90a and the inverter housing 90b in the axial direction AD. The unit duct 71 covers the outer peripheries of the motor housing 90a and the inverter housing 90b. The unit duct 71 is fixed to at least one of the motor housing 90a and the inverter housing 90b. Openings are formed at both ends of the unit duct 71 in the axial direction AD.
[0058] The inner peripheral surface of unit duct 71 faces outer peripheral surfaces 90a1, 90b1 via motor fins 90a3 and inverter fins 90b3. The inner peripheral surface of unit duct 71 is spaced radially outward from outer peripheral surfaces 90a1, 90b1. In EPU 70, a duct flow path is formed between outer peripheral surfaces 90a1, 90b1 and the inner peripheral surface of unit duct 71. This duct flow path opens in the axial direction AD through an opening in unit duct 71. In EPU 70, gas such as cooling air passes through the duct flow path, which facilitates heat release from motor fins 90a3 and inverter fins 90b3.
[0059] The inner circumferential surface of unit duct 71 is close to or in contact with the tip surfaces of motor fins 90a3 and inverter fins 90b3. In this configuration, gas passing through the duct flow path in the axial direction AD tends to pass through positions that overlap with motor fins 90a3 and inverter fins 90b3 in the radial direction RD. This tends to improve the heat dissipation effect of motor fins 90a3 and inverter fins 90b3.
[0060] <Inverter Device Boards> Here, the boards 200, 300, and 400 of the inverter device 80 will be described. The inverter device 80 has a high-voltage board 200, a control board 300, and a drive board 400. The boards 200, 300, and 400 are fixed to a component support portion provided in the inverter housing 90b. Current sensors 35, 36, etc. are also fixed to the component support portion.
[0061] The high voltage board 200 is a circuit board to which a high voltage is applied. The high voltage is a voltage for driving the inverter 10. In the inverter device 80, the voltage applied to the P line 31 is the high voltage. The high voltage board 200 will be described in detail later.
[0062] The control board 300 is a circuit board that constitutes the control circuit 42. The drive board 400 is a circuit board that constitutes the drive circuit 41. The control board 300 and the drive board 400 are low-voltage boards to which a low voltage is applied. The low voltage is a voltage for driving the control circuit 42 and the drive circuit 41. In the inverter device 80, the voltage applied to the control circuit 42 and the drive circuit 41 is a low voltage. The boards 200, 300, and 400 are sometimes referred to as electric wiring boards and circuit boards.
[0063] The high-voltage board 200, the control board 300, and the drive board 400 are all formed in a flat plate shape and extend in a direction perpendicular to the axial direction AD. The boards 200, 300, and 400 can also be said to extend in an annular shape centered on the inverter axis Ci. The boards 200, 300, and 400 are formed in a circular plate shape as a whole. The boards 200, 300, and 400 are arranged in the axial direction AD with their respective plate surfaces facing each other. In the axial direction AD, for example, the control board 300 is provided between the high-voltage board 200 and the drive board 400. In the inverter device 80, the side of the high-voltage board 200 in the axial direction AD is referred to as the high-voltage side, and the side of the control board 300 is referred to as the low-voltage side. The motor device 50 is provided, for example, on the high-voltage side of the inverter device 80.
[0064] As shown in Figures 5 and 6, substrates 200, 300, 400 have inner peripheral ends 211, 311, 411 and outer peripheral ends 212, 312, 412. Inner peripheral ends 211, 311 of high-voltage substrate 200 and control substrate 300 are aligned in axial direction AD. Substrate openings 213, 313 are provided in high-voltage substrate 200 and control substrate 300. Substrate openings 213, 313 penetrate substrates 200, 300 in axial direction AD and form inner peripheral ends 211, 311.
[0065] In the high-voltage board 200 and the control board 300, the outer peripheral ends 212, 312 are located at a position spaced radially inward from the inner peripheral surface 90b5. A gap is formed between the high-voltage board 200 and the control board 300 and the inverter outer peripheral wall 90b2. This gap extends in an annular shape in the circumferential direction CD. In the high-voltage board 200 and the control board 300, the outer peripheral ends 212, 312 are aligned in the axial direction AD along the inner peripheral surface 90b5.
[0066] The drive substrate 400 is smaller than the high-voltage substrate 200 and the control substrate 300. An outer peripheral end 412 of the drive substrate 400 is located radially inward from the outer peripheral ends 212, 312 of the high-voltage substrate 200 and the control substrate 300. A substrate opening 413 is provided in the drive substrate 400. The substrate opening 413 penetrates the drive substrate 400 in the axial direction AD and forms an inner peripheral end 411. The substrate opening 413 of the drive substrate 400 is smaller than the substrate openings 213, 313 of the high-voltage substrate 200 and the control substrate 300. The inner peripheral end 411 of the drive substrate 400 is located radially inward from the inner peripheral ends 211, 311 of the high-voltage substrate 200 and the control substrate 300.
[0067] The inverter device 80 includes a fan device 91. The fan device 91 is a blower that can send air. The fan device 91 includes a fan unit that sends air by rotating, and a drive unit that drives and rotates the fan unit. The drive unit includes an electric motor and the like.
[0068] Here, the high-voltage substrate 200 will be described with reference to Figures 4 to 9. Figure 4 is a diagram mainly showing the layered relationship between the conductor layers 201 to 208 of the high-voltage substrate 200 and the insulating substrate 209b. Figure 5 is a plan view of the mounting surface side of the high-voltage substrate 200. In Figures 7 to 9, parts of the conductor layers 201 to 208 are hatched to make them easier to understand. Note that the configurations of the conductor layers 201 to 208 are merely examples, and other configurations may be used.
[0069] As shown in Fig. 5, at least some of the circuit elements constituting the inverter device 80 are mounted on the high-voltage board 200. In this embodiment, as an example, the high-voltage board 200 is used, on which the EMC filter 20 and the smoothing capacitor 34 are mounted. That is, the high-voltage board 200 is mounted with the common coil 21, the normal mode coil 22, the Y capacitor 23, the X capacitor 24, the varistor 25, and the smoothing capacitor 34. Furthermore, the high-voltage board 200 may be mounted with current sensors 35 and 36. Note that the circuit elements are mounted on the first conductor layer 201 side of the high-voltage board 200. Therefore, the surface of the high-voltage board 200 facing the first conductor layer 201, not the eighth conductor layer 208, is the mounting surface.
[0070] The arm switches 14 are not mounted on the high-voltage board 200. This point will be explained below. As shown in Figures 5 and 6, the inverter device 80 includes a U-phase arm 17U, a V-phase arm 17V, and a W-phase arm 17W. The U-phase arm 17U corresponds to the U-phase upper and lower arm circuit 11. The U-phase arm 17U includes a U-phase upper arm 12U and a U-phase lower arm 13U. The U-phase upper arm 12U corresponds to the U-phase upper arm 12. The U-phase lower arm 13U corresponds to the U-phase lower arm 13. The U-phase upper arm 12U includes six arm switch units 16. The U-phase lower arm 13U includes six arm switch units 16.
[0071] The arm switch section 16 includes arm switches 14, diodes 15, and a protection section for protecting these. Six arm switch sections 16 are collectively referred to as a switch group 16G. The six arm switch sections 16 correspond to the six arm switches 14 connected in parallel.
[0072] V-phase arm 17V corresponds to V-phase upper and lower arm circuit 11. V-phase arm 17V has V-phase upper arm 12V and V-phase lower arm 13V. V-phase upper arm 12V corresponds to V-phase upper arm 12. V-phase lower arm 13V corresponds to V-phase lower arm 13. V-phase upper arm 12V has six arm switch units 16. V-phase lower arm 13V has six arm switch units 16.
[0073] W-phase arm 17W corresponds to W-phase upper and lower arm circuit 11. W-phase arm 17W has W-phase upper arm 12W and W-phase lower arm 13W. W-phase upper arm 12W corresponds to W-phase upper arm 12. W-phase lower arm 13W corresponds to W-phase lower arm 13. W-phase upper arm 12W has six arm switch units 16. W-phase lower arm 13W has six arm switch units 16.
[0074] 5, the arm switch units 16 are arranged in the circumferential direction CD along the inner peripheral surface 90b5. The arm switch units 16 are arranged along the outer peripheral ends 212, 312 of the high-voltage board 200 and the control board 300. The arm switch units 16 are also provided in sections corresponding to the phase arms 17U, 17V, and 17W.
[0075] As described above, this embodiment employs an inverter device 80 in which the arm switch unit 16 is attached to the inverter housing 90b. The gate electrode of the arm switch unit 16 is connected to the control board 300 via terminals. The source electrode and drain electrode of the arm switch unit 16 are connected to the high-voltage board 200 via terminals. However, the arm switch unit 16 may be mounted on the high-voltage board 200.
[0076] As shown in Figure 4, the high-voltage board 200 includes an electrically insulating insulating board 209b and conductive conductor layers 201 to 208. The multiple conductor layers 201 to 208 are stacked with the insulating board 209b interposed between them. The high-voltage board 200 has a solder resist 209a provided on its surface. In other words, the conductor layers 201 and 208 are partially covered with the solder resist 209a. The insulating board 209b corresponds to an insulator. There is no particular limitation on the order in which the conductor layers 201 to 208 are arranged in the stacking direction. The stacking direction coincides with the inverter axis Ci.
[0077] The conductor layers 201 to 208 are mainly composed of metals such as copper and aluminum. The conductor layers 201 to 208 are patterned conductors. The conductor layers 201 to 208 are foil-shaped conductors or plate-shaped conductors. Plate-shaped conductors are conductor plates that are significantly thicker than foil-shaped conductors. The first conductor layer 201 and the eighth conductor layer 208 can also be called surface conductor layers. The second conductor layer 202 to the seventh conductor layer 207 can also be called inner conductor layers.
[0078] The conductor layers 201 to 208 are wiring sections including lands and pattern wiring. Furthermore, the insulating substrate 209b is provided with interlayer connection sections that connect the conductor layers 201 to 208 of different layers. The interlayer connection sections are through holes, vias, etc. The interlayer connection sections can also be considered as part of the wiring section. The lands are provided so as to surround the open ends of the through holes and are connected to the through holes. Therefore, the lands can also be considered as part of the interlayer connection sections. The through holes are conductors provided on the surface of the through holes of the insulating substrate 209b.
[0079] 4 is a cross-sectional view showing only the portion where each of the conductor layers 201 to 208 is a single layer. However, each of the conductor layers 201 to 208 includes portions at different potentials. For example, the first conductor layer 201 includes a portion at ground potential and a portion at a different potential.
[0080] The conductor layers 201 to 208, together with the arm switch 14, the diode 15, the circuit elements of the EMC filter 20, and the smoothing capacitor 34, constitute the circuit shown in Fig. 1. The conductor layers 201 to 208 are also connected to the conductor layers 201 to 208 of different layers via interlayer connectors in order to constitute the circuit of Fig. 1. Note that the interlayer connectors are omitted in Fig. 4.
[0081] First, the first conductor layer 201, the eighth conductor layer 208, the common coil 21, and the varistor 25 will be described with reference to Figures 7, 10, and 11. The first conductor layer 201 and the eighth conductor layer 208 have the same structure. The following description will be given using the first conductor layer 201.
[0082] Fig. 7 is a perspective view of the first conductor layer 201 and the eighth conductor layer 208. Figs. 10 and 11 are enlarged views of the portion of the first conductor layer 201 where the common coil 21 is mounted and the surrounding area. The portions shown in Figs. 10 and 11 are also referred to as the mounted area of the first conductor layer 201. Fig. 10 shows the first conductor layer 201 in a state where the circuit elements of the EMC filter 20 and the smoothing capacitor 34 are not mounted. Fig. 11 shows the first conductor layer 201 in a state where the common coil 21 is mounted.
[0083] As shown in Fig. 10, the varistor 25 has a first terminal 251 and a second terminal 252. As shown in Fig. 11, the common coil 21 has a main body 21a including a core, power supply side terminals 21b and 21d, and load side terminals 21c and 21e. A P-side coil connected to the P line 31 and an N-side coil connected to the N line 32 are wound around the core. The power supply side terminal 21b is the terminal of the P-side coil on the battery 60 side. The power supply side terminal 21d is the terminal of the N-side coil on the battery 60 side. The load side terminal 21c is the terminal of the P-coil on the motor 51 side. The load side terminal 21e is the terminal of the N-coil on the motor 51 side.
[0084] 7, 10, and 11, the first conductor layer 201 has a ground bus bar 201G, which is a portion at ground potential, a plurality of lands 5 to 7, 11P to 14P, and 11N to 14N, and power supply side patterns 201P and 201N. The plurality of lands 5 to 7, 11P to 14P, and 11N to 14N and the power supply side patterns 201P and 201N are portions that are not at ground potential. The ground bus bar 201G can also be considered a ground wiring portion.
[0085] The ground bus bar 201G corresponds to a ground conductor portion. The first conductor layer 201 corresponds to a connecting conductor layer. In this embodiment, the first conductor layer 201 is used as an example of a connecting conductor layer. However, the connecting conductor layer may be any conductor layer that has the power supply side patterns 201P and 201N. In other words, the connecting conductor layer may be at least one of the inner conductor layers.
[0086] The eighth conductor layer 208 can be considered a connecting conductor layer because it has the same configuration as the first conductor layer 201. The eighth conductor layer 208 may also be configured without the power supply side patterns 201P and 201N, for example. In this case, the eighth conductor layer 208 has a different shape from the first conductor layer 201 and does not correspond to a connecting conductor layer.
[0087] 7, the ground bus bar 201G is provided in a ring shape. In order to avoid the drawing becoming complicated, the lands 5 and the like on the first conductor layer 201 are not shown in FIG.
[0088] Land 5 is connected to the smoothing capacitor 34. Land 6 is connected to the source electrode and drain electrode of the arm switch 14. Land 7 is connected to the output connection portion 203a of the output bus bar 206. Lands 5 to 7 are separated from the ground bus bar 201G. Separated means that they are adjacent to each other via air or a part of the insulating substrate 209b. Separated also means that they are provided with an insulating distance between them. Lands 5 to 7 are connected to a conductive layer different from the first conductor layer 201.
[0089] 10 and 11, the land 11P is connected to the power supply terminal 21b. A power supply pattern 201P, which is part of the first conductor layer 201, is provided around the land 11P. The land 11P and the power supply pattern 201P are provided adjacent to each other.
[0090] The land 11N is connected to the power supply terminal 21d. A power supply pattern 201N, which is a part of the first conductor layer 201, is provided around the land 11N. The land 11N and the power supply pattern 201N are provided contiguously.
[0091] The lands 11P and 11N are connected to a conductive layer different from the first conductive layer 201. The land 11P, the power supply side pattern 201P, the land 11N, and the power supply side pattern 201N are separated by the ground bus bar 201G.
[0092] Land 11P, power supply side pattern 201P, land 11N, and power supply side pattern 201N correspond to the power supply conductor portion. Land 11P and power supply side pattern 201P can also be called the P-side power supply conductor portion. Land 11N and power supply side pattern 201N can also be called the N-side power supply conductor portion. The P-side power supply conductor portion includes land 13P, which will be described later. The N-side power supply conductor portion includes land 13N, which will be described later.
[0093] 11 , at least a portion of the power supply conductor portion is disposed opposite the common coil 21 in the stacking direction. In other words, at least a portion of the power supply conductor portion is provided in the opposing region of the common coil 21 in the stacking direction. This allows the common coil 21 to be disposed near the power supply conductor portion. As a result, the inverter device 80 and the high-voltage board 200 can reduce parasitic capacitance and improve EMC performance.
[0094] The land 12P is connected to the load-side terminal 21c. The land 12N is connected to the load-side terminal 21e. The lands 12P and 12N are separated by the ground bus bar 201G. The lands 12P and 12N are connected to a conductive layer different from the first conductor layer 201.
[0095] The land 13P is connected to the first terminal 251 of the varistor 25 on the P line 31 side. The land 14P is connected to the second terminal 252 of the varistor 25 on the P line 31 side. The land 13N is connected to the first terminal 251 of the varistor 25 on the N line 31 side. The land 14N is connected to the second terminal 252 of the varistor 25 on the N line 31 side.
[0096] The land 13P and the power supply side pattern 201P are provided adjacent to each other. The land 13N and the power supply side pattern 201N are provided adjacent to each other. The lands 14P and 14N and the ground bus bar 201G are provided adjacent to each other.
[0097] Next, the second conductor layer 202, the fourth conductor layer 204, the fifth conductor layer 205, and the seventh conductor layer 207 will be described with reference to Fig. 8 and Fig. 12. Fig. 8 is a perspective view of the second conductor layer 202 and the fourth conductor layer 204. In Fig. 8, to avoid the drawing becoming too complicated, illustration of the lands 5 and the like on the second conductor layer 202 is omitted.
[0098] The second conductor layer 202 and the fifth conductor layer 205 are layers that have the same potential and have the same shape. The fourth conductor layer 204 and the seventh conductor layer 207 are layers that have the same potential and have the same shape. These conductor layers 202, 204, 205, and 207 have the same shape. Therefore, only the second conductor layer 202 and the fourth conductor layer 204 are shown in FIG. 8 .
[0099] The second conductor layer 202 has N bus bars 202a and 202b, which are part of the N line 32, and a plurality of lands. The N bus bar 202a is an annular outer circumferential N bus bar 202a. The N bus bar 202b is an annular inner circumferential N bus bar 202b. The N bus bars 202a and 202b have a different potential from the power supply conductor portion of the first conductor layer 201. The N bus bars 202a and 202b correspond to the other potential portion.
[0100] The fourth conductor layer 204 has P bus bars 204a and 204b, which are part of the P line 31, and a plurality of lands. The P bus bar 204a is an annular outer P bus bar 204a. The P bus bar 204b is an annular inner P bus bar 204b. The P bus bars 204a and 204b have a different potential from the power supply conductor portion of the first conductor layer 201. The P bus bars 204a and 204b correspond to the other potential portion.
[0101] The second conductor layer 202 corresponds to the other conductor layer. The other conductor layer may be the fourth conductor layer 204, the fifth conductor layer 205, or the seventh conductor layer 207. Furthermore, the other conductor layer may be the third conductor layer 203 or the sixth conductor layer 206, which will be described later. In other words, the other conductor layer is at least one of the second conductor layer 202 to the seventh conductor layer 207.
[0102] The second conductor layer 202 will now be described in detail with reference to FIGS. 12 and 13. FIG. 12 shows the opposing region of the second conductor layer 202 to the mounted region of the first conductor layer 201 (FIGS. 10 and 11). FIG. 13 shows the opposing region of the N-side power supply conductor portion and its surroundings on the second conductor layer 202. In FIG. 13, the opposing region of the N-side power supply conductor portion is indicated by a two-dot chain line. Note that in FIG. 13, land 11N is illustrated larger than land 21N, and land 13N is illustrated larger than land 23N. However, land 21N and land 11N are equivalent in size. Land 23N and land 13N are also equivalent in size. Lands 21P, 23P, 21N, and 23N correspond to opposing conductor portions.
[0103] As shown in FIGS. 12 and 13, the second conductor layer 202 has a plurality of lands 5 to 7, 21P to 24P, 21N to 24N, and the like.
[0104] Lands 5 to 7 on the second conductor layer 202 are portions that are connected between layers to lands 5 to 7 on the first conductor layer 201. Lands 5 and 7 on the second conductor layer 202 are separated from the periphery N bus bar 202a. On the other hand, land 6 on the second conductor layer 202 is provided so as to be continuous with the periphery N bus bar 202a.
[0105] Land 21P is connected to land 11P via an interlayer connection. Land 22P is connected to land 12P via an interlayer connection. Land 23P is connected to land 13P via an interlayer connection. Land 24P is connected to land 14P via an interlayer connection. Lands 21P to 24P are separated by the inner circumferential N bus bar 202b.
[0106] Land 21N is connected to land 11N via an interlayer connection. Land 22N is connected to land 12N via an interlayer connection. Land 23N is connected to land 13N via an interlayer connection. Land 24N is connected to land 14N via an interlayer connection. Lands 21N, 23N, and 24N are separated from the inner circumferential N bus bar 202b. Land 22N is provided so as to be continuous with the inner circumferential N bus bar 202b.
[0107] 13 , the second conductor layer 202 has an inner circumferential N bus bar 202b and a non-forming region 21NF. The non-forming region 21NF is a region where the N bus bars 202a, 202b are not formed. The non-forming region 21NF is provided in at least a part of the opposing region facing the N-side power supply conductor portion. In this embodiment, an example is adopted in which the non-forming region 21NF is provided in the entire opposing region facing the N-side power supply conductor portion.
[0108] The facing region of the N-side power conductor is a region facing the N-side power conductor in the stacking direction. The facing region of the N-side power conductor can also be considered a projection region of the N-side power conductor in the stacking direction. The facing region of the N-side power conductor includes a facing region of the land 11N, a facing region of the power-side pattern 201N, and a facing region of the land 13N.
[0109] The non-forming region 21NF is a region where the N bus bars 202a, 202b are not formed, and where the portions interconnected to the N-side power supply conductor portion and the insulating substrate 209b are formed. That is, the non-forming region 21NF is formed with the lands 21N, 23N and the insulating substrate 209b. The land 21N is formed in the region facing the land 11N. The land 23N is formed in the region facing the land 13N. The insulating substrate 209b is formed in the region facing the power supply side pattern 201N. Therefore, no conductor is provided in the region facing the power supply side pattern 201N.
[0110] The opposing region of the power supply conductor portion may be provided in the peripheral N bus bar 202a. The second conductor layer 202 may have a non-forming region 21NF in at least a portion of the opposing region of the P-side power supply conductor portion. That is, the second conductor layer 202 has N bus bars 202a and 202b and a non-forming region 21NF where the N bus bars 202a and 202b are not formed in at least a portion of the opposing region of the power supply conductor portion. Furthermore, other potential portions having a different potential from the power supply conductor portion and the non-forming region 21NF may be provided in the other conductor layers 203 to 207. These points also apply to the following modified examples.
[0111] Next, the third conductor layer 203 and the sixth conductor layer 206 will be described with reference to Fig. 9. Fig. 9 is a perspective view of the third conductor layer 203 and the sixth conductor layer 206. In Fig. 9, to avoid cluttering the drawing, lands and the like in the third conductor layer 203 and the sixth conductor layer 206 are omitted from the illustration. The third conductor layer 203 and the sixth conductor layer 206 have the same configuration.
[0112] The third conductor layer 203 has an output bus bar that is part of the output line 33 and a plurality of lands. The sixth conductor layer 206 has an output bus bar that is part of the output line 33 and a plurality of lands. Hereinafter, for convenience, the third conductor layer 203 and the sixth conductor layer 206 will be referred to as output bus bars 203, 206.
[0113] The output bus bars 203, 206 are provided corresponding to each of the multiple phases. For example, the multiple output bus bars 203 include output bus bars 203 corresponding to each of the U phase, V phase, and W phase. The output bus bars 203 for each phase are separated from each other.
[0114] Each output bus bar 203 has an output connection portion 203 a. Each output connection portion 203 a is individually connected to a corresponding output line 320. For example, the U-phase output bus bar 203 is connected to the U-phase coil of the motor 51 via the output connection portion 203 a and the output line 320.
[0115] <Effects> As described above, the inverter device 80 has a non-forming region 21NF where the N bus bars 202a, 202b are not formed in at least a part of the opposing region of the power supply conductor portion. The opposing region is part of the second conductor layer 202. Therefore, the inverter device 80 can reduce the region where the power supply conductor portion and the N bus bars 202a, 202b are arranged opposingly compared to a configuration that does not have the non-forming region 21NF. Note that a configuration that does not have the non-forming region 21NF is one in which the N bus bars 202a, 202b are formed over the entire opposing region of the power supply conductor portion in the second conductor layer 202.
[0116] Therefore, the inverter device 80 can reduce the parasitic capacitance formed between the power supply conductor portion and the N bus bars 202a, 202b. Therefore, the inverter device 80 can suppress noise caused by the parasitic capacitance. Furthermore, the inverter device 80 has a non-forming region 21NF over the entire opposing region of the N-side power supply conductor portion. Therefore, the inverter device 80 can reduce the parasitic capacitance more than a configuration in which the N bus bars 202a, 202b are formed in only part of the opposing region of the power supply conductor portion.
[0117] Furthermore, the inverter device 80 does not need to take measures against noise caused by parasitic capacitance, which prevents the EMC filter 20 from becoming large. Therefore, the inverter device 80 can prevent the inverter device 80 from becoming large in size.
[0118] The high-voltage board 200 can suppress noise caused by parasitic capacitance, similar to the inverter device 80. Therefore, the high-voltage board 200 can suppress an increase in size.
[0119] (Variation 1) As shown in Fig. 14, the second conductor layer 202 has an opposing conductor pattern 21NC disposed opposite the power supply side pattern 201N. Fig. 14 is a drawing corresponding to Fig. 13. Variations 1 to 3 will be described using the power supply side pattern 201N side, but the same applies to the power supply side pattern 201P side.
[0120] The opposing conductor pattern 21NC is provided over the entire opposing area of the power supply side pattern 201N. The opposing area here is an area that faces the power supply side pattern 201N in the stacking direction.
[0121] The opposing conductor pattern 21NC is provided continuous with the land 21N. Therefore, the opposing conductor pattern 21NC has the same potential as the power supply side pattern 201N. The non-forming area 21NF is provided with only the lands 21P, 23P, 21N, and 23N connected to the N-side power supply conductor portion and the opposing conductor pattern 21NC. In other words, the non-forming area 21NF is not provided with the N bus bars 202a and 202b or the insulating substrate 209b. The opposing conductor pattern 21NC corresponds to the opposing conductor portion.
[0122] Therefore, the inverter device 80 can reduce the parasitic capacitance more than a configuration in which the N bus bars 202 a, 202 b are formed in part of the opposing region of the power supply conductor portion.
[0123] 15, the second conductor layer 202 has a dummy pattern 21ND disposed opposite to a power supply side pattern 201N. FIG. 15 is a view corresponding to FIG.
[0124] The dummy pattern 21ND is provided in at least a part of the opposing region of the power supply side pattern 201N. The opposing region is the same as the opposing region of the first modified example.
[0125] The dummy pattern 21ND is separated from the N bus bars 202a, 202b and the land 21N. The dummy pattern 21ND can also be considered a conductor that has no potential. The non-forming region 21NF is provided with lands 21P, 23P, 21N, and 23N connected to the N-side power supply conductor portion, and the dummy pattern 21ND. The dummy pattern 21ND corresponds to a dummy conductor portion. The inverter device 80 and the high-voltage substrate 200 can achieve the same effects as those of the above embodiment.
[0126] (Modification 3) As shown in Fig. 16, an inner circumferential N bus bar 202b may be provided in a part of the opposing region of the N-side power supply conductor portion. Fig. 16 is a drawing corresponding to Fig. 13 .
[0127] The inner circumferential N bus bar 202b may be provided in a portion of the opposing area of the N-side power supply conductor portion. The area where the inner circumferential N bus bar 202b is provided is, for example, about 10% of the opposing area. In other words, the non-forming area 21NF does not have to be provided over the entire opposing area of the N-side power supply conductor portion. The inverter device 80 can reduce the parasitic capacitance formed between the power supply conductor portion and the N bus bars 202a, 202b compared to a configuration without the non-forming area 21NF, and can suppress noise caused by the parasitic capacitance. The high-voltage substrate 200 can achieve the same effects as the inverter device 80.
[0128] (Variation 4) Variation 4 is based on the premise of a configuration in which the power supply conductor portion and the N bus bars 202a, 202b are arranged partially opposite each other, as in Variation 3. Fig. 17 shows the first interval X1 and the second interval X2 on the P line 31 side. However, the relationship between the first interval X1 and the second interval X2 is the same on the N line 32 side. Note that this variation will be described using a varistor 25 as an example of a filter element.
[0129] The lands 13P and 13N are part of the power supply conductor portion and are connection positions for the first terminal 251. The lands 11P and 11N are part of the power supply conductor portion and are connection positions for the power supply side terminals 21b and 21d.
[0130] The first interval X1 on the P line 31 side is the shortest distance between the land 13P and the land 11P. The second interval X2 on the P line 31 side is the shortest distance between the land 12P and the land 11P. The first interval X1 on the N line 32 side is the shortest distance between the land 13N and the land 11N. The second interval X2 on the N line 32 side is the shortest distance between the land 12N and the land 11N.
[0131] 17 , the relationship between the first interval X1 and the second interval X2 is preferably such that the first interval X1 is smaller than the second interval X2. Even in a configuration in which the power supply conductor portion and the N bus bars 202a, 202b are partially opposed to each other, the inverter device 80 can reduce the parasitic capacitance by making the first interval X1 narrower than the second interval X2. In other words, the inverter device 80 can reduce the parasitic capacitance more than a configuration in which the first interval X1 is equal to or larger than the second interval X2.
[0132] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, although various combinations and forms are shown in the present disclosure, other combinations and forms including only one element, more, or less than one element are also within the scope and spirit of the present disclosure.
[0133] (Disclosure of Technical Ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be described in a multiple dependent form, with the subsequent clause alternatively referring to the preceding clause. Furthermore, some clauses may be described in a multiple dependent form, with the subsequent clause referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.
[0134] (Technical Idea 1) A power conversion device provided between a power supply (60) and a load (50) and including a common mode choke coil (21) and a wiring board (200), wherein the common mode choke coil includes power supply side terminals (21b, 21d) and load side terminals (21c, 21e) and is mounted on the wiring board, and the wiring board includes an insulator (209b) and a plurality of conductor layers (201-208) stacked with the insulator interposed therebetween, and the plurality of conductor layers include a connecting conductor layer (201) including power supply conductor portions (201P, 11P, 13P, 201N, 11N, 13N) to which the power supply side terminals are connected, and another conductor layer (202) different from the connecting conductor layer, The other conductor layer has other potential portions (202a, 202b) that are at a different potential from the power supply conductor portion, and a non-forming region (21NF) in which the other potential portion is not formed in at least a part of an opposing region that faces the power supply conductor portion.
[0135] (Technical Concept 2) The power conversion device according to Technical Concept 1, wherein the non-forming region is provided over the entire facing region.
[0136] (Technical Concept 3) The power conversion device according to Technical Concept 1 or 2, wherein the non-forming region is provided with opposing conductor portions (21P, 23P, 21N, 23N) connected to the power supply conductor portion and the insulator.
[0137] (Technical Concept 4) The power conversion device according to Technical Concept 1 or 2, wherein the non-forming region is provided with only opposing conductor portions (21P, 23P, 21N, 23N, 21NC) connected to the power supply conductor portion.
[0138] (Technical Concept 5) The power conversion device according to Technical Concept 1 or 2, wherein the non-forming region is provided with a dummy conductor portion (21ND) separated from the conductor layer.
[0139] (Technical Concept 6) The power conversion device according to any one of Technical Concepts 1 to 5, wherein at least a portion of the power supply conductor portion is disposed opposite the common mode choke coil in the stacking direction.
[0140] (Technical Idea 7) A power conversion device according to any one of Technical Ideas 1 to 6, comprising a filter element (25) mounted on the wiring board, wherein the connection conductor layer has, in addition to the power supply conductor portion, a ground conductor portion (201G) connected to a ground potential and an interlayer connection portion (12P, 12N) to which the load side terminal is connected, wherein the filter element has a first terminal (251) connected to the power supply conductor portion and a second terminal (252) connected to the ground conductor portion, wherein a first interval (X1) is a distance between a connection position of the first terminal on the power supply conductor portion and a connection position of the power supply side terminal on the power supply conductor portion, and a second interval (X2) is a distance between the interlayer connection portion and a connection position of the power supply side terminal on the power supply conductor portion, and wherein the first interval is narrower than the second interval.
[0141] (Technical Idea 8) A wiring board (200) on which a common mode choke coil (21) is mounted, comprising: an insulator (209b); and a plurality of conductor layers (201-208) stacked via the insulator, wherein the plurality of conductor layers have: a connection conductor layer (201) including power supply conductor portions (201P, 11P, 13P, 201N, 11N, 13N) to which the common mode choke coil is connected; and an other conductor layer (202) different from the connection conductor layer, wherein the other conductor layer (202) has other potential portions (202a, 202b) at a potential different from that of the power supply conductor portion, and a non-forming region (21NF) in which the other potential portion is not formed, in at least a part of an opposing region opposing the power supply conductor portion.
Claims
1. A power conversion device comprising a common mode choke coil (21) and a wiring board (200) and disposed between a power supply (60) and a load (50), wherein the common mode choke coil comprises power supply side terminals (21b, 21d) and load side terminals (21c, 21e) and is mounted on the wiring board, and the wiring board comprises an insulator (209b) and a plurality of conductor layers (201-208) stacked with the insulator interposed therebetween, wherein the plurality of conductor layers comprise a connecting conductor layer (201) including power supply conductor portions (201P, 11P, 13P, 201N, 11N, 13N) to which the power supply side terminals are connected, and another conductor layer (202) different from the connecting conductor layer, The other conductor layer has other potential portions (202a, 202b) that are at a different potential from the power supply conductor portion, and a non-forming region (21NF) in which the other potential portion is not formed in at least a part of an opposing region that faces the power supply conductor portion.
2. The power conversion device according to claim 1, wherein the non-forming region is provided over the entire facing region.
3. A power conversion device according to claim 1 or 2, wherein the non-forming region is provided with opposing conductor portions (21P, 23P, 21N, 23N) connected to the power supply conductor portion and the insulator.
4. A power conversion device according to claim 1 or 2, wherein the non-formation area is provided with only opposing conductor portions (21P, 23P, 21N, 23N, 21NC) connected to the power supply conductor portion.
5. A power conversion device according to claim 1 or 2, wherein the non-forming region is provided with a dummy conductor portion (21ND) separated from the conductor layer.
6. The power conversion device according to claim 1 or 2, wherein at least a portion of the power supply conductor portion is disposed opposite the common mode choke coil in the lamination direction.
7. A power conversion device according to claim 1 or 2, comprising a filter element (25) mounted on the wiring board, wherein the connection conductor layer has, in addition to the power supply conductor section, a ground conductor section (201G) connected to ground potential and an interlayer connection section (12P, 12N) to which the load side terminal is connected, wherein the filter element has a first terminal (251) connected to the power supply conductor section and a second terminal (252) connected to the ground conductor section, wherein a first interval (X1) is defined as a distance between a connection position of the first terminal on the power supply conductor section and a connection position of the power supply side terminal on the power supply conductor section, and a second interval (X2) is defined as a distance between the interlayer connection section and a connection position of the power supply side terminal on the power supply conductor section, and wherein the first interval is narrower than the second interval.
8. A wiring board (200) on which a common mode choke coil (21) is mounted, comprising: an insulator (209b); and a plurality of conductor layers (201-208) stacked with the insulator interposed therebetween, wherein the plurality of conductor layers have: a connection conductor layer (201) including power supply conductor portions (201P, 11P, 13P, 201N, 11N, 13N) to which the common mode choke coil is connected; and an other conductor layer (202) different from the connection conductor layer, wherein the other conductor layer (202) has other potential portions (202a, 202b) at a different potential from the power supply conductor portion, and a non-forming region (21NF) in which the other potential portion is not formed, in at least a part of an opposing region opposing the power supply conductor portion.
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