Single-crystal film, laminated structure, semiconductor device, electronic apparatus, and system

Abstract

[Problem] To provide a single-crystal film having outstanding crystalline properties useful in semiconductor devices and the like. [Solution] This single-crystal film has a surface area of 50 mm2 or greater and a film thickness of 30 μm or less, and serves as a semiconductor film containing, as the principal component, germanium dioxide or a mixed crystal thereof. The dislocation density is 1.0×1010 / cm2 or less. The semiconductor film has a rutile crystalline structure. The film thickness of the semiconductor film is 1 μm or greater. The surface area of the semiconductor film is 100 mm2 or greater. This single-crystal film is utilized by being applied to, for example, a semiconductor device or the like.

Description

Single crystal film, laminated structure, semiconductor device, electronic device and system

[0001] The present invention relates to a single crystal film having excellent crystallinity that is useful for semiconductor devices and the like.

[0002] In recent years, rutile-structure germanium dioxide (r-GeO) has been developed as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices. ２ ) is attracting attention. ２ has a band gap of 4.68 eV, can be used to produce n-type and p-type semiconductors, and can be fabricated inexpensively, so it is expected to be a next-generation semiconductor device.

[0003] Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3 disclose r-TiO ２ r-GeO on (001) substrate ２ Laminated structures in which crystalline films are stacked have been studied. However, after the peer review of Non-Patent Document 1, Non-Patent Document 2 was submitted as an erratum (Non-Patent Document 2). It was found that the crystal grains (abnormal grains) described in Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3 were rutile-type germanium dioxide crystals, and the remaining portions were amorphous. That is, only the amorphous phase was formed in the majority of the structures, and even if a crystalline phase was formed, only a portion of the structures were crystalline grains. Therefore, a method for producing a crystalline film with excellent crystallinity that can be electrically controlled has been eagerly awaited. Furthermore, Non-Patent Document 2 reveals that a high defect density was present in the portion where a crystalline phase was partially formed. Therefore, a method for producing a crystalline film with low defect density and excellent crystallinity has been eagerly awaited.

[0004] H. Takane, K. Kaneko. , “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural Applied Physics Letters Vol. 119, pp. 062104(1-6) (2021). H. Takane, K. Kaneko. , Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its structural Applied Physics Letters Vol. 120, 099903(1-3) (2022).

[0005] International Publication No. 2023 / 008452 International Publication No. 2023 / 008453 International Publication No. 2023 / 008454

[0006] An object of the present invention is to provide a single crystal film and a multilayer structure having excellent crystallinity that are useful for semiconductor devices and the like.

[0007] As a result of extensive research to achieve the above object, the present inventors have newly developed a mist CVD apparatus using a guide partition wall, and have used the mist CVD apparatus using the guide partition wall to produce a 50 mm ２ A semiconductor film having a thickness of 30 μm or less, containing germanium dioxide or a mixed crystal thereof as a main component, and having a dislocation density of 1.0×10 １０ / cm ２ The inventors have succeeded in creating the following single crystal film, and have found that the obtained crystal can be easily produced at low cost, has excellent crystallinity, etc., and is useful for semiconductor devices, etc., and have discovered that such a single crystal film can solve all of the above-mentioned conventional problems at once. After obtaining the above-mentioned findings, the inventors have further investigated further and have completed the present invention.

[0008] That is, the present invention relates to the following inventions: [1] Area 50 mm ２A semiconductor film having a thickness of 30 μm or less, containing germanium dioxide or a mixed crystal thereof as a main component, and having a dislocation density of 1.0×10 １０ / cm ２ [2] A single crystal film characterized in that the dislocation density is 5.0 × 10 or less. ９ / cm ２ [3] The single crystal film according to [1], wherein the semiconductor film has a rutile crystal structure. [4] The single crystal film according to [1], wherein the semiconductor film has a thickness of 1 μm or more. [5] The single crystal film according to [1], wherein the semiconductor film has a thickness of 1 μm or more. [6] The single crystal film according to [1], wherein the dopant contains an element of Group 13 or Group 15 of the periodic table. [7] The single crystal film according to [1], wherein the surface roughness (RMS) is 60 nm or less. [8] A layered structure in which a crystalline film is layered on a crystalline substrate directly or via another layer, wherein the crystalline film is a semiconductor film containing germanium dioxide or a mixed crystal thereof as a main component, and further wherein the dislocation density is 1.0×10 １０ / cm ２A laminated structure characterized by the following: [9] The laminated structure according to [8], wherein the crystalline film has a rutile crystal structure.

[10] The laminated structure according to [8], wherein the crystalline film is a single crystal film.

[11] The laminated structure according to [8], wherein the crystalline substrate has a rutile crystal structure.

[12] A semiconductor device including a single crystal film or a laminated structure, wherein the laminated structure is the laminated structure according to [1].

[13] The semiconductor device according to

[11] , which is a power device.

[14] The semiconductor device according to

[11] , which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a metal semiconductor field effect transistor (MESFET), a static induction transistor (SIT), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

[15] An electronic device including a semiconductor device, wherein the semiconductor device is the semiconductor device according to

[11] .

[16] A system including an electronic device, wherein the electronic device is the electronic device described in

[14] above.

[0009] The single crystal film and laminated structure of the present invention are useful for semiconductor devices and the like, and exhibit excellent crystallinity.

[0010] FIG. 1 is an example of a schematic configuration diagram of a film forming apparatus preferably used in the present invention. FIG. 2 is a diagram schematically showing an atomization apparatus preferably used in the present invention. FIG. 3 is a diagram schematically showing a cross-sectional side view of an atomization apparatus preferably used in the present invention. FIG. 4 is a diagram schematically showing a preferred example of a Schottky barrier diode (SBD) of the present invention. FIG. 5 is a diagram schematically showing a preferred example of a high electron mobility transistor (HEMT) of the present invention. FIG. 6 is a diagram schematically showing a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. FIG. 7 is a diagram schematically showing a preferred example of a junction field effect transistor (JFET) of the present invention. FIG. 8 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT) of the present invention. FIG. 9 is a diagram schematically showing a preferred example of a light-emitting device (LED) of the present invention. FIG. 10 is a diagram schematically showing a preferred example of a junction barrier Schottky diode (JBS) of the present invention. FIG. 11 is a diagram schematically showing a preferred example of a metal semiconductor field effect transistor (MESFET) of the present invention. FIG. 12 is a diagram schematically showing a preferred example of a static induction transistor (SIT) of the present invention. 13 is a schematic diagram for explaining a part of the manufacturing process of the SIT of FIG. 12. FIG. 14 is a diagram showing XRD diffraction results in Example 1. FIG. 15 is a diagram showing an ω scan in X-ray diffraction measurement in Example 1. FIG. 16 is a diagram showing an AFM image in Example 1. FIG. 17 is a diagram showing a cross-sectional TEM image in Example 1. FIG. 18 is a diagram showing XRD diffraction results in Example 2. FIG. 19 is a diagram showing a cross-sectional TEM image in Example 2. FIG. 20 is a diagram showing a cross-sectional TEM image in Comparative Example 1.

[0011] The laminated structure of the present invention has an area of ​​50 mm ２ A semiconductor film having a thickness of 30 μm or less, containing germanium dioxide or a mixed crystal thereof as a main component, and having a dislocation density of 1.0×10 １０ / cm ２ The laminated structure of the present invention is characterized in that a crystalline film is laminated on a crystalline substrate directly or via another layer, the crystalline film being a semiconductor film containing germanium dioxide or a mixed crystal thereof as a main component, and further, the dislocation density is 1.0×10 １０ / cm ２The mixed crystal is not particularly limited as long as it is a mixed crystal of germanium dioxide and another metal compound. For example, GeO ２ and SnO ２ , TiO ２ , V.O. ２ , MnO ２ , RuO ２ , CsO ２ , IrO ２ , CuO ２ , PbO ２ , AgO ２ , CrO ２ , SiO ２ , SiC, GaN, or a mixed crystal of two or more of these metal oxides. In this specification, "film" can be read as "layer." A "laminated structure" is a structure including one or more crystalline layers, and may also include layers other than crystalline layers (e.g., amorphous layers). The crystalline film is preferably a single crystalline layer, but may also be a polycrystalline layer.

[0012] In the present invention, the dislocation density is 1.0 × 10 １０ / cm ２ Preferably, the dislocation density is 5.0 × 10 or less. ９ / cm ２ Within such a preferred range, it is possible to have better crystallinity and further improve the semiconductor properties.

[0013] In the present invention, the area of ​​the single crystal film is 100 mm ２ Within these preferred ranges, the single crystal film can have a better breakdown voltage and can have better electrical properties.

[0014] In the present invention, the term "main component" refers to a composition ratio (atomic ratio) of germanium dioxide or its mixed crystal in the semiconductor film of 50 at% or more. In an embodiment of the present invention, the composition ratio of germanium dioxide or its mixed crystal in the semiconductor film is preferably 70 at% or more, more preferably 90 at% or more. This preferred range results in a better interface, improved electrical characteristics, and improved semiconductor characteristics. The semiconductor film may also contain metal oxides other than germanium dioxide. Examples of such metal oxides include one or more metals selected from Group 14 metals of the periodic table other than germanium (e.g., tin or silicon) and Group 4 metals of the periodic table (e.g., titanium, zirconia, or hafnium). The composition ratio of germanium dioxide in the semiconductor film is preferably 0.5 or more. By setting the composition ratio of germanium dioxide in this preferred range, a crystalline film having better semiconductor properties can be realized. Furthermore, the semiconductor film is not particularly limited in terms of crystal structure, and may have a rutile-type crystal structure, which is a tetragonal crystal, an α-quartz-type structure, which is a trigonal crystal, or an orthorhombic CaCl ２ It may have a type crystal structure, such as α-PbO ２ The rutile crystal structure is preferably a tetragonal crystal structure, and the rutile crystal structure is preferably a tetragonal crystal structure.

[0015] The above-described preferred single crystal film or laminated structure can be more easily obtained, for example, by using the film-forming apparatus shown in FIG. 1 . Furthermore, the thickness of the semiconductor film is not particularly limited as long as it does not impede the object of the present invention. In the present invention, however, it is preferably 0.2 μm or more, more preferably 1 μm or more. Furthermore, the surface roughness (RMS) of the single crystal film is preferably 60 nm or less. By achieving such a preferred thickness or surface roughness, when the laminated structure is applied to a semiconductor device, the semiconductor device can be endowed with superior electrical properties such as voltage resistance. The surface roughness (RMS) refers to a value calculated based on JIS B0601 using the surface profile measurement results of a 10 μm square area using an atomic force microscope (AFM).

[0016] The single crystal film of the present invention is not particularly limited as long as it does not impede the object of the present invention, but preferably contains a dopant. The dopant is not particularly limited as long as it does not impede the object of the present invention, but preferably contains an element of Group 13 or Group 15 of the periodic table. Examples of the Group 15 elements of the periodic table include nitrogen, phosphorus, arsenic, antimony, and bismuth. Examples of the Group 13 elements of the periodic table include boron, aluminum, gallium, and indium. Within these preferred ranges, better electrical properties can be obtained and the film can be more easily manufactured.

[0017] The crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate, an insulating substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. Examples of the crystal substrate include n ＋ n-type Si substrate, n-type Si substrate, ＋ The Si substrate may be a n-type Si substrate or a n-type SiC substrate. ２The conductive substrate may contain a dopant such as ZnO. When forming a film on the Si substrate, a conductive buffer layer can be introduced as an intermediate layer. Examples of the conductive buffer layer include a metal film or a doped semiconductor film. Examples of the metal film include at least one or two elements from Group 4, Group 11, or Group 10 of the periodic table. Examples of the elements from Group 4 of the periodic table include Ti, Zr, or Hf. Examples of the elements from Group 11 of the periodic table include Cu, Ag, or Au. Examples of the elements from Group 10 of the periodic table include Ni, Pd, or Pt. When the crystalline substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystalline structure of the crystalline substrate preferably has a rutile crystal structure. Examples of the substrate having a rutile crystal structure include rutile-structured GeO. ２ Substrate, magnesium fluoride substrate and rutile structure TiO ２ The crystal substrate may have an off-axis angle. In this preferred range, the electrical characteristics can be further improved, the crystallinity can be better, and the substrate can be more easily applied to semiconductor devices and the like.

[0018] In the present invention, a film may be formed directly on the substrate, but a layer different from the semiconductor layer (for example, an n-type semiconductor layer, n ＋ type semiconductor layer, n － The semiconductor layer may be formed on the substrate via other layers, such as a silicon-doped semiconductor layer (e.g., a silicon-doped semiconductor layer), an insulating layer (including a semi-insulating layer), or a buffer layer. In particular, a buffer layer can be suitably used to reduce the difference in lattice constant between the crystal substrate and the semiconductor layer. Examples of materials for the buffer layer include SnO. ２ , TiO ２ , V.O. ２ , MnO ２ , RuO ２ , CsO ２ , IrO ２ , GeO ２ , CuO ２ , PbO ２, AgO ２ , CrO ２ , SiO ２ , SiC, GaN, and mixed crystals thereof.

[0019] The single crystal film can be obtained by a known film-forming means, such as a film-forming means using a Ge-containing atomization raw material solution in a film-forming apparatus as shown in Fig. 1. The atomization raw material solution and film-forming conditions can be appropriately set depending on the base substrate, etc.

[0020] The film formation conditions may be set appropriately as long as they do not impede the objectives of the present invention. In the present invention, the film formation temperature is preferably 450°C or higher and 1300°C or lower. The film formation time is not particularly limited, but may be, for example, 1 minute to 20 hours. The dopant introduction method may be a known introduction method, such as a method for injecting impurity ions or a method for producing a crystalline film containing impurities. The ion implantation may be a known ion implantation method. The crystal film production method may be a known film formation method. The annealing temperature is not particularly limited, but is preferably, for example, 500°C or higher and 1300°C or lower. The annealing time is not particularly limited, but is preferably, for example, 10 seconds to 10 hours. The annealing atmosphere is not particularly limited, but may be, for example, a non-oxygen atmosphere such as nitrogen, forming gas, or argon, or an oxygen atmosphere. The ion implantation angle in the present invention refers to the inclination between the ion beam and a line perpendicular to the surface of the crystal film or the crystal substrate. If the ion implantation angle is made smaller, the implantation depth will be deeper, and conversely, if the ion implantation angle is made larger, the implantation depth will be shallower. The ion implantation angle may be set appropriately as long as it does not impede the object of the present invention.

[0021] The semiconductor layer can be more easily obtained by forming a semiconductor film containing germanium dioxide or its mixed crystal as a main component using, for example, the film forming apparatus shown in FIG. 1 . Furthermore, doping can also be performed appropriately using the film forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and n-type or p-type dopants can be applied by conventional doping methods for oxide semiconductors. Examples of n-type dopants include antimony (Sb), arsenic (As), bismuth (Bi), phosphorus (P), fluorine (F), niobium (Nb), vanadium (V), tantalum (Ta), and tungsten (W). Examples of p-type dopants include aluminum (Al), gallium (Ga), and indium (In). The present invention also encompasses stacked structures obtained in this manner.

[0022] The laminated structure can be used as is or after known processing such as substrate peeling, using known means, for example, in semiconductor devices. Examples of such semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), metal semiconductor field-effect transistors (MESFETs), static induction transistors (SITs), high electron mobility transistors (HEMTs), metal oxide semiconductor field-effect transistors (MOSFETs), junction field-effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light-emitting diodes (LEDs). The laminated structure can also be used in modules incorporating such semiconductor devices, electronic devices incorporating such semiconductor devices, and components thereof. The laminated structure is useful for a variety of applications, particularly power devices. The semiconductor devices can be classified into horizontal devices (horizontal devices) in which an electrode is formed on one side of the semiconductor layer, and vertical devices (vertical devices) in which electrodes are formed on both the front and back sides of the semiconductor layer. In the present invention, the semiconductor device can be used in both horizontal and vertical devices.

[0023] Examples of semiconductor devices that can be suitably used in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. The following shows a suitable example in which a semiconductor film containing germanium dioxide or its mixed crystal as a main component in the single crystal film is used as a semiconductor layer.

[0024] (SBD) Figure 4 shows n － type semiconductor layers 101a, n ＋ 1 shows a preferred example of a Schottky barrier diode (SBD) including a p-type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al and covers the Schottky electrode 105a.

[0025] (HEMT) FIG. 5 shows a structure of an n-type semiconductor layer 121a having a wide band gap, an n-type semiconductor layer 121b having a narrow band gap, and an n-type semiconductor layer 121c having a narrow band gap. ＋ 1 shows a preferred example of a high electron mobility transistor (HEMT) including a p-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, an intermediate layer 128, and a substrate 129.

[0026] (MOSFET) FIG. － The first n-type semiconductor layer 131a ＋ type semiconductor layer 131b, second n ＋ p-type semiconductor layer 131c, p-type semiconductor layer 132, ＋ 1 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including a p-type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. ＋ The n-type semiconductor layer 132 a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132 .

[0027] (JFET) Figure 7 shows the n － The first n-type semiconductor layer 141a ＋ type semiconductor layer 141b, second n ＋1 shows a preferred example of a junction field effect transistor (JFET) comprising a p-type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b, and a drain electrode 145c.

[0028] (IGBT) FIG. 8 shows an n-type semiconductor layer 151, － type semiconductor layer 151a,n ＋ 1 shows a preferred example of an insulated gate bipolar transistor (IGBT) including a p-type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0029] (LED) Fig. 9 shows an example of a semiconductor device of the present invention that is a light-emitting diode (LED). The semiconductor light-emitting element of Fig. 9 includes an intermediate layer 168 on a substrate 169, an n-type semiconductor layer 161 on the intermediate layer 168, and a light-emitting layer 163 stacked on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is stacked on the light-emitting layer 163. A translucent electrode 167 that transmits light generated by the light-emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is stacked on the translucent electrode 167. The semiconductor light-emitting element of Fig. 9 may be covered with a protective layer except for the electrode portion.

[0030] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). ２ O ３ , ZnO, SnO ２ , Ga ２ O ３ , TiO ２ , CeO ２ Alternatively, a mixed crystal of two or more of these materials or a doped material thereof may be used. A translucent electrode can be formed by applying these materials by a known method such as sputtering. After the formation of the translucent electrode, thermal annealing may be performed to make the translucent electrode transparent.

[0031] In the semiconductor light-emitting element of FIG. 9, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and current is passed through these electrodes to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, causing the light-emitting layer 163 to emit light.

[0032] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof. The method for forming the electrodes is not particularly limited, and they can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating; physical methods such as vacuum deposition, sputtering, and ion plating; and chemical methods such as CVD and plasma CVD, taking into consideration their suitability for the material.

[0033] (JBS) Figure 10 shows the main part of a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The JBS in Figure 10 has an ohmic electrode 1020, n － type semiconductor layers 1010a,n ＋10 includes a p-type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field relaxation region 1060. The Schottky electrode 1030 is composed of metal layers 1030a, 1030b, and 1030c. In the semiconductor device of FIG. 10, the outer ends of metal layers 1030a and / or 1030b serving as second electrode layers are located outside the outer end of metal layer 1030c serving as a first electrode layer. In the semiconductor device of FIG. 10, the electric field relaxation region 1060 includes at least two electric field relaxation regions 1060 in a plane including at least a portion of the second electrode layer located outside the outer end of the first electrode layer and the outer end of the second electrode. In the semiconductor device of FIG. 10, the electric field relaxation region 1060 is composed of a p-type semiconductor, and － A PN junction is formed between the first and second semiconductor layers 1010a and 1010b.

[0034] 10 may be formed by any known method without particular limitation, as long as it does not impede the object of the present invention, such as forming a film by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or directly patterning by printing or the like.

[0035] (MESFET) Figure 11 shows an example of a metal semiconductor field effect transistor (MESFET) according to the present invention. The MESFET in Figure 11 is － type semiconductor layers 111a,n ＋ The semiconductor layer 111b, the buffer layer 118, the semi-insulating layer 114, the gate electrode 115a, the source electrode 115b, and the drain electrode 115c are provided.

[0036] The materials for the gate electrode, drain electrode, and source electrode may be known electrode materials, and examples of the electrode materials include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof. The gate electrode, drain electrode, and source electrode can be formed by known means such as vacuum deposition or sputtering.

[0037] The semi-insulating layer 114 may be made of a semi-insulating material, and examples of the semi-insulating material include those containing semi-insulating dopants such as magnesium (Mg), ruthenium (Ru), iron (Fe), beryllium (Be), cesium (Cs), strontium (Sr), and barium (Ba), as well as those that are not doped.

[0038] In the MESFET of FIG. 11, a good depletion layer is formed under the gate electrode, so that the current flowing from the drain electrode to the source electrode can be efficiently controlled.

[0039] (SIT) Fig. 12 shows an example of the semiconductor device of the present invention being an SIT. The SIT in Fig. 12 is － type semiconductor layer 241a,n ＋ The gate electrode 245a, the source electrode 245b and the drain electrode 245c are provided.

[0040] On the drain electrode 245c, for example, a n ＋ The n-type semiconductor layer 241b is formed. ＋ On the n-type semiconductor layer 241b, for example, a 100 nm to 100 μm thick n-type semiconductor layer － The n-type semiconductor layer 241a is formed. － On the n-type semiconductor layer 241a, ＋The n-type semiconductor layer 241c is formed. ＋ A source electrode 145b is formed on the gate semiconductor layer 241c.

[0041] In addition, the n － The n-type semiconductor layer 241a contains the ＋ The n － A plurality of trenches are formed to a depth that reaches halfway through the semiconductor layer 241a. － A gate electrode 245a is formed on the type semiconductor layer 241a.

[0042] In the on-state of the SIT shown in FIG. 12, when a voltage is applied between the source electrode 245b and the drain electrode 245c and a positive voltage is applied to the gate electrode 245a with respect to the source electrode 245b, the n － A channel layer is formed in the n-type semiconductor layer 241a, and electrons are － The off state is achieved by setting the voltage of the gate electrode to 0 V, which prevents the formation of a channel layer and turns the n-type semiconductor layer 241a on. － The semiconductor layer is filled with a depletion layer, and the device is turned off.

[0043] 13A and 13B show a part of the manufacturing process of the SIT shown in FIG. 12. For example, using a stacked body as shown in FIG. － An etching mask is provided on predetermined regions of the n-type semiconductor layer 241a and the n+-type semiconductor layer 241c, and anisotropic etching is performed using the etching mask by, for example, reactive ion etching, to remove the n-type semiconductor layer 241a and the n+-type semiconductor layer 241c as shown in FIG. ＋ The n-type semiconductor layer 241c surface － A trench groove is formed to a depth that reaches halfway through the n-type semiconductor layer 241a. Next, a gate electrode material such as polysilicon is deposited in the trench groove by a method such as CVD, vacuum deposition, or sputtering. － The n-type semiconductor layer 241a is formed to a thickness equal to or less than that of the n-type semiconductor layer 241b. ＋ A source electrode 245b is formed on the n-type semiconductor layer 241c. ＋The source electrode and the drain electrode may be formed on the semiconductor layer 241b, respectively, to manufacture an SIT. The electrode materials for the source electrode and the drain electrode may be known electrode materials, such as metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, and Ag, or alloys thereof; conductive metal oxide films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and indium zinc oxide (IZO); organic conductive compounds such as polyaniline, polythiophene, and polypyrrole; and mixtures thereof.

[0044] Although the above example shows an example in which a p-type semiconductor is not used, the present invention is not limited to this and a p-type semiconductor may be used. Note that the p-type semiconductor may be the same material as the n-type semiconductor and contain a p-type dopant, or may be a different p-type semiconductor.

[0045] Example 1 Fig. 1 is a diagram showing an example of a preferred embodiment of a film production apparatus according to the present invention. The film production apparatus 19 comprises a film-forming sample 20, a sample stage 21, carrier gas sources 22a and 22b, flow rate control valves 23a and 23b, a film production chamber 27, a heater 28, and an atomization device 30. The atomization device 30 comprises a raw material partition wall 24, a raw material solution to be atomized 24a, an ultrasonically transparent substrate 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. Fig. 2 is a diagram showing another preferred embodiment of a film production apparatus when the atomization device according to the present invention is used as a film production atomization stage. The atomization device 30 comprises a raw material partition wall 24, a raw material solution to be atomized 24a, an ultrasonically transparent substrate 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. The sample stage 21 is made of quartz, and the surface on which the film-forming sample 20 is placed is inclined from the horizontal plane. By fabricating both the film-forming chamber 27 and the sample stage 21 from quartz, impurities originating from the device are prevented from being mixed into the crystalline film formed on the film-forming sample 20. The concentration of aluminum chloride relative to the concentration of germanium in the atomization raw solution 24a was adjusted to 0.1 mol%. The atomization raw solution 24a was contained in the mist generating source 24. The guide partition 31 contacts the ultrasonic-transmitting substrate 38. Figure 3 is a schematic diagram showing a cross-sectional side view of the atomization device used in the present invention. The atomization device 30 in Figure 3 consists of the raw material partition 24, the ultrasonic-transmitting substrate 24b, the base 24c, the ultrasonic vibrator 26, the guide partition 31, and the ultrasonic-transmitting liquid tank 35. The guide partition 31 contacts the ultrasonic-transmitting liquid tank 35. By using the guide partition 31, the ultrasonic waves generated by the ultrasonic vibrator 26 are transmitted to the raw material partition 24 more efficiently.

[0046] Next, as the film-forming sample 20, a TiO film having a rutile crystal structure, a square with a side of 10 mm and an average thickness of 500 μm, was prepared. ２The substrate was placed on the sample stage 21, and the heater 28 was operated to raise the temperature inside the film deposition chamber 27 to 875° C. Next, the flow rate control valve 23 was opened to supply carrier gas from the carrier gas source 22 into the film deposition chamber 27. After the atmosphere inside the film deposition chamber 27 was sufficiently replaced with the carrier gas, the flow rate of the carrier gas was adjusted to 3 L / min. Oxygen gas was used as the carrier gas.

[0047] Next, the ultrasonic vibrator 26 was vibrated at 3.0 MHz, and the vibration was propagated to the atomization raw solution 24a through the ultrasonic transmitter 25a, thereby atomizing the atomization raw solution 24a to generate raw material fine particles. These raw material fine particles were introduced into the film deposition chamber 27 by the carrier gas, reacted in the film deposition chamber 27, and formed tetragonal GeO on the film deposition sample 20 by a CVD reaction on the film deposition surface of the film deposition sample 20. ２ A crystal film having a thickness of 600 nm was formed.

[0048] The obtained GeO ２ The crystalline film was measured using an X-ray diffractometer. The XRD diffraction results are shown in Figure 14. As is clear from Figure 14, the obtained crystalline film is GeO having a tetragonal rutile structure with a (002) orientation. ２ The result of the ω scan in the X-ray diffraction measurement is shown in FIG. 15. From FIG. 15, it is clear that the r-GeO ２ The rocking curve half-width at the 002 diffraction peak was 996 arcsec. The film thickness was 200 nm. From these results, it was confirmed that TiO ２ GeO with good crystallinity on (001) substrate ２ A crystalline film was formed over the entire surface.

[0049] The obtained GeO ２ When the surface of the crystal film was observed using an atomic force microscope (AFM), it was found that the surface roughness (RMS) based on JIS B0601 was 56 nm, as shown in FIG. 16, and the surface smoothness was superior.

[0050] The resulting GeO ２The dislocation density on the surface of the crystal film was measured by cross-sectional TEM observation. ２ The dislocation density of the crystalline film is 3.1 × 10 ９ / cm ２ It was.

[0051] (Example 2) A thin film was produced in the same manner as in Example 1, except that aluminum chloride was not added to the atomization raw material solution 24a, nitrogen was used as the supply gas, and the amount of carrier gas was reduced. The obtained thin film was measured using an X-ray diffraction device. Figure 18 shows the results of the XRD analysis. As is clear from Figure 18, the obtained thin film was composed of tetragonal GeO ２ The film thickness was 510 nm. From these results, it was found that TiO2 had a rutile crystal structure. ２ GeO with good crystallinity on (001) substrate ２ A crystalline film was formed over the entire surface.

[0052] The resulting GeO ２ The dislocation density on the surface of the crystal film was measured by cross-sectional TEM observation. ２ The dislocation density of the crystalline film is 2.9 × 10 ９ / cm ２ It was.

[0053] Comparative Example 1 A thin film was prepared in the same manner as in Example 1, except that oxygen gas was used as the carrier gas. ２ The dislocation density on the surface of the crystal film was measured by cross-sectional TEM observation and is shown in FIG. 20. ２ The dislocation density of the crystalline film is 2.2 × 10 １０ / cm ２ It was.

[0054] From these results, it was found that Examples 1 and 2 had lower dislocation densities and better crystallinity than Comparative Example 1.

[0055] The single crystal film and the laminated structure of the present invention are suitable for use in, for example, semiconductor devices.

[0056] 19 Film-forming apparatus 20 Film-forming sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow rate control valve 23b Flow rate control valve 24 Raw material partition 24a Raw material solution for atomization 24b Ultrasonic transmitting substrate 24c Base 26 Ultrasonic vibrator 27 Film-forming chamber 28 Heater 30 Atomization device 31 Guide partition 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmitting liquid tank 36 Ultrasonic transmitting liquid 37 Film-forming chamber 101a n － Type semiconductor layer 101b n ＋ n-type semiconductor layer 102 p-type semiconductor layer 103 metal layer 104 insulator layer 105a Schottky electrode 105b ohmic electrode 111a － Type semiconductor layer 111b n ＋ n-type semiconductor layer 114 semi-insulating layer 115a gate electrode 115b source electrode 115c drain electrode 118 buffer layer 121a wide band gap n-type semiconductor layer 121b narrow band gap n-type semiconductor layer 121c n ＋ n-type semiconductor layer 123 p-type semiconductor layer 124 semi-insulating layer 125a gate electrode 125b source electrode 125c drain electrode 128 intermediate layer 129 substrate 131a － First n-type semiconductor layer 131b ＋ Second n-type semiconductor layer 131c ＋ n-type semiconductor layer 132 p-type semiconductor layer 134 gate insulating film 135a gate electrode 135b source electrode 135c drain electrode 141a － First n-type semiconductor layer 141b ＋ Second n-type semiconductor layer 141c ＋ P-type semiconductor layer 142 P-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 N-type semiconductor layer 151a n － Type semiconductor layer 151b n ＋n-type semiconductor layer 152 p-type semiconductor layer 154 gate insulating film 155a gate electrode 155b emitter electrode 155c collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 light-emitting layer 165a first electrode 165b second electrode 167 light-transmitting electrode 168 intermediate layer 169 substrate 1010a n － Type semiconductor 1010b n ＋ Type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a Metal layer 1030b Metal layer 1030c Metal layer 1060 Electrolytic relaxation region

Claims

1. Area 50mm ２ A semiconductor film having a thickness of 30 μm or less, containing germanium dioxide or a mixed crystal thereof as a main component, and having a dislocation density of 1.0×10 １０ / cm ２ A single crystal film characterized by the following:

2. The dislocation density is 5.0 × 10 ９ / cm ２ The single crystal film of claim 1, wherein the .lambda.

3. The single crystal film according to claim 1, wherein said semiconductor film has a rutile crystal structure.

4. The single crystal film according to claim 1, wherein the semiconductor film has a thickness of 1 μm or more.

5. The area of ​​the semiconductor film is 100 mm ２ 2. The single crystal film according to claim 1, wherein the above-mentioned 6. The single crystal film of claim 1 containing a dopant.

7. The single crystal film according to claim 6, wherein said dopant comprises an element of Group 13 or Group 15 of the periodic table.

8. The single crystal film according to claim 1, having a surface roughness (RMS) of 60 nm or less.

9. A laminated structure in which a crystalline film is laminated on a crystalline substrate directly or via another layer, the crystalline film being a semiconductor film containing germanium dioxide or its mixed crystal as the main component, and further, the dislocation density is 1.0 x 10 １０ / cm ２ A laminated structure characterized by the following:

10. The laminated structure according to claim 9, wherein said crystalline film has a rutile type crystalline structure.

11. The laminated structure according to claim 9, wherein said crystalline film is a single crystalline film.

12. The laminated structure according to claim 9, wherein said crystalline substrate has a rutile crystal structure.

13. A semiconductor device including a single crystal film, characterized in that said single crystal film is the single crystal film according to claim 1.

14. The semiconductor device according to claim 13, which is a power device.

15. The semiconductor device according to claim 13, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a metal semiconductor field effect transistor (MESFET), a static induction transistor (SIT), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

16. An electronic device including a semiconductor device, characterized in that the semiconductor device is the semiconductor device according to claim 13.

17. A system including an electronic device, wherein the electronic device is the electronic device according to claim 16.

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