Storage device for storing error-related information, operation method thereof, and storage medium

Abstract

According to an embodiment, a storage device (204) may comprise at least one processor (223) and a memory (231) for storing instructions. According to an embodiment, the instructions may be configured to, when executed individually or collectively by the at least one processor, cause the storage device to: identify whether a time for storing error-related information generated in the storage device is set in a state in which power supplying from a host device (201) is maintained after a signal for hardware reset is received from the host device (201); and when the time for storing the error-related information is set, store the error-related information in a designated area of the memory within the time for storing the error-related information, and then perform an initialization operation within an initialization time.

Description

Storage device for storing error-related information, method of operation thereof, and storage medium

[0001] One embodiment disclosed in this document relates to a storage device for storing error-related information, a method of operating the same, and a storage medium.

[0002] Storage devices such as UFS (universal flash storage), eMMC (embedded multimedia card), and SSD (solid state drive) are widely used these days. With the recent application of electronic circuits to a wide range of systems, including not only laptops but also automobiles, aircraft, and drones, storage devices are also being used in a variety of systems.

[0003] As storage devices improve in operating speed and performance, their firmware can be configured to incorporate various functions. Storage devices can manage data independently or while communicating with another electronic device (e.g., a host device). For example, a host device can provide services to its users by communicating with the storage device.

[0004] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art related to the present disclosure.

[0005] According to one embodiment, the storage device may include at least one processor and a memory storing instructions.

[0006] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may be configured to identify whether a time has been set for storing information related to an error that occurred in the storage device while the storage device is still powered on after receiving a signal for a hardware reset from the host device.

[0007] According to one embodiment, the instructions may be configured to cause the storage device to store the error-related information in a designated area of ​​the memory within a time period for storing the error-related information, and then perform an initialization operation within an initialization time period, if a time period for storing the error-related information is set.

[0008] According to one embodiment, a method for storing error-related information in a storage device may include an operation of identifying whether a time for storing error-related information that occurred in the storage device is set while power supply from the host device is maintained after receiving a signal for hardware reset from the host device.

[0009] According to one embodiment, the method may include, if a time for storing the error-related information is set, an operation of storing the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then performing an initialization operation within the initialization time.

[0010] According to one embodiment, a storage medium storing at least one computer-readable instruction, wherein the at least one instruction, when executed by at least one processor of the storage device, causes the storage device to perform at least one operation, wherein the at least one operation may include an operation of identifying whether a time is set for storing information related to an error that occurred in the storage device while power supply from the host device is maintained after receiving a signal for hardware reset from the host device.

[0011] According to one embodiment, the at least one operation may include, if a time for storing the error-related information is set, an operation of storing the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then performing an initialization operation within an initialization time.

[0012] According to one embodiment, an electronic device may include at least one processor and a memory storing instructions.

[0013] According to one embodiment, the instructions, when individually or collectively executed by the at least one processor, may be configured to cause the electronic device to transmit a command to store error-related information to a storage device.

[0014] According to one embodiment, the instructions may be configured to cause the electronic device to transmit a signal for a hardware reset to the storage device (204) if no response is received from the storage device (204) within a specified time in response to transmission of a command to store the error-related information.

[0015] In one embodiment, the instructions may be configured to identify whether a time has been set for storing information related to an error that occurred in the storage device (204) while the electronic device maintains power supply to the storage device (204) after transmitting a signal for a hardware reset to the storage device (204).

[0016] According to one embodiment, the instructions may be configured to cause the electronic device to perform an initialization operation after a delay equal to the time for storing the error-related information, if a time for storing the error-related information is set.

[0017] FIG. 1 is a block diagram of an electronic device within a network environment according to one embodiment.

[0018] FIG. 2 is an internal block diagram of a storage device for storing error-related information according to one embodiment and a host device connected to the storage device.

[0019] FIG. 3 is a flowchart illustrating the operation of a storage device for storing error-related information according to one embodiment.

[0020] FIG. 4 is a diagram for explaining an error situation between a host device and a storage device according to one embodiment.

[0021] Figure 5 is a flowchart of operations in a host device according to one embodiment.

[0022] Figure 6 is a flowchart of operations in a storage device according to one embodiment.

[0023] FIG. 7 is a diagram illustrating a time for storing error-related information according to one embodiment.

[0024] In connection with the description of the drawings, the same or similar reference numerals may be used for the same or similar components.

[0025] FIG. 1 is a block diagram of an electronic device (101) within a network environment (100), according to one embodiment. Referring to FIG. 1 , in the network environment (100), the electronic device (101) may communicate with the electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of the electronic device (104) or the server (108) via a second network (199) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0026] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (120) may store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the commands or data stored in the volatile memory (132), and store result data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (121). For example, when the electronic device (101) includes the main processor (121) and the auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a given function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0027] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0028] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0029] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0030] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0031] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0032] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0033] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0034] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0035] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0036] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0037] The haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0038] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0039] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0040] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0041] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0042] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0043] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas, for example, by the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device via the at least one selected antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0044] According to various embodiments, the antenna module (197) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0045] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0046] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In one embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0047] In the detailed description below, reference numerals in the drawings may be used interchangeably or omitted for components that can be easily understood through the preceding embodiments, and their detailed descriptions may also be omitted. The electronic device (101) according to one embodiment disclosed in this document may be implemented by selectively combining components of different embodiments, and components of one embodiment may be replaced by components of another embodiment. For example, it should be noted that the present invention is not limited to specific drawings or embodiments.

[0048] A storage device may be an example of an implementation of an electronic device. The storage device may provide a storage service to a user by storing and outputting data according to the operations of components included in the storage device. The storage device may be embedded in an electronic device (e.g., the electronic device (101) of FIG. 1). The storage device can independently manage data and communicate with a host device. Accordingly, the host device can transfer data requiring storage to the storage device and request (or read) the required data from the storage device.

[0049] As the operating speed and performance of storage devices improve, their firmware can be configured to incorporate various functions. This increased operating speed and diverse functions can lead to frequent errors in the storage device. To detect or correct these errors, there is a method of storing error-related information to check the status of the storage device in case a problem occurs. The storage device collects information about the status and error at the time of the error and stores it as error-related information. Debugging is a method for extracting this error-related information. Here, error-related information can be referred to as debugging information or error history information.

[0050] Storage devices can experience unexpected failures or errors during operation due to hardware or software problems. When a storage device exhibits such abnormal behavior, the host device can perform a hardware reset, reconnect the interface with the storage device, and initialize the storage device to correct the failure or error. If communication between the host and storage device is not possible, the host device cannot request to save error-related information, and the information within the storage device will also be reset, making it difficult to perform smooth debugging.

[0051] Therefore, when a failure or error occurs in a communication failure state and initialization is performed, error-related information may be lost, making analysis difficult. Therefore, a method for efficiently storing error-related information occurring in a storage device is required.

[0052] In one embodiment, a storage device, an operating method thereof, and a storage medium for storing error-related information can be provided so that error-related information of the storage device can be checked by a host device even after initialization.

[0053] According to one embodiment, even in a communication failure state where a command to store error-related information is not received from a host device in an error occurrence situation, by storing error-related information in a storage device when a specified condition is satisfied, error-related information can be confirmed in the host device even after a reset, so that the circumstances of the error can be confirmed, and error analysis can be performed efficiently.

[0054] FIG. 2 is an internal block diagram of a storage device for storing error-related information according to one embodiment and a host device connected to the storage device.

[0055] Referring to FIG. 2, a storage device (204) is a device that stores data under the control of a host device (201) such as a smartphone (e.g., an electronic device (101) of FIG. 1). The storage device (204) may include a memory (231) (or memory device) in which data is stored, and a storage controller (223) that controls the memory (231). Here, the storage controller (223) may be referred to as at least one processor, a memory controller, or a control circuit. The operation of the storage controller (223), which will be described below, may be understood as the operation of the processor or the storage device (204).

[0056] The storage device (204) may be manufactured as any one of various types of storage devices depending on the host interface, which is the communication method with the host device (201). For example, the storage device (204) may be configured as any one of various types of storage devices, such as an SSD (solid state drive), an eMMC (embedded multimedia card), a secure digital card, or a UFS (universal flash storage) device. For example, if the storage device (204) is an embedded memory device or an external memory device, it may be a device that follows the UFS standard, and the storage device (204) may generate and transmit commands (or packets) according to a standard protocol with the host device (201).

[0057] The storage controller (223) can control the overall operation of the storage device (204). The storage controller (223) can control the operation of the memory (223) based on commands and addresses received from the host device (201). For example, the storage controller (223) can perform a write operation, a read operation, and an erase operation on the memory (231) in response to commands received from the host device (201). In a write operation, the storage controller (223) can program data in an area selected by an address of the memory (231) in response to a command for a write operation. In a read operation, the storage controller (223) can read data from an area selected by an address of the memory (231) in response to a command for a read operation from the host device (201). During an erase operation, the storage controller (223) can erase data stored in an area selected by an address of the memory (231).

[0058] According to one embodiment, the memory (231) is a non-volatile memory, and the non-volatile memory may include NAND flash memory. According to one embodiment, the memory (231) may store at least one computer-readable instruction.

[0059] According to one embodiment, when power is applied (S1) to the storage device (204) from the power management circuit (288) of the host device (201), the storage controller (223) can execute firmware (224).

[0060] The storage controller (223) operates by receiving power from the host device (201) and can control the operation of the memory (231) based on commands and data received from the host device (201).

[0061] According to one embodiment, the storage controller (223) can monitor the status of components of the storage device (204) (e.g., firmware (224), memory (231)). For example, the storage controller (223) can check whether an error occurs in the interface during communication with the host device (201) or whether a timeout occurs due to failure to respond to a command from the host device (201).

[0062] According to one embodiment, when an abnormal state of the storage device (204) occurs, the storage controller (223) can store the state of the storage device (204) at the time when the error occurred and information related to the error. The error-related information can be stored in a designated area of ​​a non-volatile memory (231) that can maintain stored data even when power from the power management circuit (288) of the host device (201) is cut off. The error-related information can be information that is stored in advance to resolve an error when an error occurs in the operation of the storage device (204) or that is accumulated each time an operation is performed.

[0063] In one embodiment, the storage device (204) may further include a buffer memory (not shown). The buffer memory may store commands and data executed and processed by the storage controller (223). According to one embodiment, the buffer memory may correspond to a volatile type cache memory within the storage device (204). According to one embodiment, the buffer memory may be a non-volatile memory or a volatile memory.

[0064] According to one embodiment, the host device (201) may include at least one processor (220), memory (230), and power management circuit (e.g., PMIC) (288). In one embodiment, the processor (220) may include a storage drive (221) and a storage controller (222). For example, the storage driver (221) controls the power management circuit (288), and the storage controller (222) may generate a command (S2) for hardware reset and transmit it to the storage device (204) through the interface. Although FIG. 2 illustrates that the storage driver (221) and the storage controller (222) are included in the processor (220), the operations of the storage driver (221) and the storage controller (222) may be implemented as being performed by the processor (220).

[0065] The host device (201) can communicate with the storage device (204) through various interfaces. For example, the host device (201) can provide an interface for data exchange with the storage device (204).

[0066] The processor (220) can transmit a command for a request to the storage device (204) through the interface and receive a response from the storage device (204) through the interface.

[0067] The processor (220) can recognize that an error has occurred in the storage device (204), and can transmit a command (e.g., hint command, write buffer command) to the storage device (204) to store error-related information in response to the error occurrence. The storage controller (223) of the storage device (204) can store, in the memory (231), the status of the storage device (204) at the time the error occurred and error-related information (e.g., debugging information) related to the error in response to the command to store the error-related information.

[0068] The processor (220) can check whether there is a response from the storage device (204) to the command. If there is no response, the processor (220) can wait for a given period of time (e.g., 2 seconds) without transmitting a new command. For example, the storage device (204) may not be able to respond to the command to the processor (220) due to an error in the output interface. If there is no response to the command, the processor (220) can initialize the storage device (204), but if initialization is performed, error-related information may not be stored. Therefore, instead of immediately initializing the storage device (204) when there is no response from the storage device (204), the processor (220) can wait for a given period of time so that the storage controller (223) of the storage device (204) can store error-related information in the memory (231). Accordingly, if a new command is not received from the processor (220) and the standby is maintained, the storage controller (223) may store error-related information in the memory (231). The processor (220) may perform an initialization operation by transmitting an initialization command (e.g., linkstartup command, FDeviceinit command) after waiting for a specified time. Here, the 'linkstartup command' may be a command that enables a link to be connected through an interface with the storage device (204), and the 'FDeviceinit command' may be a command to initialize the firmware of the storage device (204). In one embodiment, 'linkstartup command' and 'FDeviceinit command' are exemplified as examples of the initialization command, but examples of commands for initialization may not be limited thereto.

[0069] The processor (220) can periodically confirm the completion of error storage through communication with the storage controller (223) for a specified period of time. By providing the result of confirming the completion of error storage to the processor (220), the processor (220) can perform initialization of the storage device (204). Accordingly, the state system and other logic of the storage controller (223) included in the storage device (204) can be initialized. After the initialization is completed, the communication setup between the host device (201) and the storage device (204) is completed, so that the processor (220) can read the error-related information stored in the memory (231) of the storage device (204). Accordingly, the processor (220) can analyze the desired error-related information in an error occurrence situation, thereby taking proactive measures when a similar situation occurs.

[0070] Meanwhile, there may be a situation where a command is sent from the host device (201) but is not transmitted to the storage controller (223) through the interface due to an internal error or an interface error in the storage device (204). In this case, even if the processor (220) waits for a specified time so that the storage controller (223) of the storage device (204) can store error-related information in the memory (231), the storage controller (223) does not receive a command to store error-related information, and thus, a situation may occur where initialization is performed by a hardware reset without the error-related information being stored in the memory (231).

[0071] In one embodiment, when the storage controller (223) receives a hardware reset request (HW Reset REQ) (or a signal for hardware reset), the storage controller (223) may store error-related information in a designated area (e.g., a non-volatile memory area) of the memory (231) instead of immediately resetting in response to the reset request, and then perform an operation according to the reset. For example, after storing error-related information in response to the reset request, the storage controller (223) may perform a booting operation by turning off the power of the storage device (204) and turning it on again, and perform a recovery operation to recover data of the booted storage device (204).

[0072] The processor (220) of the host device (201) may transmit a read command to the storage controller (223) of the storage device (204) when the storage device (204) is turned on and during the initialization process. The storage controller (223) may read data (e.g., an attribute for which a time required to store error-related information is set) from an area selected by an address of the memory (231) in response to a command for a read operation from the host device (201). Here, the time required to store error-related information may be referred to as a reset debug save time. In this way, the processor (220) may receive a result of reading data (e.g., an attribute for which a time required to store error-related information is set) from the storage device (204), thereby confirming whether a time for storing error-related information generated in the storage device (204) is set.

[0073] For example, if a time period for storing error-related information is set, the storage device (204) may indicate that it takes a certain amount of time to store the error-related information before initialization. Accordingly, after the processor (220) transmits a hardware reset request to the storage controller (223), the storage controller (223) of the storage device (204) may wait for the certain amount of time so that the storage controller (223) of the storage device (204) can store the error-related information in the memory (231). After waiting for the certain amount of time, the processor (220) may perform initialization of the storage device (204).

[0074] According to one embodiment, the storage device (204) may store error-related information in a region of the memory (231) as attribute information after presetting a time for storing error-related information. For example, when storing error-related information after a hardware reset, additional time may be required for storage depending on the internal implementation of the storage device (204).

[0075] Here, the time for storing error-related information may vary depending on the type of storage device (204). In one embodiment, the time for storing error-related information may vary depending on the firmware (224) and may be set within the maximum time allowed by the host device (201). For example, since a longer time for storing error-related information may result in a longer recovery time, the storage device (204) may compare the maximum time (T1) set in the host device (201) with the time (T2) set in the storage device (204), and set the shorter time as the time for storing error-related information. For example, if the time (T2) set in the storage device (204) is shorter than the maximum time (T1) set in the host device (201), the set time (T2) may be set as the time for storing error-related information.

[0076] On the other hand, if no time is set for storing error-related information, this may indicate that the storage device (204) is not a storage device that requires a separate time to store error-related information. Since such a storage device (204) stores error-related information during initialization, the processor (220) can perform initialization of the storage device (204) without a separate wait.

[0077] Accordingly, if the time for storing error-related information is not set, the storage controller (223) can simultaneously perform an initialization operation and an operation for storing the error-related information in a designated area of ​​the memory (231) within the initialization time. Here, the initialization time may be a time set for an initialization command. For example, the initialization time may indicate a time at which a timer is started after receiving an initialization command and the initialization operation is completed before the expiration of the started timer.

[0078] For example, the storage controller (223) receives an initialization command from the host device (201) to initialize after a hardware reset request, and if the time for storing error-related information is not set, the initialization operation and the operation for storing error-related information can be performed together within the initialization time. For example, if the time for storing error-related information is not set and an example of an initialization command, 'FDeviceinit command', is received from the host device (201), the initialization operation and the operation for storing error-related information can be performed simultaneously, sequentially, or in parallel before the expiration of the timer that is operated in response to receiving the 'FDeviceinit command'.

[0079] Here, the fact that the time for storing error-related information is not set may mean that the attribute that sets the time required to store error-related information in an area of ​​the memory (231) is set to '0'. For example, if the value '0' is read, the processor (220) of the host device (201) may determine that the time for storing error-related information is not set.

[0080] Meanwhile, the processor (220) may obtain a result of reading in advance an area of ​​the memory (231) where the time required to store error-related information is stored from the memory (231), and then store the result in the memory (230). The processor (220) may assign a time item for storing error-related information in the storage device (204) to a register, and read and store it during initialization. The time for reading information (or attributes) about the time for storing error-related information may be during initialization, but may also be when connecting to the storage device (204) or before sending a hardware reset request, and the time is not limited thereto. When performing recovery after a hardware reset, if the time is stored, the processor (220) may wait for the stored time and then perform initialization starting with an initialization command. For example, the processor (220) may perform initialization by transmitting, as an example of an initialization command, a 'linkstartup command' to the storage device (204). In one embodiment, the processor (220) of the host device (201) may control the power supply (S1) to the storage device (204) from the power management circuit (288) to be maintained so that the power of the storage device (204) is not turned off before storing error-related information in response to the reset request. For example, the processor (220) may control the power supply (S1) to the storage device (204) to be maintained so that error-related information can be stored in response to the reset request while performing a recovery operation after a hardware reset in the storage device (204).For example, in a set power reset situation, a sleep situation, or a wake-up situation, when power is maintained and a hardware reset is performed, there is no need to store error-related information in the author device (204) because a command for notifying power off (e.g., a power off notification (PON) command)) is received in advance before the hardware reset. However, in a sudden power off situation where the command for notifying power off is not received, error-related information may not be stored in time, and since an error in a sudden power off situation may not be a meaningful error, there is no need to store error-related information. In one embodiment, in a situation where the power of the storage device (204) is not turned off after a signal for hardware reset is received, i.e., when the power supply is maintained, the storage controller (223) of the storage device (204) may store error-related information in an area of ​​the memory (231).

[0081] If the processor (220) does not receive a response to a command to store error-related information (e.g., task management command, hint command, write buffer command) to the storage device (204) within a specified time after transmitting the same, the processor (220) may recognize that an error has occurred in the storage device (204). Accordingly, the processor (220) may transmit a hardware reset request to the storage device (204) through the interface.

[0082] The processor (220) can control the power supply (S1) to the storage device (204) to be maintained so that the power of the storage device (204) is not turned off after transmitting the hardware reset request.

[0083] Accordingly, the storage controller (223) of the storage device (204) can check whether a time for storing error-related information is set while the power supply is maintained after receiving a signal for hardware reset. For example, a storage device for which a time for storing error-related information is set may indicate a storage device that must store error-related information before initialization after a hardware reset. Accordingly, the storage device (204) can store error-related information in a designated area (e.g., a non-volatile memory area) of the memory (231) for the set time, and then perform an initialization operation within the initialization time. The storage device (204) for which a time for storing error-related information is set must store error-related information within the set time from the time of receiving a hardware reset request.

[0084] On the other hand, if the time for storing error-related information is not set, for example, if the storage device (204) is a storage device implemented to store error-related information during the initialization process, the storage device (204) may perform an operation of performing initialization together with an operation of storing error-related information in a designated area (e.g., a non-volatile memory area) of the memory (231). Here, the initialization operation and the operation of storing error-related information may be performed so as to be completed within the initialization time.

[0085] In one embodiment, the storage controller (223) must not turn off the power of the storage device (204) before storing the error-related information after receiving the hardware reset request. To this end, the storage controller (223) must not receive a command notifying a power-off while the power supply (S1) from the host device (201) is maintained in order to store the error-related information. Even if the power supply is maintained, if a command notifying a power-off is received from the host device (201), the storage device (204) may be turned off in response to the command. Accordingly, the storage controller (223) may store the error-related information in the memory (231) even if the command notifying a power-off is not received. The command notifying a power-off may not be a command that immediately turns off the power upon reception, but rather a command that the host device (201) notifies the storage device (204) in advance that the power supply may be cut off or a hardware reset request may occur. Accordingly, the storage device (204) can perform an operation of storing error-related information only when there is no history of receiving a command notifying power off before a hardware reset request and power is maintained.

[0086] According to one embodiment, the storage controller (223) of the storage device (204) may perform an operation of storing error-related information in the memory (231) assuming that power supply is maintained after receiving a signal for hardware reset.

[0087] As described above, when storing error-related information in the memory (231), the storage controller (223) can perform initialization after storing the error-related information within the set time if there is a set time for storing the error-related information. On the other hand, if there is no set time, the storage controller (223) can control the initialization operation and the operation for storing the error-related information to be performed simultaneously so that they are completed within the initialization time.

[0088] According to one embodiment, the storage controller (223) may store error-related information in the memory (231) if it does not receive a command notifying power-off, but may also determine whether to store the error-related information depending on whether a command to store the error-related information (e.g., task management command, hint command, write buffer command) is received. For example, if the host device (201) transmits a command to store error-related information (e.g., task management command, hint command) to the storage device (204), the storage device (204) may determine that the command is a command to store information about an error that occurred inside the storage device (204), and may recognize that an error has occurred. Accordingly, the storage device (204) may store the error-related information upon recognizing that an error has occurred. If the command is received immediately before a signal for hardware reset is received and the error-related information has already been stored, the storage device (204) may not store the error-related information even if the signal for hardware reset is received.

[0089] For example, if the storage controller (223) receives a command to store error-related information before receiving a hardware reset request, it indicates that communication with the host device (201) is possible, and the storage controller (223) may store the error-related information in the memory (231) in response to the command. On the other hand, if the hardware reset request is received but the command to store error-related information is not received immediately before receiving the hardware reset request, it indicates that communication with the host device (201) is impossible, and the storage controller (223) may store the error-related information in the memory (231) in response to the command. For example, even if the host device (201) sends a command to store error-related information, the storage device (204) may not receive the command due to an error situation such as an interface error, and thus there may be no history of storing the error-related information. If the power is maintained after receiving a hardware reset request without receiving a command to store the above error-related information, the storage device (204) may store the error-related information in the memory (231).

[0090] According to one embodiment, the storage device (204) may include at least one processor (223) and a memory (231) for storing instructions. Here, at least one processor (223) may be the storage controller (223) of FIG. 2.

[0091] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may be configured to identify whether a time has been set for storing error-related information that has occurred in the storage device while the storage device is still powered on after receiving a signal for hardware reset from the host device (210).

[0092] According to one embodiment, the instructions may be configured to cause the storage device to store the error-related information in a designated area of ​​the memory within a time period for storing the error-related information, and then perform an initialization operation within an initialization time period, if a time period for storing the error-related information is set.

[0093] According to one embodiment, the instructions may be configured to cause the storage device to perform an initialization operation and an operation of storing the error-related information in the designated area of ​​the memory within the initialization time, if a time for storing the error-related information is not set.

[0094] According to one embodiment, the instructions may be configured to cause the storage device to identify whether a command for notifying power off has been received from the host device, and if the command for notifying power off has not been received, to store the error-related information in a designated area of ​​the memory.

[0095] According to one embodiment, the instructions may be configured to cause the storage device to store the error-related information in a designated area of ​​the memory if there is no command notifying the power-off received from the host device before receiving the signal for the hardware reset from the host device.

[0096] According to one embodiment, the instructions may be configured to cause the storage device to identify whether a command to store error-related information that occurred in the storage device has been received from the host device, and, if the command to store error-related information that occurred in the storage device has been received from the host device, to store the error-related information in a designated area of ​​the memory.

[0097] In one embodiment, the instructions may be configured to store error-related information in a designated area of ​​the memory if the storage device does not receive a command to store error-related information that occurred in the storage device before receiving a signal for the hardware reset from the host device.

[0098] According to one embodiment, the designated area of ​​the memory may be a non-volatile memory area.

[0099] According to one embodiment, the instructions may be configured to cause the storage device to complete the initialization operation and the operation of storing the error-related information in the designated area of ​​the memory within the initialization time associated with the initialization command, if the storage device receives a command to initialize after the signal for the hardware reset and the time for storing the error-related information is not set.

[0100] According to one embodiment, the time for storing the error-related information may be set within the maximum time allowed by the host device.

[0101] According to one embodiment, the electronic device (201) may include at least one processor (220) and a memory (230) that stores instructions. The electronic device (201) may be the host device of FIG. 2.

[0102] According to one embodiment, the instructions, when individually or collectively executed by the at least one processor, may be configured to cause the electronic device to transmit a signal for a hardware reset to the storage device (204).

[0103] In one embodiment, the instructions may be configured to identify whether a time has been set for storing information related to an error that occurred in the storage device (204) while the electronic device maintains power supply to the storage device (204) after transmitting a signal for a hardware reset to the storage device (204).

[0104] According to one embodiment, the instructions may be configured to cause the electronic device to perform an initialization operation after a delay equal to the time for storing the error-related information, if a time for storing the error-related information is set.

[0105] According to one embodiment, the instructions may be configured to cause the electronic device to transmit a command to store error-related information to the storage device (204).

[0106] According to one embodiment, the instructions may be configured to cause the electronic device to transmit a signal for a hardware reset to the storage device (204) if no response is received from the storage device (204) within a specified time in response to transmission of a command to store the error-related information.

[0107] FIG. 3 is a flowchart illustrating an operation of a storage device for storing error-related information according to an embodiment. Referring to FIG. 3, the operation method may include operations 305 to 315. Each operation of the operation method of FIG. 3 may be performed by a storage device (e.g., a storage device (204) of FIG. 2) or at least one processor of the storage device (e.g., a storage controller (223) of FIG. 2). In an embodiment, at least one of operations 305 to 315 may be omitted, the order of some operations may be changed, or another operation may be added.

[0108] According to one embodiment, in operation 305, the storage device (204) may identify whether a time has been set for storing information related to an error that occurred in the storage device (204) while the power supply from the host device (201) is maintained after receiving a signal for a hardware reset from the host device (201). According to one embodiment, a condition assuming that the power supply from the host device (201) is maintained may be included as a first condition for storing information related to an error before performing a reset in response to a hardware reset request in the storage device (204).

[0109] According to one embodiment, in operation 310, if a time for storing the error-related information is set, the storage device (204) may store the error-related information in a designated area of ​​the memory (231) within the time for storing the error-related information, and then perform an initialization operation within the initialization time.

[0110] According to one embodiment, in operation 310, if the time for storing the error-related information is not set, the storage device (204) may perform an initialization operation and an operation of storing the error-related information in the designated area of ​​the memory together within the initialization time.

[0111] According to one embodiment, in response to a hardware reset request from the storage device (204), depending on whether a time is set for storing error-related information before performing a reset, the error-related information may be stored within the set time and then initialized, or the error-related information may be stored while performing the initialization within the initialization time.

[0112] According to one embodiment, the operation of storing the error-related information in the designated area of ​​the memory (231) may include an operation of identifying whether a command for notifying power-off has been received from the host device (201), and an operation of storing the error-related information in the designated area of ​​the memory (231) if the command for notifying power-off has not been received. For example, a second condition for storing the error-related information before performing a reset in response to a hardware reset request in the storage device (204) may include a state in which a command for notifying power-off (e.g., a PON (power off notification) command) from the host device (201) has not been received.

[0113] According to one embodiment, the operation of storing the error-related information in the designated area of ​​the memory (231) may include an operation of storing the error-related information in the designated area of ​​the memory (231) if there is no command for notifying the power-off received from the host device (201) before receiving the signal for the hardware reset from the host device (201). For example, the command for notifying the power-off may be a command for the host device (201) to notify the storage device (204) that a hardware reset request may occur or a power-off situation may occur. Therefore, if the command for notifying the power-off is received before receiving the signal for the hardware reset, the storage device (204) may determine that there is no error situation and may not perform the operation of storing the error-related information. For example, if a command for notifying power off is received before a signal for hardware reset is received, the storage device (204) can complete an operation for storing related information at the time when the power is turned off and the command for notifying power off is received. On the other hand, if the command for notifying power off is not received before a signal for hardware reset is received, that is, only when a signal for hardware reset is received without a command for notifying power off, the storage device (204) can perform an operation for storing error-related information.

[0114] According to one embodiment, the storage device (204) can identify whether a command to store information related to an error that occurred in the storage device (204) has been received from the host device (201). If the storage device (204) receives a command to store information related to an error that occurred in the storage device (204) from the host device (201), the storage device (204) can store the error-related information in a designated area of ​​the memory (231). For example, if the storage device (204) receives a command to store information related to an error that occurred in the storage device (204) from the host device (201), the storage device (204) can perform an operation of storing the error-related information in response to the command.

[0115] According to one embodiment, the operation of storing the error-related information in the designated area of ​​the memory (231) may include an operation of storing the error-related information in the designated area of ​​the memory (231) if a command to store error-related information that occurred in the storage device (204) is not received before receiving the signal for the hardware reset from the host device (201). For example, a situation may occur in which the host device (201) sends a command to store error-related information to the storage device (204), but the storage device (204) does not receive the command. Accordingly, if the host device (201) sends a command to store error-related information to the storage device (204), but the storage device (204) does not receive the command to store error-related information, and a signal for the hardware reset is received, the storage device (204) may perform an operation of storing the error-related information in the designated area of ​​the memory (231).

[0116] For example, as a third condition for storing error-related information before performing a reset in response to a hardware reset request in the storage device (204), a state in which a command (e.g., task management command, hint command, write buffer command) to store error-related information that occurred in the storage device (204) is not received from the host device (201).

[0117] According to one embodiment, the designated area of ​​the memory (231) may be a non-volatile memory area.

[0118] According to one embodiment, the storage device (204) may receive a command to initialize after the signal for the hardware reset. The storage device (204) may be configured to complete the initialization operation and the operation of storing the error-related information in the designated area of ​​the memory (231) within the initialization time associated with the command to initialize, if the time for storing the error-related information after the signal for the hardware reset is not set.

[0119] According to one embodiment, the time for storing the error-related information may be set within the maximum time allowed by the host device (201).

[0120] FIG. 4 is a diagram for explaining an error situation between a host device and a storage device according to one embodiment.

[0121] Referring to FIG. 4, in operation 405, an electronic device (e.g., a host device) (201) may transmit a first command to a storage device (204). The storage device (204) must transmit a response to the first command. However, if an error occurs in the storage device (204), a response may not be transmitted. Accordingly, a timeout may occur in the host device (201). The operation of transmitting a command in the host device (201) may be performed multiple times, and if a response is not received multiple times in response to transmitting the command, the host device (201) may transmit a second command in operation 410. Here, the second command may be a command for inquiring about the status of the storage device (204). For example, the second command may be a command to store error-related information (e.g., a task management command, a hint command, a write buffer command). If a timeout situation occurs in response to transmission of the second command, the host device (201) may transmit a command for hardware reset in operation 415.

[0122] Hereinafter, the operations after transmitting the command for the hardware reset will be described by dividing them into operations in the host device (201) and the storage device (204), respectively. Fig. 5 is a flowchart of operations in the host device according to one embodiment, and Fig. 6 is a flowchart of operations in the storage device according to one embodiment. To help understand the explanation of Figs. 5 and 6, the explanation will be made with reference to Fig. 7. Fig. 7 is a diagram for explaining the time for storing error-related information according to one embodiment.

[0123] Referring to FIG. 5, the operating method may include operations 505 to 520. Each operation of the operating method of FIG. 5 may be performed by a host device (e.g., the host device (201) of FIG. 2), at least one processor of the host device (e.g., the storage controller (220) of FIG. 2). In one embodiment, at least one of operations 505 to 520 may be omitted, the order of some operations may be changed, or another operation may be added.

[0124] In operation 505, the host device (201) may perform a hardware reset. For example, the host device (2010) may transmit a hardware reset request to the storage device (204). In operation 510, the host device (201) may identify whether a time for storing error-related information is set. For example, the host device (201) may, upon connection with the storage device (204) or before sending a hardware reset request, obtain a result of reading in advance an area of ​​the memory (231) in which the time required for storing error-related information is stored from the memory (231), and then store the result in the memory (230). Accordingly, by referring to the data stored in advance in the memory (230), it may be determined whether the storage device (204) is a storage device (204) implemented so that a time for storing error-related information is set.

[0125] If a time for storing error-related information is set, in operation 515, the host device (201) can perform initialization in operation 520 after delaying by the time for storing error-related information. On the other hand, if a time for storing error-related information is not set, the host device (201) can perform initialization in operation 520.

[0126] Referring to FIG. 6, the operating method may include operations 605 to 635. Each operation of the operating method of FIG. 6 may be performed by a storage device (e.g., a storage device (204) of FIG. 2) or at least one processor of the storage device (e.g., a storage controller (223) of FIG. 2). In one embodiment, at least one of operations 605 to 635 may be omitted, the order of some operations may be changed, or another operation may be added.

[0127] In FIG. 6, operations 610, 615, and 620 are sequentially illustrated, but the operations may be performed simultaneously before storing error-related information, and the order is not limited to FIG. 6.

[0128] In operation 605, the storage device (204) may identify whether the host device (201) is in a state of maintaining power after receiving a hardware reset request. If the power is not maintained, the operation of storing error-related information may not be performed.

[0129] If the power is maintained from the host device (201) after receiving a hardware reset request, the storage device (204) may perform operations of checking whether a command for notifying power-off has been received in operation 610, checking whether a command for storing error-related information has been received in operation 615, and checking whether a time for storing error-related information has been set in operation 620. If a command for notifying power-off or a command for storing error-related information has been received, the operation for storing error-related information may not be performed. For example, if the storage device (204) receives a command for storing error-related information before receiving a hardware reset request, the error-related information may already have been stored, and thus the operation for storing error-related information may not be performed.

[0130] According to one embodiment, a first condition for storing error-related information before performing a reset in response to a hardware reset request in the storage device (204) may include a condition indicating that power supply from the host device (201) is maintained.

[0131] According to one embodiment, a second condition for storing error-related information before performing a reset in response to a hardware reset request in the storage device (204) may include not receiving a command notifying a power off from the host device (201), such as a power off notification (PON) command.

[0132] According to one embodiment, a third condition for storing error-related information before performing a reset in response to a hardware reset request in the storage device (204) may include a state in which a command (e.g., a task management command, a hint command, a write buffer command) to store error-related information that occurred in the storage device (204) is not received from the host device (201).

[0133] According to one embodiment, the storage device (204) may determine whether at least one of the first to third conditions is satisfied in response to receiving a hardware reset request. According to one embodiment, the storage device (204) may perform an operation of storing error-related information when at least one condition is satisfied, for example, when the first condition that the hardware reset request is received and the power is maintained is satisfied. According to one embodiment, the storage device (204) may perform an operation of storing error-related information when the first and second conditions that the hardware reset request is received and the power is maintained are satisfied. According to one embodiment, the storage device (204) may perform an operation of storing error-related information when the first and third conditions that the hardware reset request is received and the power is maintained are satisfied. According to one embodiment, the storage device (204) may perform an operation of storing error-related information when the first to third conditions that the hardware reset request is received and the power is maintained are satisfied.

[0134] According to one embodiment, when all of the conditions of operations 605 to 620 are satisfied, for example, when the power is maintained from the host device (201), a command for notifying power-off has not been received, a command for storing error-related information has not been received, and a time for storing error-related information has not been set, the storage device (204) may perform an operation of storing an initialization operation and error-related information in an area of ​​the memory (231) within an initialization time associated with an initialization command in operation 625.

[0135] If a time period for storing error-related information is set, the error-related information may be stored within the time period (t1) set for storing error-related information in operation 630, and then initialization may be performed in operation 635. For example, referring to FIG. 7(a), the storage device (204) may store error-related information (e.g., debugging information) in the memory (231) within the time period (t1) for storing error-related information from the time of receiving a hardware reset request, and initialization may be performed after storing the error-related information.

[0136] On the other hand, if the time for storing error-related information is not set, the storage device (204) may perform an operation of storing error-related information together with an initialization operation in operation 625. For example, referring to FIG. 7(b), the storage device (204) receives an initialization command after receiving a hardware reset request, and may store error-related information and perform an initialization operation within an initialization time (t2) related to the initialization command from the time of receiving the initialization command. For example, a set timer is started from the time of receiving the initialization command, and the storage device (204) may operate such that the operation of storing the error-related information and the initialization operation are completed before the timer expires.

[0137] According to one embodiment, even in a communication failure state where a command to store error-related information is not received from a host device in an error occurrence situation, by storing error-related information in a storage device when a specified condition is satisfied, error-related information can be confirmed in the host device even after a reset, so that the circumstances of the error can be confirmed, and error analysis can be performed efficiently.

[0138] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0139] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0140] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0141] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0142] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or may be provided through an application store (e.g., Play Store). TM ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0143] According to one embodiment, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0144] According to one embodiment, a storage medium storing at least one computer-readable instruction, wherein the at least one instruction, when executed by at least one processor of the storage device, causes the storage device to perform at least one operation, wherein the at least one operation may include an operation of identifying whether a time is set for storing information related to an error that occurred in the storage device while power supply from the host device is maintained after receiving a signal for hardware reset from the host device.

[0145] According to one embodiment, the at least one operation may include, if a time for storing the error-related information is set, an operation of storing the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then performing an initialization operation within an initialization time.

Claims

1. In the storage device (204), At least one processor (223); and It includes a memory (231) that stores instructions, The above instructions, when individually or collectively executed by the at least one processor, cause the storage device to: After receiving a signal for hardware reset from the host device (201), while power supply from the host device is maintained, it is identified whether a time is set for storing information related to an error that occurred in the storage device, A storage device configured to store the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then perform an initialization operation within the initialization time, if a time for storing the error-related information is set.

2. In the first paragraph, when the instructions are individually or collectively executed by the at least one processor, the storage device, A storage device configured to perform an initialization operation and an operation of storing the error-related information in the designated area of ​​the memory together within the initialization time, if the time for storing the error-related information is not set.

3. In the first or second paragraph, when the instructions are individually or collectively executed by the at least one processor, the storage device, Identify whether a command notifying power off has been received from the host device, A storage device set to store the error-related information in a designated area of ​​the memory if the command notifying the power-off is not received.

4. In any one of paragraphs 1 to 3, when the instructions are individually or collectively executed by the at least one processor, the storage device, A storage device configured to store the error-related information in a designated area of ​​the memory if there is no command notifying the power-off received from the host device prior to receiving the signal for the hardware reset from the host device.

5. In any one of paragraphs 1 to 4, the instructions, when individually or collectively executed by the at least one processor, the storage device, Identify whether a command to store error-related information that occurred in the storage device has been received from the host device, A storage device configured to store error-related information in a designated area of ​​the memory when a command to store error-related information that occurred in the storage device is received from the host device.

6. In any one of paragraphs 1 to 5, the instructions, when individually or collectively executed by the at least one processor, the storage device, A storage device configured to store error-related information in a designated area of ​​the memory if a command to store error-related information that occurred in the storage device is not received before receiving a signal for hardware reset from the host device.

7. A storage device according to any one of claims 1 to 6, wherein the designated area of ​​the memory is a non-volatile memory area.

8. In any one of paragraphs 1 to 7, the instructions, when individually or collectively executed by the at least one processor, the storage device, Receive a command to initialize after the signal for the above hardware reset, A storage device configured to complete the initialization operation and the operation of storing the error-related information in the designated area of ​​the memory within the initialization time associated with the initialization command, if the time for storing the error-related information is not set.

9. In any one of paragraphs 1 to 8, the time for storing the error-related information is: A storage device, wherein the storage device is set to a maximum time allowed by the host device.

10. In a method for storing error-related information in a storage device (204), An operation of identifying whether a time is set for storing information related to an error that occurred in the storage device while power supply from the host device is maintained after receiving a signal for hardware reset from the host device (201); and A method for storing error-related information, comprising: when a time for storing the error-related information is set, storing the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then performing an initialization operation within the initialization time.

11. In paragraph 10, A method for storing error-related information, further comprising an operation of simultaneously performing an initialization operation and an operation of storing the error-related information in the designated area of ​​the memory within the initialization time, if the time for storing the error-related information is not set.

12. In the 10th or 11th paragraph, the operation of storing the error-related information in a designated area of ​​the memory is as follows: An operation for identifying whether a command for notifying power off has been received from the host device; and A method for storing error-related information, comprising an operation of storing the error-related information in a designated area of ​​the memory when a command for notifying the power-off is not received.

13. In any one of the 10th to 12th clauses, the operation of storing the error-related information in a designated area of ​​the memory is as follows: A method for storing error-related information, comprising an operation of storing the error-related information in a designated area of ​​the memory, if there is no command notifying the power-off received from the host device prior to receiving a signal for the hardware reset from the host device.

14. In any one of paragraphs 10 to 13, An operation for identifying whether a command to store error-related information that occurred in the storage device has been received from the host device; and A method for storing error-related information, further comprising an operation of storing the error-related information in a designated area of ​​the memory when a command to store error-related information that occurred in the storage device is received from the host device.

15. In a storage medium storing at least one computer-readable instruction, said at least one instruction, when executed by at least one processor (223) of a storage device (204), causes said storage device to perform at least one operation, said at least one operation being: An operation of identifying whether a time is set for storing information related to an error that occurred in the storage device while power supply from the host device is maintained after receiving a signal for hardware reset from the host device (201); and A storage medium including an operation of storing the error-related information in a designated area of ​​the memory within the time for storing the error-related information, and then performing an initialization operation within the initialization time, when a time for storing the error-related information is set.

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