Coupling conductive lines of a memory device during self-refresh
By coupling multiple power rails through a switch during self-refresh mode, the power supply issues in DRAM are addressed, ensuring stable and efficient refresh operations.
WO2026029988A1PCT designated stage Publication Date: 2026-02-05MICRON TECHNOLOGY INC
Patent Information
- Application Number
- PCT/US2025/037911
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-31
- Filing Date
- 2025-07-16
- Publication Date
- 2026-02-05
AI Technical Summary
Technical Problem
Memory devices, particularly DRAM, face power supply issues during self-refresh operations, leading to potential malfunctions due to insufficient power when performing frequent refresh operations, especially at elevated temperatures.
Method used
A switch is activated to create a conductive path between multiple power rails (VDD and VDDQ) during self-refresh mode, increasing available power for refresh operations and preventing voltage drops.
Benefits of technology
Enhances power availability for self-refresh operations, reducing the risk of malfunctions and allowing more frequent refresh cycles without voltage drops.
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Figure US2025037911_05022026_PF_FP_ABST
Abstract
Apparatuses, systems, and methods for self-refresh in a memory device are disclosed. The memory device receives a plurality of voltages at respective conductive lines of a plurality of conductive lines of the memory device. During at least a portion of a self-refresh mode, the memory device may conductively couple first and second conductive lines of the plurality of conductive lines. For example, the memory device may conductively couple a first conductive line that receives VDD and a second conductive line that receives VDDQ. The voltages may be received via respective rails of a power management integrated circuit (PMIC).
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Citation Information
Patent Citations
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