Chip etching process optimization method and system

Abstract

The present invention belongs to the technical field of chip etching management, and specifically relates to a chip etching process optimization method and system. The system comprises a processor, an etching collection and transmission module, an etching optimization decision-making module, an optimization scheme execution module, an optimization management evaluation module, and an etching supervision end. In the present invention, the etching collection and transmission module collects parameters in the process of chip etching in real time; the etching optimization decision-making module performs analysis on the basis of data of the parameters in the process of chip etching, so as to generate a corresponding optimization scheme; the optimization scheme execution module adaptively adjusts and controls the process of etching on the basis of the optimization scheme, so as to precisely control and dynamically adjust etching process parameters; and by means of an optimization effect evaluation module, the etching performance for a chip within a detection period is rationally analyzed and accurately determined, so as to prompt, in a timely manner, a manager to take a corresponding improvement measure, thereby ensuring a subsequent chip etching effect and production efficiency; and the degree of intellectualization is high.

Description

Chip etching process optimization method and system TECHNICAL FIELD

[0001] The present application relates to the technical field of chip etching management, and specifically relates to a chip etching process optimization method and system. BACKGROUND

[0002] In the semiconductor chip manufacturing process, the etching process is one of the key steps, which directly affects the performance and yield of the chip, and is a main process of patterning processing associated with lithography, which selectively removes unnecessary materials from the surface of a silicon wafer by chemical or physical methods, and the basic goal is to correctly reproduce the mask pattern on the glued silicon wafer;

[0003] At present, when the chip etching process is carried out, it is difficult to realize automatic optimization of the etching process and accurately feedback the optimization effect, and when the optimization effect is poor, it is impossible to automatically diagnose the factors in a progressive manner, which is not conducive to the targeted improvement measures made by the management personnel, and it is difficult to guarantee the subsequent chip etching effect and production efficiency, the chip etching management is difficult, and the intelligent degree is low;

[0004] In view of the above technical defects, a solution is proposed. SUMMARY

[0005] The purpose of the present application is to provide a chip etching process optimization method and system, which solves the problem that the prior art is difficult to realize automatic optimization of the etching process and accurately feedback the optimization effect, and when the optimization effect is poor, it is impossible to automatically diagnose the factors in a progressive manner, the chip etching management is difficult and the intelligent degree is low.

[0006] To achieve the above purpose, the present application provides the following technical scheme:

[0007] A chip etching process optimization system, comprising a processor, an etching collection and transmission module, an etching optimization decision module, an optimization scheme execution module, an optimization management evaluation module and an etching supervision end;

[0008] The etching collection and transmission module uses a high-precision sensor to collect various parameters in the chip etching process in real time, and sends the collected various parameter data to the etching optimization decision module through the processor;

[0009] The etching optimization decision module analyzes the various parameter data in the chip etching process, determines whether to perform etching optimization through analysis, and generates a corresponding optimization scheme, and sends the generated optimization scheme to the optimization scheme execution module through the processor;

[0010] The optimization scheme execution module receives the optimization scheme sent by the etching optimization decision module, and adaptively regulates the etching process based on the optimization scheme to realize chip etching optimization;

[0011] The optimization effect evaluation module is configured to set a detection period, analyze the etching optimization effect condition of the chip in the detection period, generate an optimization effect qualified signal or an optimization effect abnormal signal through analysis, and send the optimization effect qualified signal or the optimization effect abnormal signal to the etching supervision end through the processor. When the etching supervision end receives the optimization effect abnormal signal, a warning is issued.

[0012] Further, the specific analysis process of the etching optimization decision module is as follows:

[0013] The machine learning or neural network algorithm is used to deeply mine and analyze the received parameter data, identify the key factors affecting the etching quality, predict the future etching trend, judge whether to perform etching optimization according to the data analysis result, and generate a corresponding optimization scheme including adjusting the etching process parameters and optimizing the etching gas ratio when it is judged that etching optimization is needed.

[0014] Further, the specific operation process of the optimization effect evaluation module includes:

[0015] The optimization effect coefficient is obtained through analysis, and the optimization effect coefficient is compared with the preset optimization effect coefficient threshold value. If the optimization effect coefficient exceeds the preset optimization effect coefficient threshold value, an optimization management abnormal signal is generated. If the optimization effect coefficient does not exceed the preset optimization effect coefficient threshold value, an optimization management qualified signal is generated.

[0016] Further, the analysis and acquisition method of the optimization effect coefficient is as follows:

[0017] The number of chips processed in the detection period is collected and marked as a chip production value, and the number of chips scrapped in the detection period is collected and marked as a chip scrap value. The ratio of the chip scrap value to the chip production value is marked as a chip scrap detection value.

[0018] The start etching time and the end etching time of the corresponding chip are collected. The interval time between the start etching time and the end etching time is marked as the etching time length. The average value of all etching time lengths in the detection period is calculated to obtain an etching detection time value. The number of etching time lengths exceeding the preset etching time length threshold value in the detection period is marked as an etching overtime value. The optimization effect coefficient is obtained by numerically calculating the chip scrap detection value, the etching detection time value and the etching overtime value.

[0019] Further, the processor is communicatively connected to the optimization control analysis module. The optimization effect evaluation module sends the optimization effect abnormal signal to the optimization control analysis module through the processor. The optimization control analysis module analyzes the etching optimization execution performance of the chip in the detection period.

[0020] The optimization control qualified signal or the optimization control abnormal signal is generated by analysis, and the optimization control qualified signal or the optimization control abnormal signal is sent to the etching supervision end through the processor. When the etching supervision end receives the optimization control abnormal signal, a warning is given.

[0021] Further, the specific analysis process of the optimization control analysis module is as follows:

[0022] The number of times of generating the optimization scheme in the detection period is collected and marked as the optimization frequency value, the generation time of the corresponding optimization scheme is collected and marked as time one, and the execution completion time of the corresponding optimization scheme is collected and marked as time two. The interval between time one and time two is marked as the completion time value, and the number of completion time values in the detection period that do not exceed the preset completion time threshold is marked as the optimization detection value.

[0023] The optimization detection value and the optimization frequency value are calculated by ratio to obtain the optimization detection value. The optimization detection value and the preset optimization detection threshold are compared in value. If the optimization detection value does not exceed the preset optimization detection threshold, an optimization control abnormal signal is generated. If the optimization detection value exceeds the preset optimization detection threshold, an optimization control qualified signal is generated.

[0024] Further, the processor is communicatively connected to the etching device analysis module. The optimization control analysis module sends the optimization control abnormal signal to the etching device analysis module through the processor. When the etching device analysis module receives the optimization control abnormal signal, the etching device for chip etching is detected and analyzed.

[0025] The device condition of the etching device is analyzed and judged, and the etching device high abnormal signal or the etching device low abnormal signal is generated. The etching device high abnormal signal or the etching device low abnormal signal is sent to the etching supervision end through the processor. When the etching supervision end receives the etching device high abnormal signal, a warning is given.

[0026] Further, the specific analysis process of the etching device analysis module is as follows:

[0027] The production date of the etching time is collected. The interval between the production date and the current date is marked as the production duration. The production duration and the preset production duration threshold are compared in value. If the production duration exceeds the preset production duration threshold, an etching device high abnormal signal is generated.

[0028] If the production duration does not exceed the preset production duration threshold, the etching device evaluation value is obtained by analysis. The etching device evaluation value and the preset etching device evaluation threshold are compared in value. If the etching device evaluation value exceeds the preset etching device evaluation threshold, an etching device high abnormal signal is generated. If the etching device evaluation value does not exceed the preset etching device evaluation threshold, an etching device low abnormal signal is generated.

[0029] Further, the analysis method of the etching equipment evaluation value is specifically as follows:

[0030] Collecting each environmental parameter of the environment where the etching equipment is located, comparing each environmental parameter with the corresponding parameter requirement, if there is an environmental parameter that does not meet the corresponding parameter requirement, it is judged that the etching equipment is in an abnormal state, and the total duration of the etching equipment in the abnormal state in the historical stage is obtained and marked as an abnormality detection value;

[0031] and the duration of each operation of the etching equipment in the historical stage is collected, the duration of all operations of the etching equipment in the historical stage is summed to obtain an operation duration value, and the number of operations whose duration exceeds a preset duration threshold in the historical stage is marked as a high operation frequency value;

[0032] and the time for running and maintaining the etching equipment in the historical stage is collected, the interval duration between adjacent two sets of maintenance time is marked as an operation and maintenance interval value, and the average value of all operation and maintenance interval values in the historical stage is calculated to obtain an operation and maintenance analysis value, and the number of operation and maintenance interval values in the historical stage that exceed a preset operation and maintenance interval threshold is marked as a high operation and maintenance interval value;

[0033] The etching equipment evaluation value is obtained by numerically calculating the production duration, abnormality detection value, operation duration value, high operation frequency value, operation and maintenance analysis value, and high operation and maintenance interval value.

[0034] Further, the application also provides a chip etching process optimization method, which comprises the following steps:

[0035] Step one, collecting each parameter in the chip etching process by using a high-precision sensor in real time;

[0036] Step two, analyzing based on each parameter data in the chip etching process, and determining whether to optimize the etching by analysis and generating a corresponding optimization scheme;

[0037] Step three, adaptively regulating the etching process based on the optimization scheme to realize chip etching optimization;

[0038] Step four, analyzing the etching optimization effect of the chip in the detection period, and generating an optimization effect qualified signal or an optimization effect abnormal signal through analysis;

[0039] Step five, when the optimization effect abnormal signal is generated, the etching supervision end issues a warning.

[0040] Compared with the prior art, the application has the following advantages:

[0041] 1. In this invention, the etching acquisition and transmission module collects various parameters in real time during the chip etching process. The etching optimization decision module analyzes the parameter data during the chip etching process to generate corresponding optimization schemes. The optimization scheme execution module adaptively regulates the etching process based on the optimization schemes, thereby achieving precise control and dynamic adjustment of etching process parameters. Furthermore, the optimization effect evaluation module reasonably analyzes and accurately judges the etching performance of the chip during the detection period, and promptly reminds management personnel to take corresponding improvement measures, thereby ensuring the subsequent chip etching effect and production efficiency.

[0042] 2. In this invention, the processor sends an abnormal optimization signal to the optimization control and analysis module. The optimization control and analysis module analyzes the performance of the chip etching optimization during the detection period. When an abnormal optimization control signal is generated, the etching equipment analysis module detects and analyzes the etching equipment performing chip etching, realizing automatic progressive diagnosis of factors causing poor chip etching performance. This helps managers to take targeted improvement measures, further ensuring the subsequent chip etching effect and production efficiency, significantly reducing the difficulty of chip etching management, and demonstrating a high degree of intelligence. Attached Figure Description

[0043] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to the accompanying drawings;

[0044] Figure 1 is a system block diagram of Embodiment 1 of the present invention;

[0045] Figure 2 is a system block diagram of Embodiments 2 and 3 of the present invention;

[0046] Figure 3 is a flowchart of the method in Embodiment 4 of the present invention. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] Example 1: As shown in Figure 1, the chip etching process optimization system proposed in this invention includes a processor, an etching acquisition and transmission module, an etching optimization decision module, an optimization scheme execution module, an optimization management and evaluation module, and an etching monitoring terminal.

[0049] The etching acquisition and transmission module uses high-precision sensors to collect various parameters (such as etching temperature and etching rate) during the chip etching process in real time, and sends the collected parameter data to the etching optimization decision module via the processor.

[0050] The etching optimization decision module analyzes various parameter data in the chip etching process, determines whether to perform etching optimization through analysis, and generates a corresponding optimization scheme, and sends the generated optimization scheme to the optimization scheme execution module through the processor; the specific analysis process of the etching optimization decision module is as follows:

[0051] Machine learning or neural network algorithms are used to deeply mine and analyze the received parameter data, identify key factors affecting etching quality, and predict future etching trends. According to the data analysis results, it is determined whether to perform etching optimization, and the corresponding optimization scheme is generated when etching optimization is needed, such as adjusting etching process parameters and optimizing etching gas ratio. It should be noted that the optimization scheme aims to improve etching precision, uniformity and efficiency, while reducing production cost and scrap rate.

[0052] The optimization scheme execution module receives the optimization scheme sent by the etching optimization decision module, and performs adaptive regulation and control on the etching process based on the optimization scheme to realize chip etching optimization; through integrated and intelligent etching management and high-precision data acquisition, processing, optimization and control technology, accurate control and dynamic adjustment of etching process parameters are realized, which not only improves etching precision and production efficiency, but also reduces production cost and enhances process reliability.

[0053] The optimization effect evaluation module is used to set a detection period, preferably seven days; the etching optimization effect of the chip in the detection period is analyzed, and an optimization effect qualified signal or an optimization effect abnormal signal is generated through analysis, and the optimization effect qualified signal or the optimization effect abnormal signal is sent to the etching supervision end through the processor;

[0054] When the etching supervision end receives the optimization effect abnormal signal, it issues a warning, can reasonably analyze and accurately judge the etching performance of the chip in the detection period, and timely remind the management personnel to take corresponding improvement measures, so as to ensure the subsequent chip etching effect and production efficiency; the specific operation process of the optimization effect evaluation module is as follows:

[0055] The optimization effect coefficient is obtained by analysis, specifically: the number of chips processed in the detection period is collected and marked as chip production value, and the number of chips scrapped in the detection period is collected and marked as chip scrap value, and the ratio of chip scrap value to chip production value is marked as chip scrap detection value;

[0056] The starting etching time and the ending etching time of the corresponding chip are collected, the interval duration between the starting etching time and the ending etching time is marked as an etching duration, the mean value of all etching durations in the detection period is calculated to obtain an etching detection time value, and the proportion of the number of etching durations that exceeds the preset etching duration threshold in the detection period is marked as an etching timeout value;

[0057] The chip waste detection value XF, the etching detection time value XS and the etching timeout value XD are numerically calculated by the formula XP = (hu1*XF + hu3*XD) / 2 + hu2*XS to obtain an optimization effect coefficient XP; wherein hu1, hu2 and hu3 are preset proportion coefficients, hu1>hu3>hu2>0; and the greater the value of the optimization effect coefficient XP, the better the etching performance of the chip in the detection period;

[0058] The optimization effect coefficient XP is compared with the preset optimization effect coefficient threshold value, if the optimization effect coefficient XP exceeds the preset optimization effect coefficient threshold value, it indicates that the etching performance of the chip in the detection period is poor in general, and an optimization management abnormal signal is generated; if the optimization effect coefficient XP does not exceed the preset optimization effect coefficient threshold value, it indicates that the etching performance of the chip in the detection period is good in general, and an optimization management qualified signal is generated.

[0059] Embodiment two: as shown in Figure 2, the difference between this embodiment and embodiment one is that the processor is communicatively connected to the optimization management and control analysis module, the optimization effect evaluation module sends the optimization effect abnormal signal to the optimization management and control analysis module through the processor, and the optimization management and control analysis module analyzes the etching optimization execution performance of the chip in the detection period;

[0060] The optimization management and control qualified signal or the optimization management and control abnormal signal is generated by analysis, and the optimization management and control qualified signal or the optimization management and control abnormal signal is sent to the etching supervision end through the processor. When the etching supervision end receives the optimization management and control abnormal signal, a warning is issued. The correlation between the poor etching performance of the chip in the detection period and the etching optimization execution management and control can be accurately judged, and the etching equipment or the chip etching process can be adjusted accordingly when the optimization management and control abnormal signal is generated, so as to realize targeted improvement and facilitate to ensure the subsequent chip production efficiency and etching effect. The specific analysis process of the optimization management and control analysis module is as follows:

[0061] The number of times of generating optimization schemes in the detection period is collected and marked as an optimization frequency value, the generation time of the corresponding optimization scheme is collected and marked as time one, the execution completion time of the corresponding optimization scheme is collected and marked as time two, the interval duration between time one and time two is marked as a complete time value, and the number of complete time values that do not exceed the preset complete time threshold in the detection period is marked as an optimization execution detection value;

[0062] The optimization execution detection value is obtained by ratio calculation of the optimization detection value and the optimization production frequency value, wherein the smaller the optimization execution detection value is, the more abnormal the execution efficiency of the optimization scheme for the chip in the detection period is, and the optimization execution detection value is compared with a preset optimization execution detection threshold value in value;

[0063] If the optimization execution detection value does not exceed the preset optimization execution detection threshold value, it indicates that the execution efficiency of the optimization scheme for the chip in the detection period is relatively normal, and the possibility of poor chip etching performance caused by etching optimization execution control factors is smaller, and an optimization control abnormal signal is generated; if the optimization execution detection value exceeds the preset optimization execution detection threshold value, it indicates that the execution efficiency of the optimization scheme for the chip in the detection period is relatively abnormal, and the possibility of poor chip etching performance caused by etching optimization execution control factors is larger, and an optimization control qualified signal is generated.

[0064] Embodiment three: as shown in Figure 2, the difference between this embodiment and embodiment one and embodiment two is that the processor is communicatively connected with the etching equipment analysis module, and the optimization control analysis module sends the optimization control abnormal signal to the etching equipment analysis module through the processor, and the etching equipment analysis module detects and analyzes the etching equipment for chip etching when receiving the optimization control abnormal signal;

[0065] The etching equipment high abnormal signal or the etching equipment low abnormal signal is generated by analyzing and judging the equipment condition of the etching equipment, and the etching equipment high abnormal signal or the etching equipment low abnormal signal is sent to the etching supervision end through the processor, and the etching supervision end sends a warning when receiving the etching equipment high abnormal signal, which can further diagnose the factors of poor chip etching performance, and the etching equipment is treated specifically when the etching equipment high abnormal signal is generated, such as scrapping the corresponding etching equipment, further ensuring the subsequent chip etching effect and production efficiency, significantly reducing the difficulty of chip etching management, and having high intelligent degree; the specific analysis process of the etching equipment analysis module is as follows:

[0066] The production date at the etching time is collected, the interval time length between the production date and the current date is marked as the production time length, and the production time length is compared with a preset production time length threshold value in value, if the production time length exceeds the preset production time length threshold value, it indicates that the equipment condition of the etching equipment is poor, and the etching equipment high abnormal signal is generated;

[0067] If the production time length does not exceed the preset production time length threshold value, the various environmental parameters of the environment where the etching equipment is located are collected, and the various environmental parameters are compared with the corresponding parameter requirements in value, if there is an environmental parameter that does not meet the corresponding parameter requirement, it is judged that the etching equipment is in an abnormal state, and the total time length of the etching equipment in the abnormal state in the historical stage is obtained and marked as an abnormal detection value;

[0068] and the duration of each operation of the etching equipment in the historical stage is collected, the duration of all operations in the historical stage is summed to obtain an operation duration value, and the number of operations whose duration exceeds a preset duration threshold in the historical stage is marked as a high operation frequency value;

[0069] and the time of operation and maintenance of the etching equipment in the historical stage is collected, the interval duration between adjacent two groups of maintenance time is marked as an operation and maintenance interval value, all operation and maintenance interval values in the historical stage are averaged to obtain an operation and maintenance analysis value, and the number of operation and maintenance interval values in the historical stage that exceed a preset operation and maintenance interval threshold is marked as a high operation and maintenance interval value;

[0070] The production duration QS, the ring isomer detection value QW, the operation duration value QR, the high operation frequency value QY, the operation and maintenance analysis value QF, and the high operation and maintenance interval value QK are calculated by the formula to obtain the etching equipment evaluation value QP; wherein c1, c2, c3, c4, c5, and c6 are preset proportion coefficients, and c6>c4>c5>c3>c2>c1; and the larger the value of the etching equipment evaluation value QP, the worse the overall equipment condition of the etching equipment, and the greater the possibility that the chip etching performance is poor due to the equipment factors of the etching equipment;

[0071] The etching equipment evaluation value QP is compared with a preset etching equipment evaluation threshold value, if the etching equipment evaluation value QP exceeds the preset etching equipment evaluation threshold value, it indicates that the overall equipment condition of the etching equipment is relatively poor, and the possibility that the chip etching performance is poor due to the equipment factors of the etching equipment is relatively large, and an etching equipment high isomer signal is generated; if the etching equipment evaluation value QP does not exceed the preset etching equipment evaluation threshold value, it indicates that the overall equipment condition of the etching equipment is relatively good, and the possibility that the chip etching performance is poor due to other factors such as chip etching process is relatively large, and an etching equipment low isomer signal is generated.

[0072] Embodiment four: as shown in FIG. 3, the difference between the present embodiment and embodiments one, two and three is that the present application proposes a chip etching process optimization method, which comprises the following steps:

[0073] Step one, real-time collection of various parameters in the chip etching process by using high-precision sensors;

[0074] Step two, analysis based on various parameter data in the chip etching process, and generation of corresponding optimization scheme by analyzing whether to perform etching optimization;

[0075] Step three, adaptive regulation of the etching process based on the optimization scheme to realize chip etching optimization;

[0076] Step four, analyze the etching optimization effect condition of the chip in the detection period, and generate an optimization effect qualified signal or an optimization effect abnormal signal through analysis;

[0077] Step five, when the optimization effect abnormal signal is generated, the etching supervision end issues a warning.

[0078] The working principle of the present application is: in use, the etching collection and transmission module collects various parameters in the chip etching process in real time, the etching optimization decision module analyzes based on various parameter data in the chip etching process, judges whether to perform etching optimization through analysis, and generates a corresponding optimization scheme, the optimization scheme execution module performs adaptive regulation and control on the etching process based on the optimization scheme, realizes accurate control and dynamic adjustment of the etching process parameters, improves the etching precision and production efficiency, reduces the production cost and enhances the process reliability, and through the optimization effect evaluation module, the etching optimization effect condition of the chip in the detection period is analyzed, and when the optimization effect abnormal signal is generated, the etching supervision end issues a warning, which can reasonably analyze and accurately judge the etching performance condition of the chip in the detection period, and timely remind the management personnel to take corresponding improvement measures, so as to ensure the subsequent chip etching effect and production efficiency, and the intelligent degree is high.

[0079] The above formulas are all dimensionless numerical calculations, and the formulas are obtained by software simulation of a large amount of data to obtain a formula of the nearest real situation, and the preset parameters in the formula are set by the person skilled in the art according to the actual situation. The preferred embodiments of the present application disclosed above are only used to help explain the present application. The preferred embodiments do not describe all the details and do not limit the present application to the specific implementation. Obviously, according to the content of the present application, many modifications and changes can be made. The present application selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that the person skilled in the art can well understand and utilize the present application. The present application is limited by the claims and their entire scope and equivalents.

Claims

1. A chip etching process optimization system, comprising: The chip etching optimization management system comprises a processor, an etching collection transmission module, an etching optimization decision module, an optimization scheme execution module, an optimization management evaluation module and an etching supervision end. The etching collection transmission module uses high-precision sensors to collect various parameters in the chip etching process in real time, and sends the collected parameter data to the etching optimization decision module through the processor. The etching optimization decision module analyzes the parameter data in the chip etching process, determines whether to perform etching optimization through analysis, and generates a corresponding optimization scheme, and sends the generated optimization scheme to the optimization scheme execution module through the processor. The optimization scheme execution module receives the optimization scheme sent by the etching optimization decision module, and performs adaptive regulation on the etching process based on the optimization scheme to realize chip etching optimization. The optimization effect evaluation module is used to set a detection period, analyze the etching optimization effect of the chip in the detection period, generate an optimization effect qualified signal or an optimization effect abnormal signal through analysis, and send the optimization effect qualified signal or the optimization effect abnormal signal to the etching supervision end through the processor. When the etching supervision end receives the optimization effect abnormal signal, it issues a warning.

2. The system of claim 1, wherein, The specific analysis process of the etching optimization decision module is as follows: Machine learning or neural network algorithm is used to deeply mine and analyze the received parameter data, identify the key factors affecting etching quality, predict future etching trends, and determine whether to perform etching optimization based on data analysis results. When it is determined that etching optimization is needed, a corresponding optimization scheme is generated, including adjusting etching process parameters and optimizing etching gas ratio.

3. The system of claim 1, wherein the system is configured to: The specific operation process of the optimization effect evaluation module includes: Through analysis, the optimization effect coefficient is obtained, and the optimization effect coefficient is compared with the preset optimization effect coefficient threshold value. If the optimization effect coefficient exceeds the preset optimization effect coefficient threshold value, an optimization management abnormal signal is generated. If the optimization effect coefficient does not exceed the preset optimization effect coefficient threshold value, an optimization management qualified signal is generated.

4. The chip etch process optimization system of claim 3, wherein, The analysis and acquisition method of the optimization effect coefficient is as follows: The number of chips processed in the detection period is collected and marked as the chip production value, and the number of chips scrapped in the detection period is collected and marked as the chip scrap value. The ratio of the chip scrap value to the chip production value is marked as the chip scrap detection value. The start etching time and the end etching time of the corresponding chip are collected, the interval between the start etching time and the end etching time is marked as the etching time, the average value of all etching times in the detection period is calculated to obtain the etching detection time value, and the number of etching times exceeding the preset etching time threshold value in the detection period is marked as the etching timeout value. The optimization effect coefficient is obtained by numerically calculating the chip scrap detection value, the etching detection time value and the etching timeout value.

5. The system of claim 1, wherein the system is configured to: The processor is communicatively connected to the optimization management and control analysis module. The optimization effect evaluation module sends the optimization effect abnormal signal to the optimization management and control analysis module through the processor. The optimization management and control analysis module analyzes the etching optimization execution performance of the chip in the detection period. The optimization control analysis module generates an optimization control qualified signal or an optimization control abnormal signal through analysis, and sends the optimization control qualified signal or the optimization control abnormal signal to the etching supervision end through the processor. When the etching supervision end receives the optimization control abnormal signal, a warning is issued.

6. The system of claim 5, wherein the system is configured to: The specific analysis process of the optimization control analysis module is as follows: The number of times of generating optimization schemes in the detection period is collected and marked as an optimization frequency value, the time when the corresponding optimization scheme is generated is collected and marked as time one, and the time when the corresponding optimization scheme is executed is collected and marked as time two. The interval between time one and time two is marked as a complete time value, and the number of complete time values in the detection period that do not exceed the preset complete time threshold is marked as an optimization detection value. An optimization detection value is obtained by ratio calculation of the optimization detection value and the optimization frequency value. The optimization detection value is compared with the preset optimization detection threshold value. If the optimization detection value does not exceed the preset optimization detection threshold value, an optimization control qualified signal is generated. If the optimization detection value exceeds the preset optimization detection threshold value, an optimization control abnormal signal is generated.

7. The chip etching process optimization system according to claim 5, characterized in that, The processor is communicatively connected to the etching device analysis module. The optimization control analysis module sends the optimization control abnormal signal to the etching device analysis module through the processor. When the etching device analysis module receives the optimization control abnormal signal, the etching device for chip etching is detected and analyzed. The device status of the etching device is analyzed and an etching device high abnormal signal or an etching device low abnormal signal is generated. The etching device high abnormal signal or the etching device low abnormal signal is sent to the etching supervision end through the processor. When the etching supervision end receives the etching device high abnormal signal, a warning is issued.

8. The system of claim 7, wherein the system is configured to: The specific analysis process of the etching device analysis module is as follows: The production date of the etching time is collected. The interval between the production date and the current date is marked as a production duration. The production duration is compared with the preset production duration threshold value. If the production duration exceeds the preset production duration threshold value, an etching device high abnormal signal is generated. If the production duration does not exceed the preset production duration threshold value, the etching device evaluation value is obtained through analysis. The etching device evaluation value is compared with the preset etching device evaluation threshold value. If the etching device evaluation value exceeds the preset etching device evaluation threshold value, an etching device high abnormal signal is generated. If the etching device evaluation value does not exceed the preset etching device evaluation threshold value, an etching device low abnormal signal is generated.

9. The system of claim 8, wherein the system is configured to: The analysis and acquisition method of the etching device evaluation value is as follows: The etching device is in an abnormal state, and the total duration of the etching device in the abnormal state in the historical stage is obtained and marked as an abnormality detection value. The duration of each operation of the etching device in the historical stage is collected. The sum of the durations of all operations of the etching time in the historical stage is calculated to obtain an operation duration value. The number of operations whose duration exceeds the preset duration threshold value in the historical stage is marked as a high operation frequency value. The interval time length between two adjacent maintenance time points is marked as an operation and maintenance interval value, all operation and maintenance interval values of the historical stage are calculated to obtain an operation and maintenance analysis value, and the number of operation and maintenance interval values that exceed a preset operation and maintenance interval threshold value of the historical stage is marked as a high operation and maintenance interval frequency value; The etching equipment evaluation value is obtained by performing numerical calculation on the production time length, the ring isomer detection value, the operation and maintenance analysis value, the high operation and maintenance interval frequency value, and the high operation and maintenance interval frequency value.

10. A method for optimizing chip etching process, characterized in that, The method adopts the chip etching process optimization system according to any one of claims 1-9.

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