Plasma processing device and power supply system

Abstract

Provided is a technology that makes it possible to improve plasma processing performance in a plasma processing device. This plasma processing device comprises: a chamber; a substrate support part which is disposed in the chamber and which has a lower electrode; an upper electrode which is disposed above the substrate support part; a lower voltage signal generator which is electrically connected to the lower electrode, which is configured to generate a lower voltage signal, and in which the lower voltage signal has a sequence of voltage pulses in a first period of a repetition cycle; an RF signal generator which is configured to generate an RF signal in order to generate plasma in the chamber; and an upper voltage signal generator which is electrically connected to the upper electrode, which is configured to generate an upper voltage signal, and in which the upper voltage signal has a gradient voltage pattern that gradually changes from a first voltage level to a second voltage level in the first period.

Description

Plasma processing apparatus and power supply system

[0001] SUMMARY OF THE INVENTION Exemplary embodiments of the present disclosure relate to plasma processing apparatuses and power supply systems.

[0002] In a plasma processing apparatus, a technique for supplying a DC signal to an upper electrode is disclosed in Japanese Patent Laid-Open No. 2003-222999.

[0003] US Patent Application Publication No. 2016 / 0064194

[0004] The present disclosure provides a technique capable of improving the plasma processing performance of a plasma processing apparatus.

[0005] In one exemplary embodiment of the present disclosure, a plasma processing apparatus includes a chamber, a substrate support disposed within the chamber and having a lower electrode, an upper electrode disposed above the substrate support, a lower voltage signal generator electrically connected to the lower electrode and configured to generate a lower voltage signal, the lower voltage signal having a sequence of voltage pulses during a first period of a repeating cycle, an RF signal generator configured to generate an RF signal to generate a plasma within the chamber, and an upper voltage signal generator electrically connected to the upper electrode and configured to generate an upper voltage signal, the upper voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level during the first period.

[0006] According to one exemplary embodiment of the present disclosure, it is possible to provide a technique capable of improving the plasma processing performance of a plasma processing apparatus.

[0007] FIG. 1 is a diagram for explaining an example of the configuration of a plasma processing system; FIG. 2 is a diagram for explaining an example of the configuration of a plasma processing apparatus; FIG. 3 is a diagram for explaining an example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 4 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 5 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 6 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 7 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 8 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 9 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle; FIG. 10 is a diagram for explaining an example of a third period of an upper voltage signal in a repeat cycle; FIG. 11 is a diagram for explaining another example of a source RF signal, a lower voltage signal, and an upper voltage signal in a repeat cycle;

[0008] Hereinafter, each embodiment of the present disclosure will be described.

[0009] In one exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support disposed within the chamber and having a lower electrode; an upper electrode disposed above the substrate support; a lower voltage signal generator electrically connected to the lower electrode and configured to generate a lower voltage signal, the lower voltage signal having a sequence of voltage pulses during a first period of a repeating cycle; an RF signal generator configured to generate an RF signal to generate a plasma within the chamber; and an upper voltage signal generator electrically connected to the upper electrode and configured to generate an upper voltage signal, the upper voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level during the first period.

[0010] In one exemplary embodiment, the absolute value of the first voltage level is greater than the absolute value of the second voltage level.

[0011] In one exemplary embodiment, the absolute value of the first voltage level is less than the absolute value of the second voltage level.

[0012] In one exemplary embodiment, each voltage pulse in the sequence of voltage pulses has a third voltage level.

[0013] In one exemplary embodiment, the first voltage level, the second voltage level, and the third voltage level have negative polarity.

[0014] In one exemplary embodiment, the lower voltage signal has a fourth voltage level during a second period of the repeating cycle, the absolute value of the fourth voltage level being less than the absolute value of the third voltage level.

[0015] In one exemplary embodiment, the upper voltage signal has a first voltage level during a second period of the repeating cycle.

[0016] In one exemplary embodiment, the RF signal has a first power level during a first time period and a second power level during a second time period, the first power level and the second power level being different.

[0017] In one exemplary embodiment, the first power level is greater than the second power level.

[0018] In one exemplary embodiment, the RF signal has a first power level during a first time period and a second time period.

[0019] In one exemplary embodiment, the RF signal has a first power level during a third period immediately preceding the first period, the lower voltage signal has a fourth voltage level during the third period, and the upper voltage signal has a ramped voltage pattern that gradually changes from a fifth voltage level to the first voltage level during the third period, and the absolute value of the first voltage level is less than the absolute value of the fifth voltage level.

[0020] In one exemplary embodiment, the third period is in the range of 2% to 7% of the total period included in the repeating cycle.

[0021] In one exemplary embodiment, the upper voltage signal has a second voltage level during a second period of the repeating cycle.

[0022] In one exemplary embodiment, the RF signal has a first power level during a first time period and a second power level during a second time period, the first power level and the second power level being different.

[0023] In one exemplary embodiment, the first power level is less than the second power level.

[0024] In one exemplary embodiment, the RF signal has a first power level during a first time period and a second time period.

[0025] In one exemplary embodiment, a power supply system is provided, comprising: a first voltage signal generator configured to generate a first voltage signal, the first voltage signal having a sequence of voltage pulses in a first period of a repeating cycle; and a second voltage signal generator configured to generate a second voltage signal, the second voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level in the first period.

[0026] In one exemplary embodiment, the absolute value of the first voltage level is greater than the absolute value of the second voltage level.

[0027] In one exemplary embodiment, each voltage pulse in the sequence of voltage pulses has a third voltage level.

[0028] In one exemplary embodiment, the first voltage level, the second voltage level, and the third voltage level have negative polarity.

[0029] Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. In each drawing, the same or similar elements are designated by the same reference numerals, and redundant explanations will be omitted. Unless otherwise specified, the positional relationships, such as up, down, left, and right, will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.

[0030] First Embodiment Example of a Plasma Processing System FIG. 1 is a diagram illustrating an example of the configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0031] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron cyclotron resonance (ECR) plasma, helicon wave plasma (HWP), or surface wave plasma (SWP). Various types of plasma generating units may be used, including alternating current (AC) plasma generating units and direct current (DC) plasma generating units. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Therefore, AC signals include RF (Radio Frequency) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0032] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various steps described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various steps described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 is realized by, for example, a computer 2a. The control unit 2 may include a processing unit 2a1, a memory unit 2a2, and a communication interface 2a3. The functions performed by the processing unit 2a1 described in this disclosure may be implemented in circuitry or processing circuitry, including general-purpose processors, application-specific processors, integrated circuits, ASICs (Application Specific Integrated Circuits), CPUs (Central Processing Units), conventional circuitry, and / or combinations thereof, programmed to perform the described functions. A processor is considered to be a circuit or processing circuit including transistors and other circuitry. The processor may also be a programmed processor that executes a program stored in the memory unit 2a2. This program may be stored in the memory unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The storage unit 2a2 may include a random access memory (RAM), a read-only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).In this disclosure, a circuit, unit, or means is hardware that is programmed to implement or configured to implement a described function. The hardware may be any hardware described in this disclosure or any hardware that is programmed to implement or known to implement the described function. If the hardware is a processor, which is considered a type of circuit, the circuit, means, or unit is a combination of hardware and software used to configure the hardware and / or processor.

[0033] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0034] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply system 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0035] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0036] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 may function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic chuck electrode 1111b disposed within the ceramic member 1111a. The electrostatic chuck electrode 1111b is also referred to as a clamping electrode. In one embodiment, the electrostatic chuck electrode 1111b is electrically connected or coupled to a chuck power supply. The chuck power supply may be a DC power supply or an AC power supply. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may be formed on another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. At least one bias electrode electrically connected to or coupled to a power supply 31 and / or a power supply 32 (described later) may be disposed within the ceramic member 1111a. In this case, the at least one bias electrode functions as a lower electrode. Alternatively, the conductive member of the base 1110 and the bias electrode within the ceramic member 1111a may function as multiple lower electrodes. In one embodiment, the first voltage generation unit 32a, which functions as a voltage pulse generation unit (described later), is electrically connected to or coupled to the bias electrode within the ceramic member 1111a, and the first RF generation unit 31a (described later) is electrically connected to or coupled to the conductive member of the base 1110. The electrostatic chuck electrode 1111b may function as a lower electrode. The substrate support 11 therefore comprises at least one bottom electrode.

[0037] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0038] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0039] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0040] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0041] The power supply system 30 includes a power supply 31 electrically connected or coupled to the plasma processing chamber 10. In one embodiment, the power supply 31 is electrically connected or coupled to the plasma processing chamber 10 via at least one impedance matcher. The impedance matcher may be a mechanically controlled matcher or an electronically controlled matcher. The power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0042] The power supply 31 includes a first RF generator 31a and a second RF generator 31b. The first RF generator 31a is electrically connected or coupled to at least one lower electrode and / or at least one upper electrode and is configured to generate a source RF signal (source RF power) to generate plasma in the plasma processing space 10s. In one embodiment, the first RF generator 31a is electrically connected or coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matcher. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generator 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0043] The second RF generator 31b is electrically connected or coupled to at least one lower electrode and configured to generate a bias RF signal (bias RF power). In one embodiment, the second RF generator 31b is electrically connected or coupled to at least one lower electrode via at least one impedance matcher. When the first RF generator 31a is electrically connected or coupled to a lower electrode, the second RF generator 31b may be electrically connected or coupled to the same lower electrode or to another lower electrode. The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0044] The power supply system 30 may also include a power supply 32 electrically connected or coupled to the plasma processing chamber 10. The power supply 32 includes a first voltage generator 32a and a second voltage generator 32b. In one embodiment, the first voltage generator 32a is electrically connected or coupled to at least one lower electrode and configured to generate a first voltage signal. The generated first voltage signal is applied to the at least one lower electrode. In one embodiment, the second voltage generator 32b is electrically connected or coupled to at least one upper electrode and configured to generate a second voltage signal. The generated second voltage signal is applied to the at least one upper electrode.

[0045] In various embodiments, the first and / or second voltage signals may be pulsed. In this case, the first voltage generator 32a and / or the second voltage generator 32b function as a voltage pulse generator configured to generate a sequence of voltage pulses. Thus, the sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. In one embodiment, the sequence of voltage pulses includes multiple cycles, each cycle including a burst of voltage pulses during a first period and a constant reference voltage during a second period. That is, the bursts of voltage pulses are repeated in the sequence of voltage pulses. The absolute value of the voltage level of the voltage pulses is greater than the absolute value of the voltage level of the reference voltage. The voltage pulses may have an arbitrary waveform, such as a rectangular, trapezoidal, triangular, or combination thereof, and the arbitrary waveform may vary over time. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive polarity voltage pulses and one or more negative polarity voltage pulses within one cycle. The first and second voltage generating units 32a and 32b may be provided in addition to the power supply 31, or the first voltage generating unit 32a may be provided instead of the second RF generating unit 31b.

[0046] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0047] In one embodiment, the first voltage generating unit 32a is configured to generate a lower voltage signal and supply it to the lower electrode. The second voltage generating unit 32b is configured to generate an upper voltage signal and supply it to the upper electrode. The first RF generating unit 31a is configured to generate a source RF signal and supply it to the lower electrode or the upper electrode. The first voltage generating unit 32a is an example of a lower voltage signal generator, and the second voltage generating unit 32b is an example of an upper voltage signal generator. The first RF generating unit 31a is an example of an RF signal generator. In one embodiment, as shown in FIG. 3 , the lower voltage signal, the upper voltage signal, and the source RF signal have a repeat cycle C(n) (n is an integer) that is repeated a given number of times. The lower voltage signal, the upper voltage signal, and the source RF signal have a common repeat cycle C(n). In one embodiment, each repeat cycle C(n) may have a first period T1 and a second period T2, in that order. In one embodiment, a repeating cycle C(n) consisting of a first period T1 and a second period T2 may be repeated a given number of times.

[0048] In one embodiment, the upper voltage signal generated by the second voltage generating unit 32b has a ramp voltage pattern S1 that gradually changes from a first voltage level (v1) to a second voltage level (v2) during a first period T1. In one embodiment, the ramp voltage pattern S1 changes linearly from the first voltage level (v1) to the second voltage level (v2) as a linear function. In one embodiment, the first voltage level (v1) and the second voltage level (v2) have negative polarities. In one embodiment, the absolute value of the first voltage level (v1) is greater than the absolute value of the second voltage level (v2). That is, the absolute value of the voltage of the ramp voltage pattern S1 gradually decreases from the first voltage level (v1) to the second voltage level (v2). The second voltage level (v2) may be greater than or equal to zero.

[0049] In one embodiment, the upper voltage signal has a constant first voltage level (v1) during the second time period T2.

[0050] In one embodiment, the lower voltage signal generated by the first voltage generating unit 32a has a sequence of voltage pulses SC1 in a first period T1. The sequence of voltage pulses SC1 includes a plurality of voltage pulses DP1. Each of the voltage pulses DP1 has a third voltage level (v3). The sequence of voltage pulses SC1 includes a third voltage level (v3) and a reference voltage level (v ｒｅｆ１ ) alternately. In one embodiment, the third voltage level (v3) has a negative polarity. The absolute value of the third voltage level (v3) is equal to or greater than the reference voltage level (v ｒｅｆ１ ) is greater than the absolute value of the reference voltage level (v ｒｅｆ１ ) may be at a zero voltage level. In one embodiment, each of the plurality of voltage pulses DP1 may have a rectangular pulse waveform. Note that each of the plurality of voltage pulses DP1 may have various pulse waveforms other than rectangular, such as trapezoidal, triangular, or a combination thereof. The lower voltage signal may have the sequence of voltage pulses SC1 continuously or intermittently in the first period T1.

[0051] In one embodiment, the lower voltage signal has a constant fourth voltage level (v4) during the second period T2. In one embodiment, the fourth voltage level (v4) is a constant voltage level (v ｒｅｆ１ The fourth voltage level (v4) may be a zero voltage level.

[0052] In one embodiment, the source RF signal generated by the first RF generator 31a has a first power level (p1) during a first time period T1 and a second power level (p2) during a second time period T2. The first power level (p1) and the second power level (p2) are different. The first power level (p1) is greater than the second power level (p2). The second power level (p2) may be greater than zero power level. Alternatively, the second power level (p2) may be zero power level.

[0053] <Example of Plasma Processing> Plasma processing is performed in the plasma processing apparatus 1. The plasma processing includes an etching process in which a film on a substrate W is etched using plasma. In one embodiment, the plasma processing is performed by the control unit 2 in the plasma processing apparatus 1.

[0054] In the plasma processing apparatus 1 shown in FIG. 2, first, the substrate W is carried into the chamber 10 by a transport arm, placed on the substrate support portion 11 by a lifter, and held on the substrate support portion 11 by suction.

[0055] Next, a processing gas is supplied to the plasma processing space 10s through the shower head 13 by the gas supply unit 20. The processing gas supplied at this time includes a gas that generates activated species necessary for etching the substrate W.

[0056] A source RF signal for generating plasma is generated by the first RF generator 31a and supplied to the upper electrode or the lower electrode. A lower voltage signal for attracting ion components in the plasma to the substrate is generated by the first voltage generator 32a and supplied to the lower electrode of the substrate support 11. An upper voltage signal for controlling the plasma state is generated by the second voltage generator 32b and supplied to the upper electrode. In this way, plasma is generated from the processing gas above the substrate support 11 in the plasma processing space 10s, and the substrate W is etched.

[0057] During plasma processing of each substrate W, as shown in Figure 3, the source RF signal, lower voltage signal, and upper voltage signal have a repeat cycle C(n). During a first period T1 of each repeat cycle C(n), the source RF signal has a first power level (p1). The lower voltage signal has a sequence of voltage pulses SC1, and each voltage pulse DP1 included in the sequence of voltage pulses SC1 has a third voltage level (v3). The upper voltage signal has a ramped voltage pattern S1 whose absolute value gradually decreases from a first voltage level (v1) to a second voltage level (v2).

[0058] During the second period T2 of each repeat cycle C(n), the source RF signal has a second power level (p2). The second voltage level (p2) is less than the first voltage level (p1). The lower voltage signal has a constant fourth voltage level (v4). The fourth voltage level (v4) may be a zero voltage level. The upper voltage signal has a constant first voltage level (v1). Then, the repeat cycle C(n) consisting of the first period T1 and the second period T2 is repeated a given number of times.

[0059] According to this exemplary embodiment, a plasma processing apparatus 1 includes a chamber 10, a substrate support 11, a first voltage generating unit 32a electrically connected to a lower electrode and configured to generate a lower voltage signal, a first RF generating unit 31a configured to generate an RF signal to generate plasma in the chamber 10, and a second voltage generating unit 32b electrically connected to an upper electrode and configured to generate an upper voltage signal. The lower voltage signal has a sequence of voltage pulses SC1 in a first period T1 of a repeating cycle C(n), and the upper voltage signal has a ramped voltage pattern S1 that gradually changes from a first voltage level (v1) to a second voltage level (v2) during the first period T1. Thus, during the first period T1 in which the lower voltage signal having the sequence of voltage pulses SC1 is supplied to the lower electrode, an upper voltage signal having the ramped voltage pattern S1 is supplied to the upper electrode. Thus, the plasma density (electron density), which varies due to the supply of the lower voltage signal, can be adjusted by the ramped voltage pattern S1 of the upper electrode signal. This makes it possible to suppress fluctuations in plasma density during plasma processing, which in turn suppresses fluctuations in the bias voltage applied to the substrate, thereby allowing plasma ions to be appropriately attracted to the substrate and improving plasma processing performance.

[0060] During the period when the bias voltage generated by the voltage pulse sequence is being applied to the lower electrode, the plasma density may gradually increase within the chamber 10. By applying a voltage whose absolute value gradually decreases to the upper electrode as in the above embodiment, the increase in plasma density can be suppressed.

[0061] In this embodiment, the ramp voltage pattern S1 of the upper voltage signal may change stepwise from a first voltage level (v1) to a second voltage level (v2) as shown in FIG. 4 . Alternatively, the ramp voltage pattern S1 may change exponentially in a curved manner as shown in FIG. 5 . Alternatively, the upper voltage signal may have the ramp voltage pattern S1 in part of the first period T1 as shown in FIG. 6 . In this case, the upper voltage signal may have a constant voltage level in parts other than the ramp voltage pattern S1 in the first period T1.

[0062] 7, the upper voltage signal generated by the second voltage generating unit 32b has a ramp voltage pattern S1 that gradually changes from a first voltage level (v1) to a second voltage level (v2) during a first period T1, and the absolute value of the first voltage level (v1) may be smaller than the absolute value of the second voltage level (v2). That is, the absolute value of the voltage of the ramp voltage pattern S1 may gradually increase from the first voltage level (v1) to the second voltage level (v2).

[0063] The upper voltage signal may have a ramp voltage pattern in the second period T2 in addition to the first period T1. In this case, the absolute value of the voltage of the ramp voltage pattern may gradually increase or decrease. The ramp voltage pattern in the second period T2 may be a ramp voltage pattern that is linearly continuous with the ramp voltage pattern S1 in the first period T1, or may be a ramp voltage pattern that is discontinuous with the ramp voltage pattern S1.

[0064] In this embodiment, as shown in FIG. 8, the source RF signal may have a constant first power level (p1) that is above a zero power level during a first time period T1 and a second time period T2.

[0065] In this embodiment, as shown in Figure 9, the first power level (p1) of the source RF signal may be less than the second power level (p2). In this case, the first power level (p1) may be greater than zero power level, or may be zero power level.

[0066] In this embodiment, the source RF signal may have a sequence of power pulses in a first period T1 and / or a second period T2. Each power pulse in the sequence of power pulses may have a first power level (p1) or a second power level (p2). In the first period T1, the power pulses of the source RF signal and the voltage pulses DP1 of the lower voltage signal may be supplied synchronously. The power pulses of the source RF signal and the voltage pulses DP1 of the lower voltage signal may be supplied alternately.

[0067] In this embodiment, as shown in FIG. 10 , the repeat cycle C(n) may have a third period T3 immediately before the first period T1. The third period T3 may be within a range of 2% to 7% of the total period included in the repeat cycle C(n). The repeat cycle C(n) has the third period T3, the first period T1, and the second period T2 in this order, and the repeat cycle C(n) consisting of the third period T3, the first period T1, and the second period T2 may be repeated a given number of times. In this example, the source RF signal has a first power level (p1) in the third period T3. The lower voltage signal has a fourth voltage level (v4) in the third period T3. The fourth voltage level (v4) is a reference voltage level (v ｒｅｆ１) The fourth voltage level (v4) may be a zero voltage level. The upper voltage signal has a ramped voltage pattern S2 that gradually changes from a fifth voltage level (v5) to the first voltage level (v1) during the third period T3. The absolute value of the first voltage level (v1) is less than the absolute value of the fifth voltage level (v5). That is, the ramped voltage pattern S2 gradually decreases in absolute value from the fifth voltage level (v5) to the first voltage level (v1). In one embodiment, the upper voltage signal may have a constant fifth voltage level (v5) during the second period T2. Note that the upper voltage signal may have a constant first voltage level (v1) during the third period T3. According to this example, the third period T3 provides a source RF signal before the start of the sequence of voltage pulses. As a result, during the third period T3, while plasma is generated by the source RF signal, ions are not attracted by the voltage pulse sequence, and a sufficient protective film is formed on the substrate surface during this period. As a result, the etching selectivity can be improved. Furthermore, by starting the voltage pulse sequence while plasma is generated, the rise of the voltage pulse is stabilized. This allows ions to be attracted smoothly by the voltage pulse sequence, which allows ions to penetrate deep into the film to be etched, improving the verticality of the etching.

[0068] Second Embodiment In one embodiment, as shown in Figure 11, a repeating cycle C(n) may have a second period T2 and a first period T1, in that order. In this example, the upper voltage signal has a second voltage level (v2) during the second period T2. The second voltage level (v2) may be a constant value greater than zero voltage level. Alternatively, the second voltage level (v2) may be zero voltage level.

[0069] The upper voltage signal has a ramp voltage pattern S1 during a first period T1. The ramp voltage pattern S1 gradually changes from a first voltage level (v1) to a second voltage level (v2). The absolute value of the first voltage level (v1) is greater than the absolute value of the second voltage level (v2), and the absolute value of the voltage of the ramp voltage pattern S1 gradually decreases from the first voltage level (v1) to the second voltage level (v2).

[0070] The lower voltage signal has a constant fourth voltage level (v4) in the second time period T2. The fourth voltage level (v4) may be a zero voltage level. The lower voltage signal has a sequence of voltage pulses SC1 in the first time period T1. The sequence of voltage pulses SC1 includes a plurality of voltage pulses DP1. Each of the voltage pulses DP1 has a third voltage level (v3). The sequence of voltage pulses SC1 includes a third voltage level (v4) and a reference voltage level (v5). ｒｅｆ１ ) alternately. In one embodiment, the third voltage level (v3) has a negative polarity. The absolute value of the third voltage level (v3) is equal to or greater than the reference voltage level (v ｒｅｆ１ ) is greater than the absolute value of the reference voltage level (v ｒｅｆ１ ) may be a zero voltage level. The fourth voltage level (v4) may be a reference voltage level (v ｒｅｆ１ The lower voltage signal may comprise a sequence of voltage pulses SC1 continuously or intermittently during the first period T1.

[0071] The source RF signal has a second power level (p2) in the second period T2 and a first power level (p1) in the first period T1. The first power level (p1) and the second power level (p2) are different. The first power level (p1) may be lower than the second power level (p2). Alternatively, the source RF signal may have the same power level (the first power level (p1) or the second power level (v2)) in the first period T1 and the second period T2. Furthermore, the first power level (p1) in the first period T1 may be higher than the second power level (p2) in the second period T2. In addition, the implementations described in the first embodiment above may be applied to the second embodiment.

[0072] In the first and second embodiments described above, a capacitively coupled plasma device has been described as an example, but the present invention is not limited thereto and may be applied to other plasma devices. For example, an inductively coupled plasma device may be used instead of the capacitively coupled plasma device. In this case, the inductively coupled plasma device includes an antenna and a lower electrode. The lower electrode is disposed within the substrate support, and the antenna is disposed above or at the top of the chamber. In this case, in one embodiment, the first RF generator 31 a and the second voltage generator 32 b may be electrically connected to the antenna, and the second RF generator 31 b and the first voltage generator 32 a may be electrically connected to the lower electrode.

[0073] Embodiments of the present disclosure further include the following aspects.

[0074] (Supplementary Note 1) A plasma processing apparatus comprising: a chamber; a substrate support disposed within the chamber and having a lower electrode; an upper electrode disposed above the substrate support; a lower voltage signal generator electrically connected to the lower electrode and configured to generate a lower voltage signal, the lower voltage signal having a sequence of voltage pulses during a first period of a repeating cycle; an RF signal generator configured to generate an RF signal to generate a plasma in the chamber; and an upper voltage signal generator electrically connected to the upper electrode and configured to generate an upper voltage signal, the upper voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level during the first period.

[0075] (Supplementary Note 2) The plasma processing apparatus according to Supplementary Note 1, wherein an absolute value of the first voltage level is greater than an absolute value of the second voltage level.

[0076] (Supplementary Note 3) The plasma processing apparatus according to Supplementary Note 1, wherein an absolute value of the first voltage level is smaller than an absolute value of the second voltage level.

[0077] (Supplementary Note 4) The plasma processing apparatus according to Supplementary Note 1 or 2, wherein each voltage pulse included in the sequence of voltage pulses has a third voltage level.

[0078] (Supplementary Note 5) The plasma processing apparatus according to Supplementary Note 4, wherein the first voltage level, the second voltage level, and the third voltage level have negative polarities.

[0079] (Supplementary Note 6) The plasma processing apparatus according to Supplementary Note 4 or 5, wherein the lower voltage signal has a fourth voltage level during a second period of the repeating cycle, and an absolute value of the fourth voltage level is smaller than an absolute value of the third voltage level.

[0080] (Supplementary Note 7) The plasma processing apparatus of any one of Supplementary Notes 1 to 6, wherein the upper voltage signal has the first voltage level during a second period of the repeating cycle.

[0081] (Supplementary Note 8) The plasma processing apparatus according to any one of Supplementary Notes 1 to 7, wherein the RF signal has a first power level during the first period and a second power level during the second period, and the first power level and the second power level are different.

[0082] (Supplementary Note 9) The plasma processing apparatus according to Supplementary Note 8, wherein the first power level is greater than the second power level.

[0083] (Supplementary Note 10) The plasma processing apparatus according to any one of Supplementary Notes 1 to 7, wherein the RF signal has a first power level during the first period and the second period.

[0084] (Supplementary Note 11) The plasma processing apparatus of any one of Supplementary Notes 1 to 10, wherein the RF signal has the first power level during a third period immediately before the first period, the lower voltage signal has a fourth voltage level during the third period, the upper voltage signal has a ramp voltage pattern that gradually changes from a fifth voltage level to the first voltage level during the third period, and the absolute value of the first voltage level is smaller than the absolute value of the fifth voltage level.

[0085] (Supplementary Note 12) The plasma processing apparatus according to Supplementary Note 11, wherein the third period is within a range of 2% to 7% of the total period included in the repeating cycle.

[0086] (Supplementary Note 13) The plasma processing apparatus of any one of Supplementary Notes 1 to 6, wherein the upper voltage signal has the second voltage level during a second period of the repeating cycle.

[0087] (Supplementary Note 14) The plasma processing apparatus according to Supplementary Note 13, wherein the RF signal has a first power level during the first period and a second power level during the second period, and the first power level and the second power level are different.

[0088] (Supplementary Note 15) The plasma processing apparatus according to Supplementary Note 14, wherein the first power level is lower than the second power level.

[0089] (Supplementary Note 16) The plasma processing apparatus of Supplementary Note 13, wherein the RF signal has a first power level during the first period and the second period.

[0090] (Supplementary Note 17) A power supply system comprising: a first voltage signal generator configured to generate a first voltage signal, the first voltage signal having a sequence of voltage pulses in a first period of a repeating cycle; and a second voltage signal generator configured to generate a second voltage signal, the second voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level in the first period.

[0091] (Supplementary Note 18) The power supply system according to Supplementary Note 17, wherein an absolute value of the first voltage level is greater than an absolute value of the second voltage level.

[0092] (Supplementary Note 19) The power supply system of Supplementary Note 17 or 18, wherein each voltage pulse included in the first sequence of voltage pulses has a third voltage level.

[0093] (Supplementary Note 20) The power supply system according to Supplementary Note 19, wherein the first voltage level, the second voltage level, and the third voltage level have negative polarity.

[0094] The above embodiments are described for the purpose of explanation and are not intended to limit the scope of the present disclosure. Various modifications can be made to the above embodiments without departing from the scope and spirit of the present disclosure. For example, some components in one embodiment can be added to other embodiments. Also, some components in one embodiment can be replaced with corresponding components in other embodiments.

[0095] 1: Plasma processing apparatus, 10: Chamber, 11: Substrate support, 31a: First RF generator, 32a: First voltage generator, 32b: Second voltage generator, C(n): Repeat cycle, T1: First period, T2: Second period, S1: Ramp voltage pattern, SC1: Sequence of voltage pulses, DP1: Voltage pulse, W: Substrate

Claims

1. A plasma processing apparatus comprising: a chamber; a substrate support disposed within the chamber and having a lower electrode; an upper electrode disposed above the substrate support; a lower voltage signal generator electrically connected to the lower electrode and configured to generate a lower voltage signal, the lower voltage signal having a sequence of voltage pulses during a first period of a repeating cycle; an RF signal generator configured to generate an RF signal to generate a plasma within the chamber; and an upper voltage signal generator electrically connected to the upper electrode and configured to generate an upper voltage signal, the upper voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level during the first period.

2. The plasma processing apparatus according to claim 1, wherein the absolute value of the first voltage level is greater than the absolute value of the second voltage level.

3. The plasma processing apparatus according to claim 1, wherein the absolute value of the first voltage level is smaller than the absolute value of the second voltage level.

4. The plasma processing apparatus of claim 2, wherein each voltage pulse in the sequence of voltage pulses has a third voltage level.

5. The plasma processing apparatus of claim 4, wherein the first voltage level, the second voltage level, and the third voltage level have negative polarities.

6. The plasma processing apparatus of claim 5, wherein the lower voltage signal has a fourth voltage level during a second period of the repeating cycle, and the absolute value of the fourth voltage level is less than the absolute value of the third voltage level.

7. The plasma processing apparatus of claim 5, wherein the upper voltage signal has the first voltage level during a second period of the repeating cycle.

8. The plasma processing apparatus of claim 7, wherein the RF signal has a first power level during the first time period and a second power level during the second time period, and the first power level and the second power level are different.

9. The plasma processing apparatus of claim 8, wherein the first power level is greater than the second power level.

10. The plasma processing apparatus of claim 7, wherein the RF signal has a first power level during the first time period and the second time period.

11. The plasma processing apparatus of claim 8, wherein the RF signal has the first power level during a third period immediately preceding the first period, the lower voltage signal has a fourth voltage level during the third period, the upper voltage signal has a ramp voltage pattern that gradually changes from a fifth voltage level to the first voltage level during the third period, and the absolute value of the first voltage level is smaller than the absolute value of the fifth voltage level.

12. The plasma processing apparatus according to claim 11, wherein the third period is within a range of 2% to 7% of the total period included in the repeating cycle.

13. The plasma processing apparatus of claim 5, wherein the upper voltage signal has the second voltage level during a second period of the repeating cycle.

14. The plasma processing apparatus of claim 13, wherein the RF signal has a first power level during the first time period and a second power level during the second time period, and the first power level and the second power level are different.

15. The plasma processing apparatus of claim 14, wherein the first power level is less than the second power level.

16. The plasma processing apparatus of claim 13, wherein the RF signal has a first power level during the first time period and the second time period.

17. A power supply system comprising: a first voltage signal generator configured to generate a first voltage signal, the first voltage signal having a sequence of voltage pulses during a first period of a repeating cycle; and a second voltage signal generator configured to generate a second voltage signal, the second voltage signal having a ramped voltage pattern that gradually changes from a first voltage level to a second voltage level during the first period.

18. The power supply system of claim 17, wherein the absolute value of the first voltage level is greater than the absolute value of the second voltage level.

19. The power system of claim 18, wherein each voltage pulse in the sequence of voltage pulses has a third voltage level.

20. The power supply system of claim 19, wherein the first voltage level, the second voltage level, and the third voltage level have negative polarity.

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