Packaging structure for chip module and packaging method therefor

Abstract

Provided in the present invention are a packaging structure for a chip module and a packaging method therefor. The packaging structure comprises a substrate, at least one filter chip, a separation film and a molding compound layer. The filter chip is disposed on the substrate, the front surface of the filter chip faces the substrate, and a first gap is formed between the filter chip and the substrate; the separation film covers the side wall and the back surface of the filter chip and part of the surface of the substrate, so as to encapsulate the first gap and form a sealed first cavity between the filter chip and the substrate, and a second gap is provided between the edge of the separation film and the edge of the substrate; and the molding compound layer covers the remaining surface of the substrate and the separation film. Due to the second gap between the edge of the separation film and the edge of the substrate, the separation film is wrapped by the molding compound layer without being exposed to the air. When the packaging structure for a chip module operates in a high-humidity environment, water vapor cannot penetrate into the first cavity by means of the separation film, thereby avoiding the problem of performance degradation or even failure of the filter chip.

Description

Chip module packaging structure and packaging method Technical Field

[0001] This invention relates to the field of chip packaging technology, and in particular to a chip module packaging structure and packaging method. Background Technology

[0002] Surface Acoustic Wave Filter (SAW Filter) is one of the core components in the field of radio frequency communication. It uses sound waves to transmit on the front side of the chip to achieve its function. Therefore, the packaging of SAW filter chips must ensure that the surface of the interdigital transducers (the working sensors of the SAW filter) on the front side of the chip cannot come into contact with other materials. In other words, it is necessary to ensure that there is enough cavity on the front side of the chip, otherwise the signal transmission will be affected.

[0003] Existing surface acoustic wave (SAW) filter modules mostly employ BDMP (Bare Die Module Package) packaging technology. This involves first mounting the filter chip onto a substrate, then attaching a separator to the substrate surface, the filter chip's sidewalls, and the top surface to form a cavity. Next, molding compound is filled into the substrate to form a molding layer, and finally, the package is cut to create a separate encapsulation structure. This method effectively reduces costs. However, after cutting, the separator is exposed from the sidewalls of the encapsulation structure. Because the separator has a high water absorption rate, when the product operates in a high-humidity environment, moisture can penetrate through the separator into the cavity on the front of the filter chip, contaminating the interdigital transducers and leading to performance degradation or even product failure. Summary of the Invention

[0004] The purpose of this invention is to provide a chip module packaging structure and packaging method to solve the problem that the cavity on the front of existing filter chips is easily invaded by moisture.

[0005] To achieve the above objectives, the present invention provides a chip module packaging structure, comprising:

[0006] substrate;

[0007] At least one filter chip is disposed on the substrate, the front side of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate;

[0008] A separator film covers the sidewalls and back surface of the filter chip and a portion of the surface of the substrate to enclose the first gap, thereby forming a sealed first cavity between the filter chip and the substrate; a second gap exists between the edge of the separator film and the edge of the substrate; and...

[0009] A molding layer covers the remaining surface of the substrate and the separator film.

[0010] Optionally, the separator is a dry film or a photosensitive film.

[0011] Optionally, the width of the second gap is 50 micrometers to 100 micrometers.

[0012] Optionally, the packaging structure of the chip module further includes:

[0013] At least one non-filter chip is disposed on the substrate, the electrode surface of the non-filter chip facing the substrate and having a third gap between it and the substrate; and,

[0014] The separator also covers the sidewalls and non-electrode surfaces of the non-filter chip, and the separator has a break around the non-filter chip, through which the encapsulation layer fills the third gap.

[0015] Optionally, the packaging structure of the chip module further includes:

[0016] A solder resist layer covers the non-soldering area of ​​the substrate, and the separator film is disposed on the solder resist layer.

[0017] Optionally, the edge of the solder mask layer is aligned with the edge of the substrate.

[0018] Optionally, the portion of the solder resist layer covered by the separator film is a first portion, and the portion of the solder resist layer outside the first portion is a second portion, wherein the thickness of the first portion is greater than the thickness of the second portion.

[0019] Optionally, the edge of the solder resist layer has a fourth gap with the edge of the substrate.

[0020] Optionally, the width of the second gap is equal to that of the fourth gap, so that the edge of the separator film is aligned with the edge of the solder resist layer.

[0021] The present invention also provides a chip module packaging method, comprising:

[0022] Provide substrate;

[0023] At least one filter chip is disposed on the substrate, with the front side of the filter chip facing the substrate and having a first gap between it and the substrate;

[0024] A separator is attached to the sidewall and back of the filter chip and the substrate, and the separator seals the first gap, so that a sealed first cavity is formed between the filter chip and the substrate;

[0025] Remove the separating membrane from the edge of each module area to form a separating groove;

[0026] A molding compound is formed, the molding compound covering the separator film and filling the separator groove; and,

[0027] The molding layer and the substrate are cut along the partition groove to obtain the package structure of the chip module. In each package structure of the chip module, there is a second gap between the edge of the partition film and the edge of the substrate.

[0028] Optionally, the separator film is a dry film, and the separator film at the edge of each module area is removed using a laser film removal process; or, the separator film is a photosensitive film, and the separator film at the edge of each module area is removed using an exposure and development process.

[0029] Optionally, when the filter chip is disposed on the substrate, at least one non-filter chip is also disposed on the substrate, the electrode surface of the non-filter chip facing the substrate and having a third gap between it and the substrate;

[0030] When the separator film is attached to the sidewalls and back surface of the filter chip and the substrate, the separator film is also attached to the sidewalls and non-electrode surfaces of the non-filter chip, and the separator film further encapsulates the third gap; and,

[0031] After the separator film is attached, the separator film is controlled to break around the non-filter chip, thereby forming a break, so that after the molding compound is formed, the molding compound passes through the break to fill the third gap.

[0032] Optionally, before placing the filter chip on the substrate, a solder resist layer is also formed in the non-soldering area of ​​the substrate.

[0033] Optionally, after the solder resist layer is formed, the solder resist layer covers the substrate at the edge of each module region.

[0034] Optionally, after removing the separator film at the edge of each module region, a portion of the thickness of the solder resist layer within the separator groove is also removed.

[0035] Optionally, after removing the separator film at the edge of each of the module regions, at least a portion of the solder resist layer within the separator groove is also removed until the substrate is exposed, such that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

[0036] Optionally, after the solder resist layer is formed, the solder resist layer does not cover the substrate at the edge of each module region, such that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

[0037] Optionally, the width of the dividing groove is greater than the cutting offset accuracy for cutting the molding layer and the substrate.

[0038] The chip module packaging structure and packaging method provided by this invention include a substrate, at least one filter chip, a separator film, and a molding compound. The filter chip is disposed on the substrate, with its front side facing the substrate and having a first gap between it and the substrate. The separator film covers the sidewalls and back side of the filter chip, as well as a portion of the substrate surface, to encapsulate the first gap, forming a sealed first cavity between the filter chip and the substrate. A second gap exists between the edge of the separator film and the edge of the substrate. The molding compound covers the remaining surface of the substrate and the separator film. Because of the second gap between the edge of the separator film and the edge of the substrate, the separator film is encapsulated by the molding compound and is not exposed to air. When the chip module packaging structure operates in a high-humidity environment, moisture will not penetrate into the first cavity through the separator film, avoiding the problem of performance degradation or even failure of the filter chip. Attached Figure Description

[0039] Figure 1 is a flowchart of the chip module packaging method provided in Embodiment 1 of the present invention;

[0040] Figures 2 to 6 are schematic diagrams of the corresponding steps of the chip module packaging method provided in Embodiment 1 of the present invention, wherein Figure 6 is a schematic diagram of the packaging structure of the chip module provided in Embodiment 1 of the present invention.

[0041] Figures 7 and 8 are schematic diagrams of the corresponding steps of the chip module packaging method provided in Embodiment 2 of the present invention, wherein Figure 8 is a schematic diagram of the packaging structure of the chip module provided in Embodiment 2 of the present invention.

[0042] Figures 9 and 10 are schematic diagrams of the corresponding steps of the chip module packaging method provided in Embodiment 3 of the present invention, wherein Figure 10 is a schematic diagram of the packaging structure of the chip module provided in Embodiment 3 of the present invention.

[0043] Figures 11 to 13 are schematic diagrams of the corresponding steps of the chip module packaging method provided in Embodiment 4 of the present invention.

[0044] In the attached figures, the reference numerals are as follows: 100-substrate; 200-solder resist layer; 301-filter chip; 302-non-filter chip; 300a-first cavity; 300b-second cavity; 300c-break; 400-bump; 500-separator membrane; 500a-separator groove; 600-molding layer; H1-first gap; H2-second gap; H3-third gap; H4-fourth gap. Detailed Implementation

[0045] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0046] Example 1

[0047] Figure 6 is a schematic diagram of the packaging structure of the chip module provided in this embodiment. As shown in Figure 6, the packaging structure of the chip module includes:

[0048] substrate 100;

[0049] At least one filter chip 301 is disposed on the substrate 100, the front side of the filter chip 301 faces the substrate 100, and there is a first gap H1 between the filter chip 301 and the substrate 100;

[0050] A separator 500 covers the sidewalls and back surface of the filter chip 301 and a portion of the surface of the substrate 100 to enclose the first gap H1, thereby forming a sealed first cavity 300a between the filter chip 301 and the substrate 100. A second gap H2 exists between the edge of the separator 500 and the edge of the substrate 100.

[0051] A molding layer 600 covers the remaining surface of the substrate 100 and the separator film 500.

[0052] Referring again to Figure 6, specifically, the substrate 100 has a circuit structure, and the substrate 100 is provided with a plurality of pads (not shown in Figure 6) electrically connected to the circuit structure. Preferably, there are multiple pads, and the pads may include those for electrical connection to the filter chip 301, and may also be used for electrical connection to other components (such as non-filter chip 302). The substrate 100 can be a high-temperature sintered ceramic substrate (HTCC), a printed circuit board, or an LTCC substrate.

[0053] In this embodiment, a solder resist layer 200 is further disposed on the substrate 100. The solder resist layer 200 covers the non-soldering area of ​​the substrate 100, which is the area on the substrate 100 excluding the solder pads. The solder resist layer 200 prevents solder crosstalk between the solder pads on the substrate 100, thus avoiding short circuits. Optionally, the material of the solder resist layer 200 is typically solder mask.

[0054] Furthermore, in this embodiment, the edge of the solder mask layer 200 is aligned with the edge of the substrate 100.

[0055] The filter chip 301 may be a surface acoustic wave (SAW) filter chip, which includes a front side and a back side facing each other and a sidewall connecting the front side and the back side. The front side of the filter chip 301 is provided with other functional elements such as interdigital transducers, and the front side of the filter chip 301 faces the substrate 100.

[0056] In this embodiment, the chip module's packaging structure further includes a non-filter chip 302. The non-filter chip 302 refers to other ordinary chips besides the filter chip 301, such as power amplifiers, low-noise amplifiers, etc. The non-filter chip 302 includes opposing electrode surfaces and non-electrode surfaces, as well as sidewalls connecting the electrode surfaces and non-electrode surfaces. Electrodes are disposed on the electrode surfaces of the non-filter chip 302, and the electrode surfaces of the non-filter chip 302 face the substrate 100.

[0057] In some embodiments, the electrode surface of the non-filter chip 302 can be either the front or the back of the non-filter chip 302. That is, the non-filter chip 302 can face the substrate 100 with its front side facing it or with its back side facing it.

[0058] It should be noted that Figure 6 only schematically shows one filter chip 301 and one non-filter chip 302. However, it should be understood that the number of filter chips 301 and non-filter chips 302 should not be limited to this; the number of filter chips and non-filter chips 302 can be designed according to actual conditions, and will not be listed here. Of course, the chip module's packaging structure may also contain non-chip components, such as resistors and capacitors.

[0059] Furthermore, both the filter chip 301 and the non-filter chip 302 have a plurality of bumps 400 on their front sides, which can be solder balls or metal pillars. The filter chip 301 and the non-filter chip 302 can be electrically connected to corresponding pads on the substrate 100 via flip-chip die bonding (FC Die Bond) or similar methods, thereby fixing the filter chip 301 and the non-filter chip 302 onto the substrate 100. Because the bumps 400 have a certain height, a first gap H1 exists between the front side of the filter chip 301 and the substrate 100, and a third gap H3 exists between the electrode surface of the non-filter chip 302 and the substrate 100. The heights of the first gap H1 and the third gap H3 may not be equal.

[0060] Please refer to Figure 6. The separator 500 covers the sidewalls and back of the filter chip 301 and a portion of the surface of the substrate 100 (specifically, a portion of the surface of the solder resist layer 200 in this embodiment) to encapsulate the first gap H1, forming a first cavity 300a that accommodates the interdigital transducer. The first cavity 300a is a sealed space. The separator 500 can isolate the molding compound 600 outside the first cavity 300a, preventing the injection molding material from entering the first cavity 300a during the molding of the molding compound 600.

[0061] Of course, in this embodiment, the separator 500 also covers the sidewalls and back surface of the non-filter chip 302 to encapsulate the third gap H3. The separator 500 has a break 300c around the non-filter chip 302, and the break 300c can be arranged around the non-filter chip 302. The molding compound 600 passes through the break 300c to fill the third gap H3. The molding compound 600 within the third gap H3 can support the non-filter chip 302, achieving bottom filling of the non-filter chip 302, thereby ensuring the reliability of the non-filter chip 302.

[0062] Furthermore, the separator 500 does not completely cover the substrate 100, and a second gap H2 exists between the edge of the separator 500 and the edge of the substrate 100. The edge of the separator 500 is not aligned with the edge of the substrate 100. Thus, the separator 500 is encapsulated by the molding compound 600 and is not exposed to air. When the chip module's packaging structure operates in a high-humidity environment, moisture will not penetrate the first cavity 300a through the separator 500, preventing performance degradation or even failure of the chip module.

[0063] It should be noted that the edge of the separator 500 refers to the entire edge of the separator 500, and the second gap H2 refers to the gap between the edge of the projection of the entire separator 500 onto the substrate 100 and the edge of the substrate 100.

[0064] It should be noted that, since the chip module is a BDMP module, it is necessary to ensure that the separator film 500 encapsulates the first gap H1 to form the first cavity 300a. Therefore, the width of the second gap H2 should not be too large; furthermore, in order to allow for processing allowance during the packaging process, the width of the second gap H2 cannot be too small. Therefore, the width of the second gap H2 is preferably 50 micrometers to 100 micrometers, but should not be limited to this. The width of the second gap H2 can also be considered in relation to the cutting offset accuracy. Currently, the cutting offset accuracy is usually 50 micrometers, so the width of the second gap H2 can be 100 micrometers.

[0065] In this embodiment, the separator 500 can be a dry film or a photosensitive film. When the separator 500 is a dry film, the cost is low and the process is mature. When the separator 500 is a photosensitive film, the process for forming the second gap H2 between the edge of the separator 500 and the edge of the substrate 100 is more controllable. The dry film is typically made of a polymer material, while the photosensitive film can be made of a polymer material with photosensitive properties.

[0066] Furthermore, the molding compound 600 covers the remaining surface of the substrate 100 (specifically, the remaining surface of the solder resist layer 200 in this embodiment) and the separator 500. The separator 500 isolates the molding compound 600 outside the first cavity 300a, preventing the interdigital transducer from being contaminated by the molding compound; simultaneously, the molding compound 600 enters the third gap H3 through the break 300c, thereby supporting the non-filter chip 302 and ensuring the stability of the non-filter chip 302.

[0067] Optionally, the material of the molding layer 600 is preferably epoxy molding compound, but it can also be other possible materials.

[0068] Based on this, this embodiment provides a chip module packaging method, and Figure 1 is a flowchart of the chip module packaging method provided in this embodiment. As shown in Figure 1, the chip module packaging method includes:

[0069] Step S100: Provide a substrate;

[0070] Step S200: At least one filter chip is disposed on the substrate, the front side of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate;

[0071] Step S300: Attach the separator film to the sidewall and back of the filter chip and the substrate, the separator film encapsulating the first gap, so that a sealed first cavity is formed between the filter chip and the substrate;

[0072] Step S400: Remove the separator film at the edge of each module area to form a separator groove;

[0073] Step S500: Forming a molding compound layer that covers the separator film and fills the separator groove; and,

[0074] Step S600: Cut the molding layer and the substrate along the partition groove to obtain the package structure of the chip module. In each package structure of the chip module, there is a second gap between the edge of the partition film and the edge of the substrate.

[0075] Figures 2 to 6 are schematic diagrams showing the corresponding steps of the chip module packaging method provided in this embodiment. Next, the chip module packaging method provided in this embodiment will be described in detail with reference to Figures 2 to 6.

[0076] As shown in Figure 2, in step S100, the substrate 100 is provided. The substrate 100 has a circuit structure and a plurality of pads (not shown in Figure 2) electrically connected to the circuit structure are provided on the substrate 100. The substrate 100 can be a wafer at this time.

[0077] Please continue referring to Figure 2, where the solder resist layer 200 is formed in the non-soldering area of ​​the substrate 100. The solder resist layer 200 can be formed in the non-soldering area of ​​the substrate 100 by screen printing. At this time, the solder resist layer 200 covers the edge of the substrate 100 of each module area (only one module area is shown in Figure 2).

[0078] As shown in Figure 3, in step S200, at least one filter chip 301 is provided. The front side of the filter chip 301 has the bumps 400. The bumps 400 on the front side of the filter chip 301 are electrically connected to the corresponding pads on the substrate 100 by means of flip-chip bonding or the like, thereby placing the filter chip 301 on the substrate 100. The front side of the filter chip 301 faces the substrate 100, and there is a first gap H1 between the filter chip 301 and the substrate 100.

[0079] Please refer to Figure 3. Meanwhile, at least one non-filter chip 302 is provided. The electrode surface of the filter chip 301 also has the bumps 400. The bumps 400 on the front side of the non-filter chip 302 are electrically connected to corresponding pads on the substrate 100 by flip-chip bonding or other methods, thereby placing the non-filter chip 302 on the substrate 100. The electrode surface of the non-filter chip 302 faces the substrate 100, and a third gap H3 exists between it and the substrate 100.

[0080] As shown in Figure 4, in step S300, the separator 500 is attached to the sidewall and back surface of the filter chip 301 and the substrate 100. The separator 500 conformally covers the filter chip 301 and the solder mask layer 200. The separator 500 encloses the first gap H1, forming a sealed first cavity 300a between the filter chip 301 and the substrate 100.

[0081] Referring to Figure 4, when the separator 500 is attached to the sidewalls and back surface of the filter chip 301 and the substrate 100, the separator 500 is also attached to the sidewalls and non-electrode surfaces of the non-filter chip 302. Similarly, the separator 500 also encapsulates the third gap H3, forming a sealed second cavity 300b between the non-filter chip 302 and the substrate 100.

[0082] In some embodiments, the separator 500 is a dry film, which can be attached using a dry film bonding process. The specific process flow of the dry film bonding process is a well-established technology and will not be described in detail here. In some embodiments, the separator 500 is a photosensitive film, which can also be attached using a process similar to the dry film bonding process.

[0083] As shown in Figure 5, in step S400, the separator film 500 at the edge of each module region is removed to form the separator groove 500a. For each module region, the separator groove 500a surrounds the module region, thereby separating adjacent module regions. It is understood that the module region is the area occupied by each chip module on the substrate 100. Since only one module region is shown in Figure 5, the separator groove 500a has only one sidewall. However, it should be understood that the separator groove 500a between two adjacent module regions should have two sidewalls, while at the edge of the substrate 100, the separator groove 500a may have only one sidewall.

[0084] In some embodiments, the separator film 500 is a dry film, and a laser stripping process can be used to remove the separator film 500 at the edge of each module area. Specifically, the laser stripping process uses a laser device to generate a laser beam, which is then directed to a designated location on the separator film 500 to remove the separator film 500 at that location. In some embodiments, the separator film 500 is a photosensitive film, and an exposure and development process can be used to remove the separator film 500 at the edge of each module area. Specifically, a photomask can be used to cover the area of ​​the separator film 500 that is not desired to be removed, exposing the area to be removed. After exposure and development, the separator film 500 at the designated location can be removed.

[0085] As shown in Figure 6, the separator 500 is controlled to rupture around the non-filter chip 302, thereby forming a fracture 300c. For example, the height difference between the first gap H1 and the third gap H3 can be designed, such as the height of the first gap H1 being less than 40 micrometers and the height of the third gap H3 being greater than 50 micrometers. When the separator 500 is hot-pressed, under a certain pressure, only the separator 500 around the non-filter chip 302 will rupture, forming the fracture 300c, while the separator 500 around the filter chip 301 will not rupture.

[0086] Next, step S500 is performed, in which a molding compound is filled onto the substrate 100. After the molding compound cures, it forms the molding layer 600, which covers the separator film 500 and fills the separator groove 500a. During the filling of the molding compound, the molding compound also enters and fills the third gap H3. Therefore, the molding layer 600 passes through the break 300c and fills the third gap H3.

[0087] Please refer to Figure 6. Perform step S600, cutting the molding compound 600 and the substrate 100 along the partition groove 500a to separate each module region. Each module region can constitute a chip module packaging structure. After cutting, in each chip module packaging structure, the edge of the partition film 500 and the edge of the substrate 100 have the second gap H2, ensuring that the partition film 500 is encapsulated by the molding compound 600 and not exposed to air. When the chip module packaging structure operates in a high-humidity environment, moisture will not penetrate the first cavity 300a through the partition film 500, avoiding performance degradation or even failure of the filter chip 301.

[0088] It should be noted that the width of the partition groove 500a needs to be greater than the cutting offset accuracy of cutting the molding layer 600 and the substrate 100, so as to avoid the partition film 500 being exposed from the side wall of the molding layer 600 after cutting the molding layer 600 and the substrate 100.

[0089] Example 2

[0090] Figure 8 is a schematic diagram of the packaging structure of the chip module provided in this embodiment. As shown in Figure 8, the difference from Embodiment 1 is that in this embodiment, the solder resist layer 200 does not completely cover the substrate 100, and there is a fourth gap H4 between the edge of the solder resist layer 200 and the edge of the substrate 100. The solder resist layer 200 has a certain degree of water absorption. In this embodiment, the solder resist layer 200 is wrapped by the molding compound 600 and will not be exposed to the air. When the packaging structure of the chip module operates in a high humidity environment, moisture will not penetrate into the first cavity 300a through the separator 500 and the solder resist layer 200, thus avoiding the problem of performance degradation or even failure of the filter chip 301.

[0091] It should be noted that the edge of the solder mask layer 200 refers to the entire edge of the solder mask layer 200, and the fourth gap H4 refers to the gap between the edge of the projection of the entire solder mask layer 200 on the substrate 100 and the edge of the substrate 100.

[0092] In this embodiment, the widths of the second gap H2 and the fourth gap H4 are equal, so that the edge of the separator 500 is aligned with the edge of the solder resist layer 200. In some embodiments, the widths of the second gap H2 and the fourth gap H4 may not be equal. Considering the feasibility of fabrication, the width of the second gap H2 may be greater than the width of the fourth gap H4, but this should not be a limitation.

[0093] The chip module packaging method in this embodiment is similar to that in Embodiment 1, except that, as shown in FIG. 7, after removing the separator film 500 at the edge of each module region in Embodiment 1 to form the separator groove 500a, the separator groove 500a exposes the solder resist layer 200 at the edge of each module region. Next, in this embodiment, the solder resist layer 200 within the separator groove 500a is also removed, causing the separator groove 500a to extend downwards to expose the surface of the substrate 100. Then, as shown in FIG. 8, the molding compound 600 is formed, and the molding compound 600 and the substrate 100 are cut along the separator groove 500a to obtain the chip module packaging structure. In the packaging structure of each chip module, the edge of the solder resist layer 200 and the edge of the substrate 100 have the fourth gap H4.

[0094] It is understood that in some embodiments, a portion of the solder mask 200 within the partition groove 500a may be removed (while still exposing the substrate 100). In this case, after forming the packaging structure of the chip module, the width of the second gap H2 may be greater than the width of the fourth gap H4.

[0095] In this embodiment, a laser stripping process can be used to remove the solder resist layer 200 within the partition groove 500a. Specifically, the laser stripping process utilizes a laser device to generate a laser beam, which is then directed onto the solder resist layer 200 within the partition groove 500a to remove it. Alternatively, in some embodiments, the solder resist layer 200 can also be photosensitive; in this case, an exposure and development process can be used to remove the solder resist layer 200 within the partition groove 500a.

[0096] Example 3

[0097] Figure 10 is a schematic diagram of the packaging structure of the chip module provided in this embodiment. As shown in Figure 10, the difference from Embodiment 1 is that in this embodiment, the portion of the solder resist layer 200 covered by the separator film 500 is the first portion (i.e., the portion directly below the separator film 500), and the portion outside the first portion is the second portion (i.e., the portion within the second gap H2). The thickness of the first portion is greater than the thickness of the second portion. The solder resist layer 200 has a certain degree of water absorption. In this embodiment, when the packaging structure of the chip module operates in a high-humidity environment, since less of the solder resist layer 200 is exposed to the air, the amount of moisture intruding into the first cavity 300a through the solder resist layer 200 can be reduced, thereby reducing the possibility of performance degradation or even failure of the filter chip 301.

[0098] The chip module packaging method in this embodiment is similar to that in Embodiment 1, except that, as shown in FIG9, after removing the separator film 500 at the edge of each module region in Embodiment 1 to form the separator groove 500a, the separator groove 500a exposes the solder resist layer 200 at the edge of each module region. Next, this embodiment further removes a portion of the thickness of the solder resist layer 200 within the separator groove 500a, causing the separator groove 500a to extend downwards but not exposing the surface of the substrate 100. Then, as shown in FIG10, the molding compound 600 is formed, and the molding compound 600 and the substrate 100 are cut along the separator groove 500a. In the packaging structure of each chip module, the edge of the solder resist layer 200 and the edge of the substrate 100 remain aligned. In this embodiment, the solder resist layer 200 is still exposed from the edge of the substrate 100. However, in the packaging structure of each chip module, a certain thickness of the edge area of ​​the solder resist layer 200 is removed to reduce the contact area with air, thereby reducing the amount of moisture that can enter the first cavity 300a through the solder resist layer 200, and thus reducing the possibility of performance degradation or even failure of the filter chip 301. At the same time, the solder resist layer 200 in the partition groove 500a is not completely removed, which can avoid damage to the substrate 100 when removing the solder resist layer 200. After the packaging structure of the chip module is formed, the solder resist layer 200 can continue to protect the substrate 100.

[0099] In this embodiment, a laser stripping process can be used to remove the solder resist layer 200 within the partition groove 500a. Specifically, the laser stripping process utilizes a laser device to generate a laser beam, which is then directed onto the solder resist layer 200 within the partition groove 500a to remove a portion of the thickness of the solder resist layer 200 within the partition groove 500a.

[0100] Example 4

[0101] Figures 11 to 13 are schematic diagrams of the corresponding steps of the chip module packaging method provided in this embodiment. The packaging structure of the chip module in this embodiment can be the same as that in Embodiment 2, the only difference being that the packaging method of the chip module in this embodiment is different from that in Embodiment 2.

[0102] As shown in FIG11, in this embodiment, after the solder resist layer 200 is formed on the substrate 100, the solder resist layer 200 does not cover the substrate 100 at the edge of each module area.

[0103] As shown in Figure 12, the filter chip 301 and the non-filter chip 302 are disposed on the substrate 100.

[0104] As shown in Figure 13, the separator 500 is attached. At this time, the separator 500 is attached not only to the top surface and sidewalls of the filter chip 301, the non-electrode surface and sidewalls of the non-filter chip 302, and the surface of the solder resist layer 200, but also to the exposed surface of the substrate 100 (that is, the edge area of ​​each module area).

[0105] Next, as shown in FIG. 7, the separator film 500 at the edge of each module region is removed to form the separator groove 500a, which also exposes the surface of the substrate 100. Then, as shown in FIG. 8, the molding compound 600 is formed, and the molding compound 600 and the substrate 100 are cut along the separator groove 500a to obtain the package structure of the chip module. At this time, in the package structure of each chip module, the edge of the solder mask 200 and the edge of the substrate 100 also have the fourth gap H4.

[0106] Compared to Embodiment 2, this embodiment can eliminate the step of removing the solder mask layer 200 in the partition groove 500a, simplifying the process and reducing the packaging cost; furthermore, this embodiment can also make the second gap H2 smaller than the fourth gap H4.

[0107] In summary, the chip module packaging structure and packaging method provided in this embodiment of the invention include a substrate, at least one filter chip, a separator film, and a molding compound. The filter chip is disposed on the substrate, with its front side facing the substrate and having a first gap between it and the substrate. The separator film covers the sidewalls and back side of the filter chip, as well as a portion of the substrate surface, to encapsulate the first gap, forming a sealed first cavity between the filter chip and the substrate. A second gap exists between the edge of the separator film and the edge of the substrate. The molding compound covers the remaining surface of the substrate and the separator film. Because of the second gap between the edge of the separator film and the edge of the substrate, the separator film is encapsulated by the molding compound and is not exposed to air. When the chip module packaging structure operates in a high-humidity environment, moisture will not penetrate into the first cavity through the separator film, avoiding the problem of performance degradation or even failure of the filter chip.

[0108] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0109] It should also be noted that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.

[0110] It should also be understood that, unless otherwise specified or indicated, the terms “first,” “second,” “third,” etc., in the specification are used only to distinguish the various components, elements, and steps in the specification, and not to indicate the logical or sequential relationships between the various components, elements, and steps.

[0111] Furthermore, it should be recognized that the terminology described herein is used only to describe particular embodiments and not to limit the scope of the invention. It must be noted that the singular forms “a” and “an” used herein and in the appended claims include plural bases unless the context clearly indicates otherwise. For example, a reference to “a step” or “an apparatus” means a reference to one or more steps or apparatuses, and may include secondary steps and secondary apparatuses. All conjunctions used should be understood in the broadest sense. Also, the word “or” should be understood to have the definition of logical “or” rather than logical “exclusive OR”, unless the context clearly indicates otherwise. Furthermore, implementation of the methods and / or devices in embodiments of the invention may include performing selected tasks manually, automatically, or in combination.

Claims

1. A chip module packaging structure, characterized in that, include: substrate; At least one filter chip is disposed on the substrate, the front side of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate; A separator film covers the sidewalls and back surface of the filter chip and a portion of the surface of the substrate to enclose the first gap, thereby forming a sealed first cavity between the filter chip and the substrate; a second gap exists between the edge of the separator film and the edge of the substrate; and... A molding layer covers the remaining surface of the substrate and the separator film.

2. The packaging structure of the chip module as described in claim 1, characterized in that, The separator is a dry film or a photosensitive film.

3. The packaging structure of the chip module as described in claim 1, characterized in that, The width of the second gap is 50 micrometers to 100 micrometers.

4. The packaging structure of the chip module as described in claim 1, characterized in that, The chip module's packaging structure also includes: At least one non-filter chip is disposed on the substrate, the electrode surface of the non-filter chip facing the substrate and having a third gap between it and the substrate; and, The separator also covers the sidewalls and non-electrode surfaces of the non-filter chip, and the separator has a break around the non-filter chip, through which the encapsulation layer fills the third gap.

5. The packaging structure of the chip module as described in any one of claims 1 to 4, characterized in that, The chip module's packaging structure also includes: A solder resist layer covers the non-soldering area of ​​the substrate, and the separator film is disposed on the solder resist layer.

6. The packaging structure of the chip module as described in claim 5, characterized in that, The edge of the solder resist layer is aligned with the edge of the substrate.

7. The packaging structure of the chip module as described in claim 6, characterized in that, The portion of the solder resist layer covered by the separator film is the first portion, and the portion of the solder resist layer outside the first portion is the second portion, wherein the thickness of the first portion is greater than the thickness of the second portion.

8. The packaging structure of the chip module as described in claim 5, characterized in that, The edge of the solder resist layer has a fourth gap with the edge of the substrate.

9. The packaging structure of the chip module as described in claim 8, characterized in that, The second gap is equal in width to the fourth gap, so that the edge of the separator film is aligned with the edge of the solder resist layer.

10. A method for packaging a chip module, characterized in that, include: Provide substrate; At least one filter chip is disposed on the substrate, with the front side of the filter chip facing the substrate and having a first gap between it and the substrate; A separator is attached to the sidewall and back of the filter chip and the substrate, and the separator seals the first gap, so that a sealed first cavity is formed between the filter chip and the substrate; Remove the separating membrane from the edge of each module area to form a separating groove; A molding layer is formed, which covers the separator film and fills the separator groove; as well as, The molding layer and the substrate are cut along the partition groove to obtain the package structure of the chip module. In each package structure of the chip module, there is a second gap between the edge of the partition film and the edge of the substrate.

11. The chip module packaging method as described in claim 10, characterized in that, The separator film is a dry film, and the separator film at the edge of each module area is removed using a laser film removal process; or, the separator film is a photosensitive film, and the separator film at the edge of each module area is removed using an exposure and development process.

12. The chip module packaging method as described in claim 10, characterized in that, When the filter chip is disposed on the substrate, at least one non-filter chip is also disposed on the substrate, the electrode surface of the non-filter chip faces the substrate, and there is a third gap between the non-filter chip and the substrate; When the separator film is attached to the sidewalls and back surface of the filter chip and the substrate, the separator film is also attached to the sidewalls and non-electrode surfaces of the non-filter chip, and the separator film further encapsulates the third gap; and, After the separator film is attached, the separator film is controlled to break around the non-filter chip, thereby forming a break, so that after the molding compound is formed, the molding compound passes through the break to fill the third gap.

13. The packaging method for a chip module as described in any one of claims 10 to 12, characterized in that, Before the filter chip is placed on the substrate, a solder resist layer is formed in the non-soldering area of ​​the substrate.

14. The chip module packaging method as described in claim 13, characterized in that, After the solder resist layer is formed, the solder resist layer covers the substrate at the edge of each module area.

15. The chip module packaging method as described in claim 14, characterized in that, After removing the separator film at the edge of each module area, a portion of the thickness of the solder resist layer within the separator groove is also removed.

16. The chip module packaging method as described in claim 14, characterized in that, After removing the separator film at the edge of each of the module regions, at least a portion of the solder resist layer within the separator groove is also removed until the substrate is exposed, such that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

17. The chip module packaging method as described in claim 13, characterized in that, After the solder resist layer is formed, the solder resist layer does not cover the substrate at the edge of each module area, such that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

18. The chip module packaging method as described in claim 10, characterized in that, The width of the dividing groove is greater than the cutting offset accuracy for cutting the molding layer and the substrate.

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