Half-bridge power module, full-bridge power module, and electric device

Abstract

The present application provides a half-bridge power module (100), a full-bridge power module (300), and an electric device (400). The half-bridge power module (100) comprises: a substrate (1), wherein a conductive metal layer (11) is provided on the substrate (1), and the conductive metal layer (11) comprises a direct current positive electrode region (111), an alternating current region (112), and a first driving layer region (115); and a circuit unit (2), wherein the circuit unit (2) comprises an upper bridge (21) and a lower bridge (22), the upper bridge (21) is arranged in the direct current positive electrode region (111), the lower bridge (22) is arranged in the alternating current region (112), the upper bridge (21) comprises a first wide bandgap chipset (211), the lower bridge (22) comprises a second wide bandgap chipset (221), and at least a portion of the first driving layer region (115) is arranged between the first wide bandgap chipset (211) and the second wide bandgap chipset (221).

Description

Half-bridge power modules, full-bridge power modules and electrical equipment

[0001] This application claims priority to Chinese Patent Application No. 202411218557.2, filed on August 29, 2024, entitled "Half-bridge power module, full-bridge power module and electrical equipment", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of semiconductor technology, and in particular to a half-bridge power module, a full-bridge power module, and an electrical device. Background Technology

[0003] With the development of new energy vehicle technology, more and more new energy vehicle main drive inverters are adopting power semiconductor modules.

[0004] Currently, the power semiconductor modules on the market are mainly Si IGBT modules and SiC MOSFET modules. The main drawback of Si IGBT modules is their high switching losses, while the main drawback of SiC MOSFET modules is their high cost due to limitations in the silicon carbide substrate manufacturing process, making it difficult to meet the explosive growth in demand from the new energy vehicle market. The technology of combining Si IGBTs and SiC MOSFETs in parallel is still in its early stages, and related technologies lack consideration for the dynamic current sharing problem in parallel connection scenarios. Summary of the Invention

[0005] In view of the above problems, this application provides a half-bridge power module, a full-bridge power module, and an electrical device, which integrates parallel wide-bandgap power chips and silicon-based power chips, enabling the expansion of power levels while taking into account switching losses and cost issues, and improving dynamic current sharing.

[0006] This application provides a half-bridge power module, comprising: a substrate, wherein a conductive metal layer is disposed on the substrate, the conductive metal layer including a DC positive region, an AC region, and a first driving layer region; and a circuit unit, wherein the circuit unit includes an upper bridge and a lower bridge, the upper bridge being disposed in the DC positive region and the lower bridge being disposed in the AC region, the upper bridge including a first wide bandgap chipset and a first silicon-based chipset, and the lower bridge including a second wide bandgap chipset and a second silicon-based chipset, wherein both the first silicon-based chipset and the second silicon-based chipset include at least one silicon-based power chip; and at least a portion of the first driving layer region being disposed between the first wide bandgap chipset and the second wide bandgap chipset.

[0007] In some embodiments, the first driving layer region is used to form an electrical connection with the second wide bandgap chipset.

[0008] In some embodiments, the first wide bandgap chipset and the second wide bandgap chipset each include a plurality of wide bandgap power chips arranged along a first direction, the first wide bandgap chipset and the second wide bandgap chipset are arranged along a second direction, the upper bridge includes a first silicon-based chipset, the lower bridge includes a second silicon-based chipset, and the first silicon-based chipset and the second silicon-based chipset each include at least one silicon-based power chip.

[0009] In some embodiments, multiple wide-bandgap power chips in the first wide-bandgap chipset are connected in series one-to-one with multiple wide-bandgap power chips in the first wide-bandgap chipset to form a half-bridge circuit, and multiple wide-bandgap power chips in the first wide-bandgap chipset are connected in parallel with each other.

[0010] In some embodiments, at least a portion of the structure of the DC positive region and the AC region extends along the first direction and is arranged along the second direction, the first wide bandgap chip group is disposed in the portion of the DC positive region extending along the first direction, and the second wide bandgap chip group is disposed in the portion of the AC region extending along the first direction.

[0011] In some embodiments, the conductive metal layer further includes a DC negative electrode region, at least a portion of which extends along the first direction and is arranged along the second direction.

[0012] In some embodiments, a plurality of wide-bandgap power chips in the first wide-bandgap chipset are electrically connected to the AC region, and a plurality of wide-bandgap power chips in the second wide-bandgap chipset are electrically connected to the DC negative region.

[0013] In some embodiments, the outer contour of the conductive metal layer includes a first side and a second side opposite to each other along the first direction, and a third side and a fourth side opposite to each other along the second direction; the DC positive electrode region includes a first positive electrode transmission region, which extends along the second direction and is disposed along the first side; the upper bridge also includes a first silicon-based chip group, which is disposed in the first positive electrode transmission region.

[0014] In some embodiments, the DC positive region further includes a second positive transmission region, which extends along the first direction and is embedded in the AC region in an isolated manner, and the first wide bandgap chipset is disposed in the second positive transmission region.

[0015] In some embodiments, the DC negative region includes a first negative transmission region and a second negative transmission region, wherein the first negative transmission region is disposed along the third side and the second negative transmission region is disposed along the second side.

[0016] In some embodiments, the AC region includes a first AC region extending along the first direction and located between the second positive transmission region and the first negative transmission region, wherein the second wide bandgap chipset is disposed in the first AC region.

[0017] In some embodiments, the AC region further includes a second AC region located between the second positive electrode transmission region and the second negative electrode transmission region, and the lower bridge further includes a second silicon-based chipset disposed in the second AC region.

[0018] In some embodiments, a recessed area is provided between the first AC region and the second AC region to accommodate the second positive electrode transmission region extending along the first direction.

[0019] In some embodiments, the half-bridge power module further includes a DC positive terminal, which is located in the first positive transmission region.

[0020] In some embodiments, the DC positive terminal is led out from the third side.

[0021] In some embodiments, the half-bridge power module further includes a DC negative terminal, which is located in the first negative transmission region.

[0022] In some embodiments, the DC negative terminal is led out from the third side.

[0023] In some embodiments, the half-bridge power module further includes an AC terminal located in the second AC zone.

[0024] In some embodiments, the AC terminal extends from the fourth side.

[0025] In some embodiments, the DC negative terminal is disposed opposite to the second wide bandgap chipset along the second direction.

[0026] In some embodiments, a plurality of wide-bandgap power chips in the first wide-bandgap chipset are all connected to the second AC area via a first connection line.

[0027] In some embodiments, multiple wide-bandgap power chips in the second wide-bandgap chipset are connected to the first negative transmission area via a second connection line.

[0028] In some embodiments, a plurality of wide bandgap power chips within at least one group of the first wide bandgap chipset and the second wide bandgap chipset are arranged flush in the second direction.

[0029] In some embodiments, at least one group of the first wide bandgap chipset and the second wide bandgap chipset contains a plurality of wide bandgap power chips, with any two adjacent wide bandgap power chips being staggered along the second direction.

[0030] In some embodiments, along the second direction of the DC positive region, the first wide bandgap chip group is disposed near the third side, and the first silicon-based chip group is disposed near the fourth side.

[0031] In some embodiments, along a second direction of the communication area, the second wide bandgap chipset is disposed near the third side, and the second silicon-based chipset is disposed near the fourth side.

[0032] In some embodiments, the first wide bandgap chipset and the second wide bandgap chipset further include a first type of diode, wherein the first type of diode of the first wide bandgap chipset is connected in series with the first type of diode of the second wide bandgap chipset, and the first type of diode is connected in parallel with the wide bandgap power chip in the same group.

[0033] In some embodiments, the first type of diode has the same substrate material type as the wide bandgap power chip.

[0034] In some embodiments, both the first silicon-based chipset and the second silicon-based chipset include at least one second type diode, wherein the second type diode of the first silicon-based chipset is connected in series with the second type diode of the second silicon-based chipset, and the second type diode is connected in parallel with the silicon-based chip in the same group.

[0035] In some embodiments, the silicon-based power chip and the second type of diode within the silicon-based chipset are connected in parallel to form a chip pair.

[0036] In some embodiments, the second type of diode has the same substrate material type as the silicon-based power chip.

[0037] In some embodiments, the chip pairs in the first silicon-based chipset and the second silicon-based chipset are multiple, and the multiple chip pairs are arranged along the second direction.

[0038] In some embodiments, the silicon-based power chip and the second type of diode in each chip pair are arranged along the first direction or the second direction.

[0039] In some embodiments, the silicon-based power chips and second-type diodes in the plurality of chip pairs are arranged in the same or opposite directions.

[0040] In some embodiments, the chip pairs in the first silicon-based chip group and the second silicon-based chip group are multiple, wherein the multiple silicon-based power chips are arranged adjacent to each other along the second direction, the multiple second-type diodes are arranged adjacent to each other along the second direction, and the multiple silicon-based power chips and the second-type diodes are arranged along the second direction.

[0041] In some embodiments, the wide bandgap power chip includes a SiC MOSFET, and the silicon-based power chip includes a Si IGBT.

[0042] In some embodiments, the first driving layer region includes: a first SiC gate driving layer and a first SiC source driving layer, wherein the gate of the SiC MOSFET of the lower bridge is connected to the first SiC gate driving layer, and the source of the SiC MOSFET of the lower bridge is connected to the first SiC source driving layer.

[0043] In some embodiments, the first SiC gate driving layer and the first SiC source driving layer are disposed between the first wide bandgap chipset and the second wide bandgap chipset.

[0044] In some embodiments, the first driving layer region further includes: a first IGBT gate driving layer and a first IGBT emitter driving layer, wherein the gate of the Si IGBT of the lower bridge is connected to the first IGBT gate driving layer, and the emitter of the Si IGBT of the lower bridge is connected to the first IGBT emitter driving layer.

[0045] In some embodiments, the first IGBT gate driving layer and the first IGBT emitter driving layer are disposed on the second side.

[0046] In some embodiments, the conductive metal layer further includes a second driving layer region, which is disposed close to the first wide bandgap chipset.

[0047] In some embodiments, at least a portion of the second driving layer region is disposed between the DC positive region and the AC region.

[0048] In some embodiments, the second driving layer region includes: a second SiC gate driving layer and a second SiC source driving layer, wherein the gate of the SiC MOSFET of the upper bridge is connected to the second SiC gate driving layer, and the source of the SiC MOSFET of the upper bridge is connected to the second SiC source driving layer.

[0049] In some embodiments, the second SiC gate driving layer and the second IGBT gate driving layer are disposed between the DC positive region and the AC region.

[0050] In some embodiments, the second driving layer region further includes: a second IGBT gate driving layer and a second IGBT emitter driving layer, wherein the gate of the Si IGBT of the upper bridge is connected to the second IGBT gate driving layer, and the emitter of the Si IGBT of the upper bridge is connected to the second IGBT emitter driving layer.

[0051] In some embodiments, the second IGBT gate driving layer and the second IGBT emitter driving layer are disposed on the second side.

[0052] In some embodiments, the first SiC source driving layer and the first IGBT emitter driving layer are connected to form a first common copper layer.

[0053] In some embodiments, the second SiC source driving layer and the second IGBT emitter driving layer are connected to form a second common copper layer.

[0054] The second aspect of this application also provides a full-bridge power module, including: the half-bridge power module described in the first aspect above, wherein there are multiple half-bridge power modules, and the multiple half-bridge power modules are connected to the same heat sink base plate to form a full-bridge power module.

[0055] A third aspect of this application also provides an electrical device, including a power module, wherein the power module includes the half-bridge power module described in the first aspect of this application, and / or the full-bridge power module described in the second aspect of this application.

[0056] The half-bridge power module of this application integrates parallel wide-bandgap power chips and silicon-based power chips, forming a hybrid single-phase half-bridge power module that can effectively expand current specifications and power levels while addressing switching losses and cost issues. Furthermore, the first and second wide-bandgap chip groups are arranged along a second direction. Both groups include multiple wide-bandgap power chips arranged along a first direction. The wide-bandgap power chips in the first group are connected to the AC region via connecting lines along the second direction, and the wide-bandgap power chips in the second group are connected to the DC negative region via connecting lines along the second direction. This ensures that each wide-bandgap power chip in the first group has good dynamic current sharing performance, which helps to ensure a uniform distribution of current and thermal stress among the chips, thereby improving the electrical performance and reliability of the half-bridge power module. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1 is a schematic diagram of the internal layout of a half-bridge power module according to an embodiment of this application;

[0059] Figure 2 is a schematic diagram of the internal bonding of the half-bridge power module shown in Figure 1;

[0060] Figure 3 is a schematic diagram of the internal layout of another embodiment of the half-bridge power module of this application;

[0061] Figure 4 is a schematic diagram of the internal layout of another embodiment of the half-bridge power module of this application;

[0062] Figure 5 is a schematic diagram of the structure of a wide bandgap power chip according to an embodiment of this application;

[0063] Figure 6 is a schematic diagram of the structure of a silicon-based power chip according to an embodiment of this application;

[0064] Figure 7 is a schematic diagram of the diode structure according to an embodiment of this application;

[0065] Figure 8 is a schematic diagram of the arrangement direction and bus direction of wide bandgap power chips in some embodiments of this application;

[0066] Figure 9 is a schematic diagram of the arrangement direction and bus direction of wide bandgap power chips in some other embodiments of this application;

[0067] Figure 10 is a schematic diagram showing the layout of some embodiments of the wide bandgap chipset of this application;

[0068] Figure 11 is a schematic diagram showing the layout of some other embodiments of the wide bandgap power group of this application;

[0069] Figure 12 is a schematic diagram showing the layout of some embodiments of the silicon-based chipset of this application;

[0070] Figure 13 is a schematic diagram showing the arrangement of some other embodiments of the silicon-based chipset according to the present application;

[0071] Figure 14 is a schematic diagram showing the layout of some other embodiments of the silicon-based chipset according to the present application;

[0072] Figure 15 is a schematic diagram showing the arrangement of some further embodiments of the silicon-based chipset according to the present application;

[0073] Figure 16 is a schematic diagram of the layout of some embodiments of the driving layer region of this application;

[0074] Figure 17 is a schematic diagram showing the arrangement of the driving layer region in some other embodiments of this application;

[0075] Figure 18 shows the equivalent circuit diagram and commutation schematic of a typical hybrid power module;

[0076] Figure 19 shows the switching waveforms of a typical hybrid power module;

[0077] Figure 20 is a schematic diagram of the structure of a full-bridge power module according to some embodiments of this application;

[0078] Figure 21 is a schematic diagram of electrical equipment according to some embodiments of this application;

[0079] Figure 22 is a schematic diagram of an electrical device according to some other embodiments of this application.

[0080] Explanation of reference numerals in the attached figures: 100 - Half-bridge power module; 1 - Substrate; 10 - Ceramic layer; 11 - Conductive metal layer; 110a - First side; 110b - Second side; 110c - Third side; 110d - Fourth side; 111 - DC positive region; 1111 - First positive transport region; 1112 - Second positive transport region; 112 - AC region; 1121 - First AC region; 1122 - Second AC region; 113 - DC negative region; 1131 - First negative transport region; 1132 - Second negative transport region; 114 - Second driving layer region; 1141 - Second SiC gate driving layer; 1142 - Second IGBT gate driving layer; 1143 - Second SiC source driving layer; 1144 - Second IGBT emitter driving layer; 1145 - Second common copper layer; 115-First driving layer region; 1151-First SiC gate driving layer; 1152-First IGBT gate driving layer; 1153-First SiC source driving layer; 1154-First IGBT emitter driving layer; 1155-First common copper layer; 116-Drive terminal; 117-DC positive terminal; 118-DC negative terminal; 119-AC terminal; 2-Circuit unit; 21-Upper bridge; 211-First wide bandgap chipset; 212-First silicon-based chipset; 22-Lower bridge; 221-Second wide bandgap chipset; 222-Second silicon-based chipset; 23-Wide bandgap power chip; 231-Source; 232-Gate; 233-Drain; 24-Silicon-based power chip; 241-Emitter; 242-Gate; 243-Collector; 25-Diode; 251-Anode; 252-Cathode; 25a-Class II Diode; 26-Connecting Wire; 261-First Connecting Wire; 262-Second Connecting Wire; 200-Heat Dissipation Base Plate; 300-Full Bridge Power Module; 400-Electrical Equipment. Detailed Implementation

[0081] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0082] With the development of new energy vehicle technology, more and more new energy vehicle main drive inverters are adopting power semiconductor modules. Currently, the power semiconductor modules on the market are mainly SiIGBT modules and SiCMOSFET modules. The main disadvantage of SiIGBT modules is their high switching losses, while the main disadvantage of SiCMOSFET modules is their high cost due to limitations in the manufacturing process of silicon carbide substrates, making it difficult to meet the explosive growth in demand from the new energy vehicle market. The technology of combining SiIGBTs and SiCMOSFETs in parallel is still in its early stages, and related technologies lack consideration for the dynamic current sharing problem in the parallel connection of SiIGBTs and SiCMOSFETs.

[0083] In view of this, this application provides a half-bridge power module that integrates parallel wide-bandgap power chips and silicon-based power chips, which can better expand current specifications and power levels while taking into account switching losses and cost issues. Furthermore, it can improve dynamic current sharing, thereby improving the electrical performance and reliability of the half-bridge power module.

[0084] The half-bridge power module 100 of the first aspect embodiment of this application is described below with reference to Figures 1-20.

[0085] Referring to Figures 1-4, the half-bridge power module 100 of this embodiment includes: a substrate 1 and a circuit unit 2.

[0086] The substrate 1 can be one of the following: thick film printed ceramic substrate 1 (TPC), direct bonded copper ceramic substrate 1 (DBC), active metal welded ceramic substrate 1 (AMB), direct electroplated copper ceramic substrate 1 (DPC), or it can be other types of substrate 1.

[0087] The substrate 1 may include a first surface and a second surface opposite to each other. The first surface is provided with a conductive metal layer 11. For example, the substrate 1 may include a ceramic layer 10 and copper layers located on both sides of the ceramic layer 10. The ceramic layer 10 may be at least one of alumina, silicon nitride, and aluminum nitride. One of the copper layers may serve as the conductive metal layer 11. The conductive metal layer 11 may be divided into multiple conductive areas according to the circuit layout requirements. Each conductive area may be used to set up a power chip and a connection circuit for connecting different power chips (this connection circuit is not shown in the figure and may be reasonably set according to the arrangement of each power chip, and will not be described in detail below). The other copper layer may serve as a heat dissipation surface of the substrate 1.

[0088] The conductive metal layer 11 may include a DC positive region 111, an AC region 112, and a DC negative region 113. Any one of the DC positive region 111, AC region 112, and DC negative region 113 can be square or irregularly shaped with multiple sides, and any one of the sides can be a right-angled side or a hypotenuse. Of course, this application is not limited to this; the shapes of the DC positive region 111, AC region 112, and DC negative region 113 can be flexibly set according to circuit layout requirements.

[0089] The DC positive region 111 can be connected to the positive terminal of a DC power supply, the DC negative region 113 can be connected to the negative terminal of a DC power supply, and the AC region 112 can be connected to an AC output load to achieve DC-AC conversion; or, the AC region 112 can be connected to an AC power supply, the DC positive region 111 can be connected to the positive terminal of a DC load, and the DC negative region 113 can be connected to the negative terminal of a DC load to achieve AC-DC conversion.

[0090] Circuit unit 2 may include an upper bridge 21 and a lower bridge 22. The upper bridge 21 is located in the DC positive region 111, and the lower bridge 22 is located in the AC region 112. Each of the upper bridge 21 and the lower bridge 22 includes a wide bandgap chipset and a silicon-based chipset. Specifically, the upper bridge 21 includes a first wide bandgap chipset 211 and a first silicon-based chipset 212, and the lower bridge 22 includes a second wide bandgap chipset 221 and a second silicon-based chipset 222.

[0091] Both the first wide-bandgap chipset 211 and the second wide-bandgap chipset 221 include multiple wide-bandgap power chips 23 arranged along a first direction (the Y direction as shown in Figure 1). The multiple wide-bandgap power chips 23 in the first wide-bandgap chipset 211 are connected in parallel; here, "multiple" refers to two or more. The first wide-bandgap chipset 211 and the second wide-bandgap chipset 221 are arranged along a second direction (the X direction as shown in Figure 1). The wide-bandgap power chips 23 in the first wide-bandgap chipset 211 and the second wide-bandgap chipset 221 can correspond one-to-one. Two corresponding wide-bandgap power chips 23 can form a half-bridge circuit. Furthermore, since multiple half-bridge circuits are connected in parallel, a half-bridge circuit with a current amplification factor of N times (the number of half-bridge circuits is N) can be formed, which is beneficial for improving the power level of the half-bridge power module 100.

[0092] In the first wide-bandgap chipset 211, multiple wide-bandgap power chips 23 are electrically connected to the AC region 112, and in the second wide-bandgap chipset 221, multiple wide-bandgap power chips 23 are electrically connected to the DC negative region 113. The electrical connection can be made via connecting wires 26, which can be gold wire, silver wire, copper wire, aluminum wire, copper strip, aluminum strip, metal connecting piece, or other conductive metal wire.

[0093] Among them, the wide bandgap semiconductor material can include SiC, GaN, etc., that is, the wide bandgap power chip 23 is a SiC device or a GaN device. The SiC device can be a SiC MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0094] Referring to Figures 1-4, 8, and 9, during the operation of the half-bridge power module 100, part of the current flows from the DC positive region 111 to the DC negative region 113. Multiple wide-bandgap power chips 23 in the first wide-bandgap chip group 211 are arranged along a first direction, and the first wide-bandgap chip group 211 and the AC region 112 are opposite each other along a second direction. At this time, the arrangement direction of the multiple wide-bandgap power chips 23 is perpendicular to the current flow direction between the first wide-bandgap chip group 211 and the AC region 112. Thus, each wide-bandgap power chip 23 in the first wide-bandgap chip group 211 has a relatively close or even identical current path, improving the current distribution. This results in each wide-bandgap power chip 23 in the first wide-bandgap chip group 211 having good dynamic current sharing performance, which is beneficial for ensuring the uniform distribution of current stress and thermal stress among the wide-bandgap power chips 23.

[0095] Similarly, when multiple wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are arranged along the first direction, and each wide-bandgap power chip 23 is opposite to the DC negative electrode region 113 along the second direction, when the current output direction in the DC negative electrode region 113 is the same as the current direction between each wide-bandgap power chip 23 and the DC negative electrode region 113, each wide-bandgap power chip 23 in the second wide-bandgap chipset 221 can have good dynamic current sharing performance, which is beneficial to ensuring the uniform distribution of current stress and thermal stress among each wide-bandgap power chip 23 in the second wide-bandgap chipset 221.

[0096] In other words, by setting it as described above, it is possible to ensure that the first wide bandgap chipset 211 and each wide bandgap power chip 23 of the first wide bandgap chipset 211 have good dynamic current sharing performance, which is conducive to ensuring the uniform distribution of current stress and thermal stress among each wide bandgap power chip 23.

[0097] Of course, in addition to the above methods, the direction of the current output in the DC negative pole region 113 is related to the setting position of the DC negative terminal 118, and this embodiment does not limit this.

[0098] Both the first silicon-based chipset 212 and the second silicon-based chipset 222 may include at least one silicon-based power chip 24. The silicon-based power chip 24 is a silicon device. For example, there may be one or more silicon-based power chips 24, where "more" refers to two or more. The silicon-based power chip 24 is a Si-based fully controllable power chip, such as a Si IGBT (Insulated Gate Bipolar Transistor) or a Si MOSFET.

[0099] In other words, the half-bridge power module 100 in this embodiment is a hybrid half-bridge power module 100 that integrates wide-bandgap semiconductor devices and silicon semiconductor devices.

[0100] The silicon-based power chips 24 of the first silicon-based chipset 212 and the second silicon-based chipset 222 can be matched one-to-one. The two corresponding wide-bandgap power chips 23 can form a half-bridge circuit. Multiple half-bridge circuits can be connected in parallel to form a half-bridge circuit with a current specification amplification of N (the number of half-bridge circuits is N).

[0101] The half-bridge power module 100 of this application embodiment integrates a wide-bandgap power chip 23 and a silicon-based power chip 24 connected in parallel, forming a single-phase half-bridge power module 100 that combines the wide-bandgap power chip 23 and the silicon-based power chip 24. This can better expand the current specifications and power levels, while also taking into account switching losses and cost issues. Furthermore, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 are arranged along the second direction. Both the first wide bandgap chipset 211 and the second wide bandgap chipset 221 include a plurality of wide bandgap power chips 23 arranged along the first direction. The plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211 are connected to the AC region 112 through the connecting line 26 (such as the first connecting line 261) along the second direction. The plurality of wide bandgap power chips 23 in the second wide bandgap chipset 221 are connected to the DC negative region 113 through the connecting line 26 (such as the second connecting line 262) along the second direction. This can at least ensure that each wide bandgap power chip 23 in the first wide bandgap chipset 211 has good dynamic current sharing performance, which is conducive to ensuring the uniform distribution of current stress and thermal stress among each wide bandgap power chip 23, thereby improving the electrical performance and reliability of the half-bridge power module 100.

[0102] For ease of description, the following explanation will use the wide bandgap power chip 23 as a SiC MOSFET and the silicon-based power chip 24 as a Si IGBT as examples.

[0103] In some embodiments, referring to Figures 1-4, at least a portion of the structures of each of the DC positive region 111, AC region 112, and DC negative region 113 extend along a first direction and are arranged sequentially along a second direction. For example, the DC positive region 111 may be integrally formed as a square extending along the first direction, or a portion of the DC positive region 111 may extend along the first direction while the other portion may extend along the second direction; the DC negative region 113 may be integrally formed as a square extending along the first direction, or a portion of the DC negative region 113 may extend along the first direction while the other portion may extend along the second direction; the AC region 112 may be integrally formed as a square extending along the first direction, or a portion of the AC region 112 may extend along the first direction while the other portion may extend along the second direction; the shape and size of any two of the DC positive region 111, AC region 112, and DC negative region 113 may be the same or different, and can be reasonably set according to actual needs. The portions of the DC positive region 111, AC region 112 and DC negative region 113 extending along the first direction can be arranged along the second direction. The first wide bandgap chip group 211 is located in the portion of the DC positive region 111 extending along the first direction, and the second wide bandgap chip group 221 is located in the portion of the AC region 112 extending along the first direction.

[0104] In this way, it is possible to facilitate the connection of multiple wide bandgap power chips 23 arranged along the first direction on the DC positive region 111 to the AC region 112 through the connection line 26 along the second direction, and to facilitate the connection of multiple wide bandgap power chips 23 in the AC region 112 to the DC negative region 113 through the connection line 26 along the second direction, so as to improve the current sharing among the wide bandgap power chips 23.

[0105] Referring to Figures 1-4, in some embodiments, the outer contour of the conductive metal layer 11 includes a first side 110a and a second side 110b opposite to each other along a first direction, and a third side 110c and a fourth side 110d opposite to each other along a second direction.

[0106] The DC positive region 111 may include a first positive transmission region 1111 and a second positive transmission region 1112. The first positive transmission region 1111 may extend along a second direction and is disposed along a first side 110a. The second positive transmission region 1112 extends along a first direction. A first wide bandgap chip group 211 is disposed in the second positive transmission region 1112. A first silicon-based chip group 212 is disposed in the first positive transmission region 1111 and is located on the side of the second positive transmission region 1112 near the fourth side 110d.

[0107] The DC negative pole region 113 may include a first negative pole transmission region 1131 and a second negative pole transmission region 1132. The first negative pole transmission region 1131 extends along a second direction and is disposed along a third side 110c. The second negative pole transmission region 1132 is disposed along a second side 110b and extends along a first direction. The second negative pole transmission region 1132 and the first positive pole transmission region 1111 are arranged opposite to each other along the first direction.

[0108] The AC region 112 may include a first AC region 1121 and a second AC region 1122, wherein the first AC region 1121 and the second AC region 1122 are provided with recessed areas to accommodate a second positive electrode transmission region 1112 extending along a first direction. The first AC region 1121 extends along the first direction and is located between the second positive electrode transmission region 1112 and the first negative electrode transmission region 1131, and the second AC region 1122 is located between the second positive electrode transmission region 1112 and the second negative electrode transmission region 1132. A second wide bandgap chipset 221 is disposed in the first AC region 1121, and a second silicon-based chipset 222 is disposed in the second AC region 1122 and is located on the side of the first AC region 1121 near the fourth side 110d. In the first wide bandgap chipset 211, multiple wide bandgap power chips 23 are connected to the first AC region 1121 via a connection line 26 (i.e., the first connection line 261) along the second direction; in the second wide bandgap chipset 221, multiple wide bandgap power chips 23 are connected to the first negative transmission region 1131 via a connection line 26 (i.e., the second connection line 262) along the second direction.

[0109] In this way, the first negative transmission region 1131, the first AC region 1121, and the second positive transmission region 1112 are arranged sequentially along the second direction and from the third side 110c to the fourth side 110d, so that the multiple wide bandgap power chips 23 arranged along the first direction on the DC positive region 111 can be connected to the DC negative region 113 through the connecting line 26 (such as the first connecting line 261), and so that the multiple wide bandgap power chips 23 in the AC region 112 can be connected to the DC negative region 113 through the connecting line 26 (such as the second connecting line 262). The connecting line 26 can be parallel to the second direction or have an angle to improve the current sharing among the wide bandgap power chips 23.

[0110] In some embodiments, referring to Figures 1-4, the substrate 1 may further include a DC positive terminal 117, a DC negative terminal 118, and an AC terminal 119. The DC positive terminal 117 is disposed in the first positive transmission region 1111 and led out from the third side 110c, the DC negative terminal 118 is disposed in the first negative transmission region 1131 and led out from the third side 110c, and the AC terminal 119 is disposed in the second AC region 1122 and led out from the fourth side 110d.

[0111] Thus, the DC positive terminal 117 and the DC negative terminal 118 are located on the same side of the DC positive region 111 and the DC negative region 113 along the second direction, respectively. Both the DC positive terminal 117 and the DC negative terminal 118 can be led out along the second direction. The AC terminal 119 is located on the other side of the AC region 112 along the second direction, and the AC terminal 119 can be led out along the second direction. Arranging the DC terminals on the same side and the AC terminals on the other side helps to shorten the switching commutation loop of the SiC MOSFET, reduce inductance, improve dynamic current sharing, and simplify the construction of the external circuitry used to connect the half-bridge power module 100.

[0112] Furthermore, since the current confluence direction in the DC negative region 113 is along the second direction, which is parallel to the current direction between the multiple wide bandgap chips in the second wide bandgap chip group 221 and the DC negative region 113, the various wide bandgap power chips 23 in the second wide bandgap chip group 221 have relatively close or even identical current paths, which improves the current distribution. As a result, the various wide bandgap power chips 23 in the second wide bandgap chip group 221 have good dynamic current sharing performance, which is beneficial to ensuring the uniform distribution of current stress and thermal stress among the various wide bandgap power chips 23.

[0113] In some embodiments, in conjunction with Figures 1-4, the DC negative terminal 118 and the second wide bandgap chip group 221 are opposite each other along the second direction. This can further shorten the distance between the multiple wide bandgap chips in the second wide bandgap chip group 221 and the DC negative terminal 118, thereby shortening the SiC MOSFET commutation circuit, reducing parasitic inductance, and improving dynamic current sharing.

[0114] In some embodiments, referring to Figures 1-4 and Figure 10, the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211 are aligned in the first direction. This ensures that the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211 are at the same distance from the first AC region 1121 in the second direction. This maximizes the current sharing of the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211, and the layout is relatively simple and compact, which can reduce the space occupied and improve the space utilization rate.

[0115] Referring to Figures 1-3 and Figure 10, the multiple wide bandgap power chips 23 in the second wide bandgap chipset 221 are aligned in the second direction. This ensures that the multiple wide bandgap power chips 23 in the second wide bandgap chipset 221 are at the same distance from the first negative electrode transmission region 1131 in the second direction. This maximizes the current sharing of the multiple wide bandgap power chips 23 in the second wide bandgap chipset 221, and the layout is relatively simple and compact, which can reduce the space occupied and improve the space utilization rate.

[0116] In some embodiments, referring to FIG11, any two adjacent wide-bandgap power chips 23 in the first wide-bandgap chipset 211 are staggered along the second direction. This helps to reduce the thermal coupling of the multiple similar wide-bandgap power chips 23 in the first wide-bandgap chipset 211, thereby reducing the thermal impact in this area, improving heat dissipation performance, and providing better current distribution.

[0117] In some embodiments, referring to Figures 4 and 11, any two adjacent wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are staggered along the second direction. This helps to reduce the thermal coupling of the multiple similar wide-bandgap power chips 23 in the second wide-bandgap chipset 221, thereby reducing the thermal impact in this area, improving heat dissipation performance, and providing better current distribution.

[0118] For example, as shown in Figure 11, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 each have three wide bandgap power chips 23. Along the first direction and from the first side 110a toward the second side 110b, they are arranged in sequence as wide bandgap power chip 23a, wide bandgap power chip 23b, and wide bandgap power chip 23c. Among them, wide bandgap power chips 23a and wide bandgap power chips 23c are both located on the side of wide bandgap power chip 23b away from the fourth side 110d along the second direction. In this way, on the one hand, it is beneficial to improve the current sharing between wide bandgap power chips 23a and wide bandgap power chips 23b to a certain extent, and on the other hand, it can reduce the thermal coupling between wide bandgap power chips 23a, wide bandgap power chips 23b, and wide bandgap power chips 23c.

[0119] Alternatively, both wide-bandgap power chips 23a and 23c can be located on the side of wide-bandgap power chip 23b along the second direction towards the fourth side 110d. This can also reduce the thermal coupling between wide-bandgap power chips 23a, 23b, and 23c, and improve heat dissipation performance.

[0120] Referring to Figures 18 and 19, Figure 18 shows the equivalent circuit of the hybrid half-bridge power module 100 considering parasitic inductance, and Figure 19 shows a typical switching waveform diagram of the hybrid half-bridge power module 100. In the hybrid module application shown in Figure 18, the circuit turn-on process typically begins with the SiC MOSFE turning on first. At this time, the voltage drops, and the SiC MOSFE carries the entire current. Then, the Si IGBT turns on, and the SiC MOSFE and Si IGBT commutate, with each carrying a portion of the current. During the turn-off process, the Si IGBT turns off first. At this time, the SiC MOSFE and Si IGBT commutate, and the SiC chip carries the entire current. Then, the SiC chip turns off, and the voltage rises, resulting in a turn-off voltage spike. The voltage spike generated during the turn-off process has an adverse effect on the normal operation of the half-bridge power module 100 and needs to be minimized. SiC MOSFE switches faster than Si IGBT switches slower. Under the same inductance, the voltage spike generated by SiC MOSFE is much higher than that of IGBT. That is, the turn-off voltage spike caused by the inductance of the switching commutation circuit of SiC MOSFE is more severe.

[0121] Therefore, to reduce this voltage spike, in this embodiment, the first wide bandgap chipset 211 is located on the side of the first silicon-based chipset 212 along the second direction, closer to the DC positive terminal 117, and the second wide bandgap chipset 221 is located on the side of the second silicon-based chipset 222 along the second direction, away from the AC terminal 119. This significantly shortens the switching commutation loop length of the SiC MOSFE, thereby reducing parasitic inductance, lowering the turn-off voltage spike, improving the stability and reliability of the half-bridge power module 100, and reducing interference to other electronic components in the circuit.

[0122] In some embodiments, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 are also provided with diodes 25 (i.e., first-type diodes). The diodes 25 have the same substrate material type as the wide bandgap power chip 23. For example, the diodes 25 can be SiC SBDs (Schottky diodes 25), etc. The diodes 25 are connected in parallel with the wide bandgap power chip 23. The diodes 25 can be used to protect the SiC MOSFE and prevent excessive reverse current from damaging the SiC MOSFE. In addition, by connecting the SiC SBDs in parallel, the reverse recovery charge of the SiC SBDs is lower when the SiC MOSFE is turned off during the dead time, which can greatly reduce power loss, reduce energy loss, and improve conversion efficiency, thereby improving the performance of the half-bridge power module 100. The diodes 25 in the first wide bandgap chipset 211 can be connected to the AC region 112 through the connecting line 26, and the diodes 25 in the second wide bandgap chipset 221 can be connected to the DC negative region 113 through the connecting line 26.

[0123] In addition to the above-described scheme, referring to Figures 1-4 and 12-15, considering that the silicon-based power chip 24, such as a Si IGBT, lacks reverse conduction capability during operation, in this embodiment, both the first silicon-based chip group 212 and the second silicon-based chip group 222 include at least one diode 25 (i.e., a second-type diode 25a). The second-type diode 25a can have the same substrate material as the silicon-based power chip 24. There can be one or more second-type diodes 25a, where "multiple" refers to two or more. Each second-type diode 25a corresponds one-to-one with a silicon-based power chip 24. The corresponding silicon-based power chip 24 and the second-type diode 25a are connected in parallel to form a chip pair. For example, the second-type diode 25a can be a fast recovery diode, and it can be connected in reverse parallel with the silicon-based power chip 24. In this embodiment, by connecting the second-type diode 25a in reverse parallel with the silicon-based power chip 24, the overall reverse current carrying capacity of the module can be enhanced, which is beneficial to improving the overall efficiency and reliability of the half-bridge power module 100. In the first silicon-based chip group 212, the second type diode 25a can be connected to the AC region 112 via the connecting line 26, and the second type diode 25a in the second silicon-based chip group 222 can be connected to the DC negative region 113 via the connecting line 26.

[0124] Optionally, only the first wide bandgap chipset 211 and the second wide bandgap chipset 221 may have diodes 25 with the same substrate material as the wide bandgap power chip 23; or, only the first silicon-based chipset 212 and the second silicon-based chipset 222 may have diodes 25 with the same substrate material as the silicon-based power chip 24; or, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 may have diodes 25 with the same substrate material as the wide bandgap power chip 23, while the first silicon-based chipset 212 and the second silicon-based chipset 222 may have diodes 25 with the same substrate material as the silicon-based power chip 24.

[0125] For ease of description, the following description will only take the example of the first silicon-based chipset 212 and the second silicon-based chipset 222 having diodes 25 made of the same material as the silicon-based power chip 24.

[0126] In some embodiments, there are multiple silicon-based power chips 24 and second-type diodes 25a in the first silicon-based chipset 212 and the second silicon-based chipset 222. Thus, multiple chip pairs are formed in both the first silicon-based chipset 212 and the second silicon-based chipset 222. The multiple chip pairs are arranged along the second direction, which can amplify the current specification, expand the power level, and improve the power load.

[0127] Furthermore, referring to Figures 12, 14 and 15, the silicon-based power chip 24 and the second type diode 25a in each chip pair are arranged along a first direction or a second direction.

[0128] As shown in Figure 12, there are two chip pairs, meaning there can be two silicon-based power chips 24 and two types of diodes 25a. In this case, the silicon-based power chips 24 and the second type of diodes 25a can be arranged alternately in the second direction. In this configuration, the silicon-based power chips 24 and the second type of diodes 25a in the first silicon-based chip group 212 are both connected to the AC region 112 via a connecting line 26 along the first direction. Similarly, the silicon-based power chips 24 and the second type of diodes 25a in the second silicon-based chip group 222 are connected to the DC negative region 113 via the connecting line 26 along the first direction. This method separates silicon-based chips of the same type (including the aforementioned silicon-based power chips 24 and second type of diodes 25a) in each conductive region, which helps avoid thermal coupling between similar silicon-based chips, reduces heat dissipation pressure, and minimizes the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the first direction, thus improving space utilization.

[0129] Alternatively, as shown in Figures 14 and 15, the silicon-based power chip 24 and the second type diode 25a in each chip pair are arranged along a first direction.

[0130] In some embodiments, the silicon-based power chips 24 and the second type diodes 25a in the multiple chip pairs are arranged in the same or opposite directions.

[0131] For example, as shown in Figure 14, there are two chip pairs. The silicon-based power chip 24 and the second type diode 25a in each chip pair are arranged along the first direction, and the silicon-based power chip 24 in each chip pair is located on the same side of the corresponding second type diode 25a along the first direction. In this way, the current sharing performance of the silicon-based power chip 24 and the second type diode 25a in the two chip pairs are better, and the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the second direction is smaller.

[0132] Alternatively, as shown in Figure 15, there are two chip pairs. In each chip pair, the silicon-based power chip 24 and the second-type diode 25a are arranged along a first direction. In one chip pair, the silicon-based power chip 24 is located on one side of the corresponding second-type diode 25a along the first direction, and in the other chip pair, the silicon-based power chip 24 is located on the other side of the corresponding second-type diode 25a along the first direction. Furthermore, the silicon-based power chip 24 in one chip pair and the second-type diode 25a in the other chip pair are arranged side-by-side along a second direction. This arrangement, with the silicon-based power chips 24 and the second-type diodes 25a in multiple chip pairs facing opposite directions, helps reduce thermal coupling of the same type of silicon-based chips, improves heat dissipation performance, and reduces the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the second direction.

[0133] Understandably, when the silicon-based power chip 24 and the second type diode 25a in each chip pair are arranged along the first direction, the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 in the first direction increases and the space occupied in the second direction decreases. Therefore, the size of the area of ​​the DC positive region 111 corresponding to the first silicon-based chip group 212 can be adjusted to match the space occupied by the first silicon-based chip group 212 in the first and second directions. At the same time, the size of the area of ​​the AC region 112 corresponding to the second silicon-based chip group 222 can also be adjusted to match the space occupied by the second silicon-based chip group 222 in the first and second directions.

[0134] In some embodiments, referring to FIG13, both the first silicon-based chipset 212 and the second silicon-based chipset 222 have multiple chip pairs. Multiple silicon-based power chips 24 are arranged adjacent to each other along a second direction, and multiple second-type diodes 25a are arranged adjacent to each other along the second direction. In other words, in this embodiment, chips of the same type are adjacent to each other and connected to corresponding conductive areas via connecting lines 26 along the first direction. This chip arrangement in this embodiment facilitates the setting of the driving connecting lines 26, and the smaller dimensions of the first silicon-based chipset 212 and the second silicon-based chipset 222 along the first direction improve the space utilization of the first silicon-based chipset 212 and the second silicon-based chipset 222 along the first direction.

[0135] In some embodiments, referring to Figures 5-7, the wide-bandgap power chip 23 includes a SiC MOSFET, and the silicon-based power chip 24 includes a Si IGBT. That is, in this embodiment, the copper layers of the SiC half-bridge and the IGBT half-bridge are electrically connected inside the half-bridge power module 100. This reduces the commutation inductance between the SiC device and the IGBT device, shortens the commutation time, and improves efficiency.

[0136] As shown in Figure 5, the SiC MOSFET includes a source 231, a gate 232, and a drain 233. The drain 233 is located on the side of the SiC MOSFET facing the conductive metal layer 11 and is connected to the conductive region thereon through a welding or sintering process. The source 231 and the gate 232 are located on the side of the SiC MOSFET away from the conductive metal layer 11 and are used to connect to other conductive regions.

[0137] As shown in Figure 6, the Si IGBT includes an emitter 241, a gate 242, and a collector 243. The collector 243 is located at the bottom of the Si IGBT (the side of the Si IGBT facing the conductive metal layer 11) and is used to connect with the conductive region thereon by means of sintering, welding, etc. The emitter 241 and the gate 242 are located on the side of the Si IGBT away from the conductive metal layer 11 and are used to connect with other conductive regions.

[0138] As shown in Figure 7, diode 25 can be a Si FRD (fast recovery diode). Diode 25 includes a cathode 252 and an anode 251. The anode 251 is located at the top of diode 25 (i.e., the side of diode 25 facing away from conductive metal layer 11) and is used for electrical connection with other conductive areas. The cathode 252 is located at the bottom of diode 25 (i.e., the side of diode 25 facing conductive metal layer 11) and is connected to the conductive area thereon by sintering or welding.

[0139] In other words, the half-bridge power module 100 of this embodiment packages a SiC MOSFET and a Si IGBT in parallel. This allows the SiC MOSFET to perform the switching action using drive signals with different timings, while the Si IGBT bears most of the conduction current. This solves the problems of high switching losses and low switching frequency of IGBTs. Furthermore, a larger current can be controlled by a SiC MOSFET with a smaller current carrying capacity, thus solving the problem of high SiC cost. In this way, both the performance and cost of the half-bridge power module 100 can be balanced.

[0140] In some embodiments, in conjunction with Figures 1-4, 16 and 17, the conductive metal layer 11 may further include two driving layer regions, which correspond to the upper bridge 21 and the lower bridge 22, respectively. The two driving layer regions are the first driving layer region 115 and the second driving layer region 114.

[0141] The second driving layer region 114 may include: a second SiC gate driving layer 1141, a second IGBT gate driving layer 1142, a second SiC source driving layer 1143, and a second IGBT emitter driving layer 1144. The gate 232 of the SiC MOSFET of the upper bridge 21 is connected to the second SiC gate driving layer 1141 via a connection line 26, the source 231 of the SiC MOSFET of the upper bridge 21 is connected to the second SiC source driving layer 1143 via a connection line 26, the gate 242 of the Si IGBT of the upper bridge 21 is connected to the second IGBT gate driving layer 1142 via a connection line 26, and the emitter 241 of the Si IGBT of the upper bridge 21 is connected to the second IGBT emitter driving layer 1144 via a connection line 26.

[0142] The first driving layer region 115 may include: a first SiC gate driving layer 1151, a first IGBT gate driving layer 1152, a first SiC source driving layer 1153, and a first IGBT emitter driving layer 1154. The gate 232 of the SiC MOSFET of the lower bridge 22 is connected to the first SiC gate driving layer 1151 through the connection line 26. The source 231 of the SiC MOSFET of the lower bridge 22 is connected to the first SiC source driving layer 1153 through the connection line 26. The gate 242 of the Si IGBT of the lower bridge 22 is connected to the first IGBT gate driving layer 1152 through the connection line 26. The emitter 241 of the Si IGBT of the lower bridge 22 is connected to the first IGBT emitter driving layer 1154 through the connection line 26.

[0143] Thus, by setting the first driving layer region 115 and the second driving layer region 114, it is possible to facilitate the connection between each wide bandgap power chip 23, silicon-based power chip 24 and external circuits.

[0144] Optionally, in conjunction with Figures 1-4, 16, and 17, driving terminals 116 are provided on the second SiC gate driving layer 1141, the second IGBT gate driving layer 1142, the second SiC source driving layer 1143, the second IGBT emitter driving layer 1144, the first SiC gate driving layer 1151, the first IGBT gate driving layer 1152, the first SiC source driving layer 1153, and the first IGBT emitter driving layer 1154. Each driving terminal 116 can be led out perpendicularly to the substrate 1 to simplify the internal circuit structure of the half-bridge power module 100, reduce space occupation, and facilitate the connection of the half-bridge power module 100 with external circuits.

[0145] Optionally, the second driving layer region 114 can be located between the first wide bandgap chipset 211 and the first silicon-based chipset 212, and the first driving layer region 115 can be located between the DC positive region 111 and the AC region 112. In this way, the transmission path of each driving signal can be minimized and parasitic inductance can be reduced.

[0146] Optionally, referring to Figures 1 and 16, the second SiC source driving layer 1143 and the second IGBT emitter driving layer 1144 are connected to form a second common copper layer 1145. In this case, the second SiC source driving layer 1143 and the second IGBT emitter driving layer 1144 can share the same driving terminal 116. This simplifies the internal structure of the half-bridge power module 100 and improves space utilization. Correspondingly, the first SiC source driving layer 1153 and the first IGBT emitter driving layer 1154 are connected to form a first common copper layer 1155. In this case, the first SiC source driving layer 1153 and the first IGBT emitter driving layer 1154 can share the same driving terminal 116. This also simplifies the internal structure of the half-bridge power module 100 and improves space utilization.

[0147] Optionally, referring to Figures 3, 4, and 17, the first SiC gate driving layer 1151 and the first SiC source driving layer 1153 form a first sub-layer group, and the first IGBT gate driving layer 1152 and the first IGBT emitter driving layer 1154 form a second sub-layer group. The first and second sub-layer groups can be arranged separately. For example, the first sub-layer group can be located on the side of the first wide bandgap chip group 211 facing the second wide bandgap chip group 221 along the second direction, or the AC region 112 can surround the first sub-layer group, and the second sub-layer group can be located along the second side 110b.

[0148] The second SiC gate driving layer 1141 and the second SiC source driving layer 1143 form a third sub-layer group, and the second IGBT gate driving layer 1142 and the second IGBT emitter driving layer 1144 form a fourth sub-layer group. The third and fourth sub-layer groups can be arranged separately. For example, the third sub-layer group is located on the side of the first wide bandgap chip group 211 that is away from the second wide bandgap chip group 221, and the fourth sub-layer group is located along the first side 110a.

[0149] Of course, this application is not limited to this. The layout of the first driving layer region 115 and the second driving layer region 114 can be reasonably set according to the layout of the upper bridge 21 and the lower bridge 22 in order to minimize the transmission path of each driving signal, reduce parasitic inductance, improve efficiency, and facilitate connection with external circuits.

[0150] In some embodiments, the second SiC source drive layer 1143 is provided with a plurality of drive resistors corresponding one-to-one with and connected to the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211; the first SiC source drive layer 1153 is provided with a plurality of drive resistors corresponding one-to-one with and connected to the plurality of wide bandgap power chips 23 in the second wide bandgap chipset 221. The drive resistors can connect the gate 232 of the corresponding wide bandgap power chip 23, such as a SiC MOSFET, to the copper layer on which it is located. By setting the drive resistors, the gate current 232 of the SiC MOSFET can be limited, ensuring the switching speed and performance of the SiC MOSFET. In addition, the drive circuit can be protected from damage by overcurrent and overvoltage.

[0151] Optionally, the multiple driving resistors on the second SiC source driving layer 1143 can be connected in series or in parallel as needed, and the multiple driving resistors on the first SiC source driving layer 1153 can be connected in series or in parallel as needed.

[0152] Understandably, since the second SiC source drive layer 1143 is located on the side of the second SiC source drive layer 1143 closer to the DC positive region 111, and the first SiC source drive layer 1153 is located on the side of the first SiC source drive layer 1153 closer to the AC region 112, the driving resistors are brought closer to the corresponding SiC MOSFETs, minimizing the resistance and capacitance of the drive signal transmission, which is beneficial to improving the system's response speed and stability.

[0153] The following describes a full-bridge power module 300 according to a second aspect embodiment of this application.

[0154] Referring to Figure 20, the full-bridge power module 300 of this embodiment may include the half-bridge power module 100 described in the above embodiment. Specifically, there may be multiple half-bridge power modules 100, such as three. The three half-bridge power modules 100 are connected to the same heat sink and form a three-phase full-bridge power module 300. Each half-bridge power module 100 corresponds to one of the single phases. For example, the three half-bridge power modules 100 include a first half-bridge power module 100, a second half-bridge power module 100, and a third half-bridge power module 100. The first half-bridge power module 100 corresponds to the U phase, the second half-bridge power module 100 corresponds to the V phase, and the third half-bridge power module 100 corresponds to the W phase. The first half-bridge power module 100, the second half-bridge power module 100, and the third half-bridge power module 100 may be arranged sequentially, or their order may be adjusted as needed.

[0155] In addition, the full-bridge power module 300 may also include a heat sink 200, and the three half-bridge power modules 100 may all be mounted on the same heat sink 200.

[0156] The full-bridge power module 300 according to the embodiments of this application is composed of three half-bridge power modules 100 as described in the above embodiments. Since each half-bridge power module 100 is a plurality of parallel half-bridge circuits formed by wide-bandgap power chips 23 and silicon-based power chips 24, the current specification of the full-bridge power module 300 is greatly amplified, which can better convert DC power into AC power for use by electrical devices. It has stronger electrical performance and is more suitable for use as an automotive-grade power module.

[0157] The following describes an electrical appliance 400 according to an embodiment of a third aspect of this application.

[0158] The electrical device 400 in this embodiment can be a new energy vehicle or other types of electrical device 400. The electrical device 400 may include a power module, which may include the half-bridge power module 100 in the first aspect embodiment above, and / or the full-bridge power module 300 in the second aspect embodiment above.

[0159] Specifically, the electrical equipment 400 also includes an energy storage device and an electrical device. The energy storage device can be a battery pack, and the electrical device can be a motor, such as a three-phase AC motor. A power module is located between the energy storage device and the electrical device, converting the direct current (DC) generated by the energy storage device into alternating current (AC) for the electrical device. The electrical equipment 400 may only have a half-bridge power module 100, or only a full-bridge power module 300, or a combination of both as needed.

[0160] The electrical device 400 in this embodiment of the application can convert the direct current generated by the energy storage device into alternating current to power the electrical device, such as the motor, thereby providing power for the vehicle's movement. Furthermore, since the power module adopts the half-bridge power module 100 and / or the full-bridge power module 300 in the above embodiment, the current specification is higher, which can better perform AC-DC conversion and make the performance more reliable.

[0161] The various embodiments or implementation methods described in this specification are presented in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0162] It should be noted that the embodiments referred to in the specification, such as "one embodiment," "embodiment," "exemplary embodiment," and "some embodiments," may include specific features, structures, or characteristics, but not every embodiment necessarily includes that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not, is within the knowledge scope of those skilled in the art.

[0163] Generally speaking, terms should be understood at least in part by their use in context. For example, at least in part by context, the term "one or more" as used in the text can be used to describe any feature, structure, or characteristic of the singular meaning, or a combination of features, structures, or characteristics of the plural meaning. Similarly, at least in part by context, terms such as "a" or "the" can also be understood to convey either singular or plural usage.

[0164] It should be readily understood that the terms “on,” “above,” and “on top of” in this disclosure should be interpreted in the broadest possible sense, such that “on” means not only “directly on something” but also “on something” with an intermediate feature or layer therebetween, and that “above” or “on top of” means not only “on top of something” but also “on top of something” without an intermediate feature or layer therebetween (i.e., directly on something).

[0165] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A half-bridge power module (100), wherein, include: A substrate (1) is provided with a conductive metal layer (11), the conductive metal layer (11) including a DC positive electrode region (111), an AC region (112) and a first driving layer region (115); The circuit unit (2) includes an upper bridge (21) and a lower bridge (22). The upper bridge (21) is located in the DC positive region (111), and the lower bridge (22) is located in the AC region (112). The upper bridge (21) includes a first wide bandgap chipset (211), and the lower bridge (22) includes a second wide bandgap chipset (221). At least a portion of the first driving layer region (115) is disposed between the first wide bandgap chipset (211) and the second wide bandgap chipset (221).

2. The half-bridge power module (100) according to claim 1, wherein, The first driving layer region (115) is used to form an electrical connection with the second wide bandgap chipset (221).

3. The half-bridge power module (100) according to claim 2, wherein, Both the first wide bandgap chipset (211) and the second wide bandgap chipset (221) include a plurality of wide bandgap power chips (23) arranged along a first direction, and the first wide bandgap chipset (211) and the second wide bandgap chipset (221) are arranged along a second direction.

4. The half-bridge power module (100) according to claim 3, wherein, The multiple wide bandgap power chips (23) of the first wide bandgap chipset (211) are connected in series one-to-one with the multiple wide bandgap power chips (23) in the first wide bandgap chipset (211) to form a half-bridge circuit, and the multiple wide bandgap power chips (23) in the first wide bandgap chipset (211) are connected in parallel with each other.

5. The half-bridge power module (100) according to claim 3, wherein, At least a portion of the structure of each of the DC positive region (111) and the AC region (112) extends along the first direction and is arranged along the second direction. The first wide bandgap chip group (211) is disposed in the portion of the DC positive region (111) extending along the first direction, and the second wide bandgap chip group (221) is disposed in the portion of the AC region (112) extending along the first direction.

6. The half-bridge power module (100) according to claim 5, wherein, The conductive metal layer (11) further includes a DC negative electrode region (113), at least a portion of the structure of which extends along the first direction.

7. The half-bridge power module (100) according to claim 6, wherein, The plurality of wide bandgap power chips (23) in the first wide bandgap chipset (211) are electrically connected to the AC region (112), and the plurality of wide bandgap power chips (23) in the second wide bandgap chipset (221) are electrically connected to the DC negative region (113).

8. The half-bridge power module (100) according to claim 3, wherein, The outer contour of the conductive metal layer (11) includes a first side (110a) and a second side (110b) opposite to each other along the first direction, and a third side (110c) and a fourth side (110d) opposite to each other along the second direction. The DC positive region (111) includes a first positive transmission region (1111), which extends along the second direction and is disposed along the first side (110a). The upper bridge (21) also includes a first silicon-based chip group (212), which is located in the first positive electrode transmission region (1111).

9. The half-bridge power module (100) according to claim 8, wherein, The DC positive region (111) further includes a second positive transmission region (1112), which extends along the first direction and is interspersed with the AC region (112), and the first wide bandgap chip group (211) is disposed in the second positive transmission region (1112).

10. The half-bridge power module (100) according to claim 9, wherein, The DC negative pole region (113) includes a first negative pole transmission region (1131) and a second negative pole transmission region (1132). The first negative pole transmission region (1131) is disposed along the third side (110c), and the second negative pole transmission region (1132) is disposed along the second side (110b).

11. The half-bridge power module (100) according to claim 10, wherein, The AC region (112) includes a first AC region (1121)(112), which extends along the first direction and is located between the second positive transmission region (1112) and the first negative transmission region (1131). The second wide bandgap chipset (221) is located in the first AC region (1121)(112).

12. The half-bridge power module (100) according to claim 11, wherein, The AC region (112) further includes a second AC region (1122), which is located between the second positive electrode transmission region (1112) and the second negative electrode transmission region (1132). The lower bridge (22) further includes a second silicon-based chipset (222), which is located in the second AC area (1122)(112).

13. The half-bridge power module (100) according to claim 12, wherein, A recessed area is provided between the first AC region (1121)(112) and the second AC region (1122)(112) to accommodate the second positive electrode transmission region (1112) extending along the first direction.

14. The half-bridge power module (100) according to claim 13, wherein, The half-bridge power module (100) also includes a DC positive terminal (117), which is located in the first positive transmission region (1111).

15. The half-bridge power module (100) according to claim 14, wherein, The DC positive terminal (117) is led out from the third side (110c).

16. The half-bridge power module (100) according to claim 14, wherein, The half-bridge power module (100) also includes a DC negative terminal (118), which is located in the first negative transmission area (1131).

17. The half-bridge power module (100) according to claim 16, wherein, The DC negative terminal (118) is led out from the third side (110c).

18. The half-bridge power module (100) according to claim 16, wherein, The half-bridge power module (100) also includes an AC terminal (119), which is located in the second AC area (1122)(112).

19. The half-bridge power module (100) according to claim 18, wherein, The AC terminal (119) is led out from the fourth side (110d).

20. The half-bridge power module (100) according to claim 16, wherein, The DC negative terminal (118) and the second wide bandgap chipset (221) are arranged opposite each other along the second direction.

21. The half-bridge power module (100) according to claim 12, wherein, The multiple wide-bandgap power chips (23) in the first wide-bandgap chipset (211) are all connected to the first AC area (1121) (112) via the first connection line (261)(26).

22. The half-bridge power module (100) according to claim 21, wherein, The multiple wide-bandgap power chips (23) in the second wide-bandgap chipset (221) are all connected to the first negative transmission area (1131) via the second connection lines (262)(26).

23. The half-bridge power module (100) according to claim 4, wherein, The plurality of wide bandgap power chips (23) in at least one of the first wide bandgap chipset (211) and the second wide bandgap chipset (221) are arranged flush in the second direction.

24. The half-bridge power module (100) according to claim 4, wherein, The first wide bandgap chipset (211) and the second wide bandgap chipset (221) are at least one group of multiple wide bandgap power chips (23), and any two adjacent wide bandgap power chips (23) are staggered along the second direction.

25. The half-bridge power module (100) according to claim 8, wherein, Along the second direction of the DC positive region (111), the first wide bandgap chip group (211) is disposed near the third side (110c), and the first silicon-based chip group (212) is disposed near the fourth side (110d).

26. The half-bridge power module (100) according to claim 12, wherein, Along the second direction of the AC region (112), the second wide bandgap chipset (221) is disposed near the third side (110c), and the second silicon-based chipset (222) is disposed near the fourth side (110d).

27. The half-bridge power module (100) according to any one of claims 1-26, wherein, The first wide bandgap chipset (211) and the second wide bandgap chipset (221) also include a first type of diode. The first type of diode of the first wide bandgap chipset (211) is connected in series with the first type of diode of the second wide bandgap chipset (221). The first type of diode is connected in parallel with the wide bandgap power chip (23) in the same group.

28. The half-bridge power module (100) according to claim 27, wherein, The first type of diode has the same substrate material as the wide bandgap power chip (23).

29. The half-bridge power module (100) according to claim 3, wherein, The first silicon-based chipset (212) and the second silicon-based chipset (222) each include at least one second type diode (25a). The second type diode (25a) of the first silicon-based chipset (212) is connected in series with the second type diode (25a) of the second silicon-based chipset (222). The second type diode (25a) is connected in parallel with the silicon-based chips in the same group.

30. The half-bridge power module (100) according to claim 29, wherein, The silicon-based power chip (24) and the second type of diode (25a) in the silicon-based chipset are connected in parallel to form a chip pair.

31. The half-bridge power module (100) according to claim 29, wherein, The second type of diode (25a) has the same substrate material type as the silicon-based power chip (24).

32. The half-bridge power module (100) according to claim 30, wherein, The first silicon-based chip group (212) and the second silicon-based chip group (222) each contain multiple chip pairs, and the multiple chip pairs are arranged along the second direction.

33. The half-bridge power module (100) according to claim 32, wherein, The silicon-based power chip (24) and the second type of diode (25a) in each chip pair are arranged along the first direction or the second direction.

34. The half-bridge power module (100) according to claim 32, wherein, The silicon-based power chips (24) and the second type diodes (25a) in the plurality of chip pairs are arranged in the same or opposite directions.

35. The half-bridge power module (100) according to claim 29, wherein, The first silicon-based chip group (212) and the second silicon-based chip group (222) each contain multiple chip pairs, wherein multiple silicon-based power chips (24) are arranged adjacent to each other along the second direction, multiple second-type diodes (25a) are arranged adjacent to each other along the second direction, and multiple silicon-based power chips (24) and second-type diodes (25a) are arranged along the second direction.

36. The half-bridge power module (100) according to any one of claims 8-35, wherein, The wide bandgap power chip (23) includes a SiC MOSFET, and the silicon-based power chip (24) includes a SiIGBT.

37. The half-bridge power module (100) according to claim 36, wherein, The first driving layer region (115) includes: a first SiC gate driving layer (1151) and a first SiC source driving layer (1153). The gate (232) of the SiC MOSFET of the lower bridge (22) is connected to the first SiC gate driving layer (1151), and the source (231) of the SiC MOSFET of the lower bridge (22) is connected to the first SiC source driving layer (1153).

38. The half-bridge power module (100) according to claim 37, wherein, The first SiC gate driving layer (1151) and the first SiC source driving layer (1153) are disposed between the first wide bandgap chipset (211) and the second wide bandgap chipset (221).

39. The half-bridge power module (100) according to claim 37, wherein, The first driving layer region (115) further includes: a first IGBT gate driving layer (1152) and a first IGBT emitter driving layer (1154), wherein the gate (242) of the Si IGBT of the lower bridge (22) is connected to the first IGBT gate driving layer (1152), and the emitter (241) of the Si IGBT of the lower bridge (22) is connected to the first IGBT emitter driving layer (1154).

40. The half-bridge power module (100) according to claim 39, wherein, The first IGBT gate driving layer (1152) and the first IGBT emitter driving layer (1154) are disposed on the second side (110b).

41. The half-bridge power module (100) according to claim 36, wherein, The conductive metal layer (11) further includes a second driving layer region (114), which is located close to the first wide bandgap chipset (211).

42. The half-bridge power module (100) according to claim 41, wherein, At least a portion of the second driving layer region (114) is disposed between the DC positive region (111) and the AC region (112).

43. The half-bridge power module (100) according to claim 42, wherein, The second driving layer region (114) includes a second SiC gate driving layer (1141) and a second SiC source driving layer (1143). The gate (232) of the SiC MOSFET of the upper bridge (21) is connected to the second SiC gate driving layer (1141), and the source (231) of the SiC MOSFET of the upper bridge (21) is connected to the second SiC source driving layer (1143).

44. The half-bridge power module (100) according to claim 43, wherein, The second SiC gate driving layer (1141) and the second IGBT gate driving layer (1142) are disposed between the DC positive region (111) and the AC region (112).

45. The half-bridge power module (100) according to claim 43, wherein, The second driving layer region (114) further includes: a second IGBT gate driving layer (1142) and a second IGBT emitter driving layer (1144), wherein the gate (242) of the Si IGBT in the upper bridge (21) is connected to the second IGBT gate driving layer (1142), and the emitter (241) of the Si IGBT in the upper bridge (21) is connected to the second IGBT emitter driving layer (1144).

46. ​​The half-bridge power module (100) according to claim 45, wherein, The second IGBT gate driving layer (1142) and the second IGBT emitter driving layer (1144) are disposed on the second side (110b).

47. The half-bridge power module (100) according to claim 39, wherein, The first SiC source driving layer (1153) and the first IGBT emitter driving layer (1154) are connected to form a first common copper layer (1155).

48. The half-bridge power module (100) according to claim 45, wherein, The second SiC source drive layer (1143) and the second IGBT emitter drive layer (1144) are connected to form a second common copper layer (1145).

49. A full-bridge power module (300), wherein, include: The half-bridge power module (100) according to any one of claims 1-48, wherein there are multiple half-bridge power modules (100), and the multiple half-bridge power modules (100) are connected to the same heat sink base plate (200) and constitute a full-bridge power module (300).

50. An electrical appliance (400), wherein, Includes a power module, said power module comprising the half-bridge power module (100) according to any one of claims 1-48.

51. An electrical appliance (400), wherein, Includes a power module, the power module including the full-bridge power module (300) of claim 49.

Images