Half-bridge power module, full-bridge power module, and electric device

Abstract

The present application provides a half-bridge power module (100), a full-bridge power module (300), and an electric device (400). The half-bridge power module (100) comprises: a substrate (1), which is provided with a conductive metal layer (11), the conductive metal layer (11) comprising a direct current positive electrode region (111), an alternating current region (112), and a direct current negative electrode region (113); and a circuit unit (2), which comprises an upper bridge (21) and a lower bridge (22), the upper bridge (21) being arranged in the direct current positive electrode region (111), and the lower bridge (22) being arranged in the alternating current region (112). The upper bridge (21) comprises a first wide-bandgap chipset (211) and a first silicon-based chipset (212), and the lower bridge (22) comprises a second wide-bandgap chipset (221) and a second silicon-based chipset (222). The first wide-bandgap chipset (211) and the second wide-bandgap chipset (221) are arranged in a first direction, the first wide-bandgap chipset (211) and the second wide-bandgap chipset (221) each comprise a plurality of wide-bandgap power chips (23) arranged in a second direction, and the first silicon-based chipset (212) and the second silicon-based chipset (222) each comprise at least one silicon-based power chip (24).

Description

Half-bridge power modules, full-bridge power modules and electrical equipment

[0001] This application claims priority to Chinese Patent Application No. 202411205445.3, filed on August 29, 2024, entitled "Half-bridge power module, full-bridge power module and electrical equipment", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of semiconductor technology, and in particular to a half-bridge power module, a full-bridge power module, and an electrical device. Background Technology

[0003] With the development of new energy vehicle technology, more and more new energy vehicle main drive inverters are adopting power semiconductor modules.

[0004] Currently, the power semiconductor modules on the market are mainly Si IGBT modules and SiC MOSFET modules. The main drawback of Si IGBT modules is their high switching losses, while the main drawback of SiC MOSFET modules is their high cost due to limitations in the silicon carbide substrate manufacturing process, making it difficult to meet the explosive growth in demand from the new energy vehicle market. The technology of combining Si IGBTs and SiC MOSFETs in parallel is still in its early stages, and related technologies lack consideration for the dynamic current sharing problem in parallel connection scenarios. Summary of the Invention

[0005] In view of the above problems, this application provides a half-bridge power module, a full-bridge power module, and an electrical device, which can better expand the current specifications and power levels, while taking into account switching losses and cost issues. Furthermore, it can improve the dynamic current sharing performance within the module.

[0006] This application provides a half-bridge power module, comprising: a substrate including a first surface, the first surface having a conductive metal layer, the conductive metal layer including a DC positive region, an AC region, and a DC negative region; a circuit unit including an upper bridge and a lower bridge, the upper bridge being disposed in the DC positive region, the lower bridge being disposed in the AC region, the upper bridge including a first wide bandgap chipset and a first silicon-based chipset, the lower bridge including a second wide bandgap chipset and a second silicon-based chipset; the first wide bandgap chipset and the second wide bandgap chipset are arranged along a first direction, both the first wide bandgap chipset and the second wide bandgap chipset include a plurality of wide bandgap power chips arranged along a second direction, and both the first silicon-based chipset and the second silicon-based chipset include at least one silicon-based power chip.

[0007] In some embodiments, the multiple wide bandgap power chips of the second wide bandgap chipset correspond one-to-one with and are electrically connected to the multiple wide bandgap power chips in the first wide bandgap chipset to form a half-bridge circuit, and the multiple wide bandgap power chips in the first wide bandgap chipset are connected in parallel with each other.

[0008] In some embodiments, at least a portion of the structure of the DC positive region and the AC region extends along the second direction, the first wide bandgap chip group is disposed in the portion of the DC positive region extending along the second direction, and the second wide bandgap chip group is disposed in the portion of the AC region extending along the second direction.

[0009] In some embodiments, at least a portion of the structure of the DC negative pole region extends along the second direction.

[0010] In some embodiments, the DC positive region, the AC region, and the DC negative region are arranged sequentially along the first direction.

[0011] In some embodiments, a plurality of the wide bandgap power chips in the first wide bandgap chipset are all connected to the AC area via a first connection line.

[0012] In some embodiments, multiple wide-bandgap power chips in the second wide-bandgap chipset are connected to the DC negative electrode region via a second connection line.

[0013] In some embodiments, a plurality of wide-bandgap power chips in at least one of the first wide-bandgap chipset and the second wide-bandgap chipset are arranged flush in the first direction.

[0014] In some embodiments, the DC positive region is provided with a DC positive terminal, the DC negative region is provided with a DC negative terminal, and the AC region is provided with an AC terminal.

[0015] In some embodiments, the DC positive terminal and the DC negative terminal are located on the same side of the DC positive region and the DC negative region along the second direction, respectively, and the AC terminal is located on the other side of the AC region along the second direction.

[0016] In some embodiments, any two adjacent wide-bandgap power chips in the second wide-bandgap chipset are staggered along the first direction.

[0017] In some embodiments, a plurality of wide bandgap power chips in the second wide bandgap chipset are arranged opposite to the DC negative electrode region along the first direction.

[0018] In some embodiments, the distance between the plurality of wide bandgap power chips in the second wide bandgap chipset and the DC output layer along the first direction decreases sequentially in the direction along the second direction and away from the DC negative terminal.

[0019] In some embodiments, in the second direction of the DC positive terminal region, the first wide bandgap chipset is disposed between the first silicon-based chipset and the DC positive terminal.

[0020] In some embodiments, in a second direction of the AC region, the second wide bandgap chipset is disposed between the second silicon-based chipset and the AC terminal.

[0021] In some embodiments, both the first silicon-based chipset and the second silicon-based chipset include at least one diode, which forms a chip pair with other silicon-based power chips within the chipset.

[0022] In some embodiments, the diode is made of the same substrate material as the silicon-based power chip.

[0023] In some embodiments, both the first silicon-based chipset and the second silicon-based chipset have multiple chip pairs, and the multiple chip pairs are arranged along the second direction.

[0024] In some embodiments, the silicon-based power chip and diode in each chip pair are arranged along the first direction or the second direction.

[0025] In some embodiments, the silicon-based power chips and diodes in the plurality of chip pairs are arranged in the same or opposite directions.

[0026] In some embodiments, the first silicon-based chip group and the second silicon-based chip group each have multiple chip pairs, wherein the multiple silicon-based power chips are arranged adjacent to each other along the second direction, the multiple diodes are arranged adjacent to each other along the second direction, and the multiple silicon-based power chips and the diodes are arranged along the second direction.

[0027] In some embodiments, the wide bandgap power chip includes a SiC MOSFET, and the silicon-based power chip includes a Si IGBT.

[0028] In some embodiments, the conductive metal layer further includes: a first driving layer group, comprising: a first SiC gate driving layer, a first IGBT gate driving layer, a first SiC source driving layer, and a first IGBT emitter driving layer, wherein the gate of the SiC MOSFET of the upper bridge is connected to the first SiC gate driving layer, the source of the SiC MOSFET of the upper bridge is connected to the first SiC source driving layer, the gate of the Si IGBT of the upper bridge is connected to the first IGBT gate driving layer, and the emitter of the Si IGBT of the upper bridge is connected to the first IGBT emitter driving layer.

[0029] In some embodiments, the first SiC source driving layer and the first IGBT emitter driving layer are connected to form a first common copper layer.

[0030] In some embodiments, the first SiC source drive layer is provided with a plurality of drive resistors that correspond one-to-one with and are connected to a plurality of wide bandgap power chips in the first wide bandgap chipset.

[0031] In some embodiments, the conductive metal layer further includes a second driving layer group, comprising: a second SiC gate driving layer, a second IGBT gate driving layer, a second SiC source driving layer, and a second IGBT emitter driving layer. The gate of the SiC MOSFET of the lower bridge is connected to the second SiC gate driving layer, the source of the SiC MOSFET of the lower bridge is connected to the second SiC source driving layer, the gate of the Si IGBT of the lower bridge is connected to the second IGBT gate driving layer, and the emitter of the Si IGBT of the lower bridge is connected to the second IGBT emitter driving layer.

[0032] In some embodiments, the second SiC source driving layer and the second IGBT emitter driving layer are connected to form a second common copper layer.

[0033] In some embodiments, the second SiC source drive layer is provided with a plurality of drive resistors that correspond one-to-one with and are connected to the plurality of wide bandgap power chips in the second wide bandgap chipset.

[0034] In some embodiments, the conductive metal layer includes a first side and a second side opposite to each other along the first direction, the first driving layer group is disposed along the first side, and the DC positive electrode region is located on the side of the first driving layer group away from the first side along the first direction.

[0035] In some embodiments, the second drive layer group is located on one side of the DC negative region toward the second side along the second direction, or the AC region at least partially surrounds the second drive layer group.

[0036] The second aspect of this application also provides a full-bridge power module, comprising: the half-bridge power module described in the first aspect above, wherein there are three half-bridge power modules, the three half-bridge power modules are connected together to form a three-phase full-bridge power module, and each half-bridge power module corresponds to one of the single phases.

[0037] A third aspect of this application also provides an electrical device, including a power module, wherein the power module includes the half-bridge power module described in the first aspect of this application, and / or the full-bridge power module described in the second aspect of this application.

[0038] The half-bridge power module of this application integrates parallel wide-bandgap power chips and silicon-based power chips, forming a hybrid single-phase half-bridge power module that can effectively expand current specifications and power levels while addressing switching losses and cost issues. Furthermore, the first and second wide-bandgap chip groups are arranged along a first direction, each including multiple wide-bandgap power chips arranged along a second direction. The wide-bandgap power chips in the first chip group are connected to the AC region via connecting lines along the first direction, and the wide-bandgap power chips in the second chip group are connected to the DC negative region via connecting lines along the first direction. This ensures that each wide-bandgap power chip in the first chip group has good dynamic current sharing performance, which helps to ensure a uniform distribution of current and thermal stress among the wide-bandgap power chips, thereby improving the electrical performance and reliability of the half-bridge power module. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 is a schematic diagram of the internal layout of a half-bridge power module according to an embodiment of this application;

[0041] Figure 2 is a schematic diagram of the internal layout of another embodiment of the half-bridge power module of this application;

[0042] Figure 3 is a schematic diagram of the internal layout of another embodiment of the half-bridge power module of this application;

[0043] Figure 4 is a schematic diagram of the internal layout of another embodiment of the half-bridge power module of this application;

[0044] Figure 5 is a schematic diagram of the structure of a wide bandgap power chip according to an embodiment of this application;

[0045] Figure 6 is a schematic diagram of the structure of a silicon-based power chip according to an embodiment of this application;

[0046] Figure 7 is a schematic diagram of the diode structure according to an embodiment of this application;

[0047] Figure 8 is a schematic diagram of the arrangement direction and bus direction of wide bandgap power chips in some embodiments of this application;

[0048] Figure 9 is a schematic diagram of the arrangement direction and bus direction of wide bandgap power chips in some other embodiments of this application;

[0049] Figure 10 is a schematic diagram showing the layout of some embodiments of the wide bandgap chipset of this application;

[0050] Figure 11 is a schematic diagram showing the layout of some other embodiments of the wide bandgap power group of this application;

[0051] Figure 12 is a schematic diagram showing the layout of some other embodiments of the wide bandgap power group of this application;

[0052] Figure 13 is a schematic diagram showing the layout of some embodiments of the silicon-based chipset according to the present application;

[0053] Figure 14 is a schematic diagram showing the layout of some other embodiments of the silicon-based chipset according to the present application;

[0054] Figure 15 is a schematic diagram showing the layout of some other embodiments of the silicon-based chipset according to the present application;

[0055] Figure 16 is a schematic diagram showing the arrangement of some other embodiments of the silicon-based chipset according to the present application;

[0056] Figure 17 is a schematic diagram showing the arrangement of some embodiments of the driver layer group in this application;

[0057] Figure 18 is a schematic diagram showing the arrangement of some other embodiments of the driver layer group in this application;

[0058] Figure 19 shows the equivalent circuit diagram and commutation schematic of a typical hybrid power module;

[0059] Figure 20 shows the switching waveforms of a typical hybrid power module;

[0060] Figure 21 is a schematic diagram of the structure of a full-bridge power module according to some embodiments of this application;

[0061] Figure 22 is a schematic diagram of electrical equipment according to some embodiments of this application;

[0062] Figure 23 is a schematic diagram of an electrical device according to some other embodiments of this application.

[0063] Explanation of reference numerals in the attached figures: 100 - Half-bridge power module; 1 - Substrate; 10 - Ceramic layer; 11 - Conductive metal layer; 110a - First side; 110b - Second side; 110c - Third side; 110d - Fourth side; 111 - DC positive region; 112 - AC region; 113 - DC negative region; 114 - First driving layer group; 1141 - First SiC gate driving layer; 1142 - First IGBT gate driving layer; 1143 - First SiC source driving layer; 1144 - First IGBT emitter driving layer; 1145 - First common copper layer; 115 - Second driving layer group; 1151 - Second SiC gate driving layer; 1152 - Second IGBT gate driving layer; 1153 - Second SiC source driving layer; 1154 - Second IGBT emitter driving layer; 1155 - Second common copper layer; 116-Drive terminal; 117-DC positive terminal; 118-DC negative terminal; 119-AC terminal; 120-Drive resistor; 2-Circuit unit; 21-Upper bridge; 211-First wide bandgap chipset; 212-First silicon-based chipset; 22-Lower bridge; 221-Second wide bandgap chipset; 222-Second silicon-based chipset; 23-Wide bandgap power chip; 231-Source; 232-Gate; 233-Drain; 24-Silicon-based power chip; 241-Emitter; 242-Gate; 243-Collector; 25-Diode; 251-Anode; 252-Cathode; 26-Connecting wire; 261-First connecting wire; 262-Second connecting wire; 200-Heat sink; 300-Full-bridge power module; 400-Electrical equipment. Detailed Implementation

[0064] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0065] With the development of new energy vehicle technology, more and more new energy vehicle main drive inverters are adopting power semiconductor modules. Currently, the power semiconductor modules on the market are mainly Si IGBT modules and SiC MOSFET modules. The main disadvantage of Si IGBT modules is their high switching losses, while the main disadvantage of SiC MOSFET modules is their high cost due to limitations in the manufacturing process of silicon carbide substrates, making it difficult to meet the explosive growth in demand from the new energy vehicle market. The technology of combining Si IGBTs and SiC MOSFETs in parallel is still in its early stages, and related technologies lack consideration for the dynamic current sharing problem in the parallel connection of Si IGBTs and SiC MOSFETs.

[0066] In view of this, this application provides a half-bridge power module that integrates parallel wide-bandgap power chips and silicon-based power chips, which can better expand current specifications and power levels while taking into account switching losses and cost issues. Furthermore, it can improve the uniform distribution of current and thermal stress among the wide-bandgap power chips, thereby improving the electrical performance and reliability of the half-bridge power module.

[0067] The half-bridge power module 100 of the first aspect embodiment of this application is described below with reference to Figures 1-21.

[0068] Referring to Figures 1-4, the half-bridge power module 100 of this embodiment includes: a substrate 1 and a circuit unit 2.

[0069] The substrate 1 can be one of the following: thick film printed ceramic substrate (TPC), direct bonded copper ceramic substrate (DBC), active metal welded ceramic substrate (AMB), direct electroplated copper ceramic substrate (DPC), or other types of substrate.

[0070] The substrate 1 may include a first surface and a second surface opposite to each other. The first surface is provided with a conductive metal layer 11. For example, the substrate 1 may include a ceramic layer 10 and copper layers located on both sides of the ceramic layer 10. The ceramic layer 10 may be at least one of alumina, silicon nitride, and aluminum nitride. One of the copper layers may serve as the conductive metal layer 11. The conductive metal layer 11 may be divided into multiple conductive areas according to the circuit layout requirements. Each conductive area may be used to set up a power chip and a connection circuit for connecting different power chips (this connection circuit is not shown in the figure and may be reasonably set according to the arrangement of each power chip, and will not be described in detail below). The other copper layer may serve as a heat dissipation surface of the substrate 1.

[0071] The conductive metal layer 11 may include a DC positive region 111, an AC region 112, and a DC negative region 113. Any one of the DC positive region 111, AC region 112, and DC negative region 113 can be square or irregularly shaped with multiple sides, and any one of the sides can be a right-angled side or a hypotenuse. Of course, this application is not limited to this; the shapes of the DC positive region 111, AC region 112, and DC negative region 113 can be flexibly set according to circuit layout requirements.

[0072] The DC positive region 111 can be connected to the positive terminal of a DC power supply, the DC negative region 113 can be connected to the negative terminal of a DC power supply, and the AC region 112 can be connected to an AC output load to achieve DC-AC conversion; or, the AC region 112 can be connected to an AC power supply, the DC positive region 111 can be connected to the positive terminal of a DC load, and the DC negative region 113 can be connected to the negative terminal of a DC load to achieve AC-DC conversion.

[0073] Circuit unit 2 may include an upper bridge 21 and a lower bridge 22. The upper bridge 21 is located in the DC positive region 111, and the lower bridge 22 is located in the AC region 112. Each of the upper bridge 21 and the lower bridge 22 includes a wide bandgap chipset and a silicon-based chipset. Specifically, the upper bridge 21 includes a first wide bandgap chipset 211 and a first silicon-based chipset 212, and the lower bridge 22 includes a second wide bandgap chipset 221 and a second silicon-based chipset 222.

[0074] The first wide bandgap chipset 211 and the second wide bandgap chipset 221 are arranged along a first direction (the Y direction as shown in Figure 1). Both the first wide bandgap chipset 211 and the second wide bandgap chipset 221 include multiple wide bandgap power chips 23 arranged along a second direction (the X direction as shown in Figure 1). The multiple wide bandgap power chips 23 in the first wide bandgap chipset 211 are connected in parallel. Here, "multiple" means two or more. It can be understood that the wide bandgap power chips 23 in the first wide bandgap chipset 211 and the second wide bandgap chipset 221 can correspond one-to-one. The corresponding two wide bandgap power chips 23 can form a half-bridge circuit. Furthermore, since multiple half-bridge circuits are connected in parallel, a half-bridge circuit with a current amplification factor of N times (the number of half-bridge circuits is N) can be formed, which is beneficial to improving the power level of the half-bridge power module 100.

[0075] Multiple wide-bandgap power chips 23 in the first wide-bandgap chipset 211 are electrically connected to the AC region 112, and multiple wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are electrically connected to the DC negative region 113. The electrical connection can be made through a connecting wire 26, which can be a gold wire, silver wire, copper wire, aluminum wire, copper strip, aluminum strip, metal connecting piece, or other conductive metal wire.

[0076] Among them, the wide bandgap semiconductor material can include SiC, GaN, etc., that is, the wide bandgap power chip 23 is a SiC device or a GaN device. The SiC device can be a SiC MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0077] Referring to Figure 1, during the operation of the half-bridge power module 100, part of the current flows from the DC positive region 111 to the DC negative region 113. Multiple wide-bandgap power chips 23 (as shown in Figure 2) in the first wide-bandgap chip group 211 are arranged along the second direction, and each wide-bandgap power chip 23 is connected to the AC region 112 via a connecting line 26 (i.e., the first connecting line 261) along the first direction. This makes the arrangement direction of the multiple wide-bandgap power chips 23 perpendicular to the current flow direction between the first wide-bandgap chip group 211 and the AC region 112. Simultaneously, each wide-bandgap power chip 23 in the first wide-bandgap chip group 211 has a relatively close or even identical current path, improving the current distribution. This results in good dynamic current sharing performance for each wide-bandgap power chip 23 in the first wide-bandgap chip group 211, which is beneficial for ensuring a uniform distribution of current and thermal stress among the wide-bandgap power chips 23.

[0078] Similarly, when multiple wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are arranged along the second direction, and each wide-bandgap power chip 23 is connected to the DC negative terminal region 113 via a connection line 26 (i.e., the second connection line 262) along the first direction, when the current output direction within the DC negative terminal region 113 is the same as the current direction between each wide-bandgap power chip 23 and the DC negative terminal region 113, the wide-bandgap power chips 23 in the second wide-bandgap chipset 221 can have good dynamic current sharing performance, which is beneficial to ensuring the uniform distribution of current stress and thermal stress among the wide-bandgap power chips 23. Of course, the current output direction within the DC negative terminal region 113 is related to the location of the DC negative terminal 118, and this embodiment does not limit this.

[0079] In other words, by setting it up as described above, it can be ensured that each wide bandgap power chip 23 of the first wide bandgap chipset 211 has good dynamic current sharing performance, which is conducive to ensuring the uniform distribution of current stress and thermal stress among each wide bandgap power chip 23.

[0080] Both the first silicon-based chipset 212 and the second silicon-based chipset 222 may include at least one silicon-based power chip 24. For example, there may be one or more silicon-based power chips 24, where "more" refers to two or more. The silicon-based power chip 24 is a Si-based fully controllable power chip, such as a Si IGBT (Insulated Gate Bipolar Transistor) or a Si MOSFET.

[0081] In other words, the half-bridge power module 100 in this embodiment is a hybrid half-bridge power module that integrates wide-bandgap semiconductor devices and silicon semiconductor devices.

[0082] The silicon-based power chips 24 of the first silicon-based chipset 212 and the second silicon-based chipset 222 can be matched one-to-one. The two corresponding wide-bandgap power chips 23 can form a half-bridge circuit. Multiple half-bridge circuits can be connected in parallel to form a half-bridge circuit with a current specification amplification of N (the number of half-bridge circuits is N).

[0083] The half-bridge power module 100 of this application embodiment integrates a wide-bandgap power chip 23 and a silicon-based power chip 24 connected in parallel, forming a single-phase half-bridge power module 100 that combines the wide-bandgap power chip 23 and the silicon-based power chip 24. This can better expand the current specifications and power levels, while also taking into account switching losses and cost issues. Furthermore, the first wide bandgap chip group 211 and the second wide bandgap chip group 221 are arranged along the first direction. Both the first wide bandgap chip group 211 and the second wide bandgap chip group 221 include a plurality of wide bandgap power chips 23 arranged along the second direction. The plurality of wide bandgap power chips 23 in the first wide bandgap chip group 211 are all connected to the AC region 112 through the connecting line 26 along the first direction. The plurality of wide bandgap power chips 23 in the second wide bandgap chip group 221 are all connected to the DC negative region 113 through the connecting line 26 along the first direction. This can at least ensure that each wide bandgap power chip 23 in the first wide bandgap chip group 211 has good dynamic current sharing performance, which is conducive to ensuring the uniform distribution of current stress and thermal stress among each wide bandgap power chip 23, thereby improving the electrical performance and reliability of the half-bridge power module 100.

[0084] For ease of description, the following explanation will use the wide bandgap power chip 23 as a SiC MOSFET and the silicon-based power chip 24 as a Si IGBT as examples.

[0085] In some embodiments, referring to Figures 1-4, at least a portion of the structures of each of the DC positive region 111, AC region 112, and DC negative region 113 extend along a second direction and are arranged sequentially along a first direction. For example, the DC positive region 111 may be integrally formed as a square extending along the second direction, or a portion of the DC positive region 111 may extend along the second direction while the other portion may extend along the first direction; the DC negative region 113 may be integrally formed as a square extending along the second direction, or a portion of the DC negative region 113 may extend along the second direction while the other portion may extend along the first direction; the AC region 112 may be integrally formed as a square extending along the second direction, or a portion of the AC region 112 may extend along the second direction while the other portion may extend along the first direction; the shape and size of any two of the DC positive region 111, AC region 112, and DC negative region 113 may be the same or different, and can be reasonably set according to actual needs. The portions of the DC positive region 111, AC region 112 and DC negative region 113 extending along the second direction can be arranged along the first direction. The first wide bandgap chip group 211 is located in the portion of the DC positive region 111 extending along the second direction, and the second wide bandgap chip group 221 is located in the portion of the AC region 112 extending along the second direction.

[0086] In this way, it is possible for multiple wide bandgap power chips 23 arranged along the second direction on the DC positive region 111 to be connected to the AC region 112 through the connection line 26 along the first direction, and for multiple wide bandgap power chips 23 in the AC region 112 to be connected to the DC negative region 113 through the connection line 26 along the first direction, so as to improve the current sharing among the wide bandgap power chips 23.

[0087] In some embodiments, referring to Figures 1-4, the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211 are aligned in the first direction. This can maximize the current sharing of the plurality of wide bandgap power chips 23 in the first wide bandgap chipset 211, and the layout is relatively simple and compact, which can reduce the space occupied and improve the space utilization rate.

[0088] In some embodiments, referring to Figures 1 and 4, the plurality of wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are aligned in a first direction. This simplifies the layout of the multiple wide-bandgap power chips 23 in the second wide-bandgap chipset 221, reducing the space occupied by the second wide-bandgap chipset 221 and improving space utilization. As an optional example, the DC negative terminal 118 can be located on the side of the DC negative terminal region 113 opposite to the AC region 112 to ensure current sharing among the multiple wide-bandgap chips in the second wide-bandgap chipset 221. Of course, this application does not limit this.

[0089] In some embodiments, referring to Figures 1-4, the substrate 1 may further include a DC positive terminal 117, a DC negative terminal 118, and an AC terminal 119. The DC positive terminal 117 is located in the DC positive region 111, the DC negative terminal 118 is located in the DC negative region 113, and the AC terminal 119 is located in the AC region 112. The DC positive terminal 117, the DC negative terminal 118, and the AC terminal 119 can all be led out from their respective conductive regions to facilitate connection with external circuits.

[0090] In this configuration, the DC positive terminal 117 and the DC negative terminal 118 are located on the same side of the DC positive region 111 and the DC negative region 113 along the second direction, respectively. Both the DC positive terminal 117 and the DC negative terminal 118 can be led out along the second direction. The AC terminal 119 is located on the other side of the AC region 112 along the second direction and can be led out along the second direction. This arrangement of the DC terminals on one side and the AC terminals on the other side helps to reduce the switching commutation loop of the SiC MOSFET, lower the inductance, improve dynamic current sharing, and simplify the construction of the external circuitry used to connect the half-bridge power module 100.

[0091] At this time, with multiple wide bandgap chips in the second wide bandgap chip group 221 arranged along the second direction, the current confluence direction in the DC negative electrode region 113 is along the second direction, which is perpendicular to the current direction between the multiple wide bandgap chips in the second wide bandgap chip group 221 and the DC negative electrode region 113. The dynamic current sharing of each wide bandgap chip can be adjusted by changing the distance between each wide bandgap chip in the second wide bandgap chip group 221 and the DC negative electrode region 113 in the first direction.

[0092] In some embodiments, referring to Figures 11 and 12, any two adjacent wide-bandgap power chips 23 in the second wide-bandgap chipset 221 are staggered along a first direction. This helps to reduce the thermal coupling of the multiple similar wide-bandgap power chips 23 in the second wide-bandgap chipset 221, thereby reducing the thermal impact in this area and improving heat dissipation performance.

[0093] For example, as shown in Figure 12, the second wide bandgap chipset 221 is provided with three wide bandgap power chips 23, which are arranged sequentially along the second direction and toward the AC terminal 119 as wide bandgap power chip 23a, wide bandgap power chip 23b, and wide bandgap power chip 23c. Among them, wide bandgap power chips 23a and wide bandgap power chips 23c are located on the side of wide bandgap power chip 23b away from the DC negative electrode region 113 along the first direction. In this way, on the one hand, it is beneficial to improve the current sharing between wide bandgap power chips 23a and wide bandgap power chips 23b to a certain extent, and on the other hand, it can reduce the thermal coupling between wide bandgap power chips 23a, wide bandgap power chips 23b, and wide bandgap power chips 23c.

[0094] Alternatively, both wide-bandgap power chips 23a and 23c can be located on the side of wide-bandgap power chip 23b facing the DC negative electrode region 113 along the first direction. This can also reduce the thermal coupling between wide-bandgap power chips 23a, 23b, and 23c, and improve heat dissipation performance.

[0095] In addition, referring to Figure 11, the multiple wide bandgap power chips (23) in the second wide bandgap chipset 221 are arranged opposite to the DC negative terminal region along the first direction. The distance between the multiple wide bandgap power chips 23 of the second wide bandgap chipset 221 and the DC output layer along the first direction decreases in the direction along the second direction and away from the DC negative terminal 118. In other words, the wide bandgap power chip 23 that is closest to the DC negative terminal 118 in the second direction has the farthest distance from the DC negative terminal region 113 in the first direction, and the wide bandgap power chip 23 that is farthest from the DC negative terminal 118 in the second direction has the shortest distance from the DC negative terminal region 113 in the first direction. That is, the connection line 26 between the wide bandgap power chip 23 that is closest to the DC negative terminal 118 in the second direction and the DC negative terminal region 113 has the longest length, and the connection line 26 between the wide bandgap power chip 23 that is farthest from the DC negative terminal 118 in the second direction and the DC negative terminal region 113 has the shortest length. At this time, the multiple wide bandgap power chips 23 of the second wide bandgap chipset 221 are distributed in a stepped manner.

[0096] In this way, on the one hand, the spacing between each wide bandgap chip and the DC negative terminal 113 in the first direction can be used to compensate for the spacing between each wide bandgap chip and the DC negative terminal 118 in the second direction, thereby maximizing the current sharing of the multiple wide bandgap power chips 23 in the second wide bandgap chipset 221. On the other hand, it can also minimize the thermal coupling between the various wide bandgap power chips 23, reduce the heat dissipation pressure in this area, improve the heat dissipation performance in this area, thereby improving the overall heat dissipation performance of the half-bridge power module 100, and thus simultaneously taking into account both the current sharing and heat dissipation performance of the multiple wide bandgap power chips 23 in the second wide bandgap chipset 221.

[0097] Of course, as another alternative to improve heat dissipation performance, the distance between the multiple wide bandgap power chips 23 of the second wide bandgap chipset 221 and the DC output layer along the first direction decreases in the direction along the second direction and away from the DC negative terminal 118. In other words, the wide bandgap power chip 23 that is closest to the DC negative terminal 118 in the second direction has the shortest distance from the DC negative terminal 113 in the first direction, and the wide bandgap power chip 23 that is farthest from the DC negative terminal 118 in the second direction has the farthest distance from the DC negative terminal 113 in the first direction.

[0098] Referring to Figures 19 and 20, Figure 19 shows the equivalent circuit of the hybrid half-bridge power module 100 considering parasitic inductance, and Figure 20 shows a typical switching waveform diagram of the hybrid half-bridge power module 100. In the hybrid module application shown in Figure 19, the circuit turn-on process typically begins with the SiC MOSFE turning on first. At this time, the voltage drops, and the SiC MOSFE carries the entire current. Then, the Si IGBT turns on, and the SiC MOSFE and Si IGBT commutate, with each carrying a portion of the current. During the turn-off process, the Si IGBT turns off first. At this time, the SiC MOSFE and Si IGBT commutate, and the SiC chip carries the entire current. Then, the SiC chip turns off, and the voltage rises, resulting in a turn-off voltage spike. The voltage spike generated during the turn-off process has an adverse effect on the normal operation of the half-bridge power module 100 and needs to be minimized. SiC MOSFE switches faster than Si IGBT switches slower. Under the same inductance, the voltage spike generated by SiC MOSFE is much higher than that of IGBT. That is, the turn-off voltage spike caused by the inductance of the switching commutation circuit of SiC MOSFE is more severe.

[0099] Referring to Figures 1-4, to reduce the voltage spike, in this embodiment, the first wide bandgap chipset 211 is located on the side of the first silicon-based chipset 212 along the second direction, closer to the DC positive terminal 117, and the second wide bandgap chipset 221 is located on the side of the second silicon-based chipset 222 along the second direction, away from the AC terminal 119. This significantly shortens the switching commutation loop length of the SiC MOSFE, thereby reducing parasitic inductance, lowering the turn-off voltage spike, improving the stability and reliability of the half-bridge power module 100, and reducing interference to other electronic components in the circuit.

[0100] In some embodiments, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 are also provided with diodes 25. The diodes 25 are made of the same material as the wide bandgap power chip 23, for example, the diodes 25 can be SiC SBDs (Schottky diodes 25), etc. The diodes 25 are connected in parallel with the wide bandgap power chip 23. The diodes 25 can be used to protect the SiC MOSFE and prevent reverse voltage or excessive voltage from damaging the SiC MOSFE. In addition, by connecting the SiC SBD in parallel, the reverse recovery charge of the SiC SBD is lower when the SiC MOSFE is turned off during the dead time, which can greatly reduce power loss, and also help to eliminate parasitic inductance, reduce energy loss, and improve conversion efficiency, thereby improving the performance of the half-bridge power module 100. The diodes 25 in the first wide bandgap chipset 211 can be connected to the AC region 112 through the connecting line 26, and the diodes 25 in the second wide bandgap chipset 221 can be connected to the DC negative region 113 through the connecting line 26.

[0101] Furthermore, referring to Figures 1-4, considering that the silicon-based power chip 24, such as a Si IGBT, has a long internal capacitance and reverse recovery time during operation, it may experience delayed turn-off and overvoltage, or even damage to the Si IGBT. Therefore, in this embodiment, both the first silicon-based chip group 212 and the second silicon-based chip group 222 include at least one diode 25. That is, there can be one or more diodes 25, where "multiple" refers to two or more. Each diode 25 corresponds one-to-one with a silicon-based power chip 24, and the corresponding silicon-based power chip 24 and diode 25 are connected in parallel to form a chip pair. For example, the diode 25 can be a fast recovery diode 25, and the diode 25 can be connected in reverse parallel with the silicon-based power chip 24.

[0102] In this embodiment, by connecting a diode 25 in reverse parallel to the silicon-based power chip 24, the response speed of the silicon-based power chip 24, such as a Si IGBT, during the turn-off process can be enhanced, overvoltage can be reduced, current cut-off speed can be improved, the Si IGBT can be better protected, and the overall efficiency and reliability of the half-bridge power module 100 can be improved. Specifically, the diode 25 in the first silicon-based chipset 212 can be connected to the AC region 112 via a connecting line 26, and the diode 25 in the second silicon-based chipset 222 can be connected to the DC negative region 113 via a connecting line 26.

[0103] Optionally, only the first wide bandgap chipset 211 and the second wide bandgap chipset 221 may have diodes 25 with the same substrate material as the wide bandgap power chip 23; or, only the first silicon-based chipset 212 and the second silicon-based chipset 222 may have diodes 25 with the same substrate material as the silicon-based power chip 24; or, the first wide bandgap chipset 211 and the second wide bandgap chipset 221 may have diodes 25 with the same substrate material as the wide bandgap power chip 23, while the first silicon-based chipset 212 and the second silicon-based chipset 222 may have diodes 25 with the same substrate material as the silicon-based power chip 24.

[0104] For ease of description, the following description will only take the example of the first silicon-based chipset 212 and the second silicon-based chipset 222 having diodes 25 made of the same material as the silicon-based power chip 24.

[0105] In some embodiments, referring to Figures 1-4 and 13-16, there are multiple silicon-based power chips 24 and diodes 25 in the first silicon-based chipset 212 and the second silicon-based chipset 222. Thus, multiple chip pairs are formed in both the first silicon-based chipset 212 and the second silicon-based chipset 222. The multiple chip pairs are arranged along the second direction, which can amplify the current specification, expand the power level, and improve the power load.

[0106] Furthermore, the silicon-based power chip 24 and diode 25 in each chip pair are arranged along a first direction or a second direction.

[0107] As shown in Figures 13, 15, and 16, there are two chip pairs, meaning there can be two silicon-based power chips 24 and two diodes 25. In this case, the silicon-based power chips 24 and diodes 25 can be arranged alternately in the second direction. In this configuration, the silicon-based power chips 24 and diodes 25 in the first silicon-based chip group 212 are connected to the AC region 112 via a connecting line 26 along the first direction, and the silicon-based power chips 24 and diodes 25 in the second silicon-based chip group 222 are connected to the DC negative region 113 via the connecting line 26 along the first direction. This separates silicon-based chips of the same type (including the aforementioned silicon-based power chips 24 and diodes 25) in each conductive region, which helps avoid thermal coupling between similar silicon-based chips, reduces heat dissipation pressure, and minimizes the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the first direction, thus improving space utilization.

[0108] Alternatively, as shown in Figures 15 and 16, the silicon-based power chip 24 and diode 25 in each chip pair are arranged along a first direction.

[0109] In some embodiments, the silicon-based power chips 24 and diodes 25 in multiple chip pairs are arranged in the same or opposite directions.

[0110] For example, as shown in Figure 15, there are two chip pairs. The silicon-based power chip 24 and diode 25 in each chip pair are arranged along the first direction, and the silicon-based power chip 24 in each chip pair is located on the same side of the corresponding diode 25 along the first direction. In this way, the current sharing performance of the silicon-based power chip 24 in the two chip pairs is better, and the current sharing performance of the diode 25 in the two chip pairs is better. In addition, the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the second direction is smaller.

[0111] Alternatively, as shown in Figure 16, there are two chip pairs. In each chip pair, the silicon-based power chip 24 and diode 25 are arranged along a first direction. In one chip pair, the silicon-based power chip 24 is located on one side of the corresponding diode 25 along the first direction, and in the other chip pair, the silicon-based power chip 24 is located on the other side of the corresponding diode 25 along the first direction. Furthermore, the silicon-based power chip 24 and diode 25 in one chip pair are arranged side-by-side along a second direction. This arrangement, with the silicon-based power chips 24 and diodes 25 in multiple chip pairs facing opposite directions, helps reduce thermal coupling of the same type of silicon-based chip, improves heat dissipation performance, and reduces the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 along the second direction.

[0112] Understandably, when the silicon-based power chip 24 and diode 25 in each chip pair are arranged along the first direction, the space occupied by the first silicon-based chip group 212 and the second silicon-based chip group 222 in the first direction increases and the space occupied in the second direction decreases. Therefore, the size of the area of ​​the DC positive region 111 corresponding to the first silicon-based chip group 212 can be adjusted to match the space occupied by the first silicon-based chip group 212 in the first and second directions. At the same time, the size of the area of ​​the AC region 112 corresponding to the second silicon-based chip group 222 can also be adjusted to match the space occupied by the second silicon-based chip group 222 in the first and second directions.

[0113] In some embodiments, referring to FIG14, both the first silicon-based chipset 212 and the second silicon-based chipset 222 have multiple chip pairs. Multiple silicon-based power chips 24 are arranged adjacent to each other along a second direction, and multiple diodes 25 are arranged adjacent to each other along the second direction. In other words, in this embodiment, chips of the same type are adjacent to each other and connected to corresponding conductive areas via connecting lines 26 along the first direction. This chip arrangement in this embodiment facilitates the setting of the driving connecting lines 26, and the smaller dimensions of the first silicon-based chipset 212 and the second silicon-based chipset 222 along the first direction improve the space utilization of the first silicon-based chipset 212 and the second silicon-based chipset 222 along the first direction.

[0114] In some embodiments, referring to Figures 1-7, the wide-bandgap power chip 23 includes a SiC MOSFET, and the silicon-based power chip 24 includes a Si IGBT. That is, in this embodiment, the copper layers of the SiC half-bridge and the IGBT half-bridge are not electrically connected inside the power module. This reduces the commutation inductance between the SiC device and the IGBT device, shortens the commutation time, and improves efficiency.

[0115] Referring to Figure 5, the SiC MOSFET includes a source 231, a gate 232, and a drain 233. The drain 233 is located on the side of the SiC MOSFET facing the conductive metal layer 11 and is connected to the conductive region thereon through a welding or sintering process. The source 231 and the gate 232 are located on the side of the SiC MOSFET away from the conductive metal layer 11 and are used to connect to other conductive regions.

[0116] Referring to Figure 6, the Si IGBT includes an emitter 241, a gate 242, and a collector 243. The collector 243 is located at the bottom of the Si IGBT (the side of the Si IGBT facing the conductive metal layer 11) and is used to connect with the conductive region thereon by means of sintering, welding, etc. The emitter 241 and the gate 242 are located on the side of the Si IGBT away from the conductive metal layer 11 and are used to connect with other conductive regions.

[0117] Referring to Figure 7, diode 25 can be a Si FRD (fast recovery diode). Diode 25 includes a cathode 252 and an anode 251. The anode 251 is located at the top of diode 25 (i.e., the side of diode 25 facing away from conductive metal layer 11) and is used for electrical connection with other conductive areas. The cathode 252 is located at the bottom of diode 25 (i.e., the side of diode 25 facing conductive metal layer 11) and is connected to the conductive area thereon by sintering or welding.

[0118] In other words, the half-bridge power module 100 of this embodiment packages a SiC MOSFET and a Si IGBT in parallel. This allows the SiC MOSFET to perform the switching action using drive signals with different timings, while the Si IGBT bears most of the conduction current. This solves the problems of high switching losses and low switching frequency of IGBTs. Furthermore, a larger current can be controlled by a SiC MOSFET with a smaller current carrying capacity, thus solving the problem of high SiC cost. In this way, both the performance and cost of the half-bridge power module 100 can be balanced.

[0119] In some embodiments, referring to Figures 1-4, 17 and 18, the conductive metal layer 11 may further include two driving layer groups, which correspond to the upper bridge 21 and the lower bridge 22 respectively, and the two driving layer groups are the first driving layer group 114 and the second driving layer group 115 respectively.

[0120] The first driving layer group 114 may include: a first SiC gate driving layer 1141, a first IGBT gate driving layer 1142, a first SiC source driving layer 1143, and a first IGBT emitter driving layer 1144. The gate 232 of the SiC MOSFET of the upper bridge 21 is connected to the first SiC gate driving layer 1141 via a connection line 26, the source 231 of the SiC MOSFET of the upper bridge 21 is connected to the first SiC source driving layer 1143 via a connection line 26, the gate 242 of the Si IGBT of the upper bridge 21 is connected to the first IGBT gate driving layer 1142 via a connection line 26, and the emitter 241 of the Si IGBT of the upper bridge 21 is connected to the first IGBT emitter driving layer 1144 via a connection line 26.

[0121] The second driving layer group 115 may include: a second SiC gate driving layer 1151, a second IGBT gate driving layer 1152, a second SiC source driving layer 1153, and a second IGBT emitter driving layer 1154. The gate 232 of the SiC MOSFET of the lower bridge 22 is connected to the second SiC gate driving layer 1151 through the connection line 26. The source 231 of the SiC MOSFET of the lower bridge 22 is connected to the second SiC source driving layer 1153 through the connection line 26. The gate 242 of the Si IGBT of the lower bridge 22 is connected to the second IGBT gate driving layer 1152 through the connection line 26. The emitter 241 of the Si IGBT of the lower bridge 22 is connected to the second IGBT emitter driving layer 1154 through the connection line 26.

[0122] Thus, by setting up the first driving layer group 114 and the second driving layer group 115, it is possible to facilitate the connection between each wide bandgap power chip 23, silicon-based power chip 24 and external circuits.

[0123] Optionally, driving terminals 116 are provided on the first SiC gate driving layer 1141, the first IGBT gate driving layer 1142, the first SiC source driving layer 1143, the first IGBT emitter driving layer 1144, the second SiC gate driving layer 1151, the second IGBT gate driving layer 1152, the second SiC source driving layer 1153, and the second IGBT emitter driving layer 1154. Each driving terminal 116 can be led out perpendicular to the substrate 1 to simplify the internal circuit structure of the half-bridge power module 100, reduce space occupation, and facilitate the connection of the half-bridge power module 100 with external circuits.

[0124] Optionally, the first SiC source driving layer 1143 is disposed on the side of the first SiC source driving layer 1143 near the DC positive region 111, and correspondingly, the second SiC source driving layer 1153 is disposed on the side of the second SiC source driving layer 1153 near the AC region 112. This can minimize the transmission path of the driving signal, further shorten the commutation loop of the SiC MOSFET, reduce parasitic inductance, and improve dynamic current sharing.

[0125] In some embodiments, referring to FIG4, a first SiC source drive layer 1143 is provided with a plurality of drive resistors 120 corresponding to and connected to a plurality of wide bandgap power chips 23 in a first wide bandgap chipset 211; a second SiC source drive layer 1153 is provided with a plurality of drive resistors 120 corresponding to and connected to a plurality of wide bandgap power chips 23 in a second wide bandgap chipset 221. The drive resistors 120 can connect the gate 232 of the corresponding wide bandgap power chip 23, such as a SiC MOSFET, to the copper layer thereon. By setting the drive resistors 120, the gate current 232 of the SiC MOSFET can be limited, ensuring the switching speed and performance of the SiC MOSFET. In addition, the drive circuit can be protected from damage by overcurrent and overvoltage.

[0126] Optionally, the multiple driving resistors 120 on the first SiC source driving layer 1143 can be connected in series or in parallel as needed, and the multiple driving resistors 120 on the second SiC source driving layer 1153 can be connected in series or in parallel as needed.

[0127] Understandably, since the first SiC source drive layer 1143 is located on the side of the first SiC source drive layer 1143 closer to the DC positive region 111, and the second SiC source drive layer 1153 is located on the side of the second SiC source drive layer 1153 closer to the AC region 112, the driving resistors 120 are brought closer to the corresponding SiC MOSFETs, minimizing the resistance and capacitance of the drive signal transmission, which is beneficial to improving the system's response speed and stability.

[0128] In some embodiments, referring to Figures 1-4 and Figure 17, the first SiC source driving layer 1143 and the first IGBT emitter driving layer 1144 are connected to form a first common copper layer 1145. In this case, the first SiC source driving layer 1143 and the first IGBT emitter driving layer 1144 can share the same driving terminal 116. This simplifies the internal structure of the half-bridge power module 100.

[0129] In some embodiments, the second SiC source driving layer 1153 and the second IGBT emitter driving layer 1154 are connected to form a second common copper layer 1155. In this case, the second SiC source driving layer 1153 and the second IGBT emitter driving layer 1154 can share the same driving terminal 116. This simplifies the internal structure of the half-bridge power module 100.

[0130] In some embodiments, referring to FIG1, the conductive metal layer 11 may include a first side 110a and a second side 110b opposite to each other along a first direction, and a third side 110c and a fourth side 110d opposite to each other along a second direction.

[0131] The first driving layer group 114 is disposed along the first side 110a, and at least a portion of the structure of the DC positive region 111 is located on the side of the first driving layer group 114 away from the first side 110a along the first direction. For example, the DC positive region 111 may be entirely located on the side of the first driving layer group 114 away from the first side 110a along the first direction; or, the DC positive region 111 may partially surround the first driving layer group 114, in which case a portion of the DC positive region 111 is located on the side of the first driving layer group 114 away from the first side 110a along the first direction, and another portion is disposed along the first side 110a and arranged side by side with the first driving layer group 114 along the second direction. In this way, the distance between the wide bandgap power chip 23 and the silicon-based power chip 24 in the DC positive region 111 and the first driving layer group 114 can be shortened as much as possible, thereby shortening the length of the connection lines 26 of each chip in the upper bridge 21, which is beneficial to reducing parasitic inductance.

[0132] The second driving layer group 115 is located on the side of the DC negative electrode region 113 facing the second side 110b along the first direction. That is, the second driving layer group 115 is disposed along the second side 110b, and at least a portion of the structure of the DC negative electrode region 113 is located on the side of the second driving layer group 115 away from the second side 110b along the first direction. For example, the DC negative electrode region 113 may be entirely located on the side of the second driving layer group 115 away from the second side 110b along the first direction; or, the DC negative electrode region 113 may partially surround the second driving layer group 115. In this case, a portion of the DC negative electrode region 113 is located on the side of the second driving layer group 115 away from the second side 110b along the first direction, and another portion is disposed along the second side 110b and arranged side by side with the second driving layer group 115 along the second direction.

[0133] The AC region 112 at least partially surrounds the second driving layer group 115. In this way, the distance between the wide bandgap power chip 23 and the silicon-based power chip 24 in the AC region 112 and the second driving layer group 115 can be shortened as much as possible, thereby shortening the length of the connection line 26 of each chip in the lower bridge 22, which is beneficial to reducing parasitic inductance.

[0134] The following describes a full-bridge power module 300 according to a second aspect embodiment of this application.

[0135] Referring to Figure 21, the full-bridge power module 300 of this embodiment may include the half-bridge power module 100 described in the above embodiment. Specifically, there may be three half-bridge power modules 100, which are connected together to form a three-phase full-bridge power module 300. Each half-bridge power module 100 corresponds to one single phase. For example, the three half-bridge power modules 100 include a first half-bridge power module 100, a second half-bridge power module 100, and a third half-bridge power module 100. The first half-bridge power module 100 corresponds to phase U, the second half-bridge power module 100 corresponds to phase V, and the third half-bridge power module 100 corresponds to phase W. The first half-bridge power module 100, the second half-bridge power module, and the third half-bridge power module 100 may be arranged sequentially, or their order may be adjusted as needed.

[0136] In addition, the full-bridge power module 300 may also include a heat sink 200, and the three half-bridge power modules 100 may all be mounted on the same heat sink 200.

[0137] The full-bridge power module 300 according to the embodiments of this application is composed of three half-bridge power modules 100 as described in the above embodiments. Since each half-bridge power module 100 is a plurality of parallel half-bridge circuits formed by wide-bandgap power chips 23 and silicon-based power chips 24, the current specification of the full-bridge power module 300 is greatly amplified, which can better convert DC power into AC power for use by electrical devices. It has stronger electrical performance and is more suitable for use as an automotive-grade power module.

[0138] The following describes an electrical appliance 400 according to an embodiment of a third aspect of this application.

[0139] The electrical device 400 in this embodiment can be a new energy vehicle or other types of electrical device 400. The electrical device 400 may include a power module, which may include the half-bridge power module 100 in the first aspect embodiment above, and / or the full-bridge power module 300 in the second aspect embodiment above.

[0140] Specifically, the electrical equipment 400 also includes an energy storage device and an electrical device. The energy storage device can be a battery pack, and the electrical device can be a motor, such as a three-phase AC motor. A power module is located between the energy storage device and the electrical device, and the power module can convert the DC power generated by the energy storage device into AC power for the use of the electrical device.

[0141] The electrical equipment 400 may be equipped with only a half-bridge power module 100, or only a full-bridge power module 300, or the half-bridge power module 100 and the full-bridge power module 300 may be combined as needed.

[0142] The electrical device 400 in this embodiment of the application can convert the direct current generated by the energy storage device into alternating current to power the electrical device, such as the motor, thereby providing power for the vehicle's movement. Furthermore, since the power module adopts the half-bridge power module 100 and / or the full-bridge power module 300 in the above embodiment, the current specification is higher, which can better perform AC-DC conversion and make the performance more reliable.

[0143] The various embodiments or implementation methods described in this specification are presented in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0144] It should be noted that the embodiments referred to in the specification, such as "one embodiment," "embodiment," "exemplary embodiment," and "some embodiments," may include specific features, structures, or characteristics, but not every embodiment necessarily includes that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not, is within the knowledge scope of those skilled in the art.

[0145] Generally speaking, terms should be understood at least in part by their use in context. For example, at least in part by context, the term "one or more" as used in the text can be used to describe any feature, structure, or characteristic of the singular meaning, or a combination of features, structures, or characteristics of the plural meaning. Similarly, at least in part by context, terms such as "a" or "the" can also be understood to convey either singular or plural usage.

[0146] It should be readily understood that the terms “on,” “above,” and “on top of” in this disclosure should be interpreted in the broadest possible sense, such that “on” means not only “directly on something” but also “on something” with an intermediate feature or layer therebetween, and that “above” or “on top of” means not only “on top of something” but also “on top of something” without an intermediate feature or layer therebetween (i.e., directly on something).

[0147] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A half-bridge power module (100), wherein, include: The substrate (1) includes a first surface, the first surface being provided with a conductive metal layer (11), the conductive metal layer (11) including a DC positive electrode region (111), an AC region (112) and a DC negative electrode region (113); The circuit unit (2) includes an upper bridge (21) and a lower bridge (22). The upper bridge (21) is located in the DC positive region (111), and the lower bridge (22) is located in the AC region (112). The upper bridge (21) includes a first wide bandgap chipset (211) and a first silicon-based chipset (212). The lower bridge (22) includes a second wide bandgap chipset (221) and a second silicon-based chipset (222). The first wide bandgap chip group (211) and the second wide bandgap chip group (221) are arranged along a first direction. Both the first wide bandgap chip group (211) and the second wide bandgap chip group (221) include a plurality of wide bandgap power chips (23) arranged along a second direction. Both the first silicon-based chip group (212) and the second silicon-based chip group (222) include at least one silicon-based power chip (24).

2. The half-bridge power module (100) according to claim 1, wherein, The multiple wide bandgap power chips (23) of the second wide bandgap chipset (221) correspond one-to-one with the multiple wide bandgap power chips (23) in the first wide bandgap chipset (211) and are electrically connected to form a half-bridge circuit. The multiple wide bandgap power chips (23) in the first wide bandgap chipset (211) are connected in parallel with each other.

3. The half-bridge power module (100) according to claim 1 or 2, wherein, At least a portion of the structure of each of the DC positive region (111) and the AC region (112) extends along the second direction, the first wide bandgap chip group (211) is disposed in the portion of the DC positive region (111) extending along the second direction, and the second wide bandgap chip group (221) is disposed in the portion of the AC region (112) extending along the second direction.

4. The half-bridge power module (100) according to claim 3, wherein, At least a portion of the structure of the DC negative pole region (113) extends along the second direction.

5. The half-bridge power module (100) according to claim 4, wherein, The DC positive region (111), the AC region (112), and the DC negative region (113) are arranged sequentially along the first direction.

6. The half-bridge power module (100) according to any one of claims 1-5, wherein, The multiple wide-bandgap power chips (23) in the first wide-bandgap chipset (211) are all connected to the AC area (112) via the first connection line (261)(26).

7. The half-bridge power module (100) according to claim 6, wherein, The multiple wide-bandgap power chips (23) in the second wide-bandgap chipset (221) are all connected to the DC negative region (113) via the second connection line (262)(26).

8. The half-bridge power module (100) according to any one of claims 1-7, wherein, A plurality of wide bandgap power chips (23) of at least one of the first wide bandgap chipset (211) and the second wide bandgap chipset (221) are arranged in parallel in the first direction.

9. The half-bridge power module (100) according to any one of claims 1-8, wherein, The DC positive region (111) is provided with a DC positive terminal (117), the DC negative region (113) is provided with a DC negative terminal (118), and the AC region (112) is provided with an AC terminal (119).

10. The half-bridge power module (100) according to claim 9, wherein, The DC positive terminal (117) and the DC negative terminal (118) are located on the same side of the DC positive region (111) and the DC negative region (113) along the second direction, respectively, and the AC terminal (119) is located on the other side of the AC region (112) along the second direction.

11. The half-bridge power module (100) according to claim 8, wherein, In the second wide bandgap chipset (221), any two adjacent wide bandgap power chips (23) are staggered along the first direction.

12. The half-bridge power module (100) according to claim 11, wherein, The multiple wide-bandgap power chips (23) in the second wide-bandgap chipset (221) are arranged opposite to the DC negative electrode region (113) along the first direction.

13. The half-bridge power module (100) according to claim 11, wherein, In the direction along the second direction and away from the DC negative terminal (118), the distance between the plurality of wide bandgap power chips (23) of the second wide bandgap chipset (221) and the DC negative terminal region (113) decreases one by one.

14. The half-bridge power module (100) according to claim 9, wherein, In the second direction of the DC positive terminal region (111), the first wide bandgap chip group (211) is disposed between the first silicon-based chip group (212) and the DC positive terminal (117).

15. The half-bridge power module (100) according to claim 14, wherein, In the second direction of the AC area (112), the second wide bandgap chipset (221) is disposed between the second silicon-based chipset (222) and the AC terminal (119).

16. The half-bridge power module (100) according to any one of claims 1-15, wherein, Both the first silicon-based chipset (212) and the second silicon-based chipset (222) include at least one diode (25), which forms a chip pair with other silicon-based power chips (24) within the chipset.

17. The half-bridge power module (100) according to claim 16, wherein, The diode (25) has the same substrate material as the silicon-based power chip (24).

18. The half-bridge power module (100) according to claim 16, wherein, The first silicon-based chip group (212) and the second silicon-based chip group (222) each have multiple chip pairs, and the multiple chip pairs are arranged along the second direction.

19. The half-bridge power module (100) according to claim 16, wherein, The silicon-based power chip (24) and diode (25) in each chip pair are arranged along the first direction or the second direction.

20. The half-bridge power module (100) according to claim 16, wherein, The silicon-based power chips (24) and diodes (25) in the plurality of chip pairs are arranged in the same or opposite directions.

21. The half-bridge power module (100) according to claim 19, wherein, Both the first silicon-based chipset (212) and the second silicon-based chipset (222) contain multiple chip pairs, wherein multiple silicon-based power chips (24) are arranged adjacent to each other along the second direction, and multiple diodes (25) are arranged adjacent to each other along the second direction. Furthermore, the plurality of silicon-based power chips (24) and the diodes (25) are arranged along the second direction.

22. The half-bridge power module (100) according to any one of claims 1-21, wherein, The wide bandgap power chip (23) includes a SiC MOSFET, and the silicon-based power chip (24) includes a Si IGBT.

23. The half-bridge power module (100) according to claim 22, wherein, The conductive metal layer (11) further includes: The first driving layer group (114) includes: a first SiC gate driving layer (1141), a first IGBT gate driving layer (1142), a first SiC source driving layer (1143), and a first IGBT emitter driving layer (1144). The gate (232) of the SiC MOSFET of the upper bridge (21) is connected to the first SiC gate driving layer (1141), the source (231) of the SiC MOSFET of the upper bridge (21) is connected to the first SiC source driving layer (1143), the gate (242) of the Si IGBT of the upper bridge (21) is connected to the first IGBT gate driving layer (1142), and the emitter (241) of the Si IGBT of the upper bridge (21) is connected to the first IGBT emitter driving layer (1144).

24. The half-bridge power module (100) according to claim 23, wherein, The first SiC source driving layer (1143) and the first IGBT emitter driving layer (1144) are connected to form a first common copper layer (1145).

25. The half-bridge power module (100) according to claim 23, wherein, The first SiC source drive layer (1143) is provided with a plurality of drive resistors (120) that correspond one-to-one with and are connected to the plurality of wide bandgap power chips (23) in the first wide bandgap chipset (211).

26. The half-bridge power module (100) according to claim 23, wherein, The conductive metal layer (11) further includes: The second driving layer group (115) includes: a second SiC gate driving layer (1151), a second IGBT gate driving layer (1152), a second SiC source driving layer (1153), and a second IGBT emitter driving layer (1154). The gate (232) of the SiC MOSFET of the lower bridge (22) is connected to the second SiC gate driving layer (1151), the source (231) of the SiC MOSFET of the lower bridge (22) is connected to the second SiC source driving layer (1153), the gate (242) of the Si IGBT of the lower bridge (22) is connected to the second IGBT gate driving layer (1152), and the emitter (241) of the Si IGBT of the lower bridge (22) is connected to the second IGBT emitter driving layer (1154).

27. The half-bridge power module (100) according to claim 26, wherein, The second SiC source drive layer (1153) and the second IGBT emitter drive layer (1154) are connected to form a second common copper layer (1155).

28. The half-bridge power module (100) according to claim 26, wherein, The second SiC source drive layer (1153) is provided with a plurality of drive resistors (120) that correspond one-to-one with and are connected to the plurality of wide bandgap power chips (23) in the second wide bandgap chipset (221).

29. The half-bridge power module (100) according to claim 26, wherein, The conductive metal layer (11) includes a first side (110a) and a second side opposite to each other along the first direction. The first driving layer group (114) is disposed along the first side (110a), and at least a portion of the structure of the DC positive pole region (111) is located on the side of the first driving layer group (114) away from the first side (110a) along the first direction.

30. The half-bridge power module (100) according to claim 29, wherein, The second driving layer group (115) is located on one side of the DC negative pole region (113) along the second direction toward the second side, or the AC region (112) at least partially surrounds the second driving layer group (115).

31. A full-bridge power module (300), wherein, include: The half-bridge power module (100) according to any one of claims 1-30, wherein there are three half-bridge power modules (100), the three half-bridge power modules (100) are connected to form a three-phase full-bridge power module (300), and each half-bridge power module (100) corresponds to one of the single phases.

32. An electrical appliance (400), wherein, The power module includes a half-bridge power module (100) as described in any one of claims 1-30.

33. An electrical appliance (400), wherein, Includes a power module, the power module comprising: the full-bridge power module (300) of claim 31.

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